Commit | Line | Data |
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06fcb0c6 IM |
1 | #ifndef _LINUX_IRQ_H |
2 | #define _LINUX_IRQ_H | |
1da177e4 LT |
3 | |
4 | /* | |
5 | * Please do not include this file in generic code. There is currently | |
6 | * no requirement for any architecture to implement anything held | |
7 | * within this file. | |
8 | * | |
9 | * Thanks. --rmk | |
10 | */ | |
11 | ||
23f9b317 | 12 | #include <linux/smp.h> |
1da177e4 | 13 | |
06fcb0c6 | 14 | #ifndef CONFIG_S390 |
1da177e4 LT |
15 | |
16 | #include <linux/linkage.h> | |
17 | #include <linux/cache.h> | |
18 | #include <linux/spinlock.h> | |
19 | #include <linux/cpumask.h> | |
503e5763 | 20 | #include <linux/gfp.h> |
908dcecd | 21 | #include <linux/irqreturn.h> |
dd3a1db9 | 22 | #include <linux/irqnr.h> |
77904fd6 | 23 | #include <linux/errno.h> |
503e5763 | 24 | #include <linux/topology.h> |
3aa551c9 | 25 | #include <linux/wait.h> |
1da177e4 LT |
26 | |
27 | #include <asm/irq.h> | |
28 | #include <asm/ptrace.h> | |
7d12e780 | 29 | #include <asm/irq_regs.h> |
1da177e4 | 30 | |
57a58a94 | 31 | struct irq_desc; |
ec701584 | 32 | typedef void (*irq_flow_handler_t)(unsigned int irq, |
7d12e780 | 33 | struct irq_desc *desc); |
57a58a94 DH |
34 | |
35 | ||
1da177e4 LT |
36 | /* |
37 | * IRQ line status. | |
6e213616 | 38 | * |
950f4427 | 39 | * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h |
6e213616 TG |
40 | * |
41 | * IRQ types | |
1da177e4 | 42 | */ |
6e213616 TG |
43 | #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ |
44 | #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ | |
45 | #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ | |
46 | #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) | |
47 | #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ | |
48 | #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ | |
876dbd4c | 49 | #define IRQ_TYPE_LEVEL_MASK (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH) |
6e213616 | 50 | #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ |
876dbd4c | 51 | |
6e213616 TG |
52 | #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ |
53 | ||
54 | /* Internal flags */ | |
009b4c3b TG |
55 | |
56 | #ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT | |
57 | #define IRQ_INPROGRESS 0x00000100 /* DEPRECATED */ | |
163ef309 TG |
58 | #define IRQ_REPLAY 0x00000200 /* DEPRECATED */ |
59 | #define IRQ_WAITING 0x00000400 /* DEPRECATED */ | |
c1594b77 | 60 | #define IRQ_DISABLED 0x00000800 /* DEPRECATED */ |
2a0d6fb3 | 61 | #define IRQ_PENDING 0x00001000 /* DEPRECATED */ |
6e40262e | 62 | #define IRQ_MASKED 0x00002000 /* DEPRECATED */ |
f230b6d5 TG |
63 | /* DEPRECATED use irq_setaffinity_pending() instead*/ |
64 | #define IRQ_MOVE_PENDING 0x00004000 | |
2bdd1055 | 65 | #define IRQ_AFFINITY_SET 0x02000000 /* DEPRECATED */ |
009b4c3b TG |
66 | #endif |
67 | ||
f230b6d5 | 68 | #define IRQ_LEVEL 0x00008000 /* IRQ level triggered */ |
950f4427 TG |
69 | #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */ |
70 | #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */ | |
71 | #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */ | |
72 | #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */ | |
d7e25f33 | 73 | #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */ |
d7e25f33 | 74 | #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */ |
f6d87f4b | 75 | #define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */ |
399b5da2 | 76 | #define IRQ_NESTED_THREAD 0x10000000 /* IRQ is nested into another, no own handler thread */ |
950f4427 | 77 | |
44247184 TG |
78 | #define IRQF_MODIFY_MASK \ |
79 | (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \ | |
872434d6 | 80 | IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \ |
6f91a52d | 81 | IRQ_PER_CPU | IRQ_NESTED_THREAD) |
44247184 | 82 | |
8f53f924 TG |
83 | #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) |
84 | ||
85 | static inline __deprecated bool CHECK_IRQ_PER_CPU(unsigned int status) | |
86 | { | |
87 | return status & IRQ_PER_CPU; | |
88 | } | |
1da177e4 | 89 | |
3b8249e7 TG |
90 | /* |
91 | * Return value for chip->irq_set_affinity() | |
92 | * | |
93 | * IRQ_SET_MASK_OK - OK, core updates irq_data.affinity | |
94 | * IRQ_SET_MASK_NOCPY - OK, chip did update irq_data.affinity | |
95 | */ | |
96 | enum { | |
97 | IRQ_SET_MASK_OK = 0, | |
98 | IRQ_SET_MASK_OK_NOCOPY, | |
99 | }; | |
100 | ||
5b912c10 | 101 | struct msi_desc; |
6a6de9ef | 102 | |
ff7dcd44 TG |
103 | /** |
104 | * struct irq_data - per irq and irq chip data passed down to chip functions | |
105 | * @irq: interrupt number | |
106 | * @node: node index useful for balancing | |
91c49917 TG |
107 | * @state_use_accessor: status information for irq chip functions. |
108 | * Use accessor functions to deal with it | |
ff7dcd44 TG |
109 | * @chip: low level interrupt hardware access |
110 | * @handler_data: per-IRQ data for the irq_chip methods | |
111 | * @chip_data: platform-specific per-chip private data for the chip | |
112 | * methods, to allow shared chip implementations | |
113 | * @msi_desc: MSI descriptor | |
114 | * @affinity: IRQ affinity on SMP | |
ff7dcd44 TG |
115 | * |
116 | * The fields here need to overlay the ones in irq_desc until we | |
117 | * cleaned up the direct references and switched everything over to | |
118 | * irq_data. | |
119 | */ | |
120 | struct irq_data { | |
121 | unsigned int irq; | |
122 | unsigned int node; | |
91c49917 | 123 | unsigned int state_use_accessors; |
ff7dcd44 TG |
124 | struct irq_chip *chip; |
125 | void *handler_data; | |
126 | void *chip_data; | |
127 | struct msi_desc *msi_desc; | |
128 | #ifdef CONFIG_SMP | |
129 | cpumask_var_t affinity; | |
130 | #endif | |
ff7dcd44 TG |
131 | }; |
132 | ||
f230b6d5 TG |
133 | /* |
134 | * Bit masks for irq_data.state | |
135 | * | |
876dbd4c | 136 | * IRQD_TRIGGER_MASK - Mask for the trigger type bits |
f230b6d5 | 137 | * IRQD_SETAFFINITY_PENDING - Affinity setting is pending |
a005677b TG |
138 | * IRQD_NO_BALANCING - Balancing disabled for this IRQ |
139 | * IRQD_PER_CPU - Interrupt is per cpu | |
2bdd1055 | 140 | * IRQD_AFFINITY_SET - Interrupt affinity was set |
876dbd4c | 141 | * IRQD_LEVEL - Interrupt is level triggered |
f230b6d5 TG |
142 | */ |
143 | enum { | |
876dbd4c | 144 | IRQD_TRIGGER_MASK = 0xf, |
a005677b TG |
145 | IRQD_SETAFFINITY_PENDING = (1 << 8), |
146 | IRQD_NO_BALANCING = (1 << 10), | |
147 | IRQD_PER_CPU = (1 << 11), | |
2bdd1055 | 148 | IRQD_AFFINITY_SET = (1 << 12), |
876dbd4c | 149 | IRQD_LEVEL = (1 << 13), |
f230b6d5 TG |
150 | }; |
151 | ||
152 | static inline bool irqd_is_setaffinity_pending(struct irq_data *d) | |
153 | { | |
154 | return d->state_use_accessors & IRQD_SETAFFINITY_PENDING; | |
155 | } | |
156 | ||
a005677b TG |
157 | static inline bool irqd_is_per_cpu(struct irq_data *d) |
158 | { | |
159 | return d->state_use_accessors & IRQD_PER_CPU; | |
160 | } | |
161 | ||
162 | static inline bool irqd_can_balance(struct irq_data *d) | |
163 | { | |
164 | return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING)); | |
165 | } | |
166 | ||
2bdd1055 TG |
167 | static inline bool irqd_affinity_was_set(struct irq_data *d) |
168 | { | |
169 | return d->state_use_accessors & IRQD_AFFINITY_SET; | |
170 | } | |
171 | ||
876dbd4c TG |
172 | static inline u32 irqd_get_trigger_type(struct irq_data *d) |
173 | { | |
174 | return d->state_use_accessors & IRQD_TRIGGER_MASK; | |
175 | } | |
176 | ||
177 | /* | |
178 | * Must only be called inside irq_chip.irq_set_type() functions. | |
179 | */ | |
180 | static inline void irqd_set_trigger_type(struct irq_data *d, u32 type) | |
181 | { | |
182 | d->state_use_accessors &= ~IRQD_TRIGGER_MASK; | |
183 | d->state_use_accessors |= type & IRQD_TRIGGER_MASK; | |
184 | } | |
185 | ||
186 | static inline bool irqd_is_level_type(struct irq_data *d) | |
187 | { | |
188 | return d->state_use_accessors & IRQD_LEVEL; | |
189 | } | |
190 | ||
8fee5c36 | 191 | /** |
6a6de9ef | 192 | * struct irq_chip - hardware interrupt chip descriptor |
8fee5c36 IM |
193 | * |
194 | * @name: name for /proc/interrupts | |
f8822657 TG |
195 | * @startup: deprecated, replaced by irq_startup |
196 | * @shutdown: deprecated, replaced by irq_shutdown | |
197 | * @enable: deprecated, replaced by irq_enable | |
198 | * @disable: deprecated, replaced by irq_disable | |
199 | * @ack: deprecated, replaced by irq_ack | |
200 | * @mask: deprecated, replaced by irq_mask | |
201 | * @mask_ack: deprecated, replaced by irq_mask_ack | |
202 | * @unmask: deprecated, replaced by irq_unmask | |
203 | * @eoi: deprecated, replaced by irq_eoi | |
204 | * @end: deprecated, will go away with __do_IRQ() | |
205 | * @set_affinity: deprecated, replaced by irq_set_affinity | |
206 | * @retrigger: deprecated, replaced by irq_retrigger | |
207 | * @set_type: deprecated, replaced by irq_set_type | |
208 | * @set_wake: deprecated, replaced by irq_wake | |
209 | * @bus_lock: deprecated, replaced by irq_bus_lock | |
210 | * @bus_sync_unlock: deprecated, replaced by irq_bus_sync_unlock | |
8fee5c36 | 211 | * |
f8822657 TG |
212 | * @irq_startup: start up the interrupt (defaults to ->enable if NULL) |
213 | * @irq_shutdown: shut down the interrupt (defaults to ->disable if NULL) | |
214 | * @irq_enable: enable the interrupt (defaults to chip->unmask if NULL) | |
215 | * @irq_disable: disable the interrupt | |
216 | * @irq_ack: start of a new interrupt | |
217 | * @irq_mask: mask an interrupt source | |
218 | * @irq_mask_ack: ack and mask an interrupt source | |
219 | * @irq_unmask: unmask an interrupt source | |
220 | * @irq_eoi: end of interrupt | |
221 | * @irq_set_affinity: set the CPU affinity on SMP machines | |
222 | * @irq_retrigger: resend an IRQ to the CPU | |
223 | * @irq_set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ | |
224 | * @irq_set_wake: enable/disable power-management wake-on of an IRQ | |
225 | * @irq_bus_lock: function to lock access to slow bus (i2c) chips | |
226 | * @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips | |
70aedd24 | 227 | * |
8fee5c36 | 228 | * @release: release function solely used by UML |
1da177e4 | 229 | */ |
6a6de9ef TG |
230 | struct irq_chip { |
231 | const char *name; | |
bd151412 | 232 | #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED |
71d218b7 IM |
233 | unsigned int (*startup)(unsigned int irq); |
234 | void (*shutdown)(unsigned int irq); | |
235 | void (*enable)(unsigned int irq); | |
236 | void (*disable)(unsigned int irq); | |
6a6de9ef | 237 | |
71d218b7 | 238 | void (*ack)(unsigned int irq); |
6a6de9ef TG |
239 | void (*mask)(unsigned int irq); |
240 | void (*mask_ack)(unsigned int irq); | |
241 | void (*unmask)(unsigned int irq); | |
47c2a3aa | 242 | void (*eoi)(unsigned int irq); |
6a6de9ef | 243 | |
71d218b7 | 244 | void (*end)(unsigned int irq); |
d5dedd45 | 245 | int (*set_affinity)(unsigned int irq, |
0de26520 | 246 | const struct cpumask *dest); |
c0ad90a3 | 247 | int (*retrigger)(unsigned int irq); |
6a6de9ef TG |
248 | int (*set_type)(unsigned int irq, unsigned int flow_type); |
249 | int (*set_wake)(unsigned int irq, unsigned int on); | |
c0ad90a3 | 250 | |
70aedd24 TG |
251 | void (*bus_lock)(unsigned int irq); |
252 | void (*bus_sync_unlock)(unsigned int irq); | |
bd151412 | 253 | #endif |
f8822657 TG |
254 | unsigned int (*irq_startup)(struct irq_data *data); |
255 | void (*irq_shutdown)(struct irq_data *data); | |
256 | void (*irq_enable)(struct irq_data *data); | |
257 | void (*irq_disable)(struct irq_data *data); | |
258 | ||
259 | void (*irq_ack)(struct irq_data *data); | |
260 | void (*irq_mask)(struct irq_data *data); | |
261 | void (*irq_mask_ack)(struct irq_data *data); | |
262 | void (*irq_unmask)(struct irq_data *data); | |
263 | void (*irq_eoi)(struct irq_data *data); | |
264 | ||
265 | int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force); | |
266 | int (*irq_retrigger)(struct irq_data *data); | |
267 | int (*irq_set_type)(struct irq_data *data, unsigned int flow_type); | |
268 | int (*irq_set_wake)(struct irq_data *data, unsigned int on); | |
269 | ||
270 | void (*irq_bus_lock)(struct irq_data *data); | |
271 | void (*irq_bus_sync_unlock)(struct irq_data *data); | |
272 | ||
b77d6adc PBG |
273 | /* Currently used only by UML, might disappear one day.*/ |
274 | #ifdef CONFIG_IRQ_RELEASE_METHOD | |
71d218b7 | 275 | void (*release)(unsigned int irq, void *dev_id); |
b77d6adc | 276 | #endif |
1da177e4 LT |
277 | }; |
278 | ||
e144710b TG |
279 | /* This include will go away once we isolated irq_desc usage to core code */ |
280 | #include <linux/irqdesc.h> | |
0b8f1efa | 281 | |
34ffdb72 IM |
282 | /* |
283 | * Pick up the arch-dependent methods: | |
284 | */ | |
285 | #include <asm/hw_irq.h> | |
1da177e4 | 286 | |
b683de2b TG |
287 | #ifndef NR_IRQS_LEGACY |
288 | # define NR_IRQS_LEGACY 0 | |
289 | #endif | |
290 | ||
1318a481 TG |
291 | #ifndef ARCH_IRQ_INIT_FLAGS |
292 | # define ARCH_IRQ_INIT_FLAGS 0 | |
293 | #endif | |
294 | ||
c1594b77 | 295 | #define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS |
1318a481 | 296 | |
e144710b | 297 | struct irqaction; |
06fcb0c6 | 298 | extern int setup_irq(unsigned int irq, struct irqaction *new); |
cbf94f06 | 299 | extern void remove_irq(unsigned int irq, struct irqaction *act); |
1da177e4 LT |
300 | |
301 | #ifdef CONFIG_GENERIC_HARDIRQS | |
06fcb0c6 | 302 | |
3a3856d0 | 303 | #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ) |
c777ac55 | 304 | void move_native_irq(int irq); |
e7b946e9 | 305 | void move_masked_irq(int irq); |
e144710b TG |
306 | #else |
307 | static inline void move_native_irq(int irq) { } | |
308 | static inline void move_masked_irq(int irq) { } | |
309 | #endif | |
54d5d424 | 310 | |
1da177e4 | 311 | extern int no_irq_affinity; |
1da177e4 | 312 | |
6a6de9ef | 313 | /* Handle irq action chains: */ |
bedd30d9 | 314 | extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action); |
6a6de9ef TG |
315 | |
316 | /* | |
317 | * Built-in IRQ handlers for various IRQ types, | |
bebd04cc | 318 | * callable via desc->handle_irq() |
6a6de9ef | 319 | */ |
ec701584 HH |
320 | extern void handle_level_irq(unsigned int irq, struct irq_desc *desc); |
321 | extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); | |
322 | extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); | |
323 | extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); | |
324 | extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); | |
325 | extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); | |
31b47cf7 | 326 | extern void handle_nested_irq(unsigned int irq); |
6a6de9ef | 327 | |
6a6de9ef | 328 | /* Handling of unhandled and spurious interrupts: */ |
34ffdb72 | 329 | extern void note_interrupt(unsigned int irq, struct irq_desc *desc, |
bedd30d9 | 330 | irqreturn_t action_ret); |
1da177e4 | 331 | |
a4633adc | 332 | |
6a6de9ef TG |
333 | /* Enable/disable irq debugging output: */ |
334 | extern int noirqdebug_setup(char *str); | |
335 | ||
336 | /* Checks whether the interrupt can be requested by request_irq(): */ | |
337 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); | |
338 | ||
f8b5473f | 339 | /* Dummy irq-chip implementations: */ |
6a6de9ef | 340 | extern struct irq_chip no_irq_chip; |
f8b5473f | 341 | extern struct irq_chip dummy_irq_chip; |
6a6de9ef | 342 | |
145fc655 IM |
343 | extern void |
344 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | |
345 | irq_flow_handler_t handle); | |
6a6de9ef | 346 | extern void |
a460e745 IM |
347 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, |
348 | irq_flow_handler_t handle, const char *name); | |
349 | ||
6a6de9ef | 350 | extern void |
a460e745 IM |
351 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
352 | const char *name); | |
1da177e4 | 353 | |
6a6de9ef TG |
354 | /* |
355 | * Set a highlevel flow handler for a given IRQ: | |
356 | */ | |
357 | static inline void | |
57a58a94 | 358 | set_irq_handler(unsigned int irq, irq_flow_handler_t handle) |
6a6de9ef | 359 | { |
a460e745 | 360 | __set_irq_handler(irq, handle, 0, NULL); |
6a6de9ef TG |
361 | } |
362 | ||
363 | /* | |
364 | * Set a highlevel chained flow handler for a given IRQ. | |
365 | * (a chained handler is automatically enabled and set to | |
366 | * IRQ_NOREQUEST and IRQ_NOPROBE) | |
367 | */ | |
368 | static inline void | |
a0cd9ca2 | 369 | set_irq_chained_handler(unsigned int irq, irq_flow_handler_t handle) |
6a6de9ef | 370 | { |
a460e745 | 371 | __set_irq_handler(irq, handle, 1, NULL); |
6a6de9ef TG |
372 | } |
373 | ||
44247184 TG |
374 | void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set); |
375 | ||
376 | static inline void irq_set_status_flags(unsigned int irq, unsigned long set) | |
377 | { | |
378 | irq_modify_status(irq, 0, set); | |
379 | } | |
380 | ||
381 | static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr) | |
382 | { | |
383 | irq_modify_status(irq, clr, 0); | |
384 | } | |
385 | ||
a0cd9ca2 | 386 | static inline void irq_set_noprobe(unsigned int irq) |
44247184 TG |
387 | { |
388 | irq_modify_status(irq, 0, IRQ_NOPROBE); | |
389 | } | |
390 | ||
a0cd9ca2 | 391 | static inline void irq_set_probe(unsigned int irq) |
44247184 TG |
392 | { |
393 | irq_modify_status(irq, IRQ_NOPROBE, 0); | |
394 | } | |
46f4f8f6 | 395 | |
6f91a52d TG |
396 | static inline void irq_set_nested_thread(unsigned int irq, bool nest) |
397 | { | |
398 | if (nest) | |
399 | irq_set_status_flags(irq, IRQ_NESTED_THREAD); | |
400 | else | |
401 | irq_clear_status_flags(irq, IRQ_NESTED_THREAD); | |
402 | } | |
403 | ||
3a16d713 | 404 | /* Handle dynamic irq creation and destruction */ |
d047f53a | 405 | extern unsigned int create_irq_nr(unsigned int irq_want, int node); |
3a16d713 EB |
406 | extern int create_irq(void); |
407 | extern void destroy_irq(unsigned int irq); | |
408 | ||
b7b29338 TG |
409 | /* |
410 | * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and | |
411 | * irq_free_desc instead. | |
412 | */ | |
3a16d713 | 413 | extern void dynamic_irq_cleanup(unsigned int irq); |
b7b29338 TG |
414 | static inline void dynamic_irq_init(unsigned int irq) |
415 | { | |
416 | dynamic_irq_cleanup(irq); | |
417 | } | |
dd87eb3a | 418 | |
3a16d713 | 419 | /* Set/get chip/data for an IRQ: */ |
a0cd9ca2 TG |
420 | extern int irq_set_chip(unsigned int irq, struct irq_chip *chip); |
421 | extern int irq_set_handler_data(unsigned int irq, void *data); | |
422 | extern int irq_set_chip_data(unsigned int irq, void *data); | |
423 | extern int irq_set_irq_type(unsigned int irq, unsigned int type); | |
424 | extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry); | |
f303a6dd | 425 | extern struct irq_data *irq_get_irq_data(unsigned int irq); |
dd87eb3a | 426 | |
a0cd9ca2 | 427 | static inline struct irq_chip *irq_get_chip(unsigned int irq) |
f303a6dd TG |
428 | { |
429 | struct irq_data *d = irq_get_irq_data(irq); | |
430 | return d ? d->chip : NULL; | |
431 | } | |
432 | ||
433 | static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d) | |
434 | { | |
435 | return d->chip; | |
436 | } | |
437 | ||
a0cd9ca2 | 438 | static inline void *irq_get_chip_data(unsigned int irq) |
f303a6dd TG |
439 | { |
440 | struct irq_data *d = irq_get_irq_data(irq); | |
441 | return d ? d->chip_data : NULL; | |
442 | } | |
443 | ||
444 | static inline void *irq_data_get_irq_chip_data(struct irq_data *d) | |
445 | { | |
446 | return d->chip_data; | |
447 | } | |
448 | ||
a0cd9ca2 | 449 | static inline void *irq_get_handler_data(unsigned int irq) |
f303a6dd TG |
450 | { |
451 | struct irq_data *d = irq_get_irq_data(irq); | |
452 | return d ? d->handler_data : NULL; | |
453 | } | |
454 | ||
a0cd9ca2 | 455 | static inline void *irq_data_get_irq_handler_data(struct irq_data *d) |
f303a6dd TG |
456 | { |
457 | return d->handler_data; | |
458 | } | |
459 | ||
a0cd9ca2 | 460 | static inline struct msi_desc *irq_get_msi_desc(unsigned int irq) |
f303a6dd TG |
461 | { |
462 | struct irq_data *d = irq_get_irq_data(irq); | |
463 | return d ? d->msi_desc : NULL; | |
464 | } | |
465 | ||
466 | static inline struct msi_desc *irq_data_get_msi(struct irq_data *d) | |
467 | { | |
468 | return d->msi_desc; | |
469 | } | |
470 | ||
a0cd9ca2 TG |
471 | #ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT |
472 | /* Please do not use: Use the replacement functions instead */ | |
473 | static inline int set_irq_chip(unsigned int irq, struct irq_chip *chip) | |
474 | { | |
475 | return irq_set_chip(irq, chip); | |
476 | } | |
477 | static inline int set_irq_data(unsigned int irq, void *data) | |
478 | { | |
479 | return irq_set_handler_data(irq, data); | |
480 | } | |
481 | static inline int set_irq_chip_data(unsigned int irq, void *data) | |
482 | { | |
483 | return irq_set_chip_data(irq, data); | |
484 | } | |
485 | static inline int set_irq_type(unsigned int irq, unsigned int type) | |
486 | { | |
487 | return irq_set_irq_type(irq, type); | |
488 | } | |
489 | static inline int set_irq_msi(unsigned int irq, struct msi_desc *entry) | |
490 | { | |
491 | return irq_set_msi_desc(irq, entry); | |
492 | } | |
493 | static inline struct irq_chip *get_irq_chip(unsigned int irq) | |
494 | { | |
495 | return irq_get_chip(irq); | |
496 | } | |
497 | static inline void *get_irq_chip_data(unsigned int irq) | |
498 | { | |
499 | return irq_get_chip_data(irq); | |
500 | } | |
501 | static inline void *get_irq_data(unsigned int irq) | |
502 | { | |
503 | return irq_get_handler_data(irq); | |
504 | } | |
505 | static inline void *irq_data_get_irq_data(struct irq_data *d) | |
506 | { | |
507 | return irq_data_get_irq_handler_data(d); | |
508 | } | |
509 | static inline struct msi_desc *get_irq_msi(unsigned int irq) | |
510 | { | |
511 | return irq_get_msi_desc(irq); | |
512 | } | |
513 | static inline void set_irq_noprobe(unsigned int irq) | |
514 | { | |
515 | irq_set_noprobe(irq); | |
516 | } | |
517 | static inline void set_irq_probe(unsigned int irq) | |
518 | { | |
519 | irq_set_probe(irq); | |
520 | } | |
6f91a52d TG |
521 | static inline void set_irq_nested_thread(unsigned int irq, int nest) |
522 | { | |
523 | irq_set_nested_thread(irq, nest); | |
524 | } | |
a0cd9ca2 TG |
525 | #endif |
526 | ||
1f5a5b87 TG |
527 | int irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node); |
528 | void irq_free_descs(unsigned int irq, unsigned int cnt); | |
06f6c339 | 529 | int irq_reserve_irqs(unsigned int from, unsigned int cnt); |
1f5a5b87 TG |
530 | |
531 | static inline int irq_alloc_desc(int node) | |
532 | { | |
533 | return irq_alloc_descs(-1, 0, 1, node); | |
534 | } | |
535 | ||
536 | static inline int irq_alloc_desc_at(unsigned int at, int node) | |
537 | { | |
538 | return irq_alloc_descs(at, at, 1, node); | |
539 | } | |
540 | ||
541 | static inline int irq_alloc_desc_from(unsigned int from, int node) | |
542 | { | |
543 | return irq_alloc_descs(-1, from, 1, node); | |
544 | } | |
545 | ||
546 | static inline void irq_free_desc(unsigned int irq) | |
547 | { | |
548 | irq_free_descs(irq, 1); | |
549 | } | |
550 | ||
639bd12f PM |
551 | static inline int irq_reserve_irq(unsigned int irq) |
552 | { | |
553 | return irq_reserve_irqs(irq, 1); | |
554 | } | |
555 | ||
6a6de9ef | 556 | #endif /* CONFIG_GENERIC_HARDIRQS */ |
1da177e4 | 557 | |
06fcb0c6 | 558 | #endif /* !CONFIG_S390 */ |
1da177e4 | 559 | |
06fcb0c6 | 560 | #endif /* _LINUX_IRQ_H */ |