[PATCH] libata: use dev->ap
[deliverable/linux.git] / include / linux / libata.h
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT
24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
1da177e4
LT
33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
35bb94b1 36#include <scsi/scsi_host.h>
1da177e4
LT
37
38/*
bfd60579
RD
39 * compile-time options: to be removed as soon as all the drivers are
40 * converted to the new debugging mechanism
1da177e4
LT
41 */
42#undef ATA_DEBUG /* debugging output */
43#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
44#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
45#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT
46#undef ATA_ENABLE_PATA /* define to enable PATA support in some
47 * low-level drivers */
1da177e4
LT
48
49
50/* note: prints function name for you */
51#ifdef ATA_DEBUG
52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53#ifdef ATA_VERBOSE_DEBUG
54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55#else
56#define VPRINTK(fmt, args...)
57#endif /* ATA_VERBOSE_DEBUG */
58#else
59#define DPRINTK(fmt, args...)
60#define VPRINTK(fmt, args...)
61#endif /* ATA_DEBUG */
62
2c13b7ce
JG
63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
bfd60579
RD
65/* NEW: debug levels */
66#define HAVE_LIBATA_MSG 1
67
68enum {
69 ATA_MSG_DRV = 0x0001,
70 ATA_MSG_INFO = 0x0002,
71 ATA_MSG_PROBE = 0x0004,
72 ATA_MSG_WARN = 0x0008,
73 ATA_MSG_MALLOC = 0x0010,
74 ATA_MSG_CTL = 0x0020,
75 ATA_MSG_INTR = 0x0040,
76 ATA_MSG_ERR = 0x0080,
77};
78
79#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
80#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
81#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
82#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
83#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
84#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
85#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
86#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
87
88static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
89{
90 if (dval < 0 || dval >= (sizeof(u32) * 8))
91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
92 if (!dval)
93 return 0;
94 return (1 << dval) - 1;
95}
96
1da177e4
LT
97/* defines only for the constants which don't work well as enums */
98#define ATA_TAG_POISON 0xfafbfcfdU
99
100/* move to PCI layer? */
101static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
102{
103 return &pdev->dev;
104}
105
106enum {
107 /* various global constants */
108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
109 ATA_MAX_PORTS = 8,
110 ATA_DEF_QUEUE = 1,
111 ATA_MAX_QUEUE = 1,
112 ATA_MAX_SECTORS = 200, /* FIXME */
113 ATA_MAX_BUS = 2,
114 ATA_DEF_BUSY_WAIT = 10000,
115 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
116
117 ATA_SHT_EMULATED = 1,
118 ATA_SHT_CMD_PER_LUN = 1,
119 ATA_SHT_THIS_ID = -1,
cf482935 120 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT
121
122 /* struct ata_device stuff */
949b38af
TH
123 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */
124 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */
ea1dd4e1 125 ATA_DFLAG_CFG_MASK = (1 << 8) - 1,
949b38af
TH
126
127 ATA_DFLAG_PIO = (1 << 8), /* device currently in PIO mode */
1da177e4
LT
128
129 ATA_DEV_UNKNOWN = 0, /* unknown device */
130 ATA_DEV_ATA = 1, /* ATA device */
131 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
132 ATA_DEV_ATAPI = 3, /* ATAPI device */
133 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
134 ATA_DEV_NONE = 5, /* no device */
135
136 /* struct ata_port flags */
949b38af 137 ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */
1da177e4 138 /* (doesn't imply presence) */
949b38af
TH
139 ATA_FLAG_SATA = (1 << 1),
140 ATA_FLAG_NO_LEGACY = (1 << 2), /* no legacy mode check */
141 ATA_FLAG_MMIO = (1 << 3), /* use MMIO, not PIO */
142 ATA_FLAG_SRST = (1 << 4), /* (obsolete) use ATA SRST, not E.D.D. */
143 ATA_FLAG_SATA_RESET = (1 << 5), /* (obsolete) use COMRESET */
144 ATA_FLAG_NO_ATAPI = (1 << 6), /* No ATAPI support */
145 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */
146 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */
147 ATA_FLAG_IRQ_MASK = (1 << 9), /* Mask IRQ in PIO xfers */
148
149 ATA_FLAG_NOINTR = (1 << 16), /* FIXME: Remove this once
150 * proper HSM is in place. */
151 ATA_FLAG_DEBUGMSG = (1 << 17),
152 ATA_FLAG_FLUSH_PORT_TASK = (1 << 18), /* flush port task */
153
198e0fed 154 ATA_FLAG_DISABLED = (1 << 19), /* port is disabled, ignore it */
949b38af
TH
155 ATA_FLAG_SUSPENDED = (1 << 20), /* port is suspended */
156
157 /* bits 24:31 of ap->flags are reserved for LLDD specific flags */
158
159 /* struct ata_queued_cmd flags */
160 ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */
161 ATA_QCFLAG_SG = (1 << 1), /* have s/g table? */
162 ATA_QCFLAG_SINGLE = (1 << 2), /* no s/g, just a single buffer */
1da177e4 163 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
27197367 164 ATA_QCFLAG_IO = (1 << 3), /* standard IO command */
e61e0672
TH
165 ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */
166
167 ATA_QCFLAG_EH_SCHEDULED = (1 << 16), /* EH scheduled */
1da177e4 168
4e5ec5db
AC
169 /* host set flags */
170 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */
171
1da177e4 172 /* various lengths of time */
1da177e4 173 ATA_TMOUT_PIO = 30 * HZ,
8d238e01
AC
174 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
175 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
1da177e4
LT
176 ATA_TMOUT_CDB = 30 * HZ,
177 ATA_TMOUT_CDB_QUICK = 5 * HZ,
a2a7a662
TH
178 ATA_TMOUT_INTERNAL = 30 * HZ,
179 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT
180
181 /* ATA bus states */
182 BUS_UNKNOWN = 0,
183 BUS_DMA = 1,
184 BUS_IDLE = 2,
185 BUS_NOINTR = 3,
186 BUS_NODATA = 4,
187 BUS_TIMER = 5,
188 BUS_PIO = 6,
189 BUS_EDD = 7,
190 BUS_IDENTIFY = 8,
191 BUS_PACKET = 9,
192
193 /* SATA port states */
194 PORT_UNKNOWN = 0,
195 PORT_ENABLED = 1,
196 PORT_DISABLED = 2,
197
198 /* encoding various smaller bitmaps into a single
1da7b0d0 199 * unsigned int bitmap
1da177e4 200 */
1da7b0d0
TH
201 ATA_BITS_PIO = 5,
202 ATA_BITS_MWDMA = 3,
203 ATA_BITS_UDMA = 8,
204
205 ATA_SHIFT_PIO = 0,
206 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
207 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
208
209 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
210 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
211 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
cedc9a47
JG
212
213 /* size of buffer to pad xfers ending on unaligned boundaries */
214 ATA_DMA_PAD_SZ = 4,
215 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
949b38af
TH
216
217 /* masks for port functions */
47a86593
AC
218 ATA_PORT_PRIMARY = (1 << 0),
219 ATA_PORT_SECONDARY = (1 << 1),
14d2bac1
TH
220
221 /* how hard are we gonna try to probe/recover devices */
222 ATA_PROBE_MAX_TRIES = 3,
1da177e4
LT
223};
224
14be71f4
AL
225enum hsm_task_states {
226 HSM_ST_UNKNOWN,
227 HSM_ST_IDLE,
228 HSM_ST_POLL,
229 HSM_ST_TMOUT,
230 HSM_ST,
231 HSM_ST_LAST,
232 HSM_ST_LAST_POLL,
233 HSM_ST_ERR,
1da177e4
LT
234};
235
a7dac447 236enum ata_completion_errors {
11a56d24
TH
237 AC_ERR_DEV = (1 << 0), /* device reported error */
238 AC_ERR_HSM = (1 << 1), /* host state machine violation */
239 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
240 AC_ERR_MEDIA = (1 << 3), /* media error */
241 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
242 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
243 AC_ERR_SYSTEM = (1 << 6), /* system error */
244 AC_ERR_INVALID = (1 << 7), /* invalid argument */
245 AC_ERR_OTHER = (1 << 8), /* unknown */
a7dac447
JG
246};
247
1da177e4
LT
248/* forward declarations */
249struct scsi_device;
250struct ata_port_operations;
251struct ata_port;
252struct ata_queued_cmd;
253
254/* typedefs */
77853bf2 255typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
7944ea95 256typedef void (*ata_probeinit_fn_t)(struct ata_port *);
2bf2cb26 257typedef int (*ata_reset_fn_t)(struct ata_port *, unsigned int *);
a62c0fc5 258typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *);
1da177e4
LT
259
260struct ata_ioports {
261 unsigned long cmd_addr;
262 unsigned long data_addr;
263 unsigned long error_addr;
264 unsigned long feature_addr;
265 unsigned long nsect_addr;
266 unsigned long lbal_addr;
267 unsigned long lbam_addr;
268 unsigned long lbah_addr;
269 unsigned long device_addr;
270 unsigned long status_addr;
271 unsigned long command_addr;
272 unsigned long altstatus_addr;
273 unsigned long ctl_addr;
274 unsigned long bmdma_addr;
275 unsigned long scr_addr;
276};
277
278struct ata_probe_ent {
279 struct list_head node;
280 struct device *dev;
057ace5e 281 const struct ata_port_operations *port_ops;
193515d5 282 struct scsi_host_template *sht;
1da177e4
LT
283 struct ata_ioports port[ATA_MAX_PORTS];
284 unsigned int n_ports;
285 unsigned int hard_port_no;
286 unsigned int pio_mask;
287 unsigned int mwdma_mask;
288 unsigned int udma_mask;
289 unsigned int legacy_mode;
290 unsigned long irq;
291 unsigned int irq_flags;
292 unsigned long host_flags;
4e5ec5db 293 unsigned long host_set_flags;
1da177e4
LT
294 void __iomem *mmio_base;
295 void *private_data;
296};
297
298struct ata_host_set {
299 spinlock_t lock;
300 struct device *dev;
301 unsigned long irq;
302 void __iomem *mmio_base;
303 unsigned int n_ports;
304 void *private_data;
057ace5e 305 const struct ata_port_operations *ops;
5444a6f4
AC
306 unsigned long flags;
307 int simplex_claimed; /* Keep seperate in case we
308 ever need to do this locked */
1da177e4
LT
309 struct ata_port * ports[0];
310};
311
312struct ata_queued_cmd {
313 struct ata_port *ap;
314 struct ata_device *dev;
315
316 struct scsi_cmnd *scsicmd;
317 void (*scsidone)(struct scsi_cmnd *);
318
319 struct ata_taskfile tf;
320 u8 cdb[ATAPI_CDB_LEN];
321
322 unsigned long flags; /* ATA_QCFLAG_xxx */
323 unsigned int tag;
324 unsigned int n_elem;
cedc9a47 325 unsigned int orig_n_elem;
1da177e4
LT
326
327 int dma_dir;
328
cedc9a47
JG
329 unsigned int pad_len;
330
1da177e4
LT
331 unsigned int nsect;
332 unsigned int cursect;
333
334 unsigned int nbytes;
335 unsigned int curbytes;
336
337 unsigned int cursg;
338 unsigned int cursg_ofs;
339
340 struct scatterlist sgent;
cedc9a47 341 struct scatterlist pad_sgent;
1da177e4
LT
342 void *buf_virt;
343
cedc9a47
JG
344 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
345 struct scatterlist *__sg;
1da177e4 346
a22e2eb0 347 unsigned int err_mask;
e61e0672 348 struct ata_taskfile result_tf;
1da177e4
LT
349 ata_qc_cb_t complete_fn;
350
1da177e4
LT
351 void *private_data;
352};
353
354struct ata_host_stats {
355 unsigned long unhandled_irq;
356 unsigned long idle_irq;
357 unsigned long rw_reqbuf;
358};
359
360struct ata_device {
38d87234 361 struct ata_port *ap;
1da177e4
LT
362 u64 n_sectors; /* size of device, if ATA */
363 unsigned long flags; /* ATA_DFLAG_xxx */
364 unsigned int class; /* ATA_DEV_xxx */
365 unsigned int devno; /* 0 or 1 */
fe635c7e 366 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
1da177e4
LT
367 u8 pio_mode;
368 u8 dma_mode;
369 u8 xfer_mode;
370 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
371
8cbd6df1
AL
372 unsigned int multi_count; /* sectors count for
373 READ/WRITE MULTIPLE */
b00eec1d 374 unsigned int max_sectors; /* per-device max sectors */
6e7846e9 375 unsigned int cdb_len;
8bf62ece 376
acf356b1
TH
377 /* per-dev xfer mask */
378 unsigned int pio_mask;
379 unsigned int mwdma_mask;
380 unsigned int udma_mask;
381
8bf62ece
AL
382 /* for CHS addressing */
383 u16 cylinders; /* Number of cylinders */
384 u16 heads; /* Number of heads */
385 u16 sectors; /* Number of sectors per track */
1da177e4
LT
386};
387
388struct ata_port {
389 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 390 const struct ata_port_operations *ops;
1da177e4
LT
391 unsigned long flags; /* ATA_FLAG_xxx */
392 unsigned int id; /* unique id req'd by scsi midlyr */
393 unsigned int port_no; /* unique port #; from zero */
394 unsigned int hard_port_no; /* hardware port #; from zero */
395
396 struct ata_prd *prd; /* our SG list */
397 dma_addr_t prd_dma; /* and its DMA mapping */
398
cedc9a47
JG
399 void *pad; /* array of DMA pad buffers */
400 dma_addr_t pad_dma;
401
1da177e4
LT
402 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
403
404 u8 ctl; /* cache of ATA control register */
405 u8 last_ctl; /* Cache last written value */
1da177e4
LT
406 unsigned int pio_mask;
407 unsigned int mwdma_mask;
408 unsigned int udma_mask;
409 unsigned int cbl; /* cable type; ATA_CBL_xxx */
1c3fae4d 410 unsigned int sata_spd_limit; /* SATA PHY speed limit */
1da177e4
LT
411
412 struct ata_device device[ATA_MAX_DEVICES];
413
414 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
415 unsigned long qactive;
416 unsigned int active_tag;
417
418 struct ata_host_stats stats;
419 struct ata_host_set *host_set;
2f1f610b 420 struct device *dev;
1da177e4 421
86e45b6b
TH
422 struct work_struct port_task;
423
14be71f4 424 unsigned int hsm_task_state;
1da177e4
LT
425 unsigned long pio_task_timeout;
426
bfd60579 427 u32 msg_enable;
a72ec4ce 428 struct list_head eh_done_q;
bfd60579 429
1da177e4 430 void *private_data;
fe635c7e
TH
431
432 u8 sector_buf[ATA_SECT_SIZE]; /* owned by EH */
1da177e4
LT
433};
434
435struct ata_port_operations {
436 void (*port_disable) (struct ata_port *);
437
438 void (*dev_config) (struct ata_port *, struct ata_device *);
439
440 void (*set_piomode) (struct ata_port *, struct ata_device *);
441 void (*set_dmamode) (struct ata_port *, struct ata_device *);
5444a6f4 442 unsigned long (*mode_filter) (const struct ata_port *, struct ata_device *, unsigned long);
1da177e4 443
057ace5e 444 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
445 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
446
057ace5e 447 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
448 u8 (*check_status)(struct ata_port *ap);
449 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT
450 void (*dev_select)(struct ata_port *ap, unsigned int device);
451
c19ba8af 452 void (*phy_reset) (struct ata_port *ap); /* obsolete */
e35a9e01 453 void (*set_mode) (struct ata_port *ap);
c19ba8af
TH
454 int (*probe_reset) (struct ata_port *ap, unsigned int *classes);
455
1da177e4
LT
456 void (*post_set_mode) (struct ata_port *ap);
457
458 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
459
460 void (*bmdma_setup) (struct ata_queued_cmd *qc);
461 void (*bmdma_start) (struct ata_queued_cmd *qc);
462
463 void (*qc_prep) (struct ata_queued_cmd *qc);
9a3d9eb0 464 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
1da177e4
LT
465
466 void (*eng_timeout) (struct ata_port *ap);
467
468 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
469 void (*irq_clear) (struct ata_port *);
470
471 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
472 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
473 u32 val);
474
475 int (*port_start) (struct ata_port *ap);
476 void (*port_stop) (struct ata_port *ap);
477
478 void (*host_stop) (struct ata_host_set *host_set);
479
b73fc89f 480 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT
481 u8 (*bmdma_status) (struct ata_port *ap);
482};
483
484struct ata_port_info {
d0be4a7d 485 struct scsi_host_template *sht;
1da177e4
LT
486 unsigned long host_flags;
487 unsigned long pio_mask;
488 unsigned long mwdma_mask;
489 unsigned long udma_mask;
057ace5e 490 const struct ata_port_operations *port_ops;
e99f8b5e 491 void *private_data;
1da177e4
LT
492};
493
452503f9
AC
494struct ata_timing {
495 unsigned short mode; /* ATA mode */
496 unsigned short setup; /* t1 */
497 unsigned short act8b; /* t2 for 8-bit I/O */
498 unsigned short rec8b; /* t2i for 8-bit I/O */
499 unsigned short cyc8b; /* t0 for 8-bit I/O */
500 unsigned short active; /* t2 or tD */
501 unsigned short recover; /* t2i or tK */
502 unsigned short cycle; /* t0 */
503 unsigned short udma; /* t2CYCTYP/2 */
504};
505
506#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4
LT
507
508extern void ata_port_probe(struct ata_port *);
509extern void __sata_phy_reset(struct ata_port *ap);
510extern void sata_phy_reset(struct ata_port *ap);
511extern void ata_bus_reset(struct ata_port *ap);
3c567b7d 512extern int sata_set_spd(struct ata_port *ap);
a62c0fc5 513extern int ata_drive_probe_reset(struct ata_port *ap,
7944ea95 514 ata_probeinit_fn_t probeinit,
a62c0fc5
TH
515 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
516 ata_postreset_fn_t postreset, unsigned int *classes);
8a19ac89 517extern void ata_std_probeinit(struct ata_port *ap);
2bf2cb26
TH
518extern int ata_std_softreset(struct ata_port *ap, unsigned int *classes);
519extern int sata_std_hardreset(struct ata_port *ap, unsigned int *class);
c2bd5804 520extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
3373efd8 521extern int ata_dev_revalidate(struct ata_device *dev, int post_reset);
1da177e4
LT
522extern void ata_port_disable(struct ata_port *);
523extern void ata_std_ports(struct ata_ioports *ioaddr);
524#ifdef CONFIG_PCI
525extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
526 unsigned int n_ports);
527extern void ata_pci_remove_one (struct pci_dev *pdev);
9b847548
JA
528extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
529extern int ata_pci_device_resume(struct pci_dev *pdev);
17bb34a3 530extern int ata_pci_clear_simplex(struct pci_dev *pdev);
1da177e4 531#endif /* CONFIG_PCI */
057ace5e 532extern int ata_device_add(const struct ata_probe_ent *ent);
17b14451 533extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 534extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT
535extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
536extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
1da177e4
LT
537extern int ata_scsi_release(struct Scsi_Host *host);
538extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
34bf2170
TH
539extern int sata_scr_valid(struct ata_port *ap);
540extern int sata_scr_read(struct ata_port *ap, int reg, u32 *val);
541extern int sata_scr_write(struct ata_port *ap, int reg, u32 val);
542extern int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val);
543extern int ata_port_online(struct ata_port *ap);
544extern int ata_port_offline(struct ata_port *ap);
9b847548 545extern int ata_scsi_device_resume(struct scsi_device *);
082776e4 546extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state);
3373efd8
TH
547extern int ata_device_resume(struct ata_device *);
548extern int ata_device_suspend(struct ata_device *, pm_message_t state);
67846b30 549extern int ata_ratelimit(void);
6f8b9958
TH
550extern unsigned int ata_busy_sleep(struct ata_port *ap,
551 unsigned long timeout_pat,
552 unsigned long timeout);
86e45b6b
TH
553extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *),
554 void *data, unsigned long delay);
c22daff4
TH
555extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
556 unsigned long interval_msec,
557 unsigned long timeout_msec);
67846b30 558
1da177e4
LT
559/*
560 * Default driver ops implementations
561 */
057ace5e 562extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 563extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG
564extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
565extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT
566extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
567extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
568extern u8 ata_check_status(struct ata_port *ap);
569extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 570extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
c2bd5804 571extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes);
1da177e4
LT
572extern int ata_port_start (struct ata_port *ap);
573extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 574extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4
LT
575extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
576extern void ata_qc_prep(struct ata_queued_cmd *qc);
e46834cd 577extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
9a3d9eb0 578extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
1da177e4
LT
579extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
580 unsigned int buflen);
581extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
582 unsigned int n_elem);
057ace5e 583extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
6a62a04d
TH
584extern void ata_id_string(const u16 *id, unsigned char *s,
585 unsigned int ofs, unsigned int len);
586extern void ata_id_c_string(const u16 *id, unsigned char *s,
587 unsigned int ofs, unsigned int len);
1da177e4
LT
588extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
589extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 590extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT
591extern u8 ata_bmdma_status(struct ata_port *ap);
592extern void ata_bmdma_irq_clear(struct ata_port *ap);
76014427 593extern void __ata_qc_complete(struct ata_queued_cmd *qc);
3373efd8 594extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd,
1da177e4
LT
595 void (*done)(struct scsi_cmnd *));
596extern int ata_std_bios_param(struct scsi_device *sdev,
597 struct block_device *bdev,
598 sector_t capacity, int geom[]);
599extern int ata_scsi_slave_config(struct scsi_device *sdev);
3373efd8 600extern struct ata_device *ata_dev_pair(struct ata_device *adev);
1da177e4 601
452503f9
AC
602/*
603 * Timing helpers
604 */
1bc4ccff
AC
605
606extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC
607extern int ata_timing_compute(struct ata_device *, unsigned short,
608 struct ata_timing *, int, int);
609extern void ata_timing_merge(const struct ata_timing *,
610 const struct ata_timing *, struct ata_timing *,
611 unsigned int);
612
613enum {
614 ATA_TIMING_SETUP = (1 << 0),
615 ATA_TIMING_ACT8B = (1 << 1),
616 ATA_TIMING_REC8B = (1 << 2),
617 ATA_TIMING_CYC8B = (1 << 3),
618 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
619 ATA_TIMING_CYC8B,
620 ATA_TIMING_ACTIVE = (1 << 4),
621 ATA_TIMING_RECOVER = (1 << 5),
622 ATA_TIMING_CYCLE = (1 << 6),
623 ATA_TIMING_UDMA = (1 << 7),
624 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
625 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
626 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
627 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
628};
629
1da177e4
LT
630
631#ifdef CONFIG_PCI
632struct pci_bits {
633 unsigned int reg; /* PCI config register to read */
634 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
635 unsigned long mask;
636 unsigned long val;
637};
638
374b1873 639extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 640extern struct ata_probe_ent *
47a86593 641ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 642extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
17bb34a3 643extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
1da177e4
LT
644#endif /* CONFIG_PCI */
645
ece1d636
TH
646/*
647 * EH
648 */
ece1d636
TH
649extern void ata_eng_timeout(struct ata_port *ap);
650extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
651extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
652
1da177e4 653
972c26bd
JG
654static inline int
655ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
656{
657 if (sg == &qc->pad_sgent)
658 return 1;
659 if (qc->pad_len)
660 return 0;
661 if (((sg - qc->__sg) + 1) == qc->n_elem)
662 return 1;
663 return 0;
664}
665
cc1887f3
TH
666static inline struct scatterlist *
667ata_qc_first_sg(struct ata_queued_cmd *qc)
668{
669 if (qc->n_elem)
670 return qc->__sg;
671 if (qc->pad_len)
672 return &qc->pad_sgent;
673 return NULL;
674}
675
cedc9a47
JG
676static inline struct scatterlist *
677ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
678{
679 if (sg == &qc->pad_sgent)
680 return NULL;
681 if (++sg - qc->__sg < qc->n_elem)
682 return sg;
cc1887f3
TH
683 if (qc->pad_len)
684 return &qc->pad_sgent;
685 return NULL;
cedc9a47
JG
686}
687
688#define ata_for_each_sg(sg, qc) \
cc1887f3 689 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
cedc9a47 690
1da177e4
LT
691static inline unsigned int ata_tag_valid(unsigned int tag)
692{
693 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
694}
695
e1211e3f 696static inline unsigned int ata_class_enabled(unsigned int class)
597afd21
TH
697{
698 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
699}
700
e1211e3f 701static inline unsigned int ata_class_disabled(unsigned int class)
1da177e4 702{
e1211e3f
TH
703 return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP;
704}
705
002c8054
TH
706static inline unsigned int ata_class_absent(unsigned int class)
707{
708 return !ata_class_enabled(class) && !ata_class_disabled(class);
709}
710
e1211e3f
TH
711static inline unsigned int ata_dev_enabled(const struct ata_device *dev)
712{
713 return ata_class_enabled(dev->class);
714}
715
716static inline unsigned int ata_dev_disabled(const struct ata_device *dev)
717{
718 return ata_class_disabled(dev->class);
1da177e4
LT
719}
720
002c8054
TH
721static inline unsigned int ata_dev_absent(const struct ata_device *dev)
722{
723 return ata_class_absent(dev->class);
724}
725
1da177e4
LT
726static inline u8 ata_chk_status(struct ata_port *ap)
727{
728 return ap->ops->check_status(ap);
729}
730
0baab86b
EF
731
732/**
733 * ata_pause - Flush writes and pause 400 nanoseconds.
734 * @ap: Port to wait for.
735 *
736 * LOCKING:
737 * Inherited from caller.
738 */
739
1da177e4
LT
740static inline void ata_pause(struct ata_port *ap)
741{
742 ata_altstatus(ap);
743 ndelay(400);
744}
745
0baab86b
EF
746
747/**
748 * ata_busy_wait - Wait for a port status register
749 * @ap: Port to wait for.
750 *
751 * Waits up to max*10 microseconds for the selected bits in the port's
752 * status register to be cleared.
753 * Returns final value of status register.
754 *
755 * LOCKING:
756 * Inherited from caller.
757 */
758
1da177e4
LT
759static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
760 unsigned int max)
761{
762 u8 status;
763
764 do {
765 udelay(10);
766 status = ata_chk_status(ap);
767 max--;
768 } while ((status & bits) && (max > 0));
769
770 return status;
771}
772
0baab86b
EF
773
774/**
775 * ata_wait_idle - Wait for a port to be idle.
776 * @ap: Port to wait for.
777 *
778 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
779 * Returns final value of status register.
780 *
781 * LOCKING:
782 * Inherited from caller.
783 */
784
1da177e4
LT
785static inline u8 ata_wait_idle(struct ata_port *ap)
786{
787 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
788
789 if (status & (ATA_BUSY | ATA_DRQ)) {
790 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD
791 if (ata_msg_warn(ap))
792 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
793 status, l);
1da177e4
LT
794 }
795
796 return status;
797}
798
799static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
800{
801 qc->tf.ctl |= ATA_NIEN;
802}
803
804static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
805 unsigned int tag)
806{
807 if (likely(ata_tag_valid(tag)))
808 return &ap->qcmd[tag];
809 return NULL;
810}
811
3373efd8 812static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf)
1da177e4
LT
813{
814 memset(tf, 0, sizeof(*tf));
815
3373efd8
TH
816 tf->ctl = dev->ap->ctl;
817 if (dev->devno == 0)
1da177e4
LT
818 tf->device = ATA_DEVICE_OBS;
819 else
820 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
821}
822
2c13b7ce
JG
823static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
824{
825 qc->__sg = NULL;
826 qc->flags = 0;
827 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
828 qc->nsect = 0;
829 qc->nbytes = qc->curbytes = 0;
a22e2eb0 830 qc->err_mask = 0;
2c13b7ce 831
3373efd8 832 ata_tf_init(qc->dev, &qc->tf);
e61e0672
TH
833
834 /* init result_tf such that it indicates normal completion */
835 qc->result_tf.command = ATA_DRDY;
836 qc->result_tf.feature = 0;
2c13b7ce
JG
837}
838
76014427
TH
839/**
840 * ata_qc_complete - Complete an active ATA command
841 * @qc: Command to complete
842 * @err_mask: ATA Status register contents
843 *
844 * Indicate to the mid and upper layers that an ATA
845 * command has completed, with either an ok or not-ok status.
846 *
847 * LOCKING:
848 * spin_lock_irqsave(host_set lock)
849 */
850static inline void ata_qc_complete(struct ata_queued_cmd *qc)
851{
e61e0672
TH
852 struct ata_port *ap = qc->ap;
853
76014427
TH
854 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED))
855 return;
856
e61e0672
TH
857 /* read result TF if failed or requested */
858 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
859 ap->ops->tf_read(ap, &qc->result_tf);
860
76014427
TH
861 __ata_qc_complete(qc);
862}
0baab86b
EF
863
864/**
865 * ata_irq_on - Enable interrupts on a port.
866 * @ap: Port on which interrupts are enabled.
867 *
868 * Enable interrupts on a legacy IDE device using MMIO or PIO,
869 * wait for idle, clear any pending interrupts.
870 *
871 * LOCKING:
872 * Inherited from caller.
873 */
874
1da177e4
LT
875static inline u8 ata_irq_on(struct ata_port *ap)
876{
877 struct ata_ioports *ioaddr = &ap->ioaddr;
878 u8 tmp;
879
880 ap->ctl &= ~ATA_NIEN;
881 ap->last_ctl = ap->ctl;
882
883 if (ap->flags & ATA_FLAG_MMIO)
884 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
885 else
886 outb(ap->ctl, ioaddr->ctl_addr);
887 tmp = ata_wait_idle(ap);
888
889 ap->ops->irq_clear(ap);
890
891 return tmp;
892}
893
0baab86b
EF
894
895/**
896 * ata_irq_ack - Acknowledge a device interrupt.
897 * @ap: Port on which interrupts are enabled.
898 *
899 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
900 * or BUSY+DRQ clear). Obtain dma status and port status from
901 * device. Clear the interrupt. Return port status.
902 *
903 * LOCKING:
904 */
905
1da177e4
LT
906static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
907{
908 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
909 u8 host_stat, post_stat, status;
910
911 status = ata_busy_wait(ap, bits, 1000);
912 if (status & bits)
bfd60579
RD
913 if (ata_msg_err(ap))
914 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT
915
916 /* get controller status; clear intr, err bits */
917 if (ap->flags & ATA_FLAG_MMIO) {
918 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
919 host_stat = readb(mmio + ATA_DMA_STATUS);
920 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
921 mmio + ATA_DMA_STATUS);
922
923 post_stat = readb(mmio + ATA_DMA_STATUS);
924 } else {
925 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
926 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
927 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
928
929 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
930 }
931
bfd60579
RD
932 if (ata_msg_intr(ap))
933 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
934 __FUNCTION__,
935 host_stat, post_stat, status);
1da177e4
LT
936
937 return status;
938}
939
057ace5e 940static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT
941{
942 return ata_id_wcache_enabled(dev->id) ||
943 ata_id_has_flush(dev->id) ||
944 ata_id_has_flush_ext(dev->id);
945}
946
a7dac447
JG
947static inline unsigned int ac_err_mask(u8 status)
948{
949 if (status & ATA_BUSY)
11a56d24 950 return AC_ERR_HSM;
a7dac447
JG
951 if (status & (ATA_ERR | ATA_DF))
952 return AC_ERR_DEV;
953 return 0;
954}
955
956static inline unsigned int __ac_err_mask(u8 status)
957{
958 unsigned int mask = ac_err_mask(status);
959 if (mask == 0)
960 return AC_ERR_OTHER;
961 return mask;
962}
963
6037d6bb
JG
964static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
965{
966 ap->pad_dma = 0;
967 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
968 &ap->pad_dma, GFP_KERNEL);
969 return (ap->pad == NULL) ? -ENOMEM : 0;
970}
971
972static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
973{
974 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
975}
976
35bb94b1
JG
977static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host)
978{
979 return (struct ata_port *) &host->hostdata[0];
980}
981
1da177e4 982#endif /* __LINUX_LIBATA_H__ */
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