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[PATCH] ahci: honor PORTS_IMPL on ICH8s
[deliverable/linux.git] / include / linux / libata.h
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT		 24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
41542dbe 33#include <asm/scatterlist.h>
1da177e4
LT		 34#include <asm/io.h>
35#include <linux/ata.h>
36#include <linux/workqueue.h>
35bb94b1 37#include <scsi/scsi_host.h>
1da177e4 38
a6d967a4
JG		 39/*
40 * Define if arch has non-standard setup. This is a _PCI_ standard
41 * not a legacy or ISA standard.
42 */
43#ifdef CONFIG_ATA_NONSTANDARD
2ec7df04 44#include <asm/libata-portmap.h>
a6d967a4
JG		 45#else
46#include <asm-generic/libata-portmap.h>
47#endif
2ec7df04 48
1da177e4 49/*
bfd60579
RD		 50 * compile-time options: to be removed as soon as all the drivers are
51 * converted to the new debugging mechanism
1da177e4
LT		 52 */
53#undef ATA_DEBUG /* debugging output */
54#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
55#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
56#undef ATA_NDEBUG /* define to disable quick runtime checks */
669a5db4 57#define ATA_ENABLE_PATA /* define to enable PATA support in some
1da177e4 58 * low-level drivers */
1da177e4
LT		 59
60
61/* note: prints function name for you */
62#ifdef ATA_DEBUG
63#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64#ifdef ATA_VERBOSE_DEBUG
65#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
66#else
67#define VPRINTK(fmt, args...)
68#endif /* ATA_VERBOSE_DEBUG */
69#else
70#define DPRINTK(fmt, args...)
71#define VPRINTK(fmt, args...)
72#endif /* ATA_DEBUG */
73
2c13b7ce
JG		 74#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
75
bfd60579
RD		 76/* NEW: debug levels */
77#define HAVE_LIBATA_MSG 1
78
79enum {
80 ATA_MSG_DRV = 0x0001,
81 ATA_MSG_INFO = 0x0002,
82 ATA_MSG_PROBE = 0x0004,
83 ATA_MSG_WARN = 0x0008,
84 ATA_MSG_MALLOC = 0x0010,
85 ATA_MSG_CTL = 0x0020,
86 ATA_MSG_INTR = 0x0040,
87 ATA_MSG_ERR = 0x0080,
88};
89
90#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
91#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
92#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
93#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
94#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
95#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
96#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
97#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
98
99static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
100{
101 if (dval < 0 || dval >= (sizeof(u32) * 8))
102 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
103 if (!dval)
104 return 0;
105 return (1 << dval) - 1;
106}
107
1da177e4
LT		 108/* defines only for the constants which don't work well as enums */
109#define ATA_TAG_POISON 0xfafbfcfdU
110
111/* move to PCI layer? */
54bb3a94
JG		 112#define PCI_VDEVICE(vendor, device) \
113 PCI_VENDOR_ID_##vendor, (device), \
114 PCI_ANY_ID, PCI_ANY_ID, 0, 0
115
1da177e4
LT		 116static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
117{
118 return &pdev->dev;
119}
120
121enum {
122 /* various global constants */
123 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
124 ATA_MAX_PORTS = 8,
125 ATA_DEF_QUEUE = 1,
2ab7db1f 126 /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */
a6e6ce8e 127 ATA_MAX_QUEUE = 32,
2ab7db1f 128 ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1,
1da177e4
LT		 129 ATA_MAX_BUS = 2,
130 ATA_DEF_BUSY_WAIT = 10000,
131 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
132
133 ATA_SHT_EMULATED = 1,
134 ATA_SHT_CMD_PER_LUN = 1,
135 ATA_SHT_THIS_ID = -1,
cf482935 136 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT		 137
138 /* struct ata_device stuff */
949b38af
TH		 139 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */
140 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */
029f5468 141 ATA_DFLAG_CDB_INTR = (1 << 2), /* device asserts INTRQ when ready for CDB */
88e49034 142 ATA_DFLAG_NCQ = (1 << 3), /* device supports NCQ */
ea1dd4e1 143 ATA_DFLAG_CFG_MASK = (1 << 8) - 1,
949b38af 144
e5c9e081 145 ATA_DFLAG_PIO = (1 << 8), /* device limited to PIO mode */
3343571d 146 ATA_DFLAG_NCQ_OFF = (1 << 9), /* device limited to non-NCQ mode */
e5c9e081 147 ATA_DFLAG_SUSPENDED = (1 << 10), /* device suspended */
72fa4b74 148 ATA_DFLAG_INIT_MASK = (1 << 16) - 1,
1da177e4 149
abdda733
TH		 150 ATA_DFLAG_DETACH = (1 << 16),
151 ATA_DFLAG_DETACHED = (1 << 17),
152
1da177e4
LT		 153 ATA_DEV_UNKNOWN = 0, /* unknown device */
154 ATA_DEV_ATA = 1, /* ATA device */
155 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
156 ATA_DEV_ATAPI = 3, /* ATAPI device */
157 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
158 ATA_DEV_NONE = 5, /* no device */
159
160 /* struct ata_port flags */
949b38af 161 ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */
1da177e4 162 /* (doesn't imply presence) */
949b38af
TH		 163 ATA_FLAG_SATA = (1 << 1),
164 ATA_FLAG_NO_LEGACY = (1 << 2), /* no legacy mode check */
165 ATA_FLAG_MMIO = (1 << 3), /* use MMIO, not PIO */
166 ATA_FLAG_SRST = (1 << 4), /* (obsolete) use ATA SRST, not E.D.D. */
167 ATA_FLAG_SATA_RESET = (1 << 5), /* (obsolete) use COMRESET */
168 ATA_FLAG_NO_ATAPI = (1 << 6), /* No ATAPI support */
169 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */
170 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */
7395acb2
TH		 171 ATA_FLAG_PIO_POLLING = (1 << 9), /* use polling PIO if LLD
172 * doesn't handle PIO interrupts */
173 ATA_FLAG_NCQ = (1 << 10), /* host supports NCQ */
abdda733
TH		 174 ATA_FLAG_HRST_TO_RESUME = (1 << 11), /* hardreset to resume phy */
175 ATA_FLAG_SKIP_D2H_BSY = (1 << 12), /* can't wait for the first D2H
176 * Register FIS clearing BSY */
7395acb2 177 ATA_FLAG_DEBUGMSG = (1 << 13),
949b38af 178
b51e9e5d
TH		 179 /* The following flag belongs to ap->pflags but is kept in
180 * ap->flags because it's referenced in many LLDs and will be
181 * removed in not-too-distant future.
182 */
183 ATA_FLAG_DISABLED = (1 << 23), /* port is disabled, ignore it */
184
185 /* bits 24:31 of ap->flags are reserved for LLD specific flags */
9ec957f2 186
b51e9e5d
TH		 187 /* struct ata_port pflags */
188 ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */
189 ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */
190 ATA_PFLAG_FROZEN = (1 << 2), /* port is frozen */
191 ATA_PFLAG_RECOVERED = (1 << 3), /* recovery action performed */
192 ATA_PFLAG_LOADING = (1 << 4), /* boot/loading probe */
193 ATA_PFLAG_UNLOADING = (1 << 5), /* module is unloading */
194 ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), /* SCSI hotplug scheduled */
949b38af 195
b51e9e5d
TH		 196 ATA_PFLAG_FLUSH_PORT_TASK = (1 << 16), /* flush port task */
197 ATA_PFLAG_SUSPENDED = (1 << 17), /* port is suspended (power) */
500530f6 198 ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */
949b38af
TH		 199
200 /* struct ata_queued_cmd flags */
201 ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */
202 ATA_QCFLAG_SG = (1 << 1), /* have s/g table? */
203 ATA_QCFLAG_SINGLE = (1 << 2), /* no s/g, just a single buffer */
1da177e4 204 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
27197367 205 ATA_QCFLAG_IO = (1 << 3), /* standard IO command */
e61e0672
TH		 206 ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */
207
9ec957f2
TH		 208 ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */
209 ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */
210 ATA_QCFLAG_EH_SCHEDULED = (1 << 18), /* EH scheduled (obsolete) */
1da177e4 211
4e5ec5db 212 /* host set flags */
cca3974e 213 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host only */
9bec2e38 214
1da177e4 215 /* various lengths of time */
8d238e01
AC		 216 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
217 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
a2a7a662
TH		 218 ATA_TMOUT_INTERNAL = 30 * HZ,
219 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT		 220
221 /* ATA bus states */
222 BUS_UNKNOWN = 0,
223 BUS_DMA = 1,
224 BUS_IDLE = 2,
225 BUS_NOINTR = 3,
226 BUS_NODATA = 4,
227 BUS_TIMER = 5,
228 BUS_PIO = 6,
229 BUS_EDD = 7,
230 BUS_IDENTIFY = 8,
231 BUS_PACKET = 9,
232
233 /* SATA port states */
234 PORT_UNKNOWN = 0,
235 PORT_ENABLED = 1,
236 PORT_DISABLED = 2,
237
238 /* encoding various smaller bitmaps into a single
1da7b0d0 239 * unsigned int bitmap
1da177e4 240 */
b352e57d
AC		 241 ATA_BITS_PIO = 7,
242 ATA_BITS_MWDMA = 5,
1da7b0d0
TH		 243 ATA_BITS_UDMA = 8,
244
245 ATA_SHIFT_PIO = 0,
246 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
247 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
248
249 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
250 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
251 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
cedc9a47
JG		 252
253 /* size of buffer to pad xfers ending on unaligned boundaries */
254 ATA_DMA_PAD_SZ = 4,
255 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
949b38af
TH		 256
257 /* masks for port functions */
47a86593
AC		 258 ATA_PORT_PRIMARY = (1 << 0),
259 ATA_PORT_SECONDARY = (1 << 1),
14d2bac1 260
0c247c55
TH		 261 /* ering size */
262 ATA_ERING_SIZE = 32,
263
f3e81b19
TH		 264 /* desc_len for ata_eh_info and context */
265 ATA_EH_DESC_LEN = 80,
266
9be1e979
TH		 267 /* reset / recovery action types */
268 ATA_EH_REVALIDATE = (1 << 0),
269 ATA_EH_SOFTRESET = (1 << 1),
270 ATA_EH_HARDRESET = (1 << 2),
02670bf3
TH		 271 ATA_EH_SUSPEND = (1 << 3),
272 ATA_EH_RESUME = (1 << 4),
273 ATA_EH_PM_FREEZE = (1 << 5),
9be1e979
TH		 274
275 ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
02670bf3
TH		 276 ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE | ATA_EH_SUSPEND |
277 ATA_EH_RESUME | ATA_EH_PM_FREEZE,
9be1e979 278
f3e81b19 279 /* ata_eh_info->flags */
abdda733 280 ATA_EHI_HOTPLUGGED = (1 << 0), /* could have been hotplugged */
13abf50d 281 ATA_EHI_RESUME_LINK = (1 << 1), /* resume link (reset modifier) */
1cdaf534
TH		 282 ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */
283 ATA_EHI_QUIET = (1 << 3), /* be quiet */
abdda733
TH		 284
285 ATA_EHI_DID_RESET = (1 << 16), /* already reset this port */
efdaedc4 286 ATA_EHI_PRINTINFO = (1 << 17), /* print configuration info */
baa1e78a
TH		 287 ATA_EHI_SETMODE = (1 << 18), /* configure transfer mode */
288 ATA_EHI_POST_SETMODE = (1 << 19), /* revaildating after setmode */
f3e81b19 289
13abf50d
TH		 290 ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
291
ad9e2762
TH		 292 /* max repeat if error condition is still set after ->error_handler */
293 ATA_EH_MAX_REPEAT = 5,
294
14d2bac1
TH		 295 /* how hard are we gonna try to probe/recover devices */
296 ATA_PROBE_MAX_TRIES = 3,
022bdb07
TH		 297 ATA_EH_RESET_TRIES = 3,
298 ATA_EH_DEV_TRIES = 3,
f5914a46
TH		 299
300 /* Drive spinup time (time from power-on to the first D2H FIS)
301 * in msecs - 8s currently. Failing to get ready in this time
302 * isn't critical. It will result in reset failure for
303 * controllers which can't wait for the first D2H FIS. libata
304 * will retry, so it just has to be long enough to spin up
305 * most devices.
306 */
307 ATA_SPINUP_WAIT = 8000,
93590859
AC		 308
309 /* Horkage types. May be set by libata or controller on drives
310 (some horkage may be drive/controller pair dependant */
311
312 ATA_HORKAGE_DIAGNOSTIC = (1 << 0), /* Failed boot diag */
6919a0a6
AC		 313 ATA_HORKAGE_NODMA = (1 << 1), /* DMA problems */
314 ATA_HORKAGE_NONCQ = (1 << 2), /* Don't use NCQ */
1da177e4
LT		 315};
316
14be71f4 317enum hsm_task_states {
c56b14d2
AL		 318 HSM_ST_UNKNOWN, /* state unknown */
319 HSM_ST_IDLE, /* no command on going */
c56b14d2
AL		 320 HSM_ST, /* (waiting the device to) transfer data */
321 HSM_ST_LAST, /* (waiting the device to) complete command */
c56b14d2
AL		 322 HSM_ST_ERR, /* error */
323 HSM_ST_FIRST, /* (waiting the device to)
324 write CDB or first data block */
1da177e4
LT		 325};
326
a7dac447 327enum ata_completion_errors {
11a56d24
TH		 328 AC_ERR_DEV = (1 << 0), /* device reported error */
329 AC_ERR_HSM = (1 << 1), /* host state machine violation */
330 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
331 AC_ERR_MEDIA = (1 << 3), /* media error */
332 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
333 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
334 AC_ERR_SYSTEM = (1 << 6), /* system error */
335 AC_ERR_INVALID = (1 << 7), /* invalid argument */
336 AC_ERR_OTHER = (1 << 8), /* unknown */
a7dac447
JG		 337};
338
1da177e4
LT		 339/* forward declarations */
340struct scsi_device;
341struct ata_port_operations;
342struct ata_port;
343struct ata_queued_cmd;
344
345/* typedefs */
77853bf2 346typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
f5914a46
TH		 347typedef int (*ata_prereset_fn_t)(struct ata_port *ap);
348typedef int (*ata_reset_fn_t)(struct ata_port *ap, unsigned int *classes);
349typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *classes);
1da177e4
LT		 350
351struct ata_ioports {
352 unsigned long cmd_addr;
353 unsigned long data_addr;
354 unsigned long error_addr;
355 unsigned long feature_addr;
356 unsigned long nsect_addr;
357 unsigned long lbal_addr;
358 unsigned long lbam_addr;
359 unsigned long lbah_addr;
360 unsigned long device_addr;
361 unsigned long status_addr;
362 unsigned long command_addr;
363 unsigned long altstatus_addr;
364 unsigned long ctl_addr;
365 unsigned long bmdma_addr;
366 unsigned long scr_addr;
367};
368
369struct ata_probe_ent {
370 struct list_head node;
371 struct device *dev;
057ace5e 372 const struct ata_port_operations *port_ops;
193515d5 373 struct scsi_host_template *sht;
1da177e4
LT		 374 struct ata_ioports port[ATA_MAX_PORTS];
375 unsigned int n_ports;
dd5b06c4 376 unsigned int dummy_port_mask;
1da177e4
LT		 377 unsigned int pio_mask;
378 unsigned int mwdma_mask;
379 unsigned int udma_mask;
1da177e4 380 unsigned long irq;
2ec7df04 381 unsigned long irq2;
1da177e4 382 unsigned int irq_flags;
cca3974e
JG		 383 unsigned long port_flags;
384 unsigned long _host_flags;
1da177e4
LT		 385 void __iomem *mmio_base;
386 void *private_data;
fea63e38
TH		 387
388 /* port_info for the secondary port. Together with irq2, it's
389 * used to implement non-uniform secondary port. Currently,
390 * the only user is ata_piix combined mode. This workaround
391 * will be removed together with ata_probe_ent when init model
392 * is updated.
393 */
394 const struct ata_port_info *pinfo2;
1da177e4
LT		 395};
396
cca3974e 397struct ata_host {
1da177e4
LT		 398 spinlock_t lock;
399 struct device *dev;
400 unsigned long irq;
2ec7df04 401 unsigned long irq2;
1da177e4
LT		 402 void __iomem *mmio_base;
403 unsigned int n_ports;
404 void *private_data;
057ace5e 405 const struct ata_port_operations *ops;
5444a6f4
AC		 406 unsigned long flags;
407 int simplex_claimed; /* Keep seperate in case we
408 ever need to do this locked */
f0eb62b8 409 struct ata_port *ports[0];
1da177e4
LT		 410};
411
412struct ata_queued_cmd {
413 struct ata_port *ap;
414 struct ata_device *dev;
415
416 struct scsi_cmnd *scsicmd;
417 void (*scsidone)(struct scsi_cmnd *);
418
419 struct ata_taskfile tf;
420 u8 cdb[ATAPI_CDB_LEN];
421
422 unsigned long flags; /* ATA_QCFLAG_xxx */
423 unsigned int tag;
424 unsigned int n_elem;
cedc9a47 425 unsigned int orig_n_elem;
1da177e4
LT		 426
427 int dma_dir;
428
cedc9a47
JG		 429 unsigned int pad_len;
430
1da177e4
LT		 431 unsigned int nsect;
432 unsigned int cursect;
433
434 unsigned int nbytes;
435 unsigned int curbytes;
436
437 unsigned int cursg;
438 unsigned int cursg_ofs;
439
440 struct scatterlist sgent;
cedc9a47 441 struct scatterlist pad_sgent;
1da177e4
LT		 442 void *buf_virt;
443
cedc9a47
JG		 444 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
445 struct scatterlist *__sg;
1da177e4 446
a22e2eb0 447 unsigned int err_mask;
e61e0672 448 struct ata_taskfile result_tf;
1da177e4
LT		 449 ata_qc_cb_t complete_fn;
450
1da177e4
LT		 451 void *private_data;
452};
453
cca3974e 454struct ata_port_stats {
1da177e4
LT		 455 unsigned long unhandled_irq;
456 unsigned long idle_irq;
457 unsigned long rw_reqbuf;
458};
459
0c247c55
TH		 460struct ata_ering_entry {
461 int is_io;
462 unsigned int err_mask;
463 u64 timestamp;
464};
465
466struct ata_ering {
467 int cursor;
468 struct ata_ering_entry ring[ATA_ERING_SIZE];
469};
470
1da177e4 471struct ata_device {
38d87234 472 struct ata_port *ap;
72fa4b74 473 unsigned int devno; /* 0 or 1 */
1da177e4 474 unsigned long flags; /* ATA_DFLAG_xxx */
3edebac4 475 struct scsi_device *sdev; /* attached SCSI device */
72fa4b74
TH		 476 /* n_sector is used as CLEAR_OFFSET, read comment above CLEAR_OFFSET */
477 u64 n_sectors; /* size of device, if ATA */
1da177e4 478 unsigned int class; /* ATA_DEV_xxx */
fe635c7e 479 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
1da177e4
LT		 480 u8 pio_mode;
481 u8 dma_mode;
482 u8 xfer_mode;
483 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
484
8cbd6df1
AL		 485 unsigned int multi_count; /* sectors count for
486 READ/WRITE MULTIPLE */
b00eec1d 487 unsigned int max_sectors; /* per-device max sectors */
6e7846e9 488 unsigned int cdb_len;
8bf62ece 489
acf356b1
TH		 490 /* per-dev xfer mask */
491 unsigned int pio_mask;
492 unsigned int mwdma_mask;
493 unsigned int udma_mask;
494
8bf62ece
AL		 495 /* for CHS addressing */
496 u16 cylinders; /* Number of cylinders */
497 u16 heads; /* Number of heads */
498 u16 sectors; /* Number of sectors per track */
0c247c55
TH		 499
500 /* error history */
501 struct ata_ering ering;
93590859 502 unsigned int horkage; /* List of broken features */
1da177e4
LT		 503};
504
72fa4b74
TH		 505/* Offset into struct ata_device. Fields above it are maintained
506 * acress device init. Fields below are zeroed.
507 */
508#define ATA_DEVICE_CLEAR_OFFSET offsetof(struct ata_device, n_sectors)
509
f3e81b19
TH		 510struct ata_eh_info {
511 struct ata_device *dev; /* offending device */
512 u32 serror; /* SError from LLDD */
513 unsigned int err_mask; /* port-wide err_mask */
514 unsigned int action; /* ATA_EH_* action mask */
47005f25 515 unsigned int dev_action[ATA_MAX_DEVICES]; /* dev EH action */
f3e81b19 516 unsigned int flags; /* ATA_EHI_* flags */
abdda733
TH		 517
518 unsigned long hotplug_timestamp;
519 unsigned int probe_mask;
520
f3e81b19
TH		 521 char desc[ATA_EH_DESC_LEN];
522 int desc_len;
523};
524
525struct ata_eh_context {
526 struct ata_eh_info i;
527 int tries[ATA_MAX_DEVICES];
abdda733
TH		 528 unsigned int classes[ATA_MAX_DEVICES];
529 unsigned int did_probe_mask;
f3e81b19
TH		 530};
531
1da177e4 532struct ata_port {
cca3974e 533 struct Scsi_Host *scsi_host; /* our co-allocated scsi host */
057ace5e 534 const struct ata_port_operations *ops;
ba6a1308 535 spinlock_t *lock;
1da177e4 536 unsigned long flags; /* ATA_FLAG_xxx */
b51e9e5d 537 unsigned int pflags; /* ATA_PFLAG_xxx */
1da177e4
LT		 538 unsigned int id; /* unique id req'd by scsi midlyr */
539 unsigned int port_no; /* unique port #; from zero */
1da177e4
LT		 540
541 struct ata_prd *prd; /* our SG list */
542 dma_addr_t prd_dma; /* and its DMA mapping */
543
cedc9a47
JG		 544 void *pad; /* array of DMA pad buffers */
545 dma_addr_t pad_dma;
546
1da177e4
LT		 547 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
548
549 u8 ctl; /* cache of ATA control register */
550 u8 last_ctl; /* Cache last written value */
1da177e4
LT		 551 unsigned int pio_mask;
552 unsigned int mwdma_mask;
553 unsigned int udma_mask;
554 unsigned int cbl; /* cable type; ATA_CBL_xxx */
5a04bf4b 555 unsigned int hw_sata_spd_limit;
1c3fae4d 556 unsigned int sata_spd_limit; /* SATA PHY speed limit */
1da177e4 557
cca3974e 558 /* record runtime error info, protected by host lock */
f3e81b19
TH		 559 struct ata_eh_info eh_info;
560 /* EH context owned by EH */
561 struct ata_eh_context eh_context;
562
1da177e4
LT		 563 struct ata_device device[ATA_MAX_DEVICES];
564
565 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
6cec4a39 566 unsigned long qc_allocated;
dedaf2b0
TH		 567 unsigned int qc_active;
568
1da177e4 569 unsigned int active_tag;
dedaf2b0 570 u32 sactive;
1da177e4 571
cca3974e
JG		 572 struct ata_port_stats stats;
573 struct ata_host *host;
2f1f610b 574 struct device *dev;
1da177e4 575
9a9c77dc
TH		 576 struct work_struct port_task;
577 struct work_struct hotplug_task;
3b01b8af 578 struct work_struct scsi_rescan_task;
86e45b6b 579
14be71f4 580 unsigned int hsm_task_state;
1da177e4 581
bfd60579 582 u32 msg_enable;
a72ec4ce 583 struct list_head eh_done_q;
c6cf9e99 584 wait_queue_head_t eh_wait_q;
bfd60579 585
500530f6
TH		 586 pm_message_t pm_mesg;
587 int *pm_result;
588
1da177e4 589 void *private_data;
fe635c7e
TH		 590
591 u8 sector_buf[ATA_SECT_SIZE]; /* owned by EH */
1da177e4
LT		 592};
593
594struct ata_port_operations {
595 void (*port_disable) (struct ata_port *);
596
597 void (*dev_config) (struct ata_port *, struct ata_device *);
598
599 void (*set_piomode) (struct ata_port *, struct ata_device *);
600 void (*set_dmamode) (struct ata_port *, struct ata_device *);
5444a6f4 601 unsigned long (*mode_filter) (const struct ata_port *, struct ata_device *, unsigned long);
1da177e4 602
057ace5e 603 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 604 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
605
057ace5e 606 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 607 u8 (*check_status)(struct ata_port *ap);
608 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT		 609 void (*dev_select)(struct ata_port *ap, unsigned int device);
610
c19ba8af 611 void (*phy_reset) (struct ata_port *ap); /* obsolete */
e35a9e01 612 void (*set_mode) (struct ata_port *ap);
c19ba8af 613
1da177e4
LT		 614 void (*post_set_mode) (struct ata_port *ap);
615
616 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
617
618 void (*bmdma_setup) (struct ata_queued_cmd *qc);
619 void (*bmdma_start) (struct ata_queued_cmd *qc);
620
a6b2c5d4
AC		 621 void (*data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
622
1da177e4 623 void (*qc_prep) (struct ata_queued_cmd *qc);
9a3d9eb0 624 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
1da177e4 625
9ec957f2
TH		 626 /* Error handlers. ->error_handler overrides ->eng_timeout and
627 * indicates that new-style EH is in place.
628 */
629 void (*eng_timeout) (struct ata_port *ap); /* obsolete */
630
631 void (*freeze) (struct ata_port *ap);
632 void (*thaw) (struct ata_port *ap);
633 void (*error_handler) (struct ata_port *ap);
634 void (*post_internal_cmd) (struct ata_queued_cmd *qc);
1da177e4 635
7d12e780 636 irq_handler_t irq_handler;
1da177e4
LT		 637 void (*irq_clear) (struct ata_port *);
638
639 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
640 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
641 u32 val);
642
500530f6
TH		 643 int (*port_suspend) (struct ata_port *ap, pm_message_t mesg);
644 int (*port_resume) (struct ata_port *ap);
645
1da177e4
LT		 646 int (*port_start) (struct ata_port *ap);
647 void (*port_stop) (struct ata_port *ap);
648
cca3974e 649 void (*host_stop) (struct ata_host *host);
1da177e4 650
b73fc89f 651 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT		 652 u8 (*bmdma_status) (struct ata_port *ap);
653};
654
655struct ata_port_info {
d0be4a7d 656 struct scsi_host_template *sht;
cca3974e 657 unsigned long flags;
1da177e4
LT		 658 unsigned long pio_mask;
659 unsigned long mwdma_mask;
660 unsigned long udma_mask;
057ace5e 661 const struct ata_port_operations *port_ops;
e99f8b5e 662 void *private_data;
1da177e4
LT		 663};
664
452503f9
AC		 665struct ata_timing {
666 unsigned short mode; /* ATA mode */
667 unsigned short setup; /* t1 */
668 unsigned short act8b; /* t2 for 8-bit I/O */
669 unsigned short rec8b; /* t2i for 8-bit I/O */
670 unsigned short cyc8b; /* t0 for 8-bit I/O */
671 unsigned short active; /* t2 or tD */
672 unsigned short recover; /* t2i or tK */
673 unsigned short cycle; /* t0 */
674 unsigned short udma; /* t2CYCTYP/2 */
675};
676
677#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4 678
e9c83914
TH		 679extern const unsigned long sata_deb_timing_normal[];
680extern const unsigned long sata_deb_timing_hotplug[];
681extern const unsigned long sata_deb_timing_long[];
682
dd5b06c4
TH		 683extern const struct ata_port_operations ata_dummy_port_ops;
684
e9c83914
TH		 685static inline const unsigned long *
686sata_ehc_deb_timing(struct ata_eh_context *ehc)
687{
688 if (ehc->i.flags & ATA_EHI_HOTPLUGGED)
689 return sata_deb_timing_hotplug;
690 else
691 return sata_deb_timing_normal;
692}
d7bb4cc7 693
dd5b06c4
TH		 694static inline int ata_port_is_dummy(struct ata_port *ap)
695{
696 return ap->ops == &ata_dummy_port_ops;
697}
698
1da177e4
LT		 699extern void ata_port_probe(struct ata_port *);
700extern void __sata_phy_reset(struct ata_port *ap);
701extern void sata_phy_reset(struct ata_port *ap);
702extern void ata_bus_reset(struct ata_port *ap);
3c567b7d 703extern int sata_set_spd(struct ata_port *ap);
d7bb4cc7
TH		 704extern int sata_phy_debounce(struct ata_port *ap, const unsigned long *param);
705extern int sata_phy_resume(struct ata_port *ap, const unsigned long *param);
f5914a46 706extern int ata_std_prereset(struct ata_port *ap);
2bf2cb26 707extern int ata_std_softreset(struct ata_port *ap, unsigned int *classes);
b6103f6d
TH		 708extern int sata_port_hardreset(struct ata_port *ap,
709 const unsigned long *timing);
2bf2cb26 710extern int sata_std_hardreset(struct ata_port *ap, unsigned int *class);
c2bd5804 711extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
1da177e4
LT		 712extern void ata_port_disable(struct ata_port *);
713extern void ata_std_ports(struct ata_ioports *ioaddr);
714#ifdef CONFIG_PCI
715extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
716 unsigned int n_ports);
717extern void ata_pci_remove_one (struct pci_dev *pdev);
3c5100c1 718extern void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg);
500530f6 719extern void ata_pci_device_do_resume(struct pci_dev *pdev);
3c5100c1 720extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
9b847548 721extern int ata_pci_device_resume(struct pci_dev *pdev);
17bb34a3 722extern int ata_pci_clear_simplex(struct pci_dev *pdev);
1da177e4 723#endif /* CONFIG_PCI */
057ace5e 724extern int ata_device_add(const struct ata_probe_ent *ent);
720ba126 725extern void ata_port_detach(struct ata_port *ap);
cca3974e
JG		 726extern void ata_host_init(struct ata_host *, struct device *,
727 unsigned long, const struct ata_port_operations *);
728extern void ata_host_remove(struct ata_host *host);
193515d5 729extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT		 730extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
731extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
1da177e4 732extern int ata_scsi_release(struct Scsi_Host *host);
80289167 733extern void ata_sas_port_destroy(struct ata_port *);
cca3974e 734extern struct ata_port *ata_sas_port_alloc(struct ata_host *,
80289167
BK		 735 struct ata_port_info *, struct Scsi_Host *);
736extern int ata_sas_port_init(struct ata_port *);
737extern int ata_sas_port_start(struct ata_port *ap);
738extern void ata_sas_port_stop(struct ata_port *ap);
739extern int ata_sas_slave_configure(struct scsi_device *, struct ata_port *);
740extern int ata_sas_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *),
741 struct ata_port *ap);
1da177e4 742extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
34bf2170
TH		 743extern int sata_scr_valid(struct ata_port *ap);
744extern int sata_scr_read(struct ata_port *ap, int reg, u32 *val);
745extern int sata_scr_write(struct ata_port *ap, int reg, u32 val);
746extern int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val);
747extern int ata_port_online(struct ata_port *ap);
748extern int ata_port_offline(struct ata_port *ap);
9b847548 749extern int ata_scsi_device_resume(struct scsi_device *);
3c5100c1 750extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t mesg);
cca3974e
JG		 751extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg);
752extern void ata_host_resume(struct ata_host *host);
67846b30 753extern int ata_ratelimit(void);
d1adc1bb
TH		 754extern int ata_busy_sleep(struct ata_port *ap,
755 unsigned long timeout_pat, unsigned long timeout);
86e45b6b
TH		 756extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *),
757 void *data, unsigned long delay);
c22daff4
TH		 758extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
759 unsigned long interval_msec,
760 unsigned long timeout_msec);
67846b30 761
1da177e4
LT		 762/*
763 * Default driver ops implementations
764 */
057ace5e 765extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 766extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG		 767extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
768extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT		 769extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
770extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
771extern u8 ata_check_status(struct ata_port *ap);
772extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 773extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 774extern int ata_port_start (struct ata_port *ap);
775extern void ata_port_stop (struct ata_port *ap);
cca3974e 776extern void ata_host_stop (struct ata_host *host);
7d12e780 777extern irqreturn_t ata_interrupt (int irq, void *dev_instance);
a6b2c5d4
AC		 778extern void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
779 unsigned int buflen, int write_data);
780extern void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
781 unsigned int buflen, int write_data);
75e99585
AC		 782extern void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
783 unsigned int buflen, int write_data);
1da177e4 784extern void ata_qc_prep(struct ata_queued_cmd *qc);
e46834cd 785extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
9a3d9eb0 786extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
1da177e4
LT		 787extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
788 unsigned int buflen);
789extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
790 unsigned int n_elem);
057ace5e 791extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
6a62a04d
TH		 792extern void ata_id_string(const u16 *id, unsigned char *s,
793 unsigned int ofs, unsigned int len);
794extern void ata_id_c_string(const u16 *id, unsigned char *s,
795 unsigned int ofs, unsigned int len);
6919a0a6 796extern unsigned long ata_device_blacklisted(const struct ata_device *dev);
1da177e4
LT		 797extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
798extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 799extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT		 800extern u8 ata_bmdma_status(struct ata_port *ap);
801extern void ata_bmdma_irq_clear(struct ata_port *ap);
6d97dbd7
TH		 802extern void ata_bmdma_freeze(struct ata_port *ap);
803extern void ata_bmdma_thaw(struct ata_port *ap);
f5914a46 804extern void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
6d97dbd7
TH		 805 ata_reset_fn_t softreset,
806 ata_reset_fn_t hardreset,
807 ata_postreset_fn_t postreset);
808extern void ata_bmdma_error_handler(struct ata_port *ap);
809extern void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc);
9a1004d0
TH		 810extern int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
811 u8 status, int in_wq);
f686bcb8 812extern void ata_qc_complete(struct ata_queued_cmd *qc);
dedaf2b0
TH		 813extern int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
814 void (*finish_qc)(struct ata_queued_cmd *));
3373efd8 815extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd,
1da177e4
LT		 816 void (*done)(struct scsi_cmnd *));
817extern int ata_std_bios_param(struct scsi_device *sdev,
818 struct block_device *bdev,
819 sector_t capacity, int geom[]);
820extern int ata_scsi_slave_config(struct scsi_device *sdev);
83c47bcb 821extern void ata_scsi_slave_destroy(struct scsi_device *sdev);
a6e6ce8e
TH		 822extern int ata_scsi_change_queue_depth(struct scsi_device *sdev,
823 int queue_depth);
3373efd8 824extern struct ata_device *ata_dev_pair(struct ata_device *adev);
1da177e4 825
452503f9
AC		 826/*
827 * Timing helpers
828 */
1bc4ccff
AC		 829
830extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC		 831extern int ata_timing_compute(struct ata_device *, unsigned short,
832 struct ata_timing *, int, int);
833extern void ata_timing_merge(const struct ata_timing *,
834 const struct ata_timing *, struct ata_timing *,
835 unsigned int);
836
837enum {
838 ATA_TIMING_SETUP = (1 << 0),
839 ATA_TIMING_ACT8B = (1 << 1),
840 ATA_TIMING_REC8B = (1 << 2),
841 ATA_TIMING_CYC8B = (1 << 3),
842 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
843 ATA_TIMING_CYC8B,
844 ATA_TIMING_ACTIVE = (1 << 4),
845 ATA_TIMING_RECOVER = (1 << 5),
846 ATA_TIMING_CYCLE = (1 << 6),
847 ATA_TIMING_UDMA = (1 << 7),
848 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
849 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
850 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
851 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
852};
853
1da177e4
LT		 854
855#ifdef CONFIG_PCI
856struct pci_bits {
857 unsigned int reg; /* PCI config register to read */
858 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
859 unsigned long mask;
860 unsigned long val;
861};
862
cca3974e 863extern void ata_pci_host_stop (struct ata_host *host);
1da177e4 864extern struct ata_probe_ent *
47a86593 865ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 866extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
17bb34a3 867extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
1da177e4
LT		 868#endif /* CONFIG_PCI */
869
ece1d636
TH		 870/*
871 * EH
872 */
ece1d636 873extern void ata_eng_timeout(struct ata_port *ap);
7b70fc03
TH		 874
875extern void ata_port_schedule_eh(struct ata_port *ap);
876extern int ata_port_abort(struct ata_port *ap);
e3180499
TH		 877extern int ata_port_freeze(struct ata_port *ap);
878
879extern void ata_eh_freeze_port(struct ata_port *ap);
880extern void ata_eh_thaw_port(struct ata_port *ap);
7b70fc03 881
ece1d636
TH		 882extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
883extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
884
f5914a46
TH		 885extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
886 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
887 ata_postreset_fn_t postreset);
022bdb07 888
61440db6
TH		 889/*
890 * printk helpers
891 */
892#define ata_port_printk(ap, lv, fmt, args...) \
893 printk(lv"ata%u: "fmt, (ap)->id , ##args)
894
895#define ata_dev_printk(dev, lv, fmt, args...) \
896 printk(lv"ata%u.%02u: "fmt, (dev)->ap->id, (dev)->devno , ##args)
1da177e4 897
f3e81b19
TH		 898/*
899 * ata_eh_info helpers
900 */
901#define ata_ehi_push_desc(ehi, fmt, args...) do { \
902 (ehi)->desc_len += scnprintf((ehi)->desc + (ehi)->desc_len, \
903 ATA_EH_DESC_LEN - (ehi)->desc_len, \
904 fmt , ##args); \
905} while (0)
906
907#define ata_ehi_clear_desc(ehi) do { \
908 (ehi)->desc[0] = '\0'; \
909 (ehi)->desc_len = 0; \
910} while (0)
911
c0b6c037 912static inline void __ata_ehi_hotplugged(struct ata_eh_info *ehi)
084fe639
TH		 913{
914 if (ehi->flags & ATA_EHI_HOTPLUGGED)
915 return;
916
28324304 917 ehi->flags |= ATA_EHI_HOTPLUGGED | ATA_EHI_RESUME_LINK;
084fe639
TH		 918 ehi->hotplug_timestamp = jiffies;
919
084fe639
TH		 920 ehi->action |= ATA_EH_SOFTRESET;
921 ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1;
922}
923
c0b6c037
TH		 924static inline void ata_ehi_hotplugged(struct ata_eh_info *ehi)
925{
926 __ata_ehi_hotplugged(ehi);
927 ehi->err_mask |= AC_ERR_ATA_BUS;
928}
929
61440db6
TH		 930/*
931 * qc helpers
932 */
972c26bd
JG		 933static inline int
934ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
935{
936 if (sg == &qc->pad_sgent)
937 return 1;
938 if (qc->pad_len)
939 return 0;
940 if (((sg - qc->__sg) + 1) == qc->n_elem)
941 return 1;
942 return 0;
943}
944
cc1887f3
TH		 945static inline struct scatterlist *
946ata_qc_first_sg(struct ata_queued_cmd *qc)
947{
948 if (qc->n_elem)
949 return qc->__sg;
950 if (qc->pad_len)
951 return &qc->pad_sgent;
952 return NULL;
953}
954
cedc9a47
JG		 955static inline struct scatterlist *
956ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
957{
958 if (sg == &qc->pad_sgent)
959 return NULL;
960 if (++sg - qc->__sg < qc->n_elem)
961 return sg;
cc1887f3
TH		 962 if (qc->pad_len)
963 return &qc->pad_sgent;
964 return NULL;
cedc9a47
JG		 965}
966
967#define ata_for_each_sg(sg, qc) \
cc1887f3 968 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
cedc9a47 969
1da177e4
LT		 970static inline unsigned int ata_tag_valid(unsigned int tag)
971{
972 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
973}
974
2ab7db1f
TH		 975static inline unsigned int ata_tag_internal(unsigned int tag)
976{
977 return tag == ATA_MAX_QUEUE - 1;
978}
979
5806db22
TH		 980/*
981 * device helpers
982 */
e1211e3f 983static inline unsigned int ata_class_enabled(unsigned int class)
597afd21
TH		 984{
985 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
986}
987
e1211e3f 988static inline unsigned int ata_class_disabled(unsigned int class)
1da177e4 989{
e1211e3f
TH		 990 return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP;
991}
992
002c8054
TH		 993static inline unsigned int ata_class_absent(unsigned int class)
994{
995 return !ata_class_enabled(class) && !ata_class_disabled(class);
996}
997
e1211e3f
TH		 998static inline unsigned int ata_dev_enabled(const struct ata_device *dev)
999{
1000 return ata_class_enabled(dev->class);
1001}
1002
1003static inline unsigned int ata_dev_disabled(const struct ata_device *dev)
1004{
1005 return ata_class_disabled(dev->class);
1da177e4
LT		 1006}
1007
002c8054
TH		 1008static inline unsigned int ata_dev_absent(const struct ata_device *dev)
1009{
1010 return ata_class_absent(dev->class);
1011}
1012
02670bf3
TH		 1013static inline unsigned int ata_dev_ready(const struct ata_device *dev)
1014{
1015 return ata_dev_enabled(dev) && !(dev->flags & ATA_DFLAG_SUSPENDED);
1016}
1017
5806db22
TH		 1018/*
1019 * port helpers
1020 */
1021static inline int ata_port_max_devices(const struct ata_port *ap)
1022{
1023 if (ap->flags & ATA_FLAG_SLAVE_POSS)
1024 return 2;
1025 return 1;
1026}
1027
1028
1da177e4
LT		 1029static inline u8 ata_chk_status(struct ata_port *ap)
1030{
1031 return ap->ops->check_status(ap);
1032}
1033
0baab86b
EF		 1034
1035/**
1036 * ata_pause - Flush writes and pause 400 nanoseconds.
1037 * @ap: Port to wait for.
1038 *
1039 * LOCKING:
1040 * Inherited from caller.
1041 */
1042
1da177e4
LT		 1043static inline void ata_pause(struct ata_port *ap)
1044{
1045 ata_altstatus(ap);
1046 ndelay(400);
1047}
1048
0baab86b
EF		 1049
1050/**
1051 * ata_busy_wait - Wait for a port status register
1052 * @ap: Port to wait for.
1053 *
1054 * Waits up to max*10 microseconds for the selected bits in the port's
1055 * status register to be cleared.
1056 * Returns final value of status register.
1057 *
1058 * LOCKING:
1059 * Inherited from caller.
1060 */
1061
1da177e4
LT		 1062static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
1063 unsigned int max)
1064{
1065 u8 status;
1066
1067 do {
1068 udelay(10);
1069 status = ata_chk_status(ap);
1070 max--;
d1adc1bb 1071 } while (status != 0xff && (status & bits) && (max > 0));
1da177e4
LT		 1072
1073 return status;
1074}
1075
0baab86b
EF		 1076
1077/**
1078 * ata_wait_idle - Wait for a port to be idle.
1079 * @ap: Port to wait for.
1080 *
1081 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
1082 * Returns final value of status register.
1083 *
1084 * LOCKING:
1085 * Inherited from caller.
1086 */
1087
1da177e4
LT		 1088static inline u8 ata_wait_idle(struct ata_port *ap)
1089{
1090 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
1091
d1adc1bb 1092 if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ))) {
1da177e4 1093 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD		 1094 if (ata_msg_warn(ap))
1095 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
1096 status, l);
1da177e4
LT		 1097 }
1098
1099 return status;
1100}
1101
1102static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
1103{
1104 qc->tf.ctl |= ATA_NIEN;
1105}
1106
f69499f4
TH		 1107static inline struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap,
1108 unsigned int tag)
1da177e4
LT		 1109{
1110 if (likely(ata_tag_valid(tag)))
1111 return &ap->qcmd[tag];
1112 return NULL;
1113}
1114
f69499f4
TH		 1115static inline struct ata_queued_cmd *ata_qc_from_tag(struct ata_port *ap,
1116 unsigned int tag)
1117{
1118 struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
1119
1120 if (unlikely(!qc) || !ap->ops->error_handler)
1121 return qc;
1122
1123 if ((qc->flags & (ATA_QCFLAG_ACTIVE |
1124 ATA_QCFLAG_FAILED)) == ATA_QCFLAG_ACTIVE)
1125 return qc;
1126
1127 return NULL;
1128}
1129
3373efd8 1130static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf)
1da177e4
LT		 1131{
1132 memset(tf, 0, sizeof(*tf));
1133
3373efd8
TH		 1134 tf->ctl = dev->ap->ctl;
1135 if (dev->devno == 0)
1da177e4
LT		 1136 tf->device = ATA_DEVICE_OBS;
1137 else
1138 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
1139}
1140
2c13b7ce
JG		 1141static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
1142{
1143 qc->__sg = NULL;
1144 qc->flags = 0;
1145 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
1146 qc->nsect = 0;
1147 qc->nbytes = qc->curbytes = 0;
a22e2eb0 1148 qc->err_mask = 0;
2c13b7ce 1149
3373efd8 1150 ata_tf_init(qc->dev, &qc->tf);
e61e0672
TH		 1151
1152 /* init result_tf such that it indicates normal completion */
1153 qc->result_tf.command = ATA_DRDY;
1154 qc->result_tf.feature = 0;
2c13b7ce
JG		 1155}
1156
0baab86b
EF		 1157/**
1158 * ata_irq_ack - Acknowledge a device interrupt.
1159 * @ap: Port on which interrupts are enabled.
1160 *
1161 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
1162 * or BUSY+DRQ clear). Obtain dma status and port status from
1163 * device. Clear the interrupt. Return port status.
1164 *
1165 * LOCKING:
1166 */
1167
1da177e4
LT		 1168static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
1169{
1170 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
1171 u8 host_stat, post_stat, status;
1172
1173 status = ata_busy_wait(ap, bits, 1000);
1174 if (status & bits)
bfd60579
RD		 1175 if (ata_msg_err(ap))
1176 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT		 1177
1178 /* get controller status; clear intr, err bits */
1179 if (ap->flags & ATA_FLAG_MMIO) {
1180 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
1181 host_stat = readb(mmio + ATA_DMA_STATUS);
1182 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
1183 mmio + ATA_DMA_STATUS);
1184
1185 post_stat = readb(mmio + ATA_DMA_STATUS);
1186 } else {
1187 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1188 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
1189 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1190
1191 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1192 }
1193
bfd60579
RD		 1194 if (ata_msg_intr(ap))
1195 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
1196 __FUNCTION__,
1197 host_stat, post_stat, status);
1da177e4
LT		 1198
1199 return status;
1200}
1201
057ace5e 1202static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT		 1203{
1204 return ata_id_wcache_enabled(dev->id) ||
1205 ata_id_has_flush(dev->id) ||
1206 ata_id_has_flush_ext(dev->id);
1207}
1208
a7dac447
JG		 1209static inline unsigned int ac_err_mask(u8 status)
1210{
3655d1d3 1211 if (status & (ATA_BUSY | ATA_DRQ))
11a56d24 1212 return AC_ERR_HSM;
a7dac447
JG		 1213 if (status & (ATA_ERR | ATA_DF))
1214 return AC_ERR_DEV;
1215 return 0;
1216}
1217
1218static inline unsigned int __ac_err_mask(u8 status)
1219{
1220 unsigned int mask = ac_err_mask(status);
1221 if (mask == 0)
1222 return AC_ERR_OTHER;
1223 return mask;
1224}
1225
6037d6bb
JG		 1226static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
1227{
1228 ap->pad_dma = 0;
1229 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
1230 &ap->pad_dma, GFP_KERNEL);
1231 return (ap->pad == NULL) ? -ENOMEM : 0;
1232}
1233
1234static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
1235{
1236 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
1237}
1238
35bb94b1
JG		 1239static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host)
1240{
1241 return (struct ata_port *) &host->hostdata[0];
1242}
1243
1da177e4 1244#endif /* __LINUX_LIBATA_H__ */
Linux kernel - Deliverables
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