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[deliverable/linux.git] / include / linux / libata.h
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1da177e4 1/*
af36d7f0
JG		 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT		 24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
1da177e4
LT		 33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
36
37/*
bfd60579
RD		 38 * compile-time options: to be removed as soon as all the drivers are
39 * converted to the new debugging mechanism
1da177e4
LT		 40 */
41#undef ATA_DEBUG /* debugging output */
42#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
43#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
44#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT		 45#undef ATA_ENABLE_PATA /* define to enable PATA support in some
46 * low-level drivers */
47#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
48
49
50/* note: prints function name for you */
51#ifdef ATA_DEBUG
52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53#ifdef ATA_VERBOSE_DEBUG
54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55#else
56#define VPRINTK(fmt, args...)
57#endif /* ATA_VERBOSE_DEBUG */
58#else
59#define DPRINTK(fmt, args...)
60#define VPRINTK(fmt, args...)
61#endif /* ATA_DEBUG */
62
2c13b7ce
JG		 63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
bfd60579
RD		 65/* NEW: debug levels */
66#define HAVE_LIBATA_MSG 1
67
68enum {
69 ATA_MSG_DRV = 0x0001,
70 ATA_MSG_INFO = 0x0002,
71 ATA_MSG_PROBE = 0x0004,
72 ATA_MSG_WARN = 0x0008,
73 ATA_MSG_MALLOC = 0x0010,
74 ATA_MSG_CTL = 0x0020,
75 ATA_MSG_INTR = 0x0040,
76 ATA_MSG_ERR = 0x0080,
77};
78
79#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
80#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
81#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
82#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
83#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
84#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
85#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
86#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
87
88static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
89{
90 if (dval < 0 || dval >= (sizeof(u32) * 8))
91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
92 if (!dval)
93 return 0;
94 return (1 << dval) - 1;
95}
96
1da177e4
LT		 97/* defines only for the constants which don't work well as enums */
98#define ATA_TAG_POISON 0xfafbfcfdU
99
100/* move to PCI layer? */
101static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
102{
103 return &pdev->dev;
104}
105
106enum {
107 /* various global constants */
108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
109 ATA_MAX_PORTS = 8,
110 ATA_DEF_QUEUE = 1,
111 ATA_MAX_QUEUE = 1,
112 ATA_MAX_SECTORS = 200, /* FIXME */
113 ATA_MAX_BUS = 2,
114 ATA_DEF_BUSY_WAIT = 10000,
115 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
116
117 ATA_SHT_EMULATED = 1,
118 ATA_SHT_CMD_PER_LUN = 1,
119 ATA_SHT_THIS_ID = -1,
cf482935 120 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT		 121
122 /* struct ata_device stuff */
123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
b00eec1d 125 ATA_DFLAG_LBA = (1 << 2), /* device supports LBA */
1da177e4
LT		 126
127 ATA_DEV_UNKNOWN = 0, /* unknown device */
128 ATA_DEV_ATA = 1, /* ATA device */
129 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
130 ATA_DEV_ATAPI = 3, /* ATAPI device */
131 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
132 ATA_DEV_NONE = 5, /* no device */
133
134 /* struct ata_port flags */
135 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
136 /* (doesn't imply presence) */
137 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
138 ATA_FLAG_SATA = (1 << 3),
139 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
c19ba8af 140 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */
1da177e4 141 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
c19ba8af 142 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */
1da177e4 143 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
c1389503
TH		 144 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
145 * proper HSM is in place. */
2c13b7ce 146 ATA_FLAG_DEBUGMSG = (1 << 10),
50630195 147 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
1da177e4 148
9b847548
JA		 149 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
150
8d238e01
AC		 151 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
152 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
153
c18d06f8
TH		 154 ATA_FLAG_FLUSH_PIO_TASK = (1 << 15), /* Flush PIO task */
155 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */
dde44589 156
1da177e4
LT		 157 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
158 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
159 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
160 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
341963b9 161 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */
1da177e4
LT		 162
163 /* various lengths of time */
8d238e01 164 ATA_TMOUT_EDD = 5 * HZ, /* heuristic */
1da177e4 165 ATA_TMOUT_PIO = 30 * HZ,
8d238e01
AC		 166 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
167 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
1da177e4
LT		 168 ATA_TMOUT_CDB = 30 * HZ,
169 ATA_TMOUT_CDB_QUICK = 5 * HZ,
a2a7a662
TH		 170 ATA_TMOUT_INTERNAL = 30 * HZ,
171 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT		 172
173 /* ATA bus states */
174 BUS_UNKNOWN = 0,
175 BUS_DMA = 1,
176 BUS_IDLE = 2,
177 BUS_NOINTR = 3,
178 BUS_NODATA = 4,
179 BUS_TIMER = 5,
180 BUS_PIO = 6,
181 BUS_EDD = 7,
182 BUS_IDENTIFY = 8,
183 BUS_PACKET = 9,
184
185 /* SATA port states */
186 PORT_UNKNOWN = 0,
187 PORT_ENABLED = 1,
188 PORT_DISABLED = 2,
189
190 /* encoding various smaller bitmaps into a single
191 * unsigned long bitmap
192 */
193 ATA_SHIFT_UDMA = 0,
194 ATA_SHIFT_MWDMA = 8,
195 ATA_SHIFT_PIO = 11,
cedc9a47
JG		 196
197 /* size of buffer to pad xfers ending on unaligned boundaries */
198 ATA_DMA_PAD_SZ = 4,
199 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
47a86593
AC		 200
201 /* Masks for port functions */
202 ATA_PORT_PRIMARY = (1 << 0),
203 ATA_PORT_SECONDARY = (1 << 1),
1da177e4
LT		 204};
205
14be71f4
AL		 206enum hsm_task_states {
207 HSM_ST_UNKNOWN,
208 HSM_ST_IDLE,
209 HSM_ST_POLL,
210 HSM_ST_TMOUT,
211 HSM_ST,
212 HSM_ST_LAST,
213 HSM_ST_LAST_POLL,
214 HSM_ST_ERR,
1da177e4
LT		 215};
216
a7dac447 217enum ata_completion_errors {
11a56d24
TH		 218 AC_ERR_DEV = (1 << 0), /* device reported error */
219 AC_ERR_HSM = (1 << 1), /* host state machine violation */
220 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
221 AC_ERR_MEDIA = (1 << 3), /* media error */
222 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
223 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
224 AC_ERR_SYSTEM = (1 << 6), /* system error */
225 AC_ERR_INVALID = (1 << 7), /* invalid argument */
226 AC_ERR_OTHER = (1 << 8), /* unknown */
a7dac447
JG		 227};
228
1da177e4
LT		 229/* forward declarations */
230struct scsi_device;
231struct ata_port_operations;
232struct ata_port;
233struct ata_queued_cmd;
234
235/* typedefs */
77853bf2 236typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
7944ea95 237typedef void (*ata_probeinit_fn_t)(struct ata_port *);
a62c0fc5
TH		 238typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *);
239typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *);
1da177e4
LT		 240
241struct ata_ioports {
242 unsigned long cmd_addr;
243 unsigned long data_addr;
244 unsigned long error_addr;
245 unsigned long feature_addr;
246 unsigned long nsect_addr;
247 unsigned long lbal_addr;
248 unsigned long lbam_addr;
249 unsigned long lbah_addr;
250 unsigned long device_addr;
251 unsigned long status_addr;
252 unsigned long command_addr;
253 unsigned long altstatus_addr;
254 unsigned long ctl_addr;
255 unsigned long bmdma_addr;
256 unsigned long scr_addr;
257};
258
259struct ata_probe_ent {
260 struct list_head node;
261 struct device *dev;
057ace5e 262 const struct ata_port_operations *port_ops;
193515d5 263 struct scsi_host_template *sht;
1da177e4
LT		 264 struct ata_ioports port[ATA_MAX_PORTS];
265 unsigned int n_ports;
266 unsigned int hard_port_no;
267 unsigned int pio_mask;
268 unsigned int mwdma_mask;
269 unsigned int udma_mask;
270 unsigned int legacy_mode;
271 unsigned long irq;
272 unsigned int irq_flags;
273 unsigned long host_flags;
274 void __iomem *mmio_base;
275 void *private_data;
276};
277
278struct ata_host_set {
279 spinlock_t lock;
280 struct device *dev;
281 unsigned long irq;
282 void __iomem *mmio_base;
283 unsigned int n_ports;
284 void *private_data;
057ace5e 285 const struct ata_port_operations *ops;
1da177e4
LT		 286 struct ata_port * ports[0];
287};
288
289struct ata_queued_cmd {
290 struct ata_port *ap;
291 struct ata_device *dev;
292
293 struct scsi_cmnd *scsicmd;
294 void (*scsidone)(struct scsi_cmnd *);
295
296 struct ata_taskfile tf;
297 u8 cdb[ATAPI_CDB_LEN];
298
299 unsigned long flags; /* ATA_QCFLAG_xxx */
300 unsigned int tag;
301 unsigned int n_elem;
cedc9a47 302 unsigned int orig_n_elem;
1da177e4
LT		 303
304 int dma_dir;
305
cedc9a47
JG		 306 unsigned int pad_len;
307
1da177e4
LT		 308 unsigned int nsect;
309 unsigned int cursect;
310
311 unsigned int nbytes;
312 unsigned int curbytes;
313
314 unsigned int cursg;
315 unsigned int cursg_ofs;
316
317 struct scatterlist sgent;
cedc9a47 318 struct scatterlist pad_sgent;
1da177e4
LT		 319 void *buf_virt;
320
cedc9a47
JG		 321 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
322 struct scatterlist *__sg;
1da177e4 323
a22e2eb0
AL		 324 unsigned int err_mask;
325
1da177e4
LT		 326 ata_qc_cb_t complete_fn;
327
1da177e4
LT		 328 void *private_data;
329};
330
331struct ata_host_stats {
332 unsigned long unhandled_irq;
333 unsigned long idle_irq;
334 unsigned long rw_reqbuf;
335};
336
337struct ata_device {
338 u64 n_sectors; /* size of device, if ATA */
339 unsigned long flags; /* ATA_DFLAG_xxx */
340 unsigned int class; /* ATA_DEV_xxx */
341 unsigned int devno; /* 0 or 1 */
d9572b1d 342 u16 *id; /* IDENTIFY xxx DEVICE data */
1da177e4
LT		 343 u8 pio_mode;
344 u8 dma_mode;
345 u8 xfer_mode;
346 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
347
8cbd6df1
AL		 348 unsigned int multi_count; /* sectors count for
349 READ/WRITE MULTIPLE */
b00eec1d 350 unsigned int max_sectors; /* per-device max sectors */
6e7846e9 351 unsigned int cdb_len;
8bf62ece
AL		 352
353 /* for CHS addressing */
354 u16 cylinders; /* Number of cylinders */
355 u16 heads; /* Number of heads */
356 u16 sectors; /* Number of sectors per track */
1da177e4
LT		 357};
358
359struct ata_port {
360 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 361 const struct ata_port_operations *ops;
1da177e4
LT		 362 unsigned long flags; /* ATA_FLAG_xxx */
363 unsigned int id; /* unique id req'd by scsi midlyr */
364 unsigned int port_no; /* unique port #; from zero */
365 unsigned int hard_port_no; /* hardware port #; from zero */
366
367 struct ata_prd *prd; /* our SG list */
368 dma_addr_t prd_dma; /* and its DMA mapping */
369
cedc9a47
JG		 370 void *pad; /* array of DMA pad buffers */
371 dma_addr_t pad_dma;
372
1da177e4
LT		 373 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
374
375 u8 ctl; /* cache of ATA control register */
376 u8 last_ctl; /* Cache last written value */
1da177e4
LT		 377 unsigned int pio_mask;
378 unsigned int mwdma_mask;
379 unsigned int udma_mask;
380 unsigned int cbl; /* cable type; ATA_CBL_xxx */
1da177e4
LT		 381
382 struct ata_device device[ATA_MAX_DEVICES];
383
384 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
385 unsigned long qactive;
386 unsigned int active_tag;
387
388 struct ata_host_stats stats;
389 struct ata_host_set *host_set;
390
391 struct work_struct packet_task;
392
393 struct work_struct pio_task;
14be71f4 394 unsigned int hsm_task_state;
1da177e4
LT		 395 unsigned long pio_task_timeout;
396
bfd60579 397 u32 msg_enable;
a72ec4ce 398 struct list_head eh_done_q;
bfd60579 399
1da177e4
LT		 400 void *private_data;
401};
402
403struct ata_port_operations {
404 void (*port_disable) (struct ata_port *);
405
406 void (*dev_config) (struct ata_port *, struct ata_device *);
407
408 void (*set_piomode) (struct ata_port *, struct ata_device *);
409 void (*set_dmamode) (struct ata_port *, struct ata_device *);
410
057ace5e 411 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 412 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
413
057ace5e 414 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 415 u8 (*check_status)(struct ata_port *ap);
416 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT		 417 void (*dev_select)(struct ata_port *ap, unsigned int device);
418
c19ba8af
TH		 419 void (*phy_reset) (struct ata_port *ap); /* obsolete */
420 int (*probe_reset) (struct ata_port *ap, unsigned int *classes);
421
1da177e4
LT		 422 void (*post_set_mode) (struct ata_port *ap);
423
424 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
425
426 void (*bmdma_setup) (struct ata_queued_cmd *qc);
427 void (*bmdma_start) (struct ata_queued_cmd *qc);
428
429 void (*qc_prep) (struct ata_queued_cmd *qc);
9a3d9eb0 430 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
1da177e4
LT		 431
432 void (*eng_timeout) (struct ata_port *ap);
433
434 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
435 void (*irq_clear) (struct ata_port *);
436
437 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
438 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
439 u32 val);
440
441 int (*port_start) (struct ata_port *ap);
442 void (*port_stop) (struct ata_port *ap);
443
444 void (*host_stop) (struct ata_host_set *host_set);
445
b73fc89f 446 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT		 447 u8 (*bmdma_status) (struct ata_port *ap);
448};
449
450struct ata_port_info {
d0be4a7d 451 struct scsi_host_template *sht;
1da177e4
LT		 452 unsigned long host_flags;
453 unsigned long pio_mask;
454 unsigned long mwdma_mask;
455 unsigned long udma_mask;
057ace5e 456 const struct ata_port_operations *port_ops;
e99f8b5e 457 void *private_data;
1da177e4
LT		 458};
459
452503f9
AC		 460struct ata_timing {
461 unsigned short mode; /* ATA mode */
462 unsigned short setup; /* t1 */
463 unsigned short act8b; /* t2 for 8-bit I/O */
464 unsigned short rec8b; /* t2i for 8-bit I/O */
465 unsigned short cyc8b; /* t0 for 8-bit I/O */
466 unsigned short active; /* t2 or tD */
467 unsigned short recover; /* t2i or tK */
468 unsigned short cycle; /* t0 */
469 unsigned short udma; /* t2CYCTYP/2 */
470};
471
472#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4
LT		 473
474extern void ata_port_probe(struct ata_port *);
475extern void __sata_phy_reset(struct ata_port *ap);
476extern void sata_phy_reset(struct ata_port *ap);
477extern void ata_bus_reset(struct ata_port *ap);
a62c0fc5 478extern int ata_drive_probe_reset(struct ata_port *ap,
7944ea95 479 ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 480 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
481 ata_postreset_fn_t postreset, unsigned int *classes);
8a19ac89 482extern void ata_std_probeinit(struct ata_port *ap);
c2bd5804
TH		 483extern int ata_std_softreset(struct ata_port *ap, int verbose,
484 unsigned int *classes);
485extern int sata_std_hardreset(struct ata_port *ap, int verbose,
486 unsigned int *class);
487extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
623a3128
TH		 488extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
489 int post_reset);
1da177e4
LT		 490extern void ata_port_disable(struct ata_port *);
491extern void ata_std_ports(struct ata_ioports *ioaddr);
492#ifdef CONFIG_PCI
493extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
494 unsigned int n_ports);
495extern void ata_pci_remove_one (struct pci_dev *pdev);
9b847548
JA		 496extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
497extern int ata_pci_device_resume(struct pci_dev *pdev);
1da177e4 498#endif /* CONFIG_PCI */
057ace5e 499extern int ata_device_add(const struct ata_probe_ent *ent);
17b14451 500extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 501extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT		 502extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
503extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
f29841e0 504extern enum scsi_eh_timer_return ata_scsi_timed_out(struct scsi_cmnd *cmd);
1da177e4 505extern int ata_scsi_error(struct Scsi_Host *host);
a72ec4ce
TH		 506extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
507extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
1da177e4
LT		 508extern int ata_scsi_release(struct Scsi_Host *host);
509extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
9b847548
JA		 510extern int ata_scsi_device_resume(struct scsi_device *);
511extern int ata_scsi_device_suspend(struct scsi_device *);
512extern int ata_device_resume(struct ata_port *, struct ata_device *);
513extern int ata_device_suspend(struct ata_port *, struct ata_device *);
67846b30 514extern int ata_ratelimit(void);
6f8b9958
TH		 515extern unsigned int ata_busy_sleep(struct ata_port *ap,
516 unsigned long timeout_pat,
517 unsigned long timeout);
67846b30 518
1da177e4
LT		 519/*
520 * Default driver ops implementations
521 */
057ace5e 522extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 523extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG		 524extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
525extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT		 526extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
527extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
528extern u8 ata_check_status(struct ata_port *ap);
529extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 530extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
c2bd5804 531extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes);
1da177e4
LT		 532extern int ata_port_start (struct ata_port *ap);
533extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 534extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4
LT		 535extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
536extern void ata_qc_prep(struct ata_queued_cmd *qc);
9a3d9eb0 537extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
1da177e4
LT		 538extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
539 unsigned int buflen);
540extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
541 unsigned int n_elem);
057ace5e 542extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
6a62a04d
TH		 543extern void ata_id_string(const u16 *id, unsigned char *s,
544 unsigned int ofs, unsigned int len);
545extern void ata_id_c_string(const u16 *id, unsigned char *s,
546 unsigned int ofs, unsigned int len);
1da177e4
LT		 547extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
548extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 549extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT		 550extern u8 ata_bmdma_status(struct ata_port *ap);
551extern void ata_bmdma_irq_clear(struct ata_port *ap);
76014427 552extern void __ata_qc_complete(struct ata_queued_cmd *qc);
1da177e4 553extern void ata_eng_timeout(struct ata_port *ap);
9a3dccc4
TH		 554extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
555 struct scsi_cmnd *cmd,
1da177e4
LT		 556 void (*done)(struct scsi_cmnd *));
557extern int ata_std_bios_param(struct scsi_device *sdev,
558 struct block_device *bdev,
559 sector_t capacity, int geom[]);
560extern int ata_scsi_slave_config(struct scsi_device *sdev);
561
452503f9
AC		 562/*
563 * Timing helpers
564 */
1bc4ccff
AC		 565
566extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC		 567extern int ata_timing_compute(struct ata_device *, unsigned short,
568 struct ata_timing *, int, int);
569extern void ata_timing_merge(const struct ata_timing *,
570 const struct ata_timing *, struct ata_timing *,
571 unsigned int);
572
573enum {
574 ATA_TIMING_SETUP = (1 << 0),
575 ATA_TIMING_ACT8B = (1 << 1),
576 ATA_TIMING_REC8B = (1 << 2),
577 ATA_TIMING_CYC8B = (1 << 3),
578 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
579 ATA_TIMING_CYC8B,
580 ATA_TIMING_ACTIVE = (1 << 4),
581 ATA_TIMING_RECOVER = (1 << 5),
582 ATA_TIMING_CYCLE = (1 << 6),
583 ATA_TIMING_UDMA = (1 << 7),
584 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
585 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
586 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
587 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
588};
589
1da177e4
LT		 590
591#ifdef CONFIG_PCI
592struct pci_bits {
593 unsigned int reg; /* PCI config register to read */
594 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
595 unsigned long mask;
596 unsigned long val;
597};
598
374b1873 599extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 600extern struct ata_probe_ent *
47a86593 601ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 602extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
1da177e4
LT		 603
604#endif /* CONFIG_PCI */
605
606
972c26bd
JG		 607static inline int
608ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
609{
610 if (sg == &qc->pad_sgent)
611 return 1;
612 if (qc->pad_len)
613 return 0;
614 if (((sg - qc->__sg) + 1) == qc->n_elem)
615 return 1;
616 return 0;
617}
618
cc1887f3
TH		 619static inline struct scatterlist *
620ata_qc_first_sg(struct ata_queued_cmd *qc)
621{
622 if (qc->n_elem)
623 return qc->__sg;
624 if (qc->pad_len)
625 return &qc->pad_sgent;
626 return NULL;
627}
628
cedc9a47
JG		 629static inline struct scatterlist *
630ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
631{
632 if (sg == &qc->pad_sgent)
633 return NULL;
634 if (++sg - qc->__sg < qc->n_elem)
635 return sg;
cc1887f3
TH		 636 if (qc->pad_len)
637 return &qc->pad_sgent;
638 return NULL;
cedc9a47
JG		 639}
640
641#define ata_for_each_sg(sg, qc) \
cc1887f3 642 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
cedc9a47 643
1da177e4
LT		 644static inline unsigned int ata_tag_valid(unsigned int tag)
645{
646 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
647}
648
597afd21
TH		 649static inline unsigned int ata_class_present(unsigned int class)
650{
651 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
652}
653
057ace5e 654static inline unsigned int ata_dev_present(const struct ata_device *dev)
1da177e4 655{
597afd21 656 return ata_class_present(dev->class);
1da177e4
LT		 657}
658
659static inline u8 ata_chk_status(struct ata_port *ap)
660{
661 return ap->ops->check_status(ap);
662}
663
0baab86b
EF		 664
665/**
666 * ata_pause - Flush writes and pause 400 nanoseconds.
667 * @ap: Port to wait for.
668 *
669 * LOCKING:
670 * Inherited from caller.
671 */
672
1da177e4
LT		 673static inline void ata_pause(struct ata_port *ap)
674{
675 ata_altstatus(ap);
676 ndelay(400);
677}
678
0baab86b
EF		 679
680/**
681 * ata_busy_wait - Wait for a port status register
682 * @ap: Port to wait for.
683 *
684 * Waits up to max*10 microseconds for the selected bits in the port's
685 * status register to be cleared.
686 * Returns final value of status register.
687 *
688 * LOCKING:
689 * Inherited from caller.
690 */
691
1da177e4
LT		 692static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
693 unsigned int max)
694{
695 u8 status;
696
697 do {
698 udelay(10);
699 status = ata_chk_status(ap);
700 max--;
701 } while ((status & bits) && (max > 0));
702
703 return status;
704}
705
0baab86b
EF		 706
707/**
708 * ata_wait_idle - Wait for a port to be idle.
709 * @ap: Port to wait for.
710 *
711 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
712 * Returns final value of status register.
713 *
714 * LOCKING:
715 * Inherited from caller.
716 */
717
1da177e4
LT		 718static inline u8 ata_wait_idle(struct ata_port *ap)
719{
720 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
721
722 if (status & (ATA_BUSY | ATA_DRQ)) {
723 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD		 724 if (ata_msg_warn(ap))
725 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
726 status, l);
1da177e4
LT		 727 }
728
729 return status;
730}
731
732static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
733{
734 qc->tf.ctl |= ATA_NIEN;
735}
736
737static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
738 unsigned int tag)
739{
740 if (likely(ata_tag_valid(tag)))
741 return &ap->qcmd[tag];
742 return NULL;
743}
744
745static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
746{
747 memset(tf, 0, sizeof(*tf));
748
749 tf->ctl = ap->ctl;
750 if (device == 0)
751 tf->device = ATA_DEVICE_OBS;
752 else
753 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
754}
755
2c13b7ce
JG		 756static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
757{
758 qc->__sg = NULL;
759 qc->flags = 0;
760 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
761 qc->nsect = 0;
762 qc->nbytes = qc->curbytes = 0;
a22e2eb0 763 qc->err_mask = 0;
2c13b7ce
JG		 764
765 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
766}
767
76014427
TH		 768/**
769 * ata_qc_complete - Complete an active ATA command
770 * @qc: Command to complete
771 * @err_mask: ATA Status register contents
772 *
773 * Indicate to the mid and upper layers that an ATA
774 * command has completed, with either an ok or not-ok status.
775 *
776 * LOCKING:
777 * spin_lock_irqsave(host_set lock)
778 */
779static inline void ata_qc_complete(struct ata_queued_cmd *qc)
780{
781 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED))
782 return;
783
784 __ata_qc_complete(qc);
785}
0baab86b
EF		 786
787/**
788 * ata_irq_on - Enable interrupts on a port.
789 * @ap: Port on which interrupts are enabled.
790 *
791 * Enable interrupts on a legacy IDE device using MMIO or PIO,
792 * wait for idle, clear any pending interrupts.
793 *
794 * LOCKING:
795 * Inherited from caller.
796 */
797
1da177e4
LT		 798static inline u8 ata_irq_on(struct ata_port *ap)
799{
800 struct ata_ioports *ioaddr = &ap->ioaddr;
801 u8 tmp;
802
803 ap->ctl &= ~ATA_NIEN;
804 ap->last_ctl = ap->ctl;
805
806 if (ap->flags & ATA_FLAG_MMIO)
807 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
808 else
809 outb(ap->ctl, ioaddr->ctl_addr);
810 tmp = ata_wait_idle(ap);
811
812 ap->ops->irq_clear(ap);
813
814 return tmp;
815}
816
0baab86b
EF		 817
818/**
819 * ata_irq_ack - Acknowledge a device interrupt.
820 * @ap: Port on which interrupts are enabled.
821 *
822 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
823 * or BUSY+DRQ clear). Obtain dma status and port status from
824 * device. Clear the interrupt. Return port status.
825 *
826 * LOCKING:
827 */
828
1da177e4
LT		 829static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
830{
831 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
832 u8 host_stat, post_stat, status;
833
834 status = ata_busy_wait(ap, bits, 1000);
835 if (status & bits)
bfd60579
RD		 836 if (ata_msg_err(ap))
837 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT		 838
839 /* get controller status; clear intr, err bits */
840 if (ap->flags & ATA_FLAG_MMIO) {
841 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
842 host_stat = readb(mmio + ATA_DMA_STATUS);
843 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
844 mmio + ATA_DMA_STATUS);
845
846 post_stat = readb(mmio + ATA_DMA_STATUS);
847 } else {
848 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
849 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
850 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
851
852 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
853 }
854
bfd60579
RD		 855 if (ata_msg_intr(ap))
856 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
857 __FUNCTION__,
858 host_stat, post_stat, status);
1da177e4
LT		 859
860 return status;
861}
862
863static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
864{
865 return ap->ops->scr_read(ap, reg);
866}
867
868static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
869{
870 ap->ops->scr_write(ap, reg, val);
871}
872
8a60a071 873static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
cdcca89e
BR		 874 u32 val)
875{
876 ap->ops->scr_write(ap, reg, val);
877 (void) ap->ops->scr_read(ap, reg);
878}
879
1da177e4
LT		 880static inline unsigned int sata_dev_present(struct ata_port *ap)
881{
882 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
883}
884
057ace5e 885static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT		 886{
887 return ata_id_wcache_enabled(dev->id) ||
888 ata_id_has_flush(dev->id) ||
889 ata_id_has_flush_ext(dev->id);
890}
891
a7dac447
JG		 892static inline unsigned int ac_err_mask(u8 status)
893{
894 if (status & ATA_BUSY)
11a56d24 895 return AC_ERR_HSM;
a7dac447
JG		 896 if (status & (ATA_ERR | ATA_DF))
897 return AC_ERR_DEV;
898 return 0;
899}
900
901static inline unsigned int __ac_err_mask(u8 status)
902{
903 unsigned int mask = ac_err_mask(status);
904 if (mask == 0)
905 return AC_ERR_OTHER;
906 return mask;
907}
908
6037d6bb
JG		 909static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
910{
911 ap->pad_dma = 0;
912 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
913 &ap->pad_dma, GFP_KERNEL);
914 return (ap->pad == NULL) ? -ENOMEM : 0;
915}
916
917static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
918{
919 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
920}
921
1da177e4 922#endif /* __LINUX_LIBATA_H__ */
Linux kernel - Deliverables
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