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14fa5691 LW |
1 | /* |
2 | * Copyright (C) 2007-2009 ST-Ericsson AB | |
3 | * License terms: GNU General Public License (GPL) version 2 | |
4 | * AB3100 core access functions | |
5 | * Author: Linus Walleij <linus.walleij@stericsson.com> | |
fa661258 MW |
6 | * |
7 | * ABX500 core access functions. | |
8 | * The abx500 interface is used for the Analog Baseband chip | |
47c16975 | 9 | * ab3100, ab3550, ab5500, and ab8500. |
fa661258 MW |
10 | * |
11 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> | |
12 | * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> | |
13 | * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com> | |
14 | * Author: Rickard Andersson <rickard.andersson@stericsson.com> | |
14fa5691 LW |
15 | */ |
16 | ||
17 | #include <linux/device.h> | |
d619bc14 | 18 | #include <linux/regulator/machine.h> |
14fa5691 | 19 | |
fa661258 MW |
20 | #ifndef MFD_ABX500_H |
21 | #define MFD_ABX500_H | |
14fa5691 | 22 | |
fa661258 MW |
23 | #define AB3100_P1A 0xc0 |
24 | #define AB3100_P1B 0xc1 | |
25 | #define AB3100_P1C 0xc2 | |
26 | #define AB3100_P1D 0xc3 | |
27 | #define AB3100_P1E 0xc4 | |
28 | #define AB3100_P1F 0xc5 | |
29 | #define AB3100_P1G 0xc6 | |
30 | #define AB3100_R2A 0xc7 | |
31 | #define AB3100_R2B 0xc8 | |
32 | #define AB3550_P1A 0x10 | |
33 | #define AB5500_1_0 0x20 | |
34 | #define AB5500_2_0 0x21 | |
35 | #define AB5500_2_1 0x22 | |
14fa5691 | 36 | |
863dde5b LW |
37 | /* AB8500 CIDs*/ |
38 | #define AB8500_CUTEARLY 0x00 | |
39 | #define AB8500_CUT1P0 0x10 | |
40 | #define AB8500_CUT1P1 0x11 | |
41 | #define AB8500_CUT2P0 0x20 | |
42 | #define AB8500_CUT3P0 0x30 | |
43 | ||
14fa5691 LW |
44 | /* |
45 | * AB3100, EVENTA1, A2 and A3 event register flags | |
46 | * these are catenated into a single 32-bit flag in the code | |
47 | * for event notification broadcasts. | |
48 | */ | |
49 | #define AB3100_EVENTA1_ONSWA (0x01<<16) | |
50 | #define AB3100_EVENTA1_ONSWB (0x02<<16) | |
51 | #define AB3100_EVENTA1_ONSWC (0x04<<16) | |
52 | #define AB3100_EVENTA1_DCIO (0x08<<16) | |
53 | #define AB3100_EVENTA1_OVER_TEMP (0x10<<16) | |
54 | #define AB3100_EVENTA1_SIM_OFF (0x20<<16) | |
55 | #define AB3100_EVENTA1_VBUS (0x40<<16) | |
56 | #define AB3100_EVENTA1_VSET_USB (0x80<<16) | |
57 | ||
58 | #define AB3100_EVENTA2_READY_TX (0x01<<8) | |
59 | #define AB3100_EVENTA2_READY_RX (0x02<<8) | |
60 | #define AB3100_EVENTA2_OVERRUN_ERROR (0x04<<8) | |
61 | #define AB3100_EVENTA2_FRAMING_ERROR (0x08<<8) | |
62 | #define AB3100_EVENTA2_CHARG_OVERCURRENT (0x10<<8) | |
63 | #define AB3100_EVENTA2_MIDR (0x20<<8) | |
64 | #define AB3100_EVENTA2_BATTERY_REM (0x40<<8) | |
65 | #define AB3100_EVENTA2_ALARM (0x80<<8) | |
66 | ||
67 | #define AB3100_EVENTA3_ADC_TRIG5 (0x01) | |
68 | #define AB3100_EVENTA3_ADC_TRIG4 (0x02) | |
69 | #define AB3100_EVENTA3_ADC_TRIG3 (0x04) | |
70 | #define AB3100_EVENTA3_ADC_TRIG2 (0x08) | |
71 | #define AB3100_EVENTA3_ADC_TRIGVBAT (0x10) | |
72 | #define AB3100_EVENTA3_ADC_TRIGVTX (0x20) | |
73 | #define AB3100_EVENTA3_ADC_TRIG1 (0x40) | |
74 | #define AB3100_EVENTA3_ADC_TRIG0 (0x80) | |
75 | ||
76 | /* AB3100, STR register flags */ | |
77 | #define AB3100_STR_ONSWA (0x01) | |
78 | #define AB3100_STR_ONSWB (0x02) | |
79 | #define AB3100_STR_ONSWC (0x04) | |
80 | #define AB3100_STR_DCIO (0x08) | |
81 | #define AB3100_STR_BOOT_MODE (0x10) | |
82 | #define AB3100_STR_SIM_OFF (0x20) | |
83 | #define AB3100_STR_BATT_REMOVAL (0x40) | |
84 | #define AB3100_STR_VBUS (0x80) | |
85 | ||
d619bc14 LW |
86 | /* |
87 | * AB3100 contains 8 regulators, one external regulator controller | |
88 | * and a buck converter, further the LDO E and buck converter can | |
89 | * have separate settings if they are in sleep mode, this is | |
90 | * modeled as a separate regulator. | |
91 | */ | |
92 | #define AB3100_NUM_REGULATORS 10 | |
93 | ||
14fa5691 LW |
94 | /** |
95 | * struct ab3100 | |
96 | * @access_mutex: lock out concurrent accesses to the AB3100 registers | |
97 | * @dev: pointer to the containing device | |
98 | * @i2c_client: I2C client for this chip | |
99 | * @testreg_client: secondary client for test registers | |
100 | * @chip_name: name of this chip variant | |
101 | * @chip_id: 8 bit chip ID for this chip variant | |
14fa5691 LW |
102 | * @event_subscribers: event subscribers are listed here |
103 | * @startup_events: a copy of the first reading of the event registers | |
104 | * @startup_events_read: whether the first events have been read | |
105 | * | |
106 | * This struct is PRIVATE and devices using it should NOT | |
107 | * access ANY fields. It is used as a token for calling the | |
108 | * AB3100 functions. | |
109 | */ | |
110 | struct ab3100 { | |
111 | struct mutex access_mutex; | |
112 | struct device *dev; | |
113 | struct i2c_client *i2c_client; | |
114 | struct i2c_client *testreg_client; | |
115 | char chip_name[32]; | |
116 | u8 chip_id; | |
14fa5691 | 117 | struct blocking_notifier_head event_subscribers; |
fa661258 | 118 | u8 startup_events[3]; |
14fa5691 LW |
119 | bool startup_events_read; |
120 | }; | |
121 | ||
d619bc14 LW |
122 | /** |
123 | * struct ab3100_platform_data | |
124 | * Data supplied to initialize board connections to the AB3100 | |
125 | * @reg_constraints: regulator constraints for target board | |
126 | * the order of these constraints are: LDO A, C, D, E, | |
127 | * F, G, H, K, EXT and BUCK. | |
128 | * @reg_initvals: initial values for the regulator registers | |
129 | * plus two sleep settings for LDO E and the BUCK converter. | |
130 | * exactly AB3100_NUM_REGULATORS+2 values must be sent in. | |
131 | * Order: LDO A, C, E, E sleep, F, G, H, K, EXT, BUCK, | |
132 | * BUCK sleep, LDO D. (LDO D need to be initialized last.) | |
133 | * @external_voltage: voltage level of the external regulator. | |
134 | */ | |
135 | struct ab3100_platform_data { | |
136 | struct regulator_init_data reg_constraints[AB3100_NUM_REGULATORS]; | |
137 | u8 reg_initvals[AB3100_NUM_REGULATORS+2]; | |
138 | int external_voltage; | |
139 | }; | |
140 | ||
14fa5691 LW |
141 | int ab3100_event_register(struct ab3100 *ab3100, |
142 | struct notifier_block *nb); | |
143 | int ab3100_event_unregister(struct ab3100 *ab3100, | |
144 | struct notifier_block *nb); | |
14fa5691 | 145 | |
fa661258 MW |
146 | /* AB3550, STR register flags */ |
147 | #define AB3550_STR_ONSWA (0x01) | |
148 | #define AB3550_STR_ONSWB (0x02) | |
149 | #define AB3550_STR_ONSWC (0x04) | |
150 | #define AB3550_STR_DCIO (0x08) | |
151 | #define AB3550_STR_BOOT_MODE (0x10) | |
152 | #define AB3550_STR_SIM_OFF (0x20) | |
153 | #define AB3550_STR_BATT_REMOVAL (0x40) | |
154 | #define AB3550_STR_VBUS (0x80) | |
155 | ||
156 | /* Interrupt mask registers */ | |
157 | #define AB3550_IMR1 0x29 | |
158 | #define AB3550_IMR2 0x2a | |
159 | #define AB3550_IMR3 0x2b | |
160 | #define AB3550_IMR4 0x2c | |
161 | #define AB3550_IMR5 0x2d | |
162 | ||
163 | enum ab3550_devid { | |
164 | AB3550_DEVID_ADC, | |
165 | AB3550_DEVID_DAC, | |
166 | AB3550_DEVID_LEDS, | |
167 | AB3550_DEVID_POWER, | |
168 | AB3550_DEVID_REGULATORS, | |
169 | AB3550_DEVID_SIM, | |
170 | AB3550_DEVID_UART, | |
171 | AB3550_DEVID_RTC, | |
172 | AB3550_DEVID_CHARGER, | |
173 | AB3550_DEVID_FUELGAUGE, | |
174 | AB3550_DEVID_VIBRATOR, | |
175 | AB3550_DEVID_CODEC, | |
176 | AB3550_NUM_DEVICES, | |
177 | }; | |
178 | ||
179 | /** | |
180 | * struct abx500_init_setting | |
181 | * Initial value of the registers for driver to use during setup. | |
182 | */ | |
183 | struct abx500_init_settings { | |
184 | u8 bank; | |
185 | u8 reg; | |
186 | u8 setting; | |
187 | }; | |
188 | ||
189 | /** | |
190 | * struct ab3550_platform_data | |
191 | * Data supplied to initialize board connections to the AB3550 | |
192 | */ | |
193 | struct ab3550_platform_data { | |
194 | struct {unsigned int base; unsigned int count; } irq; | |
195 | void *dev_data[AB3550_NUM_DEVICES]; | |
1f235a37 | 196 | size_t dev_data_sz[AB3550_NUM_DEVICES]; |
fa661258 MW |
197 | struct abx500_init_settings *init_settings; |
198 | unsigned int init_settings_sz; | |
199 | }; | |
200 | ||
201 | int abx500_set_register_interruptible(struct device *dev, u8 bank, u8 reg, | |
202 | u8 value); | |
203 | int abx500_get_register_interruptible(struct device *dev, u8 bank, u8 reg, | |
204 | u8 *value); | |
205 | int abx500_get_register_page_interruptible(struct device *dev, u8 bank, | |
206 | u8 first_reg, u8 *regvals, u8 numregs); | |
207 | int abx500_set_register_page_interruptible(struct device *dev, u8 bank, | |
208 | u8 first_reg, u8 *regvals, u8 numregs); | |
209 | /** | |
210 | * abx500_mask_and_set_register_inerruptible() - Modifies selected bits of a | |
211 | * target register | |
212 | * | |
213 | * @dev: The AB sub device. | |
214 | * @bank: The i2c bank number. | |
215 | * @bitmask: The bit mask to use. | |
216 | * @bitvalues: The new bit values. | |
217 | * | |
218 | * Updates the value of an AB register: | |
219 | * value -> ((value & ~bitmask) | (bitvalues & bitmask)) | |
220 | */ | |
221 | int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank, | |
222 | u8 reg, u8 bitmask, u8 bitvalues); | |
223 | int abx500_get_chip_id(struct device *dev); | |
224 | int abx500_event_registers_startup_state_get(struct device *dev, u8 *event); | |
225 | int abx500_startup_irq_enabled(struct device *dev, unsigned int irq); | |
226 | ||
227 | struct abx500_ops { | |
228 | int (*get_chip_id) (struct device *); | |
229 | int (*get_register) (struct device *, u8, u8, u8 *); | |
230 | int (*set_register) (struct device *, u8, u8, u8); | |
231 | int (*get_register_page) (struct device *, u8, u8, u8 *, u8); | |
232 | int (*set_register_page) (struct device *, u8, u8, u8 *, u8); | |
233 | int (*mask_and_set_register) (struct device *, u8, u8, u8, u8); | |
234 | int (*event_registers_startup_state_get) (struct device *, u8 *); | |
235 | int (*startup_irq_enabled) (struct device *, unsigned int); | |
236 | }; | |
237 | ||
238 | int abx500_register_ops(struct device *core_dev, struct abx500_ops *ops); | |
c6252e9c | 239 | void abx500_remove_ops(struct device *dev); |
14fa5691 | 240 | #endif |