[deliverable/linux.git] / include / linux / mlx5 / port.h

/*
 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef __MLX5_PORT_H__
#define __MLX5_PORT_H__

#include <linux/mlx5/driver.h>

enum mlx5_beacon_duration {
	MLX5_BEACON_DURATION_OFF = 0x0,
	MLX5_BEACON_DURATION_INF = 0xffff,
};

enum mlx5_module_id {
	MLX5_MODULE_ID_SFP              = 0x3,
	MLX5_MODULE_ID_QSFP             = 0xC,
	MLX5_MODULE_ID_QSFP_PLUS        = 0xD,
	MLX5_MODULE_ID_QSFP28           = 0x11,
};

enum mlx5_an_status {
	MLX5_AN_UNAVAILABLE = 0,
	MLX5_AN_COMPLETE    = 1,
	MLX5_AN_FAILED      = 2,
	MLX5_AN_LINK_UP     = 3,
	MLX5_AN_LINK_DOWN   = 4,
};

#define MLX5_EEPROM_MAX_BYTES			32
#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK	0x000000ff
#define MLX5_I2C_ADDR_LOW		0x50
#define MLX5_I2C_ADDR_HIGH		0x51
#define MLX5_EEPROM_PAGE_LENGTH		256

int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
			 int ptys_size, int proto_mask, u8 local_port);
int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev,
			      u32 *proto_cap, int proto_mask);
int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev,
				u32 *proto_admin, int proto_mask);
int mlx5_query_port_link_width_oper(struct mlx5_core_dev *dev,
				    u8 *link_width_oper, u8 local_port);
int mlx5_query_port_proto_oper(struct mlx5_core_dev *dev,
			       u8 *proto_oper, int proto_mask,
			       u8 local_port);
int mlx5_set_port_ptys(struct mlx5_core_dev *dev, bool an_disable,
		       u32 proto_admin, int proto_mask);
void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
			       enum mlx5_port_status status);
int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
				 enum mlx5_port_status *status);
int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
void mlx5_query_port_autoneg(struct mlx5_core_dev *dev, int proto_mask,
			     u8 *an_status,
			     u8 *an_disable_cap, u8 *an_disable_admin);

int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);
void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,
			      u8 port);

int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,
			      u8 *vl_hw_cap, u8 local_port);

int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);
int mlx5_query_port_pause(struct mlx5_core_dev *dev,
			  u32 *rx_pause, u32 *tx_pause);

int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);
int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,
			u8 *pfc_en_rx);

int mlx5_max_tc(struct mlx5_core_dev *mdev);

int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);
int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);
int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);
int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
				    u8 *max_bw_value,
				    u8 *max_bw_unit);
int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
				   u8 *max_bw_value,
				   u8 *max_bw_unit);
int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);

int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
			 bool *enabled);
int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
			     u16 offset, u16 size, u8 *data);

#endif /* __MLX5_PORT_H__ */
Commit	Line	Data
ada68c31 AS	1	/*
	2	* Copyright (c) 2016, Mellanox Technologies. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#ifndef __MLX5_PORT_H__
	34	#define __MLX5_PORT_H__
	35
	36	#include <linux/mlx5/driver.h>
	37
da54d24e GP	38	enum mlx5_beacon_duration {
	39	MLX5_BEACON_DURATION_OFF = 0x0,
	40	MLX5_BEACON_DURATION_INF = 0xffff,
	41	};
	42
bb64143e GP	43	enum mlx5_module_id {
	44	MLX5_MODULE_ID_SFP = 0x3,
	45	MLX5_MODULE_ID_QSFP = 0xC,
	46	MLX5_MODULE_ID_QSFP_PLUS = 0xD,
	47	MLX5_MODULE_ID_QSFP28 = 0x11,
	48	};
	49
52244d96 GP	50	enum mlx5_an_status {
	51	MLX5_AN_UNAVAILABLE = 0,
	52	MLX5_AN_COMPLETE = 1,
	53	MLX5_AN_FAILED = 2,
	54	MLX5_AN_LINK_UP = 3,
	55	MLX5_AN_LINK_DOWN = 4,
	56	};
	57
bb64143e GP	58	#define MLX5_EEPROM_MAX_BYTES 32
	59	#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff
	60	#define MLX5_I2C_ADDR_LOW 0x50
	61	#define MLX5_I2C_ADDR_HIGH 0x51
	62	#define MLX5_EEPROM_PAGE_LENGTH 256
	63
ada68c31 AS	64	int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
	65	int mlx5_query_port_ptys(struct mlx5_core_dev dev, u32 ptys,
	66	int ptys_size, int proto_mask, u8 local_port);
	67	int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev,
	68	u32 *proto_cap, int proto_mask);
	69	int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev,
	70	u32 *proto_admin, int proto_mask);
	71	int mlx5_query_port_link_width_oper(struct mlx5_core_dev *dev,
	72	u8 *link_width_oper, u8 local_port);
	73	int mlx5_query_port_proto_oper(struct mlx5_core_dev *dev,
	74	u8 *proto_oper, int proto_mask,
	75	u8 local_port);
52244d96 GP	76	int mlx5_set_port_ptys(struct mlx5_core_dev *dev, bool an_disable,
52244d96 GP	77	u32 proto_admin, int proto_mask);
667daeda	78	void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
ada68c31 AS	79	int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
	80	enum mlx5_port_status status);
	81	int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
	82	enum mlx5_port_status *status);
da54d24e	83	int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
52244d96 GP	84	void mlx5_query_port_autoneg(struct mlx5_core_dev *dev, int proto_mask,
	85	u8 *an_status,
	86	u8 an_disable_cap, u8 an_disable_admin);
ada68c31	87
046339ea SM	88	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
	89	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, u16 max_mtu, u8 port);
	90	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, u16 oper_mtu,
ada68c31 AS	91	u8 port);
	92
	93	int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,
	94	u8 *vl_hw_cap, u8 local_port);
	95
	96	int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);
	97	int mlx5_query_port_pause(struct mlx5_core_dev *dev,
	98	u32 rx_pause, u32 tx_pause);
	99
ad909eb0 AS	100	int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);
	101	int mlx5_query_port_pfc(struct mlx5_core_dev dev, u8 pfc_en_tx,
	102	u8 *pfc_en_rx);
	103
4f3961ee SM	104	int mlx5_max_tc(struct mlx5_core_dev *mdev);
	105
	106	int mlx5_set_port_prio_tc(struct mlx5_core_dev mdev, u8 prio_tc);
	107	int mlx5_set_port_tc_group(struct mlx5_core_dev mdev, u8 tc_group);
	108	int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev mdev, u8 tc_bw);
d8880795 TT	109	int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
	110	u8 *max_bw_value,
	111	u8 *max_bw_unit);
	112	int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
	113	u8 *max_bw_value,
	114	u8 *max_bw_unit);
928cfe87 TT	115	int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
928cfe87 TT	116	int mlx5_query_port_wol(struct mlx5_core_dev mdev, u8 wol_mode);
4f3961ee	117
94cb1ebb EBE	118	int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
	119	void mlx5_query_port_fcs(struct mlx5_core_dev mdev, bool supported,
	120	bool *enabled);
bb64143e GP	121	int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
bb64143e GP	122	u16 offset, u16 size, u8 *data);
94cb1ebb	123
ada68c31	124	#endif /* __MLX5_PORT_H__ */