[deliverable/linux.git] / include / linux / mmc / protocol.h

/*
 * Header for MultiMediaCard (MMC)
 *
 * Copyright 2002 Hewlett-Packard Company
 *
 * Use consistent with the GNU GPL is permitted,
 * provided that this copyright notice is
 * preserved in its entirety in all copies and derived works.
 *
 * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
 * FITNESS FOR ANY PARTICULAR PURPOSE.
 *
 * Many thanks to Alessandro Rubini and Jonathan Corbet!
 *
 * Based strongly on code by:
 *
 * Author: Yong-iL Joh <tolkien@mizi.com>
 * Date  : $Date: 2002/06/18 12:37:30 $
 *
 * Author:  Andrew Christian
 *          15 May 2002
 */

#ifndef MMC_MMC_PROTOCOL_H
#define MMC_MMC_PROTOCOL_H

/* Standard MMC commands (4.1)           type  argument     response */
   /* class 1 */
#define	MMC_GO_IDLE_STATE         0   /* bc                          */
#define MMC_SEND_OP_COND          1   /* bcr  [31:0] OCR         R3  */
#define MMC_ALL_SEND_CID          2   /* bcr                     R2  */
#define MMC_SET_RELATIVE_ADDR     3   /* ac   [31:16] RCA        R1  */
#define MMC_SET_DSR               4   /* bc   [31:16] RCA            */
#define MMC_SWITCH                6   /* ac   [31:0] See below   R1b */
#define MMC_SELECT_CARD           7   /* ac   [31:16] RCA        R1  */
#define MMC_SEND_EXT_CSD          8   /* adtc                    R1  */
#define MMC_SEND_CSD              9   /* ac   [31:16] RCA        R2  */
#define MMC_SEND_CID             10   /* ac   [31:16] RCA        R2  */
#define MMC_READ_DAT_UNTIL_STOP  11   /* adtc [31:0] dadr        R1  */
#define MMC_STOP_TRANSMISSION    12   /* ac                      R1b */
#define MMC_SEND_STATUS	         13   /* ac   [31:16] RCA        R1  */
#define MMC_GO_INACTIVE_STATE    15   /* ac   [31:16] RCA            */

  /* class 2 */
#define MMC_SET_BLOCKLEN         16   /* ac   [31:0] block len   R1  */
#define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
#define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */

  /* class 3 */
#define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */

  /* class 4 */
#define MMC_SET_BLOCK_COUNT      23   /* adtc [31:0] data addr   R1  */
#define MMC_WRITE_BLOCK          24   /* adtc [31:0] data addr   R1  */
#define MMC_WRITE_MULTIPLE_BLOCK 25   /* adtc                    R1  */
#define MMC_PROGRAM_CID          26   /* adtc                    R1  */
#define MMC_PROGRAM_CSD          27   /* adtc                    R1  */

  /* class 6 */
#define MMC_SET_WRITE_PROT       28   /* ac   [31:0] data addr   R1b */
#define MMC_CLR_WRITE_PROT       29   /* ac   [31:0] data addr   R1b */
#define MMC_SEND_WRITE_PROT      30   /* adtc [31:0] wpdata addr R1  */

  /* class 5 */
#define MMC_ERASE_GROUP_START    35   /* ac   [31:0] data addr   R1  */
#define MMC_ERASE_GROUP_END      36   /* ac   [31:0] data addr   R1  */
#define MMC_ERASE                38   /* ac                      R1b */

  /* class 9 */
#define MMC_FAST_IO              39   /* ac   <Complex>          R4  */
#define MMC_GO_IRQ_STATE         40   /* bcr                     R5  */

  /* class 7 */
#define MMC_LOCK_UNLOCK          42   /* adtc                    R1b */

  /* class 8 */
#define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
#define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1  */

/* SD commands                           type  argument     response */
  /* class 0 */
/* This is basically the same command as for MMC with some quirks. */
#define SD_SEND_RELATIVE_ADDR     3   /* bcr                     R6  */
#define SD_SEND_IF_COND           8   /* bcr  [11:0] See below   R7  */

  /* class 10 */
#define SD_SWITCH                 6   /* adtc [31:0] See below   R1  */

  /* Application commands */
#define SD_APP_SET_BUS_WIDTH      6   /* ac   [1:0] bus width    R1  */
#define SD_APP_SEND_NUM_WR_BLKS  22   /* adtc                    R1  */
#define SD_APP_OP_COND           41   /* bcr  [31:0] OCR         R3  */
#define SD_APP_SEND_SCR          51   /* adtc                    R1  */

/*
 * MMC_SWITCH argument format:
 *
 *	[31:26] Always 0
 *	[25:24] Access Mode
 *	[23:16] Location of target Byte in EXT_CSD
 *	[15:08] Value Byte
 *	[07:03] Always 0
 *	[02:00] Command Set
 */

/*
 * SD_SWITCH argument format:
 *
 *      [31] Check (0) or switch (1)
 *      [30:24] Reserved (0)
 *      [23:20] Function group 6
 *      [19:16] Function group 5
 *      [15:12] Function group 4
 *      [11:8] Function group 3
 *      [7:4] Function group 2
 *      [3:0] Function group 1
 */

/*
 * SD_SEND_IF_COND argument format:
 *
 *	[31:12] Reserved (0)
 *	[11:8] Host Voltage Supply Flags
 *	[7:0] Check Pattern (0xAA)
 */

/*
  MMC status in R1
  Type
  	e : error bit
	s : status bit
	r : detected and set for the actual command response
	x : detected and set during command execution. the host must poll
            the card by sending status command in order to read these bits.
  Clear condition
  	a : according to the card state
	b : always related to the previous command. Reception of
            a valid command will clear it (with a delay of one command)
	c : clear by read
 */

#define R1_OUT_OF_RANGE		(1 << 31)	/* er, c */
#define R1_ADDRESS_ERROR	(1 << 30)	/* erx, c */
#define R1_BLOCK_LEN_ERROR	(1 << 29)	/* er, c */
#define R1_ERASE_SEQ_ERROR      (1 << 28)	/* er, c */
#define R1_ERASE_PARAM		(1 << 27)	/* ex, c */
#define R1_WP_VIOLATION		(1 << 26)	/* erx, c */
#define R1_CARD_IS_LOCKED	(1 << 25)	/* sx, a */
#define R1_LOCK_UNLOCK_FAILED	(1 << 24)	/* erx, c */
#define R1_COM_CRC_ERROR	(1 << 23)	/* er, b */
#define R1_ILLEGAL_COMMAND	(1 << 22)	/* er, b */
#define R1_CARD_ECC_FAILED	(1 << 21)	/* ex, c */
#define R1_CC_ERROR		(1 << 20)	/* erx, c */
#define R1_ERROR		(1 << 19)	/* erx, c */
#define R1_UNDERRUN		(1 << 18)	/* ex, c */
#define R1_OVERRUN		(1 << 17)	/* ex, c */
#define R1_CID_CSD_OVERWRITE	(1 << 16)	/* erx, c, CID/CSD overwrite */
#define R1_WP_ERASE_SKIP	(1 << 15)	/* sx, c */
#define R1_CARD_ECC_DISABLED	(1 << 14)	/* sx, a */
#define R1_ERASE_RESET		(1 << 13)	/* sr, c */
#define R1_STATUS(x)            (x & 0xFFFFE000)
#define R1_CURRENT_STATE(x)    	((x & 0x00001E00) >> 9)	/* sx, b (4 bits) */
#define R1_READY_FOR_DATA	(1 << 8)	/* sx, a */
#define R1_APP_CMD		(1 << 5)	/* sr, c */

/* These are unpacked versions of the actual responses */

struct _mmc_csd {
	u8  csd_structure;
	u8  spec_vers;
	u8  taac;
	u8  nsac;
	u8  tran_speed;
	u16 ccc;
	u8  read_bl_len;
	u8  read_bl_partial;
	u8  write_blk_misalign;
	u8  read_blk_misalign;
	u8  dsr_imp;
	u16 c_size;
	u8  vdd_r_curr_min;
	u8  vdd_r_curr_max;
	u8  vdd_w_curr_min;
	u8  vdd_w_curr_max;
	u8  c_size_mult;
	union {
		struct { /* MMC system specification version 3.1 */
			u8  erase_grp_size;
			u8  erase_grp_mult;
		} v31;
		struct { /* MMC system specification version 2.2 */
			u8  sector_size;
			u8  erase_grp_size;
		} v22;
	} erase;
	u8  wp_grp_size;
	u8  wp_grp_enable;
	u8  default_ecc;
	u8  r2w_factor;
	u8  write_bl_len;
	u8  write_bl_partial;
	u8  file_format_grp;
	u8  copy;
	u8  perm_write_protect;
	u8  tmp_write_protect;
	u8  file_format;
	u8  ecc;
};

#define MMC_VDD_145_150	0x00000001	/* VDD voltage 1.45 - 1.50 */
#define MMC_VDD_150_155	0x00000002	/* VDD voltage 1.50 - 1.55 */
#define MMC_VDD_155_160	0x00000004	/* VDD voltage 1.55 - 1.60 */
#define MMC_VDD_160_165	0x00000008	/* VDD voltage 1.60 - 1.65 */
#define MMC_VDD_165_170	0x00000010	/* VDD voltage 1.65 - 1.70 */
#define MMC_VDD_17_18	0x00000020	/* VDD voltage 1.7 - 1.8 */
#define MMC_VDD_18_19	0x00000040	/* VDD voltage 1.8 - 1.9 */
#define MMC_VDD_19_20	0x00000080	/* VDD voltage 1.9 - 2.0 */
#define MMC_VDD_20_21	0x00000100	/* VDD voltage 2.0 ~ 2.1 */
#define MMC_VDD_21_22	0x00000200	/* VDD voltage 2.1 ~ 2.2 */
#define MMC_VDD_22_23	0x00000400	/* VDD voltage 2.2 ~ 2.3 */
#define MMC_VDD_23_24	0x00000800	/* VDD voltage 2.3 ~ 2.4 */
#define MMC_VDD_24_25	0x00001000	/* VDD voltage 2.4 ~ 2.5 */
#define MMC_VDD_25_26	0x00002000	/* VDD voltage 2.5 ~ 2.6 */
#define MMC_VDD_26_27	0x00004000	/* VDD voltage 2.6 ~ 2.7 */
#define MMC_VDD_27_28	0x00008000	/* VDD voltage 2.7 ~ 2.8 */
#define MMC_VDD_28_29	0x00010000	/* VDD voltage 2.8 ~ 2.9 */
#define MMC_VDD_29_30	0x00020000	/* VDD voltage 2.9 ~ 3.0 */
#define MMC_VDD_30_31	0x00040000	/* VDD voltage 3.0 ~ 3.1 */
#define MMC_VDD_31_32	0x00080000	/* VDD voltage 3.1 ~ 3.2 */
#define MMC_VDD_32_33	0x00100000	/* VDD voltage 3.2 ~ 3.3 */
#define MMC_VDD_33_34	0x00200000	/* VDD voltage 3.3 ~ 3.4 */
#define MMC_VDD_34_35	0x00400000	/* VDD voltage 3.4 ~ 3.5 */
#define MMC_VDD_35_36	0x00800000	/* VDD voltage 3.5 ~ 3.6 */
#define MMC_CARD_BUSY	0x80000000	/* Card Power up status bit */

/*
 * Card Command Classes (CCC)
 */
#define CCC_BASIC		(1<<0)	/* (0) Basic protocol functions */
					/* (CMD0,1,2,3,4,7,9,10,12,13,15) */
#define CCC_STREAM_READ		(1<<1)	/* (1) Stream read commands */
					/* (CMD11) */
#define CCC_BLOCK_READ		(1<<2)	/* (2) Block read commands */
					/* (CMD16,17,18) */
#define CCC_STREAM_WRITE	(1<<3)	/* (3) Stream write commands */
					/* (CMD20) */
#define CCC_BLOCK_WRITE		(1<<4)	/* (4) Block write commands */
					/* (CMD16,24,25,26,27) */
#define CCC_ERASE		(1<<5)	/* (5) Ability to erase blocks */
					/* (CMD32,33,34,35,36,37,38,39) */
#define CCC_WRITE_PROT		(1<<6)	/* (6) Able to write protect blocks */
					/* (CMD28,29,30) */
#define CCC_LOCK_CARD		(1<<7)	/* (7) Able to lock down card */
					/* (CMD16,CMD42) */
#define CCC_APP_SPEC		(1<<8)	/* (8) Application specific */
					/* (CMD55,56,57,ACMD*) */
#define CCC_IO_MODE		(1<<9)	/* (9) I/O mode */
					/* (CMD5,39,40,52,53) */
#define CCC_SWITCH		(1<<10)	/* (10) High speed switch */
					/* (CMD6,34,35,36,37,50) */
					/* (11) Reserved */
					/* (CMD?) */

/*
 * CSD field definitions
 */

#define CSD_STRUCT_VER_1_0  0           /* Valid for system specification 1.0 - 1.2 */
#define CSD_STRUCT_VER_1_1  1           /* Valid for system specification 1.4 - 2.2 */
#define CSD_STRUCT_VER_1_2  2           /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
#define CSD_STRUCT_EXT_CSD  3           /* Version is coded in CSD_STRUCTURE in EXT_CSD */

#define CSD_SPEC_VER_0      0           /* Implements system specification 1.0 - 1.2 */
#define CSD_SPEC_VER_1      1           /* Implements system specification 1.4 */
#define CSD_SPEC_VER_2      2           /* Implements system specification 2.0 - 2.2 */
#define CSD_SPEC_VER_3      3           /* Implements system specification 3.1 - 3.2 - 3.31 */
#define CSD_SPEC_VER_4      4           /* Implements system specification 4.0 - 4.1 */

/*
 * EXT_CSD fields
 */

#define EXT_CSD_BUS_WIDTH	183	/* R/W */
#define EXT_CSD_HS_TIMING	185	/* R/W */
#define EXT_CSD_CARD_TYPE	196	/* RO */
#define EXT_CSD_SEC_CNT		212	/* RO, 4 bytes */

/*
 * EXT_CSD field definitions
 */

#define EXT_CSD_CMD_SET_NORMAL		(1<<0)
#define EXT_CSD_CMD_SET_SECURE		(1<<1)
#define EXT_CSD_CMD_SET_CPSECURE	(1<<2)

#define EXT_CSD_CARD_TYPE_26	(1<<0)	/* Card can run at 26MHz */
#define EXT_CSD_CARD_TYPE_52	(1<<1)	/* Card can run at 52MHz */

#define EXT_CSD_BUS_WIDTH_1	0	/* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4	1	/* Card is in 4 bit mode */
#define EXT_CSD_BUS_WIDTH_8	2	/* Card is in 8 bit mode */

/*
 * MMC_SWITCH access modes
 */

#define MMC_SWITCH_MODE_CMD_SET		0x00	/* Change the command set */
#define MMC_SWITCH_MODE_SET_BITS	0x01	/* Set bits which are 1 in value */
#define MMC_SWITCH_MODE_CLEAR_BITS	0x02	/* Clear bits which are 1 in value */
#define MMC_SWITCH_MODE_WRITE_BYTE	0x03	/* Set target to value */

/*
 * SCR field definitions
 */

#define SCR_SPEC_VER_0      0           /* Implements system specification 1.0 - 1.01 */
#define SCR_SPEC_VER_1      1           /* Implements system specification 1.10 */
#define SCR_SPEC_VER_2      2           /* Implements system specification 2.00 */

/*
 * SD bus widths
 */
#define SD_BUS_WIDTH_1      0
#define SD_BUS_WIDTH_4      2

#endif  /* MMC_MMC_PROTOCOL_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Header for MultiMediaCard (MMC)
	3	*
	4	* Copyright 2002 Hewlett-Packard Company
	5	*
	6	* Use consistent with the GNU GPL is permitted,
	7	* provided that this copyright notice is
	8	* preserved in its entirety in all copies and derived works.
	9	*
	10	* HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
	11	* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
	12	* FITNESS FOR ANY PARTICULAR PURPOSE.
	13	*
	14	* Many thanks to Alessandro Rubini and Jonathan Corbet!
	15	*
	16	* Based strongly on code by:
	17	*
	18	* Author: Yong-iL Joh <tolkien@mizi.com>
	19	* Date : $Date: 2002/06/18 12:37:30 $
	20	*
	21	* Author: Andrew Christian
	22	* 15 May 2002
	23	*/
	24
	25	#ifndef MMC_MMC_PROTOCOL_H
	26	#define MMC_MMC_PROTOCOL_H
	27
bce40a36	28	/* Standard MMC commands (4.1) type argument response */
1da177e4 LT	29	/* class 1 */
	30	#define MMC_GO_IDLE_STATE 0 /* bc */
	31	#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
	32	#define MMC_ALL_SEND_CID 2 /* bcr R2 */
	33	#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
	34	#define MMC_SET_DSR 4 /* bc [31:16] RCA */
bce40a36	35	#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
1da177e4	36	#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
bce40a36	37	#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
1da177e4 LT	38	#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
	39	#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
	40	#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
	41	#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
	42	#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
	43	#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
	44
	45	/* class 2 */
	46	#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
	47	#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
	48	#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
	49
	50	/* class 3 */
	51	#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
	52
	53	/* class 4 */
	54	#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
	55	#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
	56	#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
	57	#define MMC_PROGRAM_CID 26 /* adtc R1 */
	58	#define MMC_PROGRAM_CSD 27 /* adtc R1 */
	59
	60	/* class 6 */
	61	#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
	62	#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
	63	#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
	64
	65	/* class 5 */
	66	#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
	67	#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
24117def	68	#define MMC_ERASE 38 /* ac R1b */
1da177e4 LT	69
	70	/* class 9 */
	71	#define MMC_FAST_IO 39 /* ac <Complex> R4 */
	72	#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
	73
	74	/* class 7 */
	75	#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
	76
	77	/* class 8 */
	78	#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
24117def	79	#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
1da177e4 LT	80
1da177e4 LT	81	/* SD commands type argument response */
fba68bd2	82	/* class 0 */
1da177e4	83	/* This is basically the same command as for MMC with some quirks. */
e9225176	84	#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
fba68bd2 PL	85	#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
	86
	87	/* class 10 */
7ccd266e	88	#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
1da177e4 LT	89
	90	/* Application commands */
	91	#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
ec5a19dd	92	#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
1da177e4 LT	93	#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
	94	#define SD_APP_SEND_SCR 51 /* adtc R1 */
	95
bce40a36 PL	96	/*
	97	* MMC_SWITCH argument format:
	98	*
	99	* [31:26] Always 0
	100	* [25:24] Access Mode
	101	* [23:16] Location of target Byte in EXT_CSD
	102	* [15:08] Value Byte
	103	* [07:03] Always 0
	104	* [02:00] Command Set
	105	*/
	106
7ccd266e PO	107	/*
	108	* SD_SWITCH argument format:
	109	*
	110	* [31] Check (0) or switch (1)
	111	* [30:24] Reserved (0)
	112	* [23:20] Function group 6
	113	* [19:16] Function group 5
	114	* [15:12] Function group 4
	115	* [11:8] Function group 3
	116	* [7:4] Function group 2
	117	* [3:0] Function group 1
	118	*/
	119
fba68bd2 PL	120	/*
	121	* SD_SEND_IF_COND argument format:
	122	*
	123	* [31:12] Reserved (0)
	124	* [11:8] Host Voltage Supply Flags
	125	* [7:0] Check Pattern (0xAA)
	126	*/
	127
1da177e4 LT	128	/*
	129	MMC status in R1
	130	Type
	131	e : error bit
	132	s : status bit
	133	r : detected and set for the actual command response
	134	x : detected and set during command execution. the host must poll
	135	the card by sending status command in order to read these bits.
	136	Clear condition
	137	a : according to the card state
	138	b : always related to the previous command. Reception of
	139	a valid command will clear it (with a delay of one command)
	140	c : clear by read
	141	*/
	142
	143	#define R1_OUT_OF_RANGE (1 << 31) /* er, c */
	144	#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
	145	#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
	146	#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
	147	#define R1_ERASE_PARAM (1 << 27) /* ex, c */
	148	#define R1_WP_VIOLATION (1 << 26) /* erx, c */
	149	#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
	150	#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
	151	#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
	152	#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
	153	#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
	154	#define R1_CC_ERROR (1 << 20) /* erx, c */
	155	#define R1_ERROR (1 << 19) /* erx, c */
	156	#define R1_UNDERRUN (1 << 18) /* ex, c */
	157	#define R1_OVERRUN (1 << 17) /* ex, c */
	158	#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
	159	#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
	160	#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
	161	#define R1_ERASE_RESET (1 << 13) /* sr, c */
	162	#define R1_STATUS(x) (x & 0xFFFFE000)
	163	#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
	164	#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
	165	#define R1_APP_CMD (1 << 5) /* sr, c */
	166
	167	/* These are unpacked versions of the actual responses */
	168
	169	struct _mmc_csd {
	170	u8 csd_structure;
	171	u8 spec_vers;
	172	u8 taac;
	173	u8 nsac;
	174	u8 tran_speed;
	175	u16 ccc;
	176	u8 read_bl_len;
	177	u8 read_bl_partial;
	178	u8 write_blk_misalign;
	179	u8 read_blk_misalign;
	180	u8 dsr_imp;
	181	u16 c_size;
	182	u8 vdd_r_curr_min;
	183	u8 vdd_r_curr_max;
	184	u8 vdd_w_curr_min;
	185	u8 vdd_w_curr_max;
	186	u8 c_size_mult;
	187	union {
	188	struct { /* MMC system specification version 3.1 */
	189	u8 erase_grp_size;
	190	u8 erase_grp_mult;
	191	} v31;
192	struct { /* MMC system specification version 2.2 */
193	u8 sector_size;
194	u8 erase_grp_size;
195	} v22;
196	} erase;
197	u8 wp_grp_size;
198	u8 wp_grp_enable;
199	u8 default_ecc;
200	u8 r2w_factor;
201	u8 write_bl_len;
202	u8 write_bl_partial;
203	u8 file_format_grp;
204	u8 copy;
205	u8 perm_write_protect;
206	u8 tmp_write_protect;
207	u8 file_format;
208	u8 ecc;
209	};
210
211	#define MMC_VDD_145_150 0x00000001 /* VDD voltage 1.45 - 1.50 */
212	#define MMC_VDD_150_155 0x00000002 /* VDD voltage 1.50 - 1.55 */
213	#define MMC_VDD_155_160 0x00000004 /* VDD voltage 1.55 - 1.60 */
214	#define MMC_VDD_160_165 0x00000008 /* VDD voltage 1.60 - 1.65 */
215	#define MMC_VDD_165_170 0x00000010 /* VDD voltage 1.65 - 1.70 */
216	#define MMC_VDD_17_18 0x00000020 /* VDD voltage 1.7 - 1.8 */
217	#define MMC_VDD_18_19 0x00000040 /* VDD voltage 1.8 - 1.9 */
218	#define MMC_VDD_19_20 0x00000080 /* VDD voltage 1.9 - 2.0 */
219	#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
220	#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
221	#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
222	#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
223	#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
224	#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
225	#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
226	#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
227	#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
228	#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
229	#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
230	#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
231	#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
232	#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
233	#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
234	#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
235	#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */
236
912490db PO	237	/*
	238	* Card Command Classes (CCC)
	239	*/
	240	#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
	241	/* (CMD0,1,2,3,4,7,9,10,12,13,15) */
	242	#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
	243	/* (CMD11) */
	244	#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
	245	/* (CMD16,17,18) */
	246	#define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */
	247	/* (CMD20) */
	248	#define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */
	249	/* (CMD16,24,25,26,27) */
	250	#define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */
	251	/* (CMD32,33,34,35,36,37,38,39) */
	252	#define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */
	253	/* (CMD28,29,30) */
	254	#define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */
	255	/* (CMD16,CMD42) */
	256	#define CCC_APP_SPEC (1<<8) /* (8) Application specific */
	257	/* (CMD55,56,57,ACMD) /
	258	#define CCC_IO_MODE (1<<9) /* (9) I/O mode */
	259	/* (CMD5,39,40,52,53) */
	260	#define CCC_SWITCH (1<<10) /* (10) High speed switch */
	261	/* (CMD6,34,35,36,37,50) */
	262	/* (11) Reserved */
	263	/* (CMD?) */
1da177e4 LT	264
	265	/*
	266	* CSD field definitions
	267	*/
	268
	269	#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */
	270	#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */
bce40a36 PL	271	#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
bce40a36 PL	272	#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
1da177e4 LT	273
	274	#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */
	275	#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */
	276	#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
bce40a36 PL	277	#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */
	278	#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */
	279
	280	/*
	281	* EXT_CSD fields
	282	*/
	283
e45a1bd2	284	#define EXT_CSD_BUS_WIDTH 183 /* R/W */
bce40a36 PL	285	#define EXT_CSD_HS_TIMING 185 /* R/W */
bce40a36 PL	286	#define EXT_CSD_CARD_TYPE 196 /* RO */
85a18ad9	287	#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
bce40a36 PL	288
	289	/*
	290	* EXT_CSD field definitions
	291	*/
	292
	293	#define EXT_CSD_CMD_SET_NORMAL (1<<0)
	294	#define EXT_CSD_CMD_SET_SECURE (1<<1)
	295	#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
	296
	297	#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
	298	#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
	299
e45a1bd2 PL	300	#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
	301	#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
	302	#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
	303
bce40a36 PL	304	/*
	305	* MMC_SWITCH access modes
	306	*/
1da177e4	307
bce40a36 PL	308	#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
	309	#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
	310	#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
	311	#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
f218278a	312
7ccd266e PO	313	/*
	314	* SCR field definitions
	315	*/
	316
	317	#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
	318	#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
	319	#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */
	320
f218278a PO	321	/*
	322	* SD bus widths
	323	*/
	324	#define SD_BUS_WIDTH_1 0
	325	#define SD_BUS_WIDTH_4 2
	326
1da177e4 LT	327	#endif /* MMC_MMC_PROTOCOL_H */
1da177e4 LT	328