Commit | Line | Data |
---|---|---|
c4a6a2ab LB |
1 | /* |
2 | * MV-643XX ethernet platform device data definition file. | |
3 | */ | |
fa3959f4 | 4 | |
c4a6a2ab LB |
5 | #ifndef __LINUX_MV643XX_ETH_H |
6 | #define __LINUX_MV643XX_ETH_H | |
7 | ||
f2ce825d | 8 | #include <linux/mbus.h> |
574e2af7 | 9 | #include <linux/if_ether.h> |
f2ce825d | 10 | |
240e4419 LB |
11 | #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" |
12 | #define MV643XX_ETH_NAME "mv643xx_eth_port" | |
c4a6a2ab LB |
13 | #define MV643XX_ETH_SHARED_REGS 0x2000 |
14 | #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 | |
3077d78a DF |
15 | #define MV643XX_ETH_BAR_4 0x2220 |
16 | #define MV643XX_ETH_SIZE_REG_4 0x2224 | |
17 | #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 | |
c4a6a2ab | 18 | |
58569aee APR |
19 | #define MV643XX_TX_CSUM_DEFAULT_LIMIT 0 |
20 | ||
f2ce825d LB |
21 | struct mv643xx_eth_shared_platform_data { |
22 | struct mbus_dram_target_info *dram; | |
9b2c2ff7 SB |
23 | /* |
24 | * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default | |
25 | * limit of 9KiB will be used. | |
26 | */ | |
27 | int tx_csum_limit; | |
f2ce825d LB |
28 | }; |
29 | ||
ac840605 LB |
30 | #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 |
31 | #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) | |
32 | #define MV643XX_ETH_PHY_NONE 0xff | |
33 | ||
5f292354 | 34 | struct device_node; |
c4a6a2ab | 35 | struct mv643xx_eth_platform_data { |
fc32b0e2 LB |
36 | /* |
37 | * Pointer back to our parent instance, and our port number. | |
38 | */ | |
fa3959f4 | 39 | struct platform_device *shared; |
fc32b0e2 | 40 | int port_number; |
fa3959f4 | 41 | |
fc32b0e2 LB |
42 | /* |
43 | * Whether a PHY is present, and if yes, at which address. | |
44 | */ | |
fc32b0e2 | 45 | int phy_addr; |
5f292354 | 46 | struct device_node *phy_node; |
ce4e2e45 | 47 | |
fc32b0e2 LB |
48 | /* |
49 | * Use this MAC address if it is valid, overriding the | |
50 | * address that is already in the hardware. | |
51 | */ | |
574e2af7 | 52 | u8 mac_addr[ETH_ALEN]; |
fc32b0e2 LB |
53 | |
54 | /* | |
55 | * If speed is 0, autonegotiation is enabled. | |
56 | * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. | |
57 | * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. | |
58 | */ | |
59 | int speed; | |
60 | int duplex; | |
61 | ||
64da80a2 | 62 | /* |
f7981c1c | 63 | * How many RX/TX queues to use. |
64da80a2 | 64 | */ |
f7981c1c LB |
65 | int rx_queue_count; |
66 | int tx_queue_count; | |
64da80a2 | 67 | |
fc32b0e2 LB |
68 | /* |
69 | * Override default RX/TX queue sizes if nonzero. | |
70 | */ | |
71 | int rx_queue_size; | |
72 | int tx_queue_size; | |
73 | ||
74 | /* | |
75 | * Use on-chip SRAM for RX/TX descriptors if size is nonzero | |
76 | * and sufficient to contain all descriptors for the requested | |
77 | * ring sizes. | |
78 | */ | |
79 | unsigned long rx_sram_addr; | |
80 | int rx_sram_size; | |
81 | unsigned long tx_sram_addr; | |
82 | int tx_sram_size; | |
c4a6a2ab LB |
83 | }; |
84 | ||
fc32b0e2 LB |
85 | |
86 | #endif |