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[PATCH] PCI: fix to pci ignore pre-set 64-bit bars on 32-bit platforms
[deliverable/linux.git] / include / linux / pci.h
CommitLineData
1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
4352dfd5
GKH		 20/* Include the pci register defines */
21#include <linux/pci_regs.h>
1da177e4
LT		 22
23/* Include the ID list */
1da177e4
LT		 24#include <linux/pci_ids.h>
25
26/*
27 * The PCI interface treats multi-function devices as independent
28 * devices. The slot/function address of each device is encoded
29 * in a single byte as follows:
30 *
31 * 7:3 = slot
32 * 2:0 = function
33 */
34#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
35#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
36#define PCI_FUNC(devfn) ((devfn) & 0x07)
37
38/* Ioctls for /proc/bus/pci/X/Y nodes. */
39#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
40#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
41#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
42#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
43#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
44
45#ifdef __KERNEL__
46
778382e0
DW		 47#include <linux/mod_devicetable.h>
48
1da177e4 49#include <linux/types.h>
1da177e4
LT		 50#include <linux/ioport.h>
51#include <linux/list.h>
52#include <linux/errno.h>
53#include <linux/device.h>
54
55/* File state for mmap()s on /proc/bus/pci/X/Y */
56enum pci_mmap_state {
57 pci_mmap_io,
58 pci_mmap_mem
59};
60
61/* This defines the direction arg to the DMA mapping routines. */
62#define PCI_DMA_BIDIRECTIONAL 0
63#define PCI_DMA_TODEVICE 1
64#define PCI_DMA_FROMDEVICE 2
65#define PCI_DMA_NONE 3
66
67#define DEVICE_COUNT_COMPATIBLE 4
68#define DEVICE_COUNT_RESOURCE 12
69
70typedef int __bitwise pci_power_t;
71
4352dfd5
GKH		 72#define PCI_D0 ((pci_power_t __force) 0)
73#define PCI_D1 ((pci_power_t __force) 1)
74#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 75#define PCI_D3hot ((pci_power_t __force) 3)
76#define PCI_D3cold ((pci_power_t __force) 4)
3fe9d19f 77#define PCI_UNKNOWN ((pci_power_t __force) 5)
438510f6 78#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4 79
392a1ce7 80/** The pci_channel state describes connectivity between the CPU and
81 * the pci device. If some PCI bus between here and the pci device
82 * has crashed or locked up, this info is reflected here.
83 */
84typedef unsigned int __bitwise pci_channel_state_t;
85
86enum pci_channel_state {
87 /* I/O channel is in normal state */
88 pci_channel_io_normal = (__force pci_channel_state_t) 1,
89
90 /* I/O to channel is blocked */
91 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
92
93 /* PCI card is dead */
94 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
95};
96
6e325a62
MT		 97typedef unsigned short __bitwise pci_bus_flags_t;
98enum pci_bus_flags {
e778272d 99 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
6e325a62
MT		 100};
101
41017f0c
SL		 102struct pci_cap_saved_state {
103 struct hlist_node next;
104 char cap_nr;
105 u32 data[0];
106};
107
1da177e4
LT		 108/*
109 * The pci_dev structure is used to describe PCI devices.
110 */
111struct pci_dev {
112 struct list_head global_list; /* node in list of all PCI devices */
113 struct list_head bus_list; /* node in per-bus list */
114 struct pci_bus *bus; /* bus this device is on */
115 struct pci_bus *subordinate; /* bus this device bridges to */
116
117 void *sysdata; /* hook for sys-specific extension */
118 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
119
120 unsigned int devfn; /* encoded device & function index */
121 unsigned short vendor;
122 unsigned short device;
123 unsigned short subsystem_vendor;
124 unsigned short subsystem_device;
125 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
126 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
127 u8 rom_base_reg; /* which config register controls the ROM */
ffeff788 128 u8 pin; /* which interrupt pin this device uses */
1da177e4
LT		 129
130 struct pci_driver *driver; /* which driver has allocated this device */
131 u64 dma_mask; /* Mask of the bits of bus address this
132 device implements. Normally this is
133 0xffffffff. You only need to change
134 this if your device has broken DMA
135 or supports 64-bit transfers. */
136
137 pci_power_t current_state; /* Current operating state. In ACPI-speak,
138 this is D0-D3, D0 being fully functional,
139 and D3 being off. */
140
392a1ce7 141 pci_channel_state_t error_state; /* current connectivity state */
1da177e4
LT		 142 struct device dev; /* Generic device interface */
143
144 /* device is compatible with these IDs */
145 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
146 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
147
148 int cfg_size; /* Size of configuration space */
149
150 /*
151 * Instead of touching interrupt line and base address registers
152 * directly, use the values stored here. They might be different!
153 */
154 unsigned int irq;
155 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
156
157 /* These fields are used by common fixups */
158 unsigned int transparent:1; /* Transparent PCI bridge */
159 unsigned int multifunction:1;/* Part of multi-function device */
160 /* keep track of device state */
161 unsigned int is_enabled:1; /* pci_enable_device has been called */
162 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d 163 unsigned int no_msi:1; /* device may not use msi */
e04b0ea2 164 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
4602b88d 165
1da177e4 166 u32 saved_config_space[16]; /* config space saved at suspend time */
41017f0c 167 struct hlist_head saved_cap_space;
1da177e4
LT		 168 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
169 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
170 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
1da177e4
LT		 171};
172
173#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
174#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
175#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
176#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
177
41017f0c
SL		 178static inline struct pci_cap_saved_state *pci_find_saved_cap(
179 struct pci_dev *pci_dev,char cap)
180{
181 struct pci_cap_saved_state *tmp;
182 struct hlist_node *pos;
183
184 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
185 if (tmp->cap_nr == cap)
186 return tmp;
187 }
188 return NULL;
189}
190
191static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
192 struct pci_cap_saved_state *new_cap)
193{
194 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
195}
196
197static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
198{
199 hlist_del(&cap->next);
200}
201
1da177e4
LT		 202/*
203 * For PCI devices, the region numbers are assigned this way:
204 *
205 * 0-5 standard PCI regions
206 * 6 expansion ROM
207 * 7-10 bridges: address space assigned to buses behind the bridge
208 */
209
4352dfd5
GKH		 210#define PCI_ROM_RESOURCE 6
211#define PCI_BRIDGE_RESOURCES 7
212#define PCI_NUM_RESOURCES 11
1da177e4
LT		 213
214#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 215#define PCI_BUS_NUM_RESOURCES 8
1da177e4 216#endif
4352dfd5
GKH		 217
218#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 219
220struct pci_bus {
221 struct list_head node; /* node in list of buses */
222 struct pci_bus *parent; /* parent bus this bridge is on */
223 struct list_head children; /* list of child buses */
224 struct list_head devices; /* list of devices on this bus */
225 struct pci_dev *self; /* bridge device as seen by parent */
226 struct resource *resource[PCI_BUS_NUM_RESOURCES];
227 /* address space routed to this bus */
228
229 struct pci_ops *ops; /* configuration access functions */
230 void *sysdata; /* hook for sys-specific extension */
231 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
232
233 unsigned char number; /* bus number */
234 unsigned char primary; /* number of primary bridge */
235 unsigned char secondary; /* number of secondary bridge */
236 unsigned char subordinate; /* max number of subordinate buses */
237
238 char name[48];
239
240 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
6e325a62 241 pci_bus_flags_t bus_flags; /* Inherited by child busses */
1da177e4
LT		 242 struct device *bridge;
243 struct class_device class_dev;
244 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
245 struct bin_attribute *legacy_mem; /* legacy mem */
246};
247
248#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
249#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
250
251/*
252 * Error values that may be returned by PCI functions.
253 */
254#define PCIBIOS_SUCCESSFUL 0x00
255#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
256#define PCIBIOS_BAD_VENDOR_ID 0x83
257#define PCIBIOS_DEVICE_NOT_FOUND 0x86
258#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
259#define PCIBIOS_SET_FAILED 0x88
260#define PCIBIOS_BUFFER_TOO_SMALL 0x89
261
262/* Low-level architecture-dependent routines */
263
264struct pci_ops {
265 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
266 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
267};
268
269struct pci_raw_ops {
270 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
271 int reg, int len, u32 *val);
272 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
273 int reg, int len, u32 val);
274};
275
276extern struct pci_raw_ops *raw_pci_ops;
277
278struct pci_bus_region {
279 unsigned long start;
280 unsigned long end;
281};
282
283struct pci_dynids {
284 spinlock_t lock; /* protects list, index */
285 struct list_head list; /* for IDs added at runtime */
286 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
287};
288
392a1ce7 289/* ---------------------------------------------------------------- */
290/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
291 * a set fof callbacks in struct pci_error_handlers, then that device driver
292 * will be notified of PCI bus errors, and will be driven to recovery
293 * when an error occurs.
294 */
295
296typedef unsigned int __bitwise pci_ers_result_t;
297
298enum pci_ers_result {
299 /* no result/none/not supported in device driver */
300 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
301
302 /* Device driver can recover without slot reset */
303 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
304
305 /* Device driver wants slot to be reset. */
306 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
307
308 /* Device has completely failed, is unrecoverable */
309 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
310
311 /* Device driver is fully recovered and operational */
312 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
313};
314
315/* PCI bus error event callbacks */
316struct pci_error_handlers
317{
318 /* PCI bus error detected on this device */
319 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
320 enum pci_channel_state error);
321
322 /* MMIO has been re-enabled, but not DMA */
323 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
324
325 /* PCI Express link has been reset */
326 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
327
328 /* PCI slot has been reset */
329 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
330
331 /* Device driver may resume normal operations */
332 void (*resume)(struct pci_dev *dev);
333};
334
335/* ---------------------------------------------------------------- */
336
1da177e4
LT		 337struct module;
338struct pci_driver {
339 struct list_head node;
340 char *name;
1da177e4
LT		 341 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
342 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
343 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
344 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
345 int (*resume) (struct pci_dev *dev); /* Device woken up */
438510f6 346 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
c8958177 347 void (*shutdown) (struct pci_dev *dev);
1da177e4 348
392a1ce7 349 struct pci_error_handlers *err_handler;
1da177e4
LT		 350 struct device_driver driver;
351 struct pci_dynids dynids;
352};
353
354#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
355
356/**
357 * PCI_DEVICE - macro used to describe a specific pci device
358 * @vend: the 16 bit PCI Vendor ID
359 * @dev: the 16 bit PCI Device ID
360 *
361 * This macro is used to create a struct pci_device_id that matches a
362 * specific device. The subvendor and subdevice fields will be set to
363 * PCI_ANY_ID.
364 */
365#define PCI_DEVICE(vend,dev) \
366 .vendor = (vend), .device = (dev), \
367 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
368
369/**
370 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
371 * @dev_class: the class, subclass, prog-if triple for this device
372 * @dev_class_mask: the class mask for this device
373 *
374 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 375 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 376 * fields will be set to PCI_ANY_ID.
377 */
378#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
379 .class = (dev_class), .class_mask = (dev_class_mask), \
380 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
381 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
382
4352dfd5 383/*
1da177e4
LT		 384 * pci_module_init is obsolete, this stays here till we fix up all usages of it
385 * in the tree.
386 */
387#define pci_module_init pci_register_driver
388
389/* these external functions are only available when PCI support is enabled */
390#ifdef CONFIG_PCI
391
392extern struct bus_type pci_bus_type;
393
394/* Do NOT directly access these two variables, unless you are arch specific pci
395 * code, or pci core code. */
396extern struct list_head pci_root_buses; /* list of all known PCI buses */
397extern struct list_head pci_devices; /* list of all devices */
398
399void pcibios_fixup_bus(struct pci_bus *);
400int pcibios_enable_device(struct pci_dev *, int mask);
401char *pcibios_setup (char *str);
402
403/* Used only when drivers/pci/setup.c is used */
404void pcibios_align_resource(void *, struct resource *,
405 unsigned long, unsigned long);
406void pcibios_update_irq(struct pci_dev *, int irq);
407
408/* Generic PCI functions used internally */
409
410extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 411void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 412struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
413static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
414{
c431ada4
RS		 415 struct pci_bus *root_bus;
416 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
417 if (root_bus)
418 pci_bus_add_devices(root_bus);
419 return root_bus;
1da177e4 420}
cdb9b9f7
PM		 421struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
422struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
1da177e4
LT		 423int pci_scan_slot(struct pci_bus *bus, int devfn);
424struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
cdb9b9f7 425void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
1da177e4
LT		 426unsigned int pci_scan_child_bus(struct pci_bus *bus);
427void pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 428void pci_read_bridge_bases(struct pci_bus *child);
429struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
430int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
431extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
432extern void pci_dev_put(struct pci_dev *dev);
433extern void pci_remove_bus(struct pci_bus *b);
434extern void pci_remove_bus_device(struct pci_dev *dev);
b3743fa4 435void pci_setup_cardbus(struct pci_bus *bus);
1da177e4
LT		 436
437/* Generic PCI functions exported to card drivers */
438
439struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
440struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
441struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
442int pci_find_capability (struct pci_dev *dev, int cap);
24a4e377 443int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
3a720d72 444int pci_find_ext_capability (struct pci_dev *dev, int cap);
1da177e4
LT		 445struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
446
447struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
448struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
449 unsigned int ss_vendor, unsigned int ss_device,
450 struct pci_dev *from);
451struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
452struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
453int pci_dev_present(const struct pci_device_id *ids);
454
455int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
456int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
457int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
458int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
459int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
460int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
461
462static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
463{
464 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
465}
466static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
467{
468 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
469}
470static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
471{
472 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
473}
474static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
475{
476 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
477}
478static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
479{
480 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
481}
482static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
483{
484 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
485}
486
9c8550ee
LT		 487int pci_enable_device(struct pci_dev *dev);
488int pci_enable_device_bars(struct pci_dev *dev, int mask);
1da177e4
LT		 489void pci_disable_device(struct pci_dev *dev);
490void pci_set_master(struct pci_dev *dev);
491#define HAVE_PCI_SET_MWI
9c8550ee 492int pci_set_mwi(struct pci_dev *dev);
1da177e4 493void pci_clear_mwi(struct pci_dev *dev);
a04ce0ff 494void pci_intx(struct pci_dev *dev, int enable);
9c8550ee
LT		 495int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
496int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
064b53db 497void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
1da177e4 498int pci_assign_resource(struct pci_dev *dev, int i);
064b53db 499void pci_restore_bars(struct pci_dev *dev);
1da177e4
LT		 500
501/* ROM control related routines */
144a50ea
DJ		 502void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
503void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
1da177e4
LT		 504void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
505void pci_remove_rom(struct pci_dev *pdev);
506
507/* Power management related routines */
508int pci_save_state(struct pci_dev *dev);
509int pci_restore_state(struct pci_dev *dev);
9c8550ee
LT		 510int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
511pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
512int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
1da177e4
LT		 513
514/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
515void pci_bus_assign_resources(struct pci_bus *bus);
516void pci_bus_size_bridges(struct pci_bus *bus);
517int pci_claim_resource(struct pci_dev *, int);
518void pci_assign_unassigned_resources(void);
519void pdev_enable_device(struct pci_dev *);
520void pdev_sort_resources(struct pci_dev *, struct resource_list *);
521void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
522 int (*)(struct pci_dev *, u8, u8));
523#define HAVE_PCI_REQ_REGIONS 2
3c990e92 524int pci_request_regions(struct pci_dev *, const char *);
1da177e4 525void pci_release_regions(struct pci_dev *);
3c990e92 526int pci_request_region(struct pci_dev *, int, const char *);
1da177e4
LT		 527void pci_release_region(struct pci_dev *, int);
528
529/* drivers/pci/bus.c */
530int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
531 unsigned long size, unsigned long align,
532 unsigned long min, unsigned int type_mask,
533 void (*alignf)(void *, struct resource *,
534 unsigned long, unsigned long),
535 void *alignf_data);
536void pci_enable_bridges(struct pci_bus *bus);
537
863b18f4
L		 538/* Proper probing supporting hot-pluggable devices */
539int __pci_register_driver(struct pci_driver *, struct module *);
540static inline int pci_register_driver(struct pci_driver *driver)
541{
542 return __pci_register_driver(driver, THIS_MODULE);
543}
544
1da177e4
LT		 545void pci_unregister_driver(struct pci_driver *);
546void pci_remove_behind_bridge(struct pci_dev *);
547struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 548const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
549const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 550int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
551
cecf4864
PM		 552void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
553 void *userdata);
ac7dc65a 554int pci_cfg_space_size(struct pci_dev *dev);
b82db5ce 555unsigned char pci_bus_max_busnr(struct pci_bus* bus);
cecf4864 556
1da177e4
LT		 557/* kmem_cache style wrapper around pci_alloc_consistent() */
558
559#include <linux/dmapool.h>
560
561#define pci_pool dma_pool
562#define pci_pool_create(name, pdev, size, align, allocation) \
563 dma_pool_create(name, &pdev->dev, size, align, allocation)
564#define pci_pool_destroy(pool) dma_pool_destroy(pool)
565#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
566#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
567
e24c2d96
DM		 568enum pci_dma_burst_strategy {
569 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
570 strategy_parameter is N/A */
571 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
572 byte boundaries */
573 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
574 strategy_parameter byte boundaries */
575};
576
1da177e4
LT		 577#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
578extern struct pci_dev *isa_bridge;
579#endif
580
581struct msix_entry {
582 u16 vector; /* kernel uses to write allocated vector */
583 u16 entry; /* driver uses to specify entry, OS writes */
584};
585
586#ifndef CONFIG_PCI_MSI
587static inline void pci_scan_msi_device(struct pci_dev *dev) {}
588static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
589static inline void pci_disable_msi(struct pci_dev *dev) {}
590static inline int pci_enable_msix(struct pci_dev* dev,
591 struct msix_entry *entries, int nvec) {return -1;}
592static inline void pci_disable_msix(struct pci_dev *dev) {}
593static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
594#else
595extern void pci_scan_msi_device(struct pci_dev *dev);
596extern int pci_enable_msi(struct pci_dev *dev);
597extern void pci_disable_msi(struct pci_dev *dev);
598extern int pci_enable_msix(struct pci_dev* dev,
599 struct msix_entry *entries, int nvec);
600extern void pci_disable_msix(struct pci_dev *dev);
601extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
602#endif
603
e04b0ea2
BK		 604extern void pci_block_user_cfg_access(struct pci_dev *dev);
605extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
606
4352dfd5
GKH		 607/*
608 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
609 * a PCI domain is defined to be a set of PCI busses which share
610 * configuration space.
611 */
612#ifndef CONFIG_PCI_DOMAINS
613static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
614static inline int pci_proc_domain(struct pci_bus *bus)
615{
616 return 0;
617}
618#endif
1da177e4 619
4352dfd5 620#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 621
622/*
623 * If the system does not have PCI, clearly these return errors. Define
624 * these as simple inline functions to avoid hair in drivers.
625 */
626
1da177e4
LT		 627#define _PCI_NOP(o,s,t) \
628 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
629 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
630#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
631 _PCI_NOP(o,word,u16 x) \
632 _PCI_NOP(o,dword,u32 x)
633_PCI_NOP_ALL(read, *)
634_PCI_NOP_ALL(write,)
635
636static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
637{ return NULL; }
638
639static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
640{ return NULL; }
641
642static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
643{ return NULL; }
644
645static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
646unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
647{ return NULL; }
648
649static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
650{ return NULL; }
651
652#define pci_dev_present(ids) (0)
653#define pci_dev_put(dev) do { } while (0)
654
655static inline void pci_set_master(struct pci_dev *dev) { }
656static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
657static inline void pci_disable_device(struct pci_dev *dev) { }
658static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4 659static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
863b18f4 660static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
1da177e4
LT		 661static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
662static inline void pci_unregister_driver(struct pci_driver *drv) { }
663static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
24a4e377 664static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
3a720d72 665static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
1da177e4
LT		 666static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
667
668/* Power management related routines */
669static inline int pci_save_state(struct pci_dev *dev) { return 0; }
670static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
671static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 672static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 673static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
674
675#define isa_bridge ((struct pci_dev *)NULL)
676
a46e8126
KG		 677#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
678
e04b0ea2
BK		 679static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
680static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
681
4352dfd5 682#endif /* CONFIG_PCI */
1da177e4 683
4352dfd5
GKH		 684/* Include architecture-dependent settings and functions */
685
686#include <asm/pci.h>
1da177e4
LT		 687
688/* these helpers provide future and backwards compatibility
689 * for accessing popular PCI BAR info */
690#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
691#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
692#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
693#define pci_resource_len(dev,bar) \
694 ((pci_resource_start((dev),(bar)) == 0 && \
695 pci_resource_end((dev),(bar)) == \
696 pci_resource_start((dev),(bar))) ? 0 : \
697 \
698 (pci_resource_end((dev),(bar)) - \
699 pci_resource_start((dev),(bar)) + 1))
700
701/* Similar to the helpers above, these manipulate per-pci_dev
702 * driver-specific data. They are really just a wrapper around
703 * the generic device structure functions of these calls.
704 */
705static inline void *pci_get_drvdata (struct pci_dev *pdev)
706{
707 return dev_get_drvdata(&pdev->dev);
708}
709
710static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
711{
712 dev_set_drvdata(&pdev->dev, data);
713}
714
715/* If you want to know what to call your pci_dev, ask this function.
716 * Again, it's a wrapper around the generic device.
717 */
718static inline char *pci_name(struct pci_dev *pdev)
719{
720 return pdev->dev.bus_id;
721}
722
2311b1f2
ME		 723
724/* Some archs don't want to expose struct resource to userland as-is
725 * in sysfs and /proc
726 */
727#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
728static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
729 const struct resource *rsrc, u64 *start, u64 *end)
730{
731 *start = rsrc->start;
732 *end = rsrc->end;
733}
734#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
735
736
1da177e4
LT		 737/*
738 * The world is not perfect and supplies us with broken PCI devices.
739 * For at least a part of these bugs we need a work-around, so both
740 * generic (drivers/pci/quirks.c) and per-architecture code can define
741 * fixup hooks to be called for particular buggy devices.
742 */
743
744struct pci_fixup {
745 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
746 void (*hook)(struct pci_dev *dev);
747};
748
749enum pci_fixup_pass {
750 pci_fixup_early, /* Before probing BARs */
751 pci_fixup_header, /* After reading configuration header */
752 pci_fixup_final, /* Final phase of device fixups */
753 pci_fixup_enable, /* pci_enable_device() time */
754};
755
756/* Anonymous variables would be nice... */
757#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 758 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 759 __attribute__((__section__(#section))) = { vendor, device, hook };
760#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
761 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
762 vendor##device##hook, vendor, device, hook)
763#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
764 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
765 vendor##device##hook, vendor, device, hook)
766#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
767 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
768 vendor##device##hook, vendor, device, hook)
769#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
770 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
771 vendor##device##hook, vendor, device, hook)
772
773
774void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
775
776extern int pci_pci_problems;
777#define PCIPCI_FAIL 1
778#define PCIPCI_TRITON 2
779#define PCIPCI_NATOMA 4
780#define PCIPCI_VIAETBF 8
781#define PCIPCI_VSFX 16
782#define PCIPCI_ALIMAGIK 32
783
784#endif /* __KERNEL__ */
785#endif /* LINUX_PCI_H */
Linux kernel - Deliverables
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