Merge branch 'bugzilla-13620-revert' into release
[deliverable/linux.git] / include / linux / perf_counter.h
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1/*
2 * Performance counters:
3 *
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4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
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7 *
8 * Data type definitions, declarations, prototypes.
9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
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11 *
12 * For licencing details see kernel-base/COPYING
13 */
14#ifndef _LINUX_PERF_COUNTER_H
15#define _LINUX_PERF_COUNTER_H
16
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17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
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20
21/*
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22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
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29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
b8e83514 34
a308444c 35 PERF_TYPE_MAX, /* non-ABI */
b8e83514 36};
6c594c21 37
b8e83514 38/*
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39 * Generalized performance counter event types, used by the
40 * attr.event_id parameter of the sys_perf_counter_open()
41 * syscall:
b8e83514 42 */
1c432d89 43enum perf_hw_id {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
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47 PERF_COUNT_HW_CPU_CYCLES = 0,
48 PERF_COUNT_HW_INSTRUCTIONS = 1,
49 PERF_COUNT_HW_CACHE_REFERENCES = 2,
50 PERF_COUNT_HW_CACHE_MISSES = 3,
51 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_HW_BRANCH_MISSES = 5,
53 PERF_COUNT_HW_BUS_CYCLES = 6,
54
a308444c 55 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 56};
e077df4f 57
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58/*
59 * Generalized hardware cache counters:
60 *
8be6e8f3 61 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
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62 * { read, write, prefetch } x
63 * { accesses, misses }
64 */
1c432d89 65enum perf_hw_cache_id {
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66 PERF_COUNT_HW_CACHE_L1D = 0,
67 PERF_COUNT_HW_CACHE_L1I = 1,
68 PERF_COUNT_HW_CACHE_LL = 2,
69 PERF_COUNT_HW_CACHE_DTLB = 3,
70 PERF_COUNT_HW_CACHE_ITLB = 4,
71 PERF_COUNT_HW_CACHE_BPU = 5,
72
73 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
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74};
75
1c432d89 76enum perf_hw_cache_op_id {
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77 PERF_COUNT_HW_CACHE_OP_READ = 0,
78 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
79 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 80
a308444c 81 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
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82};
83
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84enum perf_hw_cache_op_result_id {
85 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
86 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 87
a308444c 88 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
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89};
90
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91/*
92 * Special "software" counters provided by the kernel, even if the hardware
93 * does not support performance counters. These counters measure various
94 * physical and sw events of the kernel (and allow the profiling of them as
95 * well):
96 */
1c432d89 97enum perf_sw_ids {
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98 PERF_COUNT_SW_CPU_CLOCK = 0,
99 PERF_COUNT_SW_TASK_CLOCK = 1,
100 PERF_COUNT_SW_PAGE_FAULTS = 2,
101 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
102 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
103 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
104 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
105
106 PERF_COUNT_SW_MAX, /* non-ABI */
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107};
108
8a057d84 109/*
0d48696f 110 * Bits that can be set in attr.sample_type to request information
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111 * in the overflow packets.
112 */
b23f3325 113enum perf_counter_sample_format {
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114 PERF_SAMPLE_IP = 1U << 0,
115 PERF_SAMPLE_TID = 1U << 1,
116 PERF_SAMPLE_TIME = 1U << 2,
117 PERF_SAMPLE_ADDR = 1U << 3,
118 PERF_SAMPLE_GROUP = 1U << 4,
119 PERF_SAMPLE_CALLCHAIN = 1U << 5,
120 PERF_SAMPLE_ID = 1U << 6,
121 PERF_SAMPLE_CPU = 1U << 7,
122 PERF_SAMPLE_PERIOD = 1U << 8,
7f453c24 123 PERF_SAMPLE_STREAM_ID = 1U << 9,
974802ea 124
7f453c24 125 PERF_SAMPLE_MAX = 1U << 10, /* non-ABI */
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126};
127
53cfbf59 128/*
0d48696f 129 * Bits that can be set in attr.read_format to request that
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130 * reads on the counter should return the indicated quantities,
131 * in increasing order of bit value, after the counter value.
132 */
133enum perf_counter_read_format {
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134 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
135 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
136 PERF_FORMAT_ID = 1U << 2,
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137
138 PERF_FORMAT_MAX = 1U << 3, /* non-ABI */
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139};
140
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141#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
142
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143/*
144 * Hardware event to monitor via a performance monitoring counter:
145 */
0d48696f 146struct perf_counter_attr {
974802ea 147
f4a2deb4 148 /*
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149 * Major type: hardware/software/tracepoint/etc.
150 */
151 __u32 type;
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152
153 /*
154 * Size of the attr structure, for fwd/bwd compat.
155 */
156 __u32 size;
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157
158 /*
159 * Type specific configuration information.
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160 */
161 __u64 config;
9f66a381 162
60db5e09 163 union {
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164 __u64 sample_period;
165 __u64 sample_freq;
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166 };
167
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168 __u64 sample_type;
169 __u64 read_format;
9f66a381 170
2743a5b0 171 __u64 disabled : 1, /* off by default */
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172 inherit : 1, /* children inherit it */
173 pinned : 1, /* must always be on PMU */
174 exclusive : 1, /* only group on PMU */
175 exclude_user : 1, /* don't count user */
176 exclude_kernel : 1, /* ditto kernel */
177 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 178 exclude_idle : 1, /* don't count when idle */
0a4a9391 179 mmap : 1, /* include mmap data */
8d1b2d93 180 comm : 1, /* include comm data */
60db5e09 181 freq : 1, /* use freq, not period */
bfbd3381 182 inherit_stat : 1, /* per task counts */
57e7986e 183 enable_on_exec : 1, /* next exec enables */
0475f9ea 184
57e7986e 185 __reserved_1 : 51;
2743a5b0 186
c457810a 187 __u32 wakeup_events; /* wakeup every n events */
974802ea 188 __u32 __reserved_2;
9f66a381 189
974802ea 190 __u64 __reserved_3;
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191};
192
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193/*
194 * Ioctls that can be done on a perf counter fd:
195 */
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196#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
197#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
198#define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
199#define PERF_COUNTER_IOC_RESET _IO ('$', 3)
200#define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
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201
202enum perf_counter_ioc_flags {
203 PERF_IOC_FLAG_GROUP = 1U << 0,
204};
d859e29f 205
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206/*
207 * Structure of the page that can be mapped via mmap
208 */
209struct perf_counter_mmap_page {
210 __u32 version; /* version number of this structure */
211 __u32 compat_version; /* lowest version this is compat with */
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212
213 /*
214 * Bits needed to read the hw counters in user-space.
215 *
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216 * u32 seq;
217 * s64 count;
38ff667b 218 *
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219 * do {
220 * seq = pc->lock;
38ff667b 221 *
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222 * barrier()
223 * if (pc->index) {
224 * count = pmc_read(pc->index - 1);
225 * count += pc->offset;
226 * } else
227 * goto regular_read;
38ff667b 228 *
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229 * barrier();
230 * } while (pc->lock != seq);
38ff667b 231 *
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232 * NOTE: for obvious reason this only works on self-monitoring
233 * processes.
38ff667b 234 */
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235 __u32 lock; /* seqlock for synchronization */
236 __u32 index; /* hardware counter identifier */
237 __s64 offset; /* add to hardware counter value */
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238 __u64 time_enabled; /* time counter active */
239 __u64 time_running; /* time counter on cpu */
7b732a75 240
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241 /*
242 * Hole for extension of the self monitor capabilities
243 */
244
7f8b4e4e 245 __u64 __reserved[123]; /* align to 1k */
41f95331 246
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247 /*
248 * Control data for the mmap() data buffer.
249 *
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250 * User-space reading the @data_head value should issue an rmb(), on
251 * SMP capable platforms, after reading this value -- see
252 * perf_counter_wakeup().
253 *
254 * When the mapping is PROT_WRITE the @data_tail value should be
255 * written by userspace to reflect the last read data. In this case
256 * the kernel will not over-write unread data.
38ff667b 257 */
8e3747c1 258 __u64 data_head; /* head in the data section */
43a21ea8 259 __u64 data_tail; /* user-space written tail */
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260};
261
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262#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
263#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
264#define PERF_EVENT_MISC_KERNEL (1 << 0)
265#define PERF_EVENT_MISC_USER (2 << 0)
266#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
6fab0192 267
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268struct perf_event_header {
269 __u32 type;
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270 __u16 misc;
271 __u16 size;
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272};
273
274enum perf_event_type {
5ed00415 275
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276 /*
277 * The MMAP events record the PROT_EXEC mappings so that we can
278 * correlate userspace IPs to code. They have the following structure:
279 *
280 * struct {
0127c3ea 281 * struct perf_event_header header;
0c593b34 282 *
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283 * u32 pid, tid;
284 * u64 addr;
285 * u64 len;
286 * u64 pgoff;
287 * char filename[];
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288 * };
289 */
8a057d84 290 PERF_EVENT_MMAP = 1,
0a4a9391 291
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292 /*
293 * struct {
294 * struct perf_event_header header;
295 * u64 id;
296 * u64 lost;
297 * };
298 */
299 PERF_EVENT_LOST = 2,
300
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301 /*
302 * struct {
0127c3ea 303 * struct perf_event_header header;
8d1b2d93 304 *
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305 * u32 pid, tid;
306 * char comm[];
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307 * };
308 */
309 PERF_EVENT_COMM = 3,
310
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311 /*
312 * struct {
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313 * struct perf_event_header header;
314 * u64 time;
689802b2 315 * u64 id;
7f453c24 316 * u64 stream_id;
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317 * };
318 */
319 PERF_EVENT_THROTTLE = 5,
320 PERF_EVENT_UNTHROTTLE = 6,
321
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322 /*
323 * struct {
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324 * struct perf_event_header header;
325 * u32 pid, ppid;
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326 * };
327 */
328 PERF_EVENT_FORK = 7,
329
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330 /*
331 * struct {
332 * struct perf_event_header header;
333 * u32 pid, tid;
334 * u64 value;
335 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
336 * { u64 time_running; } && PERF_FORMAT_RUNNING
337 * { u64 parent_id; } && PERF_FORMAT_ID
338 * };
339 */
340 PERF_EVENT_READ = 8,
341
8a057d84 342 /*
0c593b34 343 * struct {
0127c3ea 344 * struct perf_event_header header;
0c593b34 345 *
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346 * { u64 ip; } && PERF_SAMPLE_IP
347 * { u32 pid, tid; } && PERF_SAMPLE_TID
348 * { u64 time; } && PERF_SAMPLE_TIME
349 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 350 * { u64 id; } && PERF_SAMPLE_ID
7f453c24 351 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
43a21ea8 352 * { u32 cpu, res; } && PERF_SAMPLE_CPU
e6e18ec7 353 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 354 *
0127c3ea 355 * { u64 nr;
43a21ea8 356 * { u64 id, val; } cnt[nr]; } && PERF_SAMPLE_GROUP
0c593b34 357 *
f9188e02 358 * { u64 nr,
43a21ea8 359 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
0c593b34 360 * };
8a057d84 361 */
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362 PERF_EVENT_SAMPLE = 9,
363
364 PERF_EVENT_MAX, /* non-ABI */
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365};
366
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367enum perf_callchain_context {
368 PERF_CONTEXT_HV = (__u64)-32,
369 PERF_CONTEXT_KERNEL = (__u64)-128,
370 PERF_CONTEXT_USER = (__u64)-512,
7522060c 371
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372 PERF_CONTEXT_GUEST = (__u64)-2048,
373 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
374 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
375
376 PERF_CONTEXT_MAX = (__u64)-4095,
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377};
378
f3dfd265 379#ifdef __KERNEL__
9f66a381 380/*
f3dfd265 381 * Kernel-internal data types and definitions:
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382 */
383
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384#ifdef CONFIG_PERF_COUNTERS
385# include <asm/perf_counter.h>
386#endif
387
388#include <linux/list.h>
389#include <linux/mutex.h>
390#include <linux/rculist.h>
391#include <linux/rcupdate.h>
392#include <linux/spinlock.h>
d6d020e9 393#include <linux/hrtimer.h>
3c446b3d 394#include <linux/fs.h>
709e50cf 395#include <linux/pid_namespace.h>
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396#include <asm/atomic.h>
397
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398#define PERF_MAX_STACK_DEPTH 255
399
400struct perf_callchain_entry {
401 __u64 nr;
402 __u64 ip[PERF_MAX_STACK_DEPTH];
403};
404
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405struct task_struct;
406
0793a61d 407/**
9f66a381 408 * struct hw_perf_counter - performance counter hardware details:
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409 */
410struct hw_perf_counter {
ee06094f 411#ifdef CONFIG_PERF_COUNTERS
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412 union {
413 struct { /* hardware */
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414 u64 config;
415 unsigned long config_base;
416 unsigned long counter_base;
417 int idx;
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418 };
419 union { /* software */
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420 atomic64_t count;
421 struct hrtimer hrtimer;
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422 };
423 };
ee06094f 424 atomic64_t prev_count;
b23f3325 425 u64 sample_period;
9e350de3 426 u64 last_period;
ee06094f 427 atomic64_t period_left;
60db5e09 428 u64 interrupts;
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429
430 u64 freq_count;
431 u64 freq_interrupts;
bd2b5b12 432 u64 freq_stamp;
ee06094f 433#endif
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434};
435
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436struct perf_counter;
437
438/**
4aeb0b42 439 * struct pmu - generic performance monitoring unit
621a01ea 440 */
4aeb0b42 441struct pmu {
95cdd2e7 442 int (*enable) (struct perf_counter *counter);
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443 void (*disable) (struct perf_counter *counter);
444 void (*read) (struct perf_counter *counter);
a78ac325 445 void (*unthrottle) (struct perf_counter *counter);
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446};
447
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448/**
449 * enum perf_counter_active_state - the states of a counter
450 */
451enum perf_counter_active_state {
3b6f9e5c 452 PERF_COUNTER_STATE_ERROR = -2,
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453 PERF_COUNTER_STATE_OFF = -1,
454 PERF_COUNTER_STATE_INACTIVE = 0,
455 PERF_COUNTER_STATE_ACTIVE = 1,
456};
457
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458struct file;
459
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460struct perf_mmap_data {
461 struct rcu_head rcu_head;
8740f941 462 int nr_pages; /* nr of data pages */
43a21ea8 463 int writable; /* are we writable */
c5078f78 464 int nr_locked; /* nr pages mlocked */
8740f941 465
c33a0bc4 466 atomic_t poll; /* POLL_ for wakeups */
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467 atomic_t events; /* event limit */
468
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469 atomic_long_t head; /* write position */
470 atomic_long_t done_head; /* completed head */
471
c33a0bc4 472 atomic_t lock; /* concurrent writes */
c66de4a5 473 atomic_t wakeup; /* needs a wakeup */
43a21ea8 474 atomic_t lost; /* nr records lost */
c66de4a5 475
7b732a75 476 struct perf_counter_mmap_page *user_page;
0127c3ea 477 void *data_pages[0];
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478};
479
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480struct perf_pending_entry {
481 struct perf_pending_entry *next;
482 void (*func)(struct perf_pending_entry *);
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483};
484
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485/**
486 * struct perf_counter - performance counter kernel representation:
487 */
488struct perf_counter {
ee06094f 489#ifdef CONFIG_PERF_COUNTERS
04289bb9 490 struct list_head list_entry;
592903cd 491 struct list_head event_entry;
04289bb9 492 struct list_head sibling_list;
0127c3ea 493 int nr_siblings;
04289bb9 494 struct perf_counter *group_leader;
4aeb0b42 495 const struct pmu *pmu;
04289bb9 496
6a930700 497 enum perf_counter_active_state state;
0793a61d 498 atomic64_t count;
ee06094f 499
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500 /*
501 * These are the total time in nanoseconds that the counter
502 * has been enabled (i.e. eligible to run, and the task has
503 * been scheduled in, if this is a per-task counter)
504 * and running (scheduled onto the CPU), respectively.
505 *
506 * They are computed from tstamp_enabled, tstamp_running and
507 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
508 */
509 u64 total_time_enabled;
510 u64 total_time_running;
511
512 /*
513 * These are timestamps used for computing total_time_enabled
514 * and total_time_running when the counter is in INACTIVE or
515 * ACTIVE state, measured in nanoseconds from an arbitrary point
516 * in time.
517 * tstamp_enabled: the notional time when the counter was enabled
518 * tstamp_running: the notional time when the counter was scheduled on
519 * tstamp_stopped: in INACTIVE state, the notional time when the
520 * counter was scheduled off.
521 */
522 u64 tstamp_enabled;
523 u64 tstamp_running;
524 u64 tstamp_stopped;
525
0d48696f 526 struct perf_counter_attr attr;
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527 struct hw_perf_counter hw;
528
529 struct perf_counter_context *ctx;
9b51f66d 530 struct file *filp;
0793a61d 531
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532 /*
533 * These accumulate total time (in nanoseconds) that children
534 * counters have been enabled and running, respectively.
535 */
536 atomic64_t child_total_time_enabled;
537 atomic64_t child_total_time_running;
538
0793a61d 539 /*
d859e29f 540 * Protect attach/detach and child_list:
0793a61d 541 */
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542 struct mutex child_mutex;
543 struct list_head child_list;
544 struct perf_counter *parent;
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545
546 int oncpu;
547 int cpu;
548
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549 struct list_head owner_entry;
550 struct task_struct *owner;
551
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552 /* mmap bits */
553 struct mutex mmap_mutex;
554 atomic_t mmap_count;
555 struct perf_mmap_data *data;
37d81828 556
7b732a75 557 /* poll related */
0793a61d 558 wait_queue_head_t waitq;
3c446b3d 559 struct fasync_struct *fasync;
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560
561 /* delayed work for NMIs and such */
562 int pending_wakeup;
4c9e2542 563 int pending_kill;
79f14641 564 int pending_disable;
671dec5d 565 struct perf_pending_entry pending;
592903cd 566
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567 atomic_t event_limit;
568
e077df4f 569 void (*destroy)(struct perf_counter *);
592903cd 570 struct rcu_head rcu_head;
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571
572 struct pid_namespace *ns;
8e5799b1 573 u64 id;
ee06094f 574#endif
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575};
576
577/**
578 * struct perf_counter_context - counter context structure
579 *
580 * Used as a container for task counters and CPU counters as well:
581 */
582struct perf_counter_context {
0793a61d 583 /*
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584 * Protect the states of the counters in the list,
585 * nr_active, and the list:
0793a61d 586 */
a308444c 587 spinlock_t lock;
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588 /*
589 * Protect the list of counters. Locking either mutex or lock
590 * is sufficient to ensure the list doesn't change; to change
591 * the list you need to lock both the mutex and the spinlock.
592 */
a308444c 593 struct mutex mutex;
04289bb9 594
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595 struct list_head counter_list;
596 struct list_head event_list;
597 int nr_counters;
598 int nr_active;
599 int is_active;
bfbd3381 600 int nr_stat;
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601 atomic_t refcount;
602 struct task_struct *task;
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603
604 /*
4af4998b 605 * Context clock, runs when context enabled.
53cfbf59 606 */
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607 u64 time;
608 u64 timestamp;
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609
610 /*
611 * These fields let us detect when two contexts have both
612 * been cloned (inherited) from a common ancestor.
613 */
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614 struct perf_counter_context *parent_ctx;
615 u64 parent_gen;
616 u64 generation;
617 int pin_count;
618 struct rcu_head rcu_head;
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619};
620
621/**
622 * struct perf_counter_cpu_context - per cpu counter context structure
623 */
624struct perf_cpu_context {
625 struct perf_counter_context ctx;
626 struct perf_counter_context *task_ctx;
627 int active_oncpu;
628 int max_pertask;
3b6f9e5c 629 int exclusive;
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630
631 /*
632 * Recursion avoidance:
633 *
634 * task, softirq, irq, nmi context
635 */
22a4f650 636 int recursion[4];
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637};
638
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639#ifdef CONFIG_PERF_COUNTERS
640
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641/*
642 * Set by architecture code:
643 */
644extern int perf_max_counters;
645
4aeb0b42 646extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 647
0793a61d 648extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
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649extern void perf_counter_task_sched_out(struct task_struct *task,
650 struct task_struct *next, int cpu);
0793a61d 651extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 652extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 653extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 654extern void perf_counter_free_task(struct task_struct *task);
9974458e 655extern void set_perf_counter_pending(void);
925d519a 656extern void perf_counter_do_pending(void);
0793a61d 657extern void perf_counter_print_debug(void);
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658extern void __perf_disable(void);
659extern bool __perf_enable(void);
660extern void perf_disable(void);
661extern void perf_enable(void);
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662extern int perf_counter_task_disable(void);
663extern int perf_counter_task_enable(void);
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664extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
665 struct perf_cpu_context *cpuctx,
666 struct perf_counter_context *ctx, int cpu);
37d81828 667extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 668
df1a132b 669struct perf_sample_data {
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670 struct pt_regs *regs;
671 u64 addr;
672 u64 period;
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673};
674
675extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
676 struct perf_sample_data *data);
677
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678/*
679 * Return 1 for a software counter, 0 for a hardware counter
680 */
681static inline int is_software_counter(struct perf_counter *counter)
682{
a21ca2ca 683 return (counter->attr.type != PERF_TYPE_RAW) &&
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684 (counter->attr.type != PERF_TYPE_HARDWARE) &&
685 (counter->attr.type != PERF_TYPE_HW_CACHE);
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686}
687
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688extern atomic_t perf_swcounter_enabled[PERF_COUNT_SW_MAX];
689
690extern void __perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
691
692static inline void
693perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr)
694{
695 if (atomic_read(&perf_swcounter_enabled[event]))
696 __perf_swcounter_event(event, nr, nmi, regs, addr);
697}
15dbf27c 698
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699extern void __perf_counter_mmap(struct vm_area_struct *vma);
700
701static inline void perf_counter_mmap(struct vm_area_struct *vma)
702{
703 if (vma->vm_flags & VM_EXEC)
704 __perf_counter_mmap(vma);
705}
0a4a9391 706
8d1b2d93 707extern void perf_counter_comm(struct task_struct *tsk);
60313ebe 708extern void perf_counter_fork(struct task_struct *tsk);
8d1b2d93 709
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710extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
711
0764771d 712extern int sysctl_perf_counter_paranoid;
c5078f78 713extern int sysctl_perf_counter_mlock;
df58ab24 714extern int sysctl_perf_counter_sample_rate;
1ccd1549 715
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716extern void perf_counter_init(void);
717
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718#ifndef perf_misc_flags
719#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
720 PERF_EVENT_MISC_KERNEL)
721#define perf_instruction_pointer(regs) instruction_pointer(regs)
722#endif
723
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724#else
725static inline void
726perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
727static inline void
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728perf_counter_task_sched_out(struct task_struct *task,
729 struct task_struct *next, int cpu) { }
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730static inline void
731perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 732static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 733static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 734static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 735static inline void perf_counter_do_pending(void) { }
0793a61d 736static inline void perf_counter_print_debug(void) { }
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737static inline void perf_disable(void) { }
738static inline void perf_enable(void) { }
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739static inline int perf_counter_task_disable(void) { return -EINVAL; }
740static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 741
925d519a 742static inline void
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743perf_swcounter_event(u32 event, u64 nr, int nmi,
744 struct pt_regs *regs, u64 addr) { }
0a4a9391 745
089dd79d 746static inline void perf_counter_mmap(struct vm_area_struct *vma) { }
8d1b2d93 747static inline void perf_counter_comm(struct task_struct *tsk) { }
60313ebe 748static inline void perf_counter_fork(struct task_struct *tsk) { }
0d905bca 749static inline void perf_counter_init(void) { }
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750#endif
751
f3dfd265 752#endif /* __KERNEL__ */
0793a61d 753#endif /* _LINUX_PERF_COUNTER_H */
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