[deliverable/linux.git] / include / linux / perf_counter.h

/*
 *  Performance counters:
 *
 *   Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
 *   Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
 *
 *  Data type definitions, declarations, prototypes.
 *
 *  Started by: Thomas Gleixner and Ingo Molnar
 *
 *  For licencing details see kernel-base/COPYING
 */
#ifndef _LINUX_PERF_COUNTER_H
#define _LINUX_PERF_COUNTER_H

#include <linux/types.h>
#include <linux/ioctl.h>
#include <asm/byteorder.h>

/*
 * User-space ABI bits:
 */

/*
 * hw_event.type
 */
enum perf_event_types {
	PERF_TYPE_HARDWARE		= 0,
	PERF_TYPE_SOFTWARE		= 1,
	PERF_TYPE_TRACEPOINT		= 2,

	/*
	 * available TYPE space, raw is the max value.
	 */

	PERF_TYPE_RAW			= 128,
};

/*
 * Generalized performance counter event types, used by the hw_event.event_id
 * parameter of the sys_perf_counter_open() syscall:
 */
enum hw_event_ids {
	/*
	 * Common hardware events, generalized by the kernel:
	 */
	PERF_COUNT_CPU_CYCLES		= 0,
	PERF_COUNT_INSTRUCTIONS		= 1,
	PERF_COUNT_CACHE_REFERENCES	= 2,
	PERF_COUNT_CACHE_MISSES		= 3,
	PERF_COUNT_BRANCH_INSTRUCTIONS	= 4,
	PERF_COUNT_BRANCH_MISSES	= 5,
	PERF_COUNT_BUS_CYCLES		= 6,

	PERF_HW_EVENTS_MAX		= 7,
};

/*
 * Special "software" counters provided by the kernel, even if the hardware
 * does not support performance counters. These counters measure various
 * physical and sw events of the kernel (and allow the profiling of them as
 * well):
 */
enum sw_event_ids {
	PERF_COUNT_CPU_CLOCK		= 0,
	PERF_COUNT_TASK_CLOCK		= 1,
	PERF_COUNT_PAGE_FAULTS		= 2,
	PERF_COUNT_CONTEXT_SWITCHES	= 3,
	PERF_COUNT_CPU_MIGRATIONS	= 4,
	PERF_COUNT_PAGE_FAULTS_MIN	= 5,
	PERF_COUNT_PAGE_FAULTS_MAJ	= 6,

	PERF_SW_EVENTS_MAX		= 7,
};

/*
 * IRQ-notification data record type:
 */
enum perf_counter_record_type {
	PERF_RECORD_SIMPLE		= 0,
	PERF_RECORD_IRQ			= 1,
	PERF_RECORD_GROUP		= 2,
};

#define __PERF_COUNTER_MASK(name) 			\
	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) <<	\
	 PERF_COUNTER_##name##_SHIFT)

#define PERF_COUNTER_RAW_BITS		1
#define PERF_COUNTER_RAW_SHIFT		63
#define PERF_COUNTER_RAW_MASK		__PERF_COUNTER_MASK(RAW)

#define PERF_COUNTER_CONFIG_BITS	63
#define PERF_COUNTER_CONFIG_SHIFT	0
#define PERF_COUNTER_CONFIG_MASK	__PERF_COUNTER_MASK(CONFIG)

#define PERF_COUNTER_TYPE_BITS		7
#define PERF_COUNTER_TYPE_SHIFT		56
#define PERF_COUNTER_TYPE_MASK		__PERF_COUNTER_MASK(TYPE)

#define PERF_COUNTER_EVENT_BITS		56
#define PERF_COUNTER_EVENT_SHIFT	0
#define PERF_COUNTER_EVENT_MASK		__PERF_COUNTER_MASK(EVENT)

/*
 * Hardware event to monitor via a performance monitoring counter:
 */
struct perf_counter_hw_event {
	/*
	 * The MSB of the config word signifies if the rest contains cpu
	 * specific (raw) counter configuration data, if unset, the next
	 * 7 bits are an event type and the rest of the bits are the event
	 * identifier.
	 */
	__u64			config;

	__u64			irq_period;
	__u64			record_type;
	__u64			read_format;

	__u64			disabled       :  1, /* off by default        */
				nmi	       :  1, /* NMI sampling          */
				inherit	       :  1, /* children inherit it   */
				pinned	       :  1, /* must always be on PMU */
				exclusive      :  1, /* only group on PMU     */
				exclude_user   :  1, /* don't count user      */
				exclude_kernel :  1, /* ditto kernel          */
				exclude_hv     :  1, /* ditto hypervisor      */
				exclude_idle   :  1, /* don't count when idle */

				__reserved_1   : 55;

	__u32			extra_config_len;
	__u32			__reserved_4;

	__u64			__reserved_2;
	__u64			__reserved_3;
};

/*
 * Ioctls that can be done on a perf counter fd:
 */
#define PERF_COUNTER_IOC_ENABLE		_IO('$', 0)
#define PERF_COUNTER_IOC_DISABLE	_IO('$', 1)

#ifdef __KERNEL__
/*
 * Kernel-internal data types and definitions:
 */

#ifdef CONFIG_PERF_COUNTERS
# include <asm/perf_counter.h>
#endif

#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/rculist.h>
#include <linux/rcupdate.h>
#include <linux/spinlock.h>
#include <linux/hrtimer.h>
#include <asm/atomic.h>

struct task_struct;

static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_RAW_MASK;
}

static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
}

static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
{
	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
		PERF_COUNTER_TYPE_SHIFT;
}

static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_EVENT_MASK;
}

/**
 * struct hw_perf_counter - performance counter hardware details:
 */
struct hw_perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	union {
		struct { /* hardware */
			u64				config;
			unsigned long			config_base;
			unsigned long			counter_base;
			int				nmi;
			unsigned int			idx;
		};
		union { /* software */
			atomic64_t			count;
			struct hrtimer			hrtimer;
		};
	};
	atomic64_t			prev_count;
	u64				irq_period;
	atomic64_t			period_left;
#endif
};

/*
 * Hardcoded buffer length limit for now, for IRQ-fed events:
 */
#define PERF_DATA_BUFLEN		2048

/**
 * struct perf_data - performance counter IRQ data sampling ...
 */
struct perf_data {
	int				len;
	int				rd_idx;
	int				overrun;
	u8				data[PERF_DATA_BUFLEN];
};

struct perf_counter;

/**
 * struct hw_perf_counter_ops - performance counter hw ops
 */
struct hw_perf_counter_ops {
	int (*enable)			(struct perf_counter *counter);
	void (*disable)			(struct perf_counter *counter);
	void (*read)			(struct perf_counter *counter);
};

/**
 * enum perf_counter_active_state - the states of a counter
 */
enum perf_counter_active_state {
	PERF_COUNTER_STATE_ERROR	= -2,
	PERF_COUNTER_STATE_OFF		= -1,
	PERF_COUNTER_STATE_INACTIVE	=  0,
	PERF_COUNTER_STATE_ACTIVE	=  1,
};

struct file;

/**
 * struct perf_counter - performance counter kernel representation:
 */
struct perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	struct list_head		list_entry;
	struct list_head		event_entry;
	struct list_head		sibling_list;
	struct perf_counter		*group_leader;
	const struct hw_perf_counter_ops *hw_ops;

	enum perf_counter_active_state	state;
	enum perf_counter_active_state	prev_state;
	atomic64_t			count;

	struct perf_counter_hw_event	hw_event;
	struct hw_perf_counter		hw;

	struct perf_counter_context	*ctx;
	struct task_struct		*task;
	struct file			*filp;

	struct perf_counter		*parent;
	struct list_head		child_list;

	/*
	 * Protect attach/detach and child_list:
	 */
	struct mutex			mutex;

	int				oncpu;
	int				cpu;

	/* read() / irq related data */
	wait_queue_head_t		waitq;
	/* optional: for NMIs */
	int				wakeup_pending;
	struct perf_data		*irqdata;
	struct perf_data		*usrdata;
	struct perf_data		data[2];

	void (*destroy)(struct perf_counter *);
	struct rcu_head			rcu_head;
#endif
};

/**
 * struct perf_counter_context - counter context structure
 *
 * Used as a container for task counters and CPU counters as well:
 */
struct perf_counter_context {
#ifdef CONFIG_PERF_COUNTERS
	/*
	 * Protect the states of the counters in the list,
	 * nr_active, and the list:
	 */
	spinlock_t		lock;
	/*
	 * Protect the list of counters.  Locking either mutex or lock
	 * is sufficient to ensure the list doesn't change; to change
	 * the list you need to lock both the mutex and the spinlock.
	 */
	struct mutex		mutex;

	struct list_head	counter_list;
	struct list_head	event_list;
	int			nr_counters;
	int			nr_active;
	int			is_active;
	struct task_struct	*task;
#endif
};

/**
 * struct perf_counter_cpu_context - per cpu counter context structure
 */
struct perf_cpu_context {
	struct perf_counter_context	ctx;
	struct perf_counter_context	*task_ctx;
	int				active_oncpu;
	int				max_pertask;
	int				exclusive;

	/*
	 * Recursion avoidance:
	 *
	 * task, softirq, irq, nmi context
	 */
	int			recursion[4];
};

/*
 * Set by architecture code:
 */
extern int perf_max_counters;

#ifdef CONFIG_PERF_COUNTERS
extern const struct hw_perf_counter_ops *
hw_perf_counter_init(struct perf_counter *counter);

extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
extern void perf_counter_task_tick(struct task_struct *task, int cpu);
extern void perf_counter_init_task(struct task_struct *child);
extern void perf_counter_exit_task(struct task_struct *child);
extern void perf_counter_notify(struct pt_regs *regs);
extern void perf_counter_print_debug(void);
extern void perf_counter_unthrottle(void);
extern u64 hw_perf_save_disable(void);
extern void hw_perf_restore(u64 ctrl);
extern int perf_counter_task_disable(void);
extern int perf_counter_task_enable(void);
extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	       struct perf_cpu_context *cpuctx,
	       struct perf_counter_context *ctx, int cpu);

extern void perf_counter_output(struct perf_counter *counter,
				int nmi, struct pt_regs *regs);
/*
 * Return 1 for a software counter, 0 for a hardware counter
 */
static inline int is_software_counter(struct perf_counter *counter)
{
	return !perf_event_raw(&counter->hw_event) &&
		perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
}

extern void perf_swcounter_event(u32, u64, int, struct pt_regs *);

#else
static inline void
perf_counter_task_sched_in(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_sched_out(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_tick(struct task_struct *task, int cpu)		{ }
static inline void perf_counter_init_task(struct task_struct *child)	{ }
static inline void perf_counter_exit_task(struct task_struct *child)	{ }
static inline void perf_counter_notify(struct pt_regs *regs)		{ }
static inline void perf_counter_print_debug(void)			{ }
static inline void perf_counter_unthrottle(void)			{ }
static inline void hw_perf_restore(u64 ctrl)				{ }
static inline u64 hw_perf_save_disable(void)		      { return 0; }
static inline int perf_counter_task_disable(void)	{ return -EINVAL; }
static inline int perf_counter_task_enable(void)	{ return -EINVAL; }

static inline void perf_swcounter_event(u32 event, u64 nr,
					int nmi, struct pt_regs *regs)	{ }
#endif

#endif /* __KERNEL__ */
#endif /* _LINUX_PERF_COUNTER_H */
Commit	Line	Data
0793a61d TG	1	/*
	2	* Performance counters:
	3	*
	4	* Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
	5	* Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
	6	*
	7	* Data type definitions, declarations, prototypes.
	8	*
	9	* Started by: Thomas Gleixner and Ingo Molnar
	10	*
	11	* For licencing details see kernel-base/COPYING
	12	*/
	13	#ifndef _LINUX_PERF_COUNTER_H
	14	#define _LINUX_PERF_COUNTER_H
	15
f3dfd265 PM	16	#include <linux/types.h>
f3dfd265 PM	17	#include <linux/ioctl.h>
9aaa131a	18	#include <asm/byteorder.h>
0793a61d TG	19
0793a61d TG	20	/*
9f66a381 IM	21	* User-space ABI bits:
	22	*/
	23
	24	/*
b8e83514	25	* hw_event.type
0793a61d	26	*/
b8e83514 PZ	27	enum perf_event_types {
	28	PERF_TYPE_HARDWARE = 0,
	29	PERF_TYPE_SOFTWARE = 1,
	30	PERF_TYPE_TRACEPOINT = 2,
	31
0793a61d	32	/*
b8e83514	33	* available TYPE space, raw is the max value.
0793a61d	34	*/
9f66a381	35
b8e83514 PZ	36	PERF_TYPE_RAW = 128,
b8e83514 PZ	37	};
6c594c21	38
b8e83514 PZ	39	/*
	40	* Generalized performance counter event types, used by the hw_event.event_id
	41	* parameter of the sys_perf_counter_open() syscall:
	42	*/
	43	enum hw_event_ids {
9f66a381	44	/*
b8e83514	45	* Common hardware events, generalized by the kernel:
9f66a381	46	*/
b8e83514 PZ	47	PERF_COUNT_CPU_CYCLES = 0,
	48	PERF_COUNT_INSTRUCTIONS = 1,
	49	PERF_COUNT_CACHE_REFERENCES = 2,
	50	PERF_COUNT_CACHE_MISSES = 3,
	51	PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
	52	PERF_COUNT_BRANCH_MISSES = 5,
	53	PERF_COUNT_BUS_CYCLES = 6,
	54
	55	PERF_HW_EVENTS_MAX = 7,
	56	};
e077df4f	57
b8e83514 PZ	58	/*
	59	* Special "software" counters provided by the kernel, even if the hardware
	60	* does not support performance counters. These counters measure various
	61	* physical and sw events of the kernel (and allow the profiling of them as
	62	* well):
	63	*/
	64	enum sw_event_ids {
	65	PERF_COUNT_CPU_CLOCK = 0,
	66	PERF_COUNT_TASK_CLOCK = 1,
	67	PERF_COUNT_PAGE_FAULTS = 2,
	68	PERF_COUNT_CONTEXT_SWITCHES = 3,
	69	PERF_COUNT_CPU_MIGRATIONS = 4,
	70	PERF_COUNT_PAGE_FAULTS_MIN = 5,
	71	PERF_COUNT_PAGE_FAULTS_MAJ = 6,
	72
	73	PERF_SW_EVENTS_MAX = 7,
0793a61d TG	74	};
	75
	76	/*
	77	* IRQ-notification data record type:
	78	*/
9f66a381	79	enum perf_counter_record_type {
b8e83514 PZ	80	PERF_RECORD_SIMPLE = 0,
	81	PERF_RECORD_IRQ = 1,
	82	PERF_RECORD_GROUP = 2,
0793a61d TG	83	};
0793a61d TG	84
f4a2deb4 PZ	85	#define __PERF_COUNTER_MASK(name) \
	86	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
	87	PERF_COUNTER_##name##_SHIFT)
	88
	89	#define PERF_COUNTER_RAW_BITS 1
	90	#define PERF_COUNTER_RAW_SHIFT 63
	91	#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
	92
	93	#define PERF_COUNTER_CONFIG_BITS 63
	94	#define PERF_COUNTER_CONFIG_SHIFT 0
	95	#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
	96
	97	#define PERF_COUNTER_TYPE_BITS 7
	98	#define PERF_COUNTER_TYPE_SHIFT 56
	99	#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
	100
	101	#define PERF_COUNTER_EVENT_BITS 56
	102	#define PERF_COUNTER_EVENT_SHIFT 0
	103	#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
	104
9f66a381 IM	105	/*
	106	* Hardware event to monitor via a performance monitoring counter:
	107	*/
	108	struct perf_counter_hw_event {
f4a2deb4 PZ	109	/*
	110	* The MSB of the config word signifies if the rest contains cpu
	111	* specific (raw) counter configuration data, if unset, the next
	112	* 7 bits are an event type and the rest of the bits are the event
	113	* identifier.
	114	*/
	115	__u64 config;
9f66a381	116
f3dfd265	117	__u64 irq_period;
2743a5b0 PM	118	__u64 record_type;
2743a5b0 PM	119	__u64 read_format;
9f66a381	120
2743a5b0	121	__u64 disabled : 1, /* off by default */
0475f9ea	122	nmi : 1, /* NMI sampling */
0475f9ea PM	123	inherit : 1, /* children inherit it */
	124	pinned : 1, /* must always be on PMU */
	125	exclusive : 1, /* only group on PMU */
	126	exclude_user : 1, /* don't count user */
	127	exclude_kernel : 1, /* ditto kernel */
	128	exclude_hv : 1, /* ditto hypervisor */
2743a5b0	129	exclude_idle : 1, /* don't count when idle */
0475f9ea	130
b8e83514	131	__reserved_1 : 55;
2743a5b0 PM	132
	133	__u32 extra_config_len;
	134	__u32 __reserved_4;
9f66a381	135
f3dfd265	136	__u64 __reserved_2;
2743a5b0	137	__u64 __reserved_3;
eab656ae TG	138	};
eab656ae TG	139
d859e29f PM	140	/*
	141	* Ioctls that can be done on a perf counter fd:
	142	*/
	143	#define PERF_COUNTER_IOC_ENABLE _IO('$', 0)
	144	#define PERF_COUNTER_IOC_DISABLE _IO('$', 1)
	145
f3dfd265	146	#ifdef __KERNEL__
9f66a381	147	/*
f3dfd265	148	* Kernel-internal data types and definitions:
9f66a381 IM	149	*/
9f66a381 IM	150
f3dfd265 PM	151	#ifdef CONFIG_PERF_COUNTERS
	152	# include <asm/perf_counter.h>
	153	#endif
	154
	155	#include <linux/list.h>
	156	#include <linux/mutex.h>
	157	#include <linux/rculist.h>
	158	#include <linux/rcupdate.h>
	159	#include <linux/spinlock.h>
d6d020e9	160	#include <linux/hrtimer.h>
f3dfd265 PM	161	#include <asm/atomic.h>
	162
	163	struct task_struct;
	164
f4a2deb4 PZ	165	static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
	166	{
	167	return hw_event->config & PERF_COUNTER_RAW_MASK;
	168	}
	169
	170	static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
	171	{
	172	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
	173	}
	174
	175	static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
	176	{
	177	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
	178	PERF_COUNTER_TYPE_SHIFT;
	179	}
	180
	181	static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
	182	{
	183	return hw_event->config & PERF_COUNTER_EVENT_MASK;
	184	}
	185
0793a61d	186	/**
9f66a381	187	* struct hw_perf_counter - performance counter hardware details:
0793a61d TG	188	*/
0793a61d TG	189	struct hw_perf_counter {
ee06094f	190	#ifdef CONFIG_PERF_COUNTERS
d6d020e9 PZ	191	union {
	192	struct { /* hardware */
	193	u64 config;
	194	unsigned long config_base;
	195	unsigned long counter_base;
	196	int nmi;
	197	unsigned int idx;
	198	};
	199	union { /* software */
	200	atomic64_t count;
	201	struct hrtimer hrtimer;
	202	};
	203	};
ee06094f	204	atomic64_t prev_count;
9f66a381	205	u64 irq_period;
ee06094f IM	206	atomic64_t period_left;
ee06094f IM	207	#endif
0793a61d TG	208	};
	209
	210	/*
	211	* Hardcoded buffer length limit for now, for IRQ-fed events:
	212	*/
9f66a381	213	#define PERF_DATA_BUFLEN 2048
0793a61d TG	214
	215	/**
	216	* struct perf_data - performance counter IRQ data sampling ...
	217	*/
	218	struct perf_data {
9f66a381 IM	219	int len;
	220	int rd_idx;
	221	int overrun;
	222	u8 data[PERF_DATA_BUFLEN];
0793a61d TG	223	};
0793a61d TG	224
621a01ea IM	225	struct perf_counter;
	226
	227	/**
	228	* struct hw_perf_counter_ops - performance counter hw ops
	229	*/
	230	struct hw_perf_counter_ops {
95cdd2e7	231	int (enable) (struct perf_counter counter);
7671581f IM	232	void (disable) (struct perf_counter counter);
7671581f IM	233	void (read) (struct perf_counter counter);
621a01ea IM	234	};
621a01ea IM	235
6a930700 IM	236	/**
	237	* enum perf_counter_active_state - the states of a counter
	238	*/
	239	enum perf_counter_active_state {
3b6f9e5c	240	PERF_COUNTER_STATE_ERROR = -2,
6a930700 IM	241	PERF_COUNTER_STATE_OFF = -1,
	242	PERF_COUNTER_STATE_INACTIVE = 0,
	243	PERF_COUNTER_STATE_ACTIVE = 1,
	244	};
	245
9b51f66d IM	246	struct file;
9b51f66d IM	247
0793a61d TG	248	/**
	249	* struct perf_counter - performance counter kernel representation:
	250	*/
	251	struct perf_counter {
ee06094f	252	#ifdef CONFIG_PERF_COUNTERS
04289bb9	253	struct list_head list_entry;
592903cd	254	struct list_head event_entry;
04289bb9 IM	255	struct list_head sibling_list;
04289bb9 IM	256	struct perf_counter *group_leader;
5c92d124	257	const struct hw_perf_counter_ops *hw_ops;
04289bb9	258
6a930700	259	enum perf_counter_active_state state;
c07c99b6	260	enum perf_counter_active_state prev_state;
0793a61d	261	atomic64_t count;
ee06094f	262
9f66a381	263	struct perf_counter_hw_event hw_event;
0793a61d TG	264	struct hw_perf_counter hw;
	265
	266	struct perf_counter_context *ctx;
	267	struct task_struct *task;
9b51f66d	268	struct file *filp;
0793a61d	269
9b51f66d	270	struct perf_counter *parent;
d859e29f PM	271	struct list_head child_list;
d859e29f PM	272
0793a61d	273	/*
d859e29f	274	* Protect attach/detach and child_list:
0793a61d TG	275	*/
	276	struct mutex mutex;
	277
	278	int oncpu;
	279	int cpu;
	280
0793a61d TG	281	/* read() / irq related data */
	282	wait_queue_head_t waitq;
	283	/* optional: for NMIs */
	284	int wakeup_pending;
	285	struct perf_data *irqdata;
	286	struct perf_data *usrdata;
	287	struct perf_data data[2];
592903cd	288
e077df4f	289	void (destroy)(struct perf_counter );
592903cd	290	struct rcu_head rcu_head;
ee06094f	291	#endif
0793a61d TG	292	};
	293
	294	/**
	295	* struct perf_counter_context - counter context structure
	296	*
	297	* Used as a container for task counters and CPU counters as well:
	298	*/
	299	struct perf_counter_context {
	300	#ifdef CONFIG_PERF_COUNTERS
	301	/*
d859e29f PM	302	* Protect the states of the counters in the list,
d859e29f PM	303	* nr_active, and the list:
0793a61d TG	304	*/
0793a61d TG	305	spinlock_t lock;
d859e29f PM	306	/*
	307	* Protect the list of counters. Locking either mutex or lock
	308	* is sufficient to ensure the list doesn't change; to change
	309	* the list you need to lock both the mutex and the spinlock.
	310	*/
	311	struct mutex mutex;
04289bb9 IM	312
04289bb9 IM	313	struct list_head counter_list;
592903cd	314	struct list_head event_list;
0793a61d TG	315	int nr_counters;
0793a61d TG	316	int nr_active;
d859e29f	317	int is_active;
0793a61d TG	318	struct task_struct *task;
	319	#endif
	320	};
	321
	322	/**
	323	* struct perf_counter_cpu_context - per cpu counter context structure
	324	*/
	325	struct perf_cpu_context {
	326	struct perf_counter_context ctx;
	327	struct perf_counter_context *task_ctx;
	328	int active_oncpu;
	329	int max_pertask;
3b6f9e5c	330	int exclusive;
96f6d444 PZ	331
	332	/*
	333	* Recursion avoidance:
	334	*
	335	* task, softirq, irq, nmi context
	336	*/
	337	int recursion[4];
0793a61d TG	338	};
	339
	340	/*
	341	* Set by architecture code:
	342	*/
	343	extern int perf_max_counters;
	344
	345	#ifdef CONFIG_PERF_COUNTERS
5c92d124	346	extern const struct hw_perf_counter_ops *
621a01ea IM	347	hw_perf_counter_init(struct perf_counter *counter);
621a01ea IM	348
0793a61d TG	349	extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
	350	extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
	351	extern void perf_counter_task_tick(struct task_struct *task, int cpu);
9b51f66d IM	352	extern void perf_counter_init_task(struct task_struct *child);
9b51f66d IM	353	extern void perf_counter_exit_task(struct task_struct *child);
0793a61d TG	354	extern void perf_counter_notify(struct pt_regs *regs);
0793a61d TG	355	extern void perf_counter_print_debug(void);
1b023a96	356	extern void perf_counter_unthrottle(void);
01b2838c IM	357	extern u64 hw_perf_save_disable(void);
01b2838c IM	358	extern void hw_perf_restore(u64 ctrl);
1d1c7ddb IM	359	extern int perf_counter_task_disable(void);
1d1c7ddb IM	360	extern int perf_counter_task_enable(void);
3cbed429 PM	361	extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	362	struct perf_cpu_context *cpuctx,
	363	struct perf_counter_context *ctx, int cpu);
5c92d124	364
0322cd6e PZ	365	extern void perf_counter_output(struct perf_counter *counter,
0322cd6e PZ	366	int nmi, struct pt_regs *regs);
3b6f9e5c PM	367	/*
	368	* Return 1 for a software counter, 0 for a hardware counter
	369	*/
	370	static inline int is_software_counter(struct perf_counter *counter)
	371	{
f4a2deb4 PZ	372	return !perf_event_raw(&counter->hw_event) &&
f4a2deb4 PZ	373	perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
3b6f9e5c PM	374	}
3b6f9e5c PM	375
b8e83514	376	extern void perf_swcounter_event(u32, u64, int, struct pt_regs *);
15dbf27c	377
0793a61d TG	378	#else
	379	static inline void
	380	perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
	381	static inline void
	382	perf_counter_task_sched_out(struct task_struct *task, int cpu) { }
	383	static inline void
	384	perf_counter_task_tick(struct task_struct *task, int cpu) { }
9b51f66d IM	385	static inline void perf_counter_init_task(struct task_struct *child) { }
9b51f66d IM	386	static inline void perf_counter_exit_task(struct task_struct *child) { }
0793a61d TG	387	static inline void perf_counter_notify(struct pt_regs *regs) { }
0793a61d TG	388	static inline void perf_counter_print_debug(void) { }
1b023a96	389	static inline void perf_counter_unthrottle(void) { }
15dbf27c	390	static inline void hw_perf_restore(u64 ctrl) { }
01b2838c	391	static inline u64 hw_perf_save_disable(void) { return 0; }
1d1c7ddb IM	392	static inline int perf_counter_task_disable(void) { return -EINVAL; }
1d1c7ddb IM	393	static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c	394
b8e83514	395	static inline void perf_swcounter_event(u32 event, u64 nr,
15dbf27c	396	int nmi, struct pt_regs *regs) { }
0793a61d TG	397	#endif
0793a61d TG	398
f3dfd265	399	#endif /* __KERNEL__ */
0793a61d	400	#endif /* _LINUX_PERF_COUNTER_H */