Commit | Line | Data |
---|---|---|
0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
607ca46e | 17 | #include <uapi/linux/perf_event.h> |
0793a61d | 18 | |
9f66a381 | 19 | /* |
f3dfd265 | 20 | * Kernel-internal data types and definitions: |
9f66a381 IM |
21 | */ |
22 | ||
cdd6c482 IM |
23 | #ifdef CONFIG_PERF_EVENTS |
24 | # include <asm/perf_event.h> | |
7be79236 | 25 | # include <asm/local64.h> |
f3dfd265 PM |
26 | #endif |
27 | ||
39447b38 | 28 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
29 | int (*is_in_guest)(void); |
30 | int (*is_user_mode)(void); | |
31 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
32 | }; |
33 | ||
2ff6cfd7 AB |
34 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
35 | #include <asm/hw_breakpoint.h> | |
36 | #endif | |
37 | ||
f3dfd265 PM |
38 | #include <linux/list.h> |
39 | #include <linux/mutex.h> | |
40 | #include <linux/rculist.h> | |
41 | #include <linux/rcupdate.h> | |
42 | #include <linux/spinlock.h> | |
d6d020e9 | 43 | #include <linux/hrtimer.h> |
3c446b3d | 44 | #include <linux/fs.h> |
709e50cf | 45 | #include <linux/pid_namespace.h> |
906010b2 | 46 | #include <linux/workqueue.h> |
5331d7b8 | 47 | #include <linux/ftrace.h> |
85cfabbc | 48 | #include <linux/cpu.h> |
e360adbe | 49 | #include <linux/irq_work.h> |
c5905afb | 50 | #include <linux/static_key.h> |
851cf6e7 | 51 | #include <linux/jump_label_ratelimit.h> |
60063497 | 52 | #include <linux/atomic.h> |
641cc938 | 53 | #include <linux/sysfs.h> |
4018994f | 54 | #include <linux/perf_regs.h> |
fadfe7be | 55 | #include <linux/workqueue.h> |
39bed6cb | 56 | #include <linux/cgroup.h> |
fa588151 | 57 | #include <asm/local.h> |
f3dfd265 | 58 | |
f9188e02 PZ |
59 | struct perf_callchain_entry { |
60 | __u64 nr; | |
c5dfd78e | 61 | __u64 ip[0]; /* /proc/sys/kernel/perf_event_max_stack */ |
f9188e02 PZ |
62 | }; |
63 | ||
cfbcf468 ACM |
64 | struct perf_callchain_entry_ctx { |
65 | struct perf_callchain_entry *entry; | |
66 | u32 max_stack; | |
3b1fff08 | 67 | u32 nr; |
c85b0334 ACM |
68 | short contexts; |
69 | bool contexts_maxed; | |
cfbcf468 ACM |
70 | }; |
71 | ||
3a43ce68 FW |
72 | struct perf_raw_record { |
73 | u32 size; | |
74 | void *data; | |
f413cdb8 FW |
75 | }; |
76 | ||
bce38cd5 SE |
77 | /* |
78 | * branch stack layout: | |
79 | * nr: number of taken branches stored in entries[] | |
80 | * | |
81 | * Note that nr can vary from sample to sample | |
82 | * branches (to, from) are stored from most recent | |
83 | * to least recent, i.e., entries[0] contains the most | |
84 | * recent branch. | |
85 | */ | |
caff2bef PZ |
86 | struct perf_branch_stack { |
87 | __u64 nr; | |
88 | struct perf_branch_entry entries[0]; | |
89 | }; | |
90 | ||
f3dfd265 PM |
91 | struct task_struct; |
92 | ||
efc9f05d SE |
93 | /* |
94 | * extra PMU register associated with an event | |
95 | */ | |
96 | struct hw_perf_event_extra { | |
97 | u64 config; /* register value */ | |
98 | unsigned int reg; /* register address or index */ | |
99 | int alloc; /* extra register already allocated */ | |
100 | int idx; /* index in shared_regs->regs[] */ | |
101 | }; | |
102 | ||
0793a61d | 103 | /** |
cdd6c482 | 104 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 105 | */ |
cdd6c482 IM |
106 | struct hw_perf_event { |
107 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
108 | union { |
109 | struct { /* hardware */ | |
a308444c | 110 | u64 config; |
447a194b | 111 | u64 last_tag; |
a308444c | 112 | unsigned long config_base; |
cdd6c482 | 113 | unsigned long event_base; |
c48b6053 | 114 | int event_base_rdpmc; |
a308444c | 115 | int idx; |
447a194b | 116 | int last_cpu; |
9fac2cf3 | 117 | int flags; |
bce38cd5 | 118 | |
efc9f05d | 119 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 120 | struct hw_perf_event_extra branch_reg; |
d6d020e9 | 121 | }; |
721a669b | 122 | struct { /* software */ |
a308444c | 123 | struct hrtimer hrtimer; |
d6d020e9 | 124 | }; |
f22c1bb6 | 125 | struct { /* tracepoint */ |
f22c1bb6 ON |
126 | /* for tp_event->class */ |
127 | struct list_head tp_list; | |
128 | }; | |
4afbb24c MF |
129 | struct { /* intel_cqm */ |
130 | int cqm_state; | |
b3df4ec4 | 131 | u32 cqm_rmid; |
a223c1c7 | 132 | int is_group_event; |
4afbb24c MF |
133 | struct list_head cqm_events_entry; |
134 | struct list_head cqm_groups_entry; | |
135 | struct list_head cqm_group_entry; | |
136 | }; | |
ec0d7729 AS |
137 | struct { /* itrace */ |
138 | int itrace_started; | |
139 | }; | |
c7ab62bf HR |
140 | struct { /* amd_power */ |
141 | u64 pwr_acc; | |
142 | u64 ptsc; | |
143 | }; | |
24f1e32c | 144 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 | 145 | struct { /* breakpoint */ |
d580ff86 PZ |
146 | /* |
147 | * Crufty hack to avoid the chicken and egg | |
148 | * problem hw_breakpoint has with context | |
149 | * creation and event initalization. | |
150 | */ | |
f22c1bb6 ON |
151 | struct arch_hw_breakpoint info; |
152 | struct list_head bp_list; | |
45a73372 | 153 | }; |
24f1e32c | 154 | #endif |
d6d020e9 | 155 | }; |
b0e87875 PZ |
156 | /* |
157 | * If the event is a per task event, this will point to the task in | |
158 | * question. See the comment in perf_event_alloc(). | |
159 | */ | |
50f16a8b | 160 | struct task_struct *target; |
b0e87875 | 161 | |
375637bc AS |
162 | /* |
163 | * PMU would store hardware filter configuration | |
164 | * here. | |
165 | */ | |
166 | void *addr_filters; | |
167 | ||
168 | /* Last sync'ed generation of filters */ | |
169 | unsigned long addr_filters_gen; | |
170 | ||
b0e87875 PZ |
171 | /* |
172 | * hw_perf_event::state flags; used to track the PERF_EF_* state. | |
173 | */ | |
174 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
175 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
176 | #define PERF_HES_ARCH 0x04 | |
177 | ||
a4eaf7f1 | 178 | int state; |
b0e87875 PZ |
179 | |
180 | /* | |
181 | * The last observed hardware counter value, updated with a | |
182 | * local64_cmpxchg() such that pmu::read() can be called nested. | |
183 | */ | |
e7850595 | 184 | local64_t prev_count; |
b0e87875 PZ |
185 | |
186 | /* | |
187 | * The period to start the next sample with. | |
188 | */ | |
b23f3325 | 189 | u64 sample_period; |
b0e87875 PZ |
190 | |
191 | /* | |
192 | * The period we started this sample with. | |
193 | */ | |
9e350de3 | 194 | u64 last_period; |
b0e87875 PZ |
195 | |
196 | /* | |
197 | * However much is left of the current period; note that this is | |
198 | * a full 64bit value and allows for generation of periods longer | |
199 | * than hardware might allow. | |
200 | */ | |
e7850595 | 201 | local64_t period_left; |
b0e87875 PZ |
202 | |
203 | /* | |
204 | * State for throttling the event, see __perf_event_overflow() and | |
205 | * perf_adjust_freq_unthr_context(). | |
206 | */ | |
e050e3f0 | 207 | u64 interrupts_seq; |
60db5e09 | 208 | u64 interrupts; |
6a24ed6c | 209 | |
b0e87875 PZ |
210 | /* |
211 | * State for freq target events, see __perf_event_overflow() and | |
212 | * perf_adjust_freq_unthr_context(). | |
213 | */ | |
abd50713 PZ |
214 | u64 freq_time_stamp; |
215 | u64 freq_count_stamp; | |
ee06094f | 216 | #endif |
0793a61d TG |
217 | }; |
218 | ||
cdd6c482 | 219 | struct perf_event; |
621a01ea | 220 | |
8d2cacbb PZ |
221 | /* |
222 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
223 | */ | |
fbbe0701 | 224 | #define PERF_PMU_TXN_ADD 0x1 /* txn to add/schedule event on PMU */ |
4a00c16e | 225 | #define PERF_PMU_TXN_READ 0x2 /* txn to read event group from PMU */ |
fbbe0701 | 226 | |
53b25335 VW |
227 | /** |
228 | * pmu::capabilities flags | |
229 | */ | |
230 | #define PERF_PMU_CAP_NO_INTERRUPT 0x01 | |
34f43927 | 231 | #define PERF_PMU_CAP_NO_NMI 0x02 |
0a4e38e6 | 232 | #define PERF_PMU_CAP_AUX_NO_SG 0x04 |
6a279230 | 233 | #define PERF_PMU_CAP_AUX_SW_DOUBLEBUF 0x08 |
bed5b25a | 234 | #define PERF_PMU_CAP_EXCLUSIVE 0x10 |
ec0d7729 | 235 | #define PERF_PMU_CAP_ITRACE 0x20 |
5101ef20 | 236 | #define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x40 |
53b25335 | 237 | |
621a01ea | 238 | /** |
4aeb0b42 | 239 | * struct pmu - generic performance monitoring unit |
621a01ea | 240 | */ |
4aeb0b42 | 241 | struct pmu { |
b0a873eb PZ |
242 | struct list_head entry; |
243 | ||
c464c76e | 244 | struct module *module; |
abe43400 | 245 | struct device *dev; |
0c9d42ed | 246 | const struct attribute_group **attr_groups; |
03d8e80b | 247 | const char *name; |
2e80a82a PZ |
248 | int type; |
249 | ||
53b25335 VW |
250 | /* |
251 | * various common per-pmu feature flags | |
252 | */ | |
253 | int capabilities; | |
254 | ||
108b02cf PZ |
255 | int * __percpu pmu_disable_count; |
256 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
bed5b25a | 257 | atomic_t exclusive_cnt; /* < 0: cpu; > 0: tsk */ |
8dc85d54 | 258 | int task_ctx_nr; |
62b85639 | 259 | int hrtimer_interval_ms; |
6bde9b6c | 260 | |
375637bc AS |
261 | /* number of address filters this PMU can do */ |
262 | unsigned int nr_addr_filters; | |
263 | ||
6bde9b6c | 264 | /* |
a4eaf7f1 PZ |
265 | * Fully disable/enable this PMU, can be used to protect from the PMI |
266 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 267 | */ |
ad5133b7 PZ |
268 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
269 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 270 | |
8d2cacbb | 271 | /* |
a4eaf7f1 | 272 | * Try and initialize the event for this PMU. |
b0e87875 PZ |
273 | * |
274 | * Returns: | |
275 | * -ENOENT -- @event is not for this PMU | |
276 | * | |
277 | * -ENODEV -- @event is for this PMU but PMU not present | |
278 | * -EBUSY -- @event is for this PMU but PMU temporarily unavailable | |
279 | * -EINVAL -- @event is for this PMU but @event is not valid | |
280 | * -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported | |
281 | * -EACCESS -- @event is for this PMU, @event is valid, but no privilidges | |
282 | * | |
283 | * 0 -- @event is for this PMU and valid | |
284 | * | |
285 | * Other error return values are allowed. | |
8d2cacbb | 286 | */ |
b0a873eb PZ |
287 | int (*event_init) (struct perf_event *event); |
288 | ||
1e0fb9ec AL |
289 | /* |
290 | * Notification that the event was mapped or unmapped. Called | |
291 | * in the context of the mapping task. | |
292 | */ | |
293 | void (*event_mapped) (struct perf_event *event); /*optional*/ | |
294 | void (*event_unmapped) (struct perf_event *event); /*optional*/ | |
295 | ||
b0e87875 PZ |
296 | /* |
297 | * Flags for ->add()/->del()/ ->start()/->stop(). There are | |
298 | * matching hw_perf_event::state flags. | |
299 | */ | |
a4eaf7f1 PZ |
300 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
301 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
302 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
303 | ||
8d2cacbb | 304 | /* |
b0e87875 PZ |
305 | * Adds/Removes a counter to/from the PMU, can be done inside a |
306 | * transaction, see the ->*_txn() methods. | |
307 | * | |
308 | * The add/del callbacks will reserve all hardware resources required | |
309 | * to service the event, this includes any counter constraint | |
310 | * scheduling etc. | |
311 | * | |
312 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
313 | * is on. | |
314 | * | |
315 | * ->add() called without PERF_EF_START should result in the same state | |
316 | * as ->add() followed by ->stop(). | |
317 | * | |
318 | * ->del() must always PERF_EF_UPDATE stop an event. If it calls | |
319 | * ->stop() that must deal with already being stopped without | |
320 | * PERF_EF_UPDATE. | |
a4eaf7f1 PZ |
321 | */ |
322 | int (*add) (struct perf_event *event, int flags); | |
323 | void (*del) (struct perf_event *event, int flags); | |
324 | ||
325 | /* | |
b0e87875 PZ |
326 | * Starts/Stops a counter present on the PMU. |
327 | * | |
328 | * The PMI handler should stop the counter when perf_event_overflow() | |
329 | * returns !0. ->start() will be used to continue. | |
330 | * | |
331 | * Also used to change the sample period. | |
332 | * | |
333 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
334 | * is on -- will be called from NMI context with the PMU generates | |
335 | * NMIs. | |
336 | * | |
337 | * ->stop() with PERF_EF_UPDATE will read the counter and update | |
338 | * period/count values like ->read() would. | |
339 | * | |
340 | * ->start() with PERF_EF_RELOAD will reprogram the the counter | |
341 | * value, must be preceded by a ->stop() with PERF_EF_UPDATE. | |
a4eaf7f1 PZ |
342 | */ |
343 | void (*start) (struct perf_event *event, int flags); | |
344 | void (*stop) (struct perf_event *event, int flags); | |
345 | ||
346 | /* | |
347 | * Updates the counter value of the event. | |
b0e87875 PZ |
348 | * |
349 | * For sampling capable PMUs this will also update the software period | |
350 | * hw_perf_event::period_left field. | |
a4eaf7f1 | 351 | */ |
cdd6c482 | 352 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
353 | |
354 | /* | |
24cd7f54 PZ |
355 | * Group events scheduling is treated as a transaction, add |
356 | * group events as a whole and perform one schedulability test. | |
357 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
358 | * |
359 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 360 | * do schedulability tests. |
fbbe0701 SB |
361 | * |
362 | * Optional. | |
8d2cacbb | 363 | */ |
fbbe0701 | 364 | void (*start_txn) (struct pmu *pmu, unsigned int txn_flags); |
8d2cacbb | 365 | /* |
a4eaf7f1 | 366 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
367 | * then ->commit_txn() is required to perform one. On success |
368 | * the transaction is closed. On error the transaction is kept | |
369 | * open until ->cancel_txn() is called. | |
fbbe0701 SB |
370 | * |
371 | * Optional. | |
8d2cacbb | 372 | */ |
fbbe0701 | 373 | int (*commit_txn) (struct pmu *pmu); |
8d2cacbb | 374 | /* |
a4eaf7f1 | 375 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 376 | * for each successful ->add() during the transaction. |
fbbe0701 SB |
377 | * |
378 | * Optional. | |
8d2cacbb | 379 | */ |
fbbe0701 | 380 | void (*cancel_txn) (struct pmu *pmu); |
35edc2a5 PZ |
381 | |
382 | /* | |
383 | * Will return the value for perf_event_mmap_page::index for this event, | |
384 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
385 | */ | |
386 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 | 387 | |
ba532500 YZ |
388 | /* |
389 | * context-switches callback | |
390 | */ | |
391 | void (*sched_task) (struct perf_event_context *ctx, | |
392 | bool sched_in); | |
4af57ef2 YZ |
393 | /* |
394 | * PMU specific data size | |
395 | */ | |
396 | size_t task_ctx_size; | |
ba532500 | 397 | |
eacd3ecc MF |
398 | |
399 | /* | |
400 | * Return the count value for a counter. | |
401 | */ | |
402 | u64 (*count) (struct perf_event *event); /*optional*/ | |
45bfb2e5 PZ |
403 | |
404 | /* | |
405 | * Set up pmu-private data structures for an AUX area | |
406 | */ | |
407 | void *(*setup_aux) (int cpu, void **pages, | |
408 | int nr_pages, bool overwrite); | |
409 | /* optional */ | |
410 | ||
411 | /* | |
412 | * Free pmu-private AUX data structures | |
413 | */ | |
414 | void (*free_aux) (void *aux); /* optional */ | |
66eb579e | 415 | |
375637bc AS |
416 | /* |
417 | * Validate address range filters: make sure the HW supports the | |
418 | * requested configuration and number of filters; return 0 if the | |
419 | * supplied filters are valid, -errno otherwise. | |
420 | * | |
421 | * Runs in the context of the ioctl()ing process and is not serialized | |
422 | * with the rest of the PMU callbacks. | |
423 | */ | |
424 | int (*addr_filters_validate) (struct list_head *filters); | |
425 | /* optional */ | |
426 | ||
427 | /* | |
428 | * Synchronize address range filter configuration: | |
429 | * translate hw-agnostic filters into hardware configuration in | |
430 | * event::hw::addr_filters. | |
431 | * | |
432 | * Runs as a part of filter sync sequence that is done in ->start() | |
433 | * callback by calling perf_event_addr_filters_sync(). | |
434 | * | |
435 | * May (and should) traverse event::addr_filters::list, for which its | |
436 | * caller provides necessary serialization. | |
437 | */ | |
438 | void (*addr_filters_sync) (struct perf_event *event); | |
439 | /* optional */ | |
440 | ||
66eb579e MR |
441 | /* |
442 | * Filter events for PMU-specific reasons. | |
443 | */ | |
444 | int (*filter_match) (struct perf_event *event); /* optional */ | |
621a01ea IM |
445 | }; |
446 | ||
375637bc AS |
447 | /** |
448 | * struct perf_addr_filter - address range filter definition | |
449 | * @entry: event's filter list linkage | |
450 | * @inode: object file's inode for file-based filters | |
451 | * @offset: filter range offset | |
452 | * @size: filter range size | |
453 | * @range: 1: range, 0: address | |
454 | * @filter: 1: filter/start, 0: stop | |
455 | * | |
456 | * This is a hardware-agnostic filter configuration as specified by the user. | |
457 | */ | |
458 | struct perf_addr_filter { | |
459 | struct list_head entry; | |
460 | struct inode *inode; | |
461 | unsigned long offset; | |
462 | unsigned long size; | |
463 | unsigned int range : 1, | |
464 | filter : 1; | |
465 | }; | |
466 | ||
467 | /** | |
468 | * struct perf_addr_filters_head - container for address range filters | |
469 | * @list: list of filters for this event | |
470 | * @lock: spinlock that serializes accesses to the @list and event's | |
471 | * (and its children's) filter generations. | |
472 | * | |
473 | * A child event will use parent's @list (and therefore @lock), so they are | |
474 | * bundled together; see perf_event_addr_filters(). | |
475 | */ | |
476 | struct perf_addr_filters_head { | |
477 | struct list_head list; | |
478 | raw_spinlock_t lock; | |
479 | }; | |
480 | ||
6a930700 | 481 | /** |
cdd6c482 | 482 | * enum perf_event_active_state - the states of a event |
6a930700 | 483 | */ |
cdd6c482 | 484 | enum perf_event_active_state { |
a69b0ca4 | 485 | PERF_EVENT_STATE_DEAD = -4, |
179033b3 | 486 | PERF_EVENT_STATE_EXIT = -3, |
57c0c15b | 487 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
488 | PERF_EVENT_STATE_OFF = -1, |
489 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 490 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
491 | }; |
492 | ||
9b51f66d | 493 | struct file; |
453f19ee PZ |
494 | struct perf_sample_data; |
495 | ||
a8b0ca17 | 496 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
497 | struct perf_sample_data *, |
498 | struct pt_regs *regs); | |
499 | ||
d6f962b5 | 500 | enum perf_group_flag { |
e7e7ee2e | 501 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
502 | }; |
503 | ||
e7e7ee2e IM |
504 | #define SWEVENT_HLIST_BITS 8 |
505 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
506 | |
507 | struct swevent_hlist { | |
e7e7ee2e IM |
508 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
509 | struct rcu_head rcu_head; | |
76e1d904 FW |
510 | }; |
511 | ||
8a49542c PZ |
512 | #define PERF_ATTACH_CONTEXT 0x01 |
513 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 514 | #define PERF_ATTACH_TASK 0x04 |
4af57ef2 | 515 | #define PERF_ATTACH_TASK_DATA 0x08 |
8a49542c | 516 | |
877c6856 | 517 | struct perf_cgroup; |
76369139 FW |
518 | struct ring_buffer; |
519 | ||
f2fb6bef KL |
520 | struct pmu_event_list { |
521 | raw_spinlock_t lock; | |
522 | struct list_head list; | |
523 | }; | |
524 | ||
0793a61d | 525 | /** |
cdd6c482 | 526 | * struct perf_event - performance event kernel representation: |
0793a61d | 527 | */ |
cdd6c482 IM |
528 | struct perf_event { |
529 | #ifdef CONFIG_PERF_EVENTS | |
9886167d PZ |
530 | /* |
531 | * entry onto perf_event_context::event_list; | |
532 | * modifications require ctx->lock | |
533 | * RCU safe iterations. | |
534 | */ | |
592903cd | 535 | struct list_head event_entry; |
9886167d PZ |
536 | |
537 | /* | |
538 | * XXX: group_entry and sibling_list should be mutually exclusive; | |
539 | * either you're a sibling on a group, or you're the group leader. | |
540 | * Rework the code to always use the same list element. | |
541 | * | |
542 | * Locked for modification by both ctx->mutex and ctx->lock; holding | |
543 | * either sufficies for read. | |
544 | */ | |
545 | struct list_head group_entry; | |
04289bb9 | 546 | struct list_head sibling_list; |
9886167d PZ |
547 | |
548 | /* | |
549 | * We need storage to track the entries in perf_pmu_migrate_context; we | |
550 | * cannot use the event_entry because of RCU and we want to keep the | |
551 | * group in tact which avoids us using the other two entries. | |
552 | */ | |
553 | struct list_head migrate_entry; | |
554 | ||
f3ae75de SE |
555 | struct hlist_node hlist_entry; |
556 | struct list_head active_entry; | |
0127c3ea | 557 | int nr_siblings; |
d6f962b5 | 558 | int group_flags; |
cdd6c482 | 559 | struct perf_event *group_leader; |
a4eaf7f1 | 560 | struct pmu *pmu; |
54d751d4 | 561 | void *pmu_private; |
04289bb9 | 562 | |
cdd6c482 | 563 | enum perf_event_active_state state; |
8a49542c | 564 | unsigned int attach_state; |
e7850595 | 565 | local64_t count; |
a6e6dea6 | 566 | atomic64_t child_count; |
ee06094f | 567 | |
53cfbf59 | 568 | /* |
cdd6c482 | 569 | * These are the total time in nanoseconds that the event |
53cfbf59 | 570 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 571 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
572 | * and running (scheduled onto the CPU), respectively. |
573 | * | |
574 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 575 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
576 | */ |
577 | u64 total_time_enabled; | |
578 | u64 total_time_running; | |
579 | ||
580 | /* | |
581 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 582 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
583 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
584 | * in time. | |
cdd6c482 IM |
585 | * tstamp_enabled: the notional time when the event was enabled |
586 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 587 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 588 | * event was scheduled off. |
53cfbf59 PM |
589 | */ |
590 | u64 tstamp_enabled; | |
591 | u64 tstamp_running; | |
592 | u64 tstamp_stopped; | |
593 | ||
eed01528 SE |
594 | /* |
595 | * timestamp shadows the actual context timing but it can | |
596 | * be safely used in NMI interrupt context. It reflects the | |
597 | * context time as it was when the event was last scheduled in. | |
598 | * | |
599 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
600 | * compute ctx_time for a sample, simply add perf_clock(). | |
601 | */ | |
602 | u64 shadow_ctx_time; | |
603 | ||
24f1e32c | 604 | struct perf_event_attr attr; |
c320c7b7 | 605 | u16 header_size; |
6844c09d | 606 | u16 id_header_size; |
c320c7b7 | 607 | u16 read_size; |
cdd6c482 | 608 | struct hw_perf_event hw; |
0793a61d | 609 | |
cdd6c482 | 610 | struct perf_event_context *ctx; |
a6fa941d | 611 | atomic_long_t refcount; |
0793a61d | 612 | |
53cfbf59 PM |
613 | /* |
614 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 615 | * events have been enabled and running, respectively. |
53cfbf59 PM |
616 | */ |
617 | atomic64_t child_total_time_enabled; | |
618 | atomic64_t child_total_time_running; | |
619 | ||
0793a61d | 620 | /* |
d859e29f | 621 | * Protect attach/detach and child_list: |
0793a61d | 622 | */ |
fccc714b PZ |
623 | struct mutex child_mutex; |
624 | struct list_head child_list; | |
cdd6c482 | 625 | struct perf_event *parent; |
0793a61d TG |
626 | |
627 | int oncpu; | |
628 | int cpu; | |
629 | ||
082ff5a2 PZ |
630 | struct list_head owner_entry; |
631 | struct task_struct *owner; | |
632 | ||
7b732a75 PZ |
633 | /* mmap bits */ |
634 | struct mutex mmap_mutex; | |
635 | atomic_t mmap_count; | |
26cb63ad | 636 | |
76369139 | 637 | struct ring_buffer *rb; |
10c6db11 | 638 | struct list_head rb_entry; |
b69cf536 PZ |
639 | unsigned long rcu_batches; |
640 | int rcu_pending; | |
37d81828 | 641 | |
7b732a75 | 642 | /* poll related */ |
0793a61d | 643 | wait_queue_head_t waitq; |
3c446b3d | 644 | struct fasync_struct *fasync; |
79f14641 PZ |
645 | |
646 | /* delayed work for NMIs and such */ | |
647 | int pending_wakeup; | |
4c9e2542 | 648 | int pending_kill; |
79f14641 | 649 | int pending_disable; |
e360adbe | 650 | struct irq_work pending; |
592903cd | 651 | |
79f14641 PZ |
652 | atomic_t event_limit; |
653 | ||
375637bc AS |
654 | /* address range filters */ |
655 | struct perf_addr_filters_head addr_filters; | |
656 | /* vma address array for file-based filders */ | |
657 | unsigned long *addr_filters_offs; | |
658 | unsigned long addr_filters_gen; | |
659 | ||
cdd6c482 | 660 | void (*destroy)(struct perf_event *); |
592903cd | 661 | struct rcu_head rcu_head; |
709e50cf PZ |
662 | |
663 | struct pid_namespace *ns; | |
8e5799b1 | 664 | u64 id; |
6fb2915d | 665 | |
34f43927 | 666 | u64 (*clock)(void); |
b326e956 | 667 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 668 | void *overflow_handler_context; |
453f19ee | 669 | |
07b139c8 | 670 | #ifdef CONFIG_EVENT_TRACING |
2425bcb9 | 671 | struct trace_event_call *tp_event; |
6fb2915d | 672 | struct event_filter *filter; |
ced39002 JO |
673 | #ifdef CONFIG_FUNCTION_TRACER |
674 | struct ftrace_ops ftrace_ops; | |
675 | #endif | |
ee06094f | 676 | #endif |
6fb2915d | 677 | |
e5d1367f SE |
678 | #ifdef CONFIG_CGROUP_PERF |
679 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
680 | int cgrp_defer_enabled; | |
681 | #endif | |
682 | ||
f2fb6bef | 683 | struct list_head sb_list; |
6fb2915d | 684 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
685 | }; |
686 | ||
687 | /** | |
cdd6c482 | 688 | * struct perf_event_context - event context structure |
0793a61d | 689 | * |
cdd6c482 | 690 | * Used as a container for task events and CPU events as well: |
0793a61d | 691 | */ |
cdd6c482 | 692 | struct perf_event_context { |
108b02cf | 693 | struct pmu *pmu; |
0793a61d | 694 | /* |
cdd6c482 | 695 | * Protect the states of the events in the list, |
d859e29f | 696 | * nr_active, and the list: |
0793a61d | 697 | */ |
e625cce1 | 698 | raw_spinlock_t lock; |
d859e29f | 699 | /* |
cdd6c482 | 700 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
701 | * is sufficient to ensure the list doesn't change; to change |
702 | * the list you need to lock both the mutex and the spinlock. | |
703 | */ | |
a308444c | 704 | struct mutex mutex; |
04289bb9 | 705 | |
2fde4f94 | 706 | struct list_head active_ctx_list; |
889ff015 FW |
707 | struct list_head pinned_groups; |
708 | struct list_head flexible_groups; | |
a308444c | 709 | struct list_head event_list; |
cdd6c482 | 710 | int nr_events; |
a308444c IM |
711 | int nr_active; |
712 | int is_active; | |
bfbd3381 | 713 | int nr_stat; |
0f5a2601 | 714 | int nr_freq; |
dddd3379 | 715 | int rotate_disable; |
a308444c IM |
716 | atomic_t refcount; |
717 | struct task_struct *task; | |
53cfbf59 PM |
718 | |
719 | /* | |
4af4998b | 720 | * Context clock, runs when context enabled. |
53cfbf59 | 721 | */ |
a308444c IM |
722 | u64 time; |
723 | u64 timestamp; | |
564c2b21 PM |
724 | |
725 | /* | |
726 | * These fields let us detect when two contexts have both | |
727 | * been cloned (inherited) from a common ancestor. | |
728 | */ | |
cdd6c482 | 729 | struct perf_event_context *parent_ctx; |
a308444c IM |
730 | u64 parent_gen; |
731 | u64 generation; | |
732 | int pin_count; | |
d010b332 | 733 | int nr_cgroups; /* cgroup evts */ |
4af57ef2 | 734 | void *task_ctx_data; /* pmu specific data */ |
28009ce4 | 735 | struct rcu_head rcu_head; |
0793a61d TG |
736 | }; |
737 | ||
7ae07ea3 FW |
738 | /* |
739 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 740 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
741 | */ |
742 | #define PERF_NR_CONTEXTS 4 | |
743 | ||
0793a61d | 744 | /** |
cdd6c482 | 745 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
746 | */ |
747 | struct perf_cpu_context { | |
cdd6c482 IM |
748 | struct perf_event_context ctx; |
749 | struct perf_event_context *task_ctx; | |
0793a61d | 750 | int active_oncpu; |
3b6f9e5c | 751 | int exclusive; |
4cfafd30 PZ |
752 | |
753 | raw_spinlock_t hrtimer_lock; | |
9e630205 SE |
754 | struct hrtimer hrtimer; |
755 | ktime_t hrtimer_interval; | |
4cfafd30 PZ |
756 | unsigned int hrtimer_active; |
757 | ||
3f1f3320 | 758 | struct pmu *unique_pmu; |
e5d1367f | 759 | struct perf_cgroup *cgrp; |
0793a61d TG |
760 | }; |
761 | ||
5622f295 | 762 | struct perf_output_handle { |
57c0c15b | 763 | struct perf_event *event; |
76369139 | 764 | struct ring_buffer *rb; |
6d1acfd5 | 765 | unsigned long wakeup; |
5d967a8b | 766 | unsigned long size; |
fdc26706 AS |
767 | union { |
768 | void *addr; | |
769 | unsigned long head; | |
770 | }; | |
5d967a8b | 771 | int page; |
5622f295 MM |
772 | }; |
773 | ||
39bed6cb MF |
774 | #ifdef CONFIG_CGROUP_PERF |
775 | ||
776 | /* | |
777 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
778 | * This is a per-cpu dynamically allocated data structure. | |
779 | */ | |
780 | struct perf_cgroup_info { | |
781 | u64 time; | |
782 | u64 timestamp; | |
783 | }; | |
784 | ||
785 | struct perf_cgroup { | |
786 | struct cgroup_subsys_state css; | |
787 | struct perf_cgroup_info __percpu *info; | |
788 | }; | |
789 | ||
790 | /* | |
791 | * Must ensure cgroup is pinned (css_get) before calling | |
792 | * this function. In other words, we cannot call this function | |
793 | * if there is no cgroup event for the current CPU context. | |
794 | */ | |
795 | static inline struct perf_cgroup * | |
614e4c4e | 796 | perf_cgroup_from_task(struct task_struct *task, struct perf_event_context *ctx) |
39bed6cb | 797 | { |
614e4c4e SE |
798 | return container_of(task_css_check(task, perf_event_cgrp_id, |
799 | ctx ? lockdep_is_held(&ctx->lock) | |
800 | : true), | |
39bed6cb MF |
801 | struct perf_cgroup, css); |
802 | } | |
803 | #endif /* CONFIG_CGROUP_PERF */ | |
804 | ||
cdd6c482 | 805 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 806 | |
fdc26706 AS |
807 | extern void *perf_aux_output_begin(struct perf_output_handle *handle, |
808 | struct perf_event *event); | |
809 | extern void perf_aux_output_end(struct perf_output_handle *handle, | |
810 | unsigned long size, bool truncated); | |
811 | extern int perf_aux_output_skip(struct perf_output_handle *handle, | |
812 | unsigned long size); | |
813 | extern void *perf_get_aux(struct perf_output_handle *handle); | |
814 | ||
03d8e80b | 815 | extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); |
b0a873eb | 816 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 817 | |
3bf101ba | 818 | extern int perf_num_counters(void); |
84c79910 | 819 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
820 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
821 | struct task_struct *task); | |
822 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
823 | struct task_struct *next); | |
cdd6c482 IM |
824 | extern int perf_event_init_task(struct task_struct *child); |
825 | extern void perf_event_exit_task(struct task_struct *child); | |
826 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 827 | extern void perf_event_delayed_put(struct task_struct *task); |
e03e7ee3 | 828 | extern struct file *perf_event_get(unsigned int fd); |
ffe8690c | 829 | extern const struct perf_event_attr *perf_event_attrs(struct perf_event *event); |
cdd6c482 | 830 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
831 | extern void perf_pmu_disable(struct pmu *pmu); |
832 | extern void perf_pmu_enable(struct pmu *pmu); | |
ba532500 YZ |
833 | extern void perf_sched_cb_dec(struct pmu *pmu); |
834 | extern void perf_sched_cb_inc(struct pmu *pmu); | |
cdd6c482 IM |
835 | extern int perf_event_task_disable(void); |
836 | extern int perf_event_task_enable(void); | |
26ca5c11 | 837 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 838 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
839 | extern int perf_event_release_kernel(struct perf_event *event); |
840 | extern struct perf_event * | |
841 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
842 | int cpu, | |
38a81da2 | 843 | struct task_struct *task, |
4dc0da86 AK |
844 | perf_overflow_handler_t callback, |
845 | void *context); | |
0cda4c02 YZ |
846 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
847 | int src_cpu, int dst_cpu); | |
ffe8690c | 848 | extern u64 perf_event_read_local(struct perf_event *event); |
59ed446f PZ |
849 | extern u64 perf_event_read_value(struct perf_event *event, |
850 | u64 *enabled, u64 *running); | |
5c92d124 | 851 | |
d010b332 | 852 | |
df1a132b | 853 | struct perf_sample_data { |
2565711f PZ |
854 | /* |
855 | * Fields set by perf_sample_data_init(), group so as to | |
856 | * minimize the cachelines touched. | |
857 | */ | |
858 | u64 addr; | |
859 | struct perf_raw_record *raw; | |
860 | struct perf_branch_stack *br_stack; | |
861 | u64 period; | |
862 | u64 weight; | |
863 | u64 txn; | |
864 | union perf_mem_data_src data_src; | |
5622f295 | 865 | |
2565711f PZ |
866 | /* |
867 | * The other fields, optionally {set,used} by | |
868 | * perf_{prepare,output}_sample(). | |
869 | */ | |
870 | u64 type; | |
5622f295 MM |
871 | u64 ip; |
872 | struct { | |
873 | u32 pid; | |
874 | u32 tid; | |
875 | } tid_entry; | |
876 | u64 time; | |
5622f295 MM |
877 | u64 id; |
878 | u64 stream_id; | |
879 | struct { | |
880 | u32 cpu; | |
881 | u32 reserved; | |
882 | } cpu_entry; | |
5622f295 | 883 | struct perf_callchain_entry *callchain; |
88a7c26a AL |
884 | |
885 | /* | |
886 | * regs_user may point to task_pt_regs or to regs_user_copy, depending | |
887 | * on arch details. | |
888 | */ | |
60e2364e | 889 | struct perf_regs regs_user; |
88a7c26a AL |
890 | struct pt_regs regs_user_copy; |
891 | ||
60e2364e | 892 | struct perf_regs regs_intr; |
c5ebcedb | 893 | u64 stack_user_size; |
2565711f | 894 | } ____cacheline_aligned; |
df1a132b | 895 | |
770eee1f SE |
896 | /* default value for data source */ |
897 | #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ | |
898 | PERF_MEM_S(LVL, NA) |\ | |
899 | PERF_MEM_S(SNOOP, NA) |\ | |
900 | PERF_MEM_S(LOCK, NA) |\ | |
901 | PERF_MEM_S(TLB, NA)) | |
902 | ||
fd0d000b RR |
903 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
904 | u64 addr, u64 period) | |
dc1d628a | 905 | { |
fd0d000b | 906 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
907 | data->addr = addr; |
908 | data->raw = NULL; | |
bce38cd5 | 909 | data->br_stack = NULL; |
4018994f | 910 | data->period = period; |
c3feedf2 | 911 | data->weight = 0; |
770eee1f | 912 | data->data_src.val = PERF_MEM_NA; |
fdfbbd07 | 913 | data->txn = 0; |
dc1d628a PZ |
914 | } |
915 | ||
5622f295 MM |
916 | extern void perf_output_sample(struct perf_output_handle *handle, |
917 | struct perf_event_header *header, | |
918 | struct perf_sample_data *data, | |
cdd6c482 | 919 | struct perf_event *event); |
5622f295 MM |
920 | extern void perf_prepare_sample(struct perf_event_header *header, |
921 | struct perf_sample_data *data, | |
cdd6c482 | 922 | struct perf_event *event, |
5622f295 MM |
923 | struct pt_regs *regs); |
924 | ||
a8b0ca17 | 925 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
926 | struct perf_sample_data *data, |
927 | struct pt_regs *regs); | |
df1a132b | 928 | |
9ecda41a WN |
929 | extern void perf_event_output_forward(struct perf_event *event, |
930 | struct perf_sample_data *data, | |
931 | struct pt_regs *regs); | |
932 | extern void perf_event_output_backward(struct perf_event *event, | |
933 | struct perf_sample_data *data, | |
934 | struct pt_regs *regs); | |
21509084 | 935 | extern void perf_event_output(struct perf_event *event, |
9ecda41a WN |
936 | struct perf_sample_data *data, |
937 | struct pt_regs *regs); | |
21509084 | 938 | |
1879445d WN |
939 | static inline bool |
940 | is_default_overflow_handler(struct perf_event *event) | |
941 | { | |
9ecda41a WN |
942 | if (likely(event->overflow_handler == perf_event_output_forward)) |
943 | return true; | |
944 | if (unlikely(event->overflow_handler == perf_event_output_backward)) | |
945 | return true; | |
946 | return false; | |
1879445d WN |
947 | } |
948 | ||
21509084 YZ |
949 | extern void |
950 | perf_event_header__init_id(struct perf_event_header *header, | |
951 | struct perf_sample_data *data, | |
952 | struct perf_event *event); | |
953 | extern void | |
954 | perf_event__output_id_sample(struct perf_event *event, | |
955 | struct perf_output_handle *handle, | |
956 | struct perf_sample_data *sample); | |
957 | ||
f38b0dbb KL |
958 | extern void |
959 | perf_log_lost_samples(struct perf_event *event, u64 lost); | |
960 | ||
6c7e550f FBH |
961 | static inline bool is_sampling_event(struct perf_event *event) |
962 | { | |
963 | return event->attr.sample_period != 0; | |
964 | } | |
965 | ||
3b6f9e5c | 966 | /* |
cdd6c482 | 967 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 968 | */ |
cdd6c482 | 969 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 970 | { |
89a1e187 | 971 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
972 | } |
973 | ||
c5905afb | 974 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 975 | |
86038c5e | 976 | extern void ___perf_sw_event(u32, u64, struct pt_regs *, u64); |
a8b0ca17 | 977 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 978 | |
b0f82b81 | 979 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 980 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 981 | #endif |
5331d7b8 FW |
982 | |
983 | /* | |
984 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
985 | * the nth caller. We only need a few of the regs: | |
986 | * - ip for PERF_SAMPLE_IP | |
987 | * - cs for user_mode() tests | |
988 | * - bp for callchains | |
989 | * - eflags, for future purposes, just in case | |
990 | */ | |
b0f82b81 | 991 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 992 | { |
5331d7b8 FW |
993 | memset(regs, 0, sizeof(*regs)); |
994 | ||
b0f82b81 | 995 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
996 | } |
997 | ||
7e54a5a0 | 998 | static __always_inline void |
a8b0ca17 | 999 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1000 | { |
86038c5e PZI |
1001 | if (static_key_false(&perf_swevent_enabled[event_id])) |
1002 | __perf_sw_event(event_id, nr, regs, addr); | |
1003 | } | |
1004 | ||
1005 | DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]); | |
7e54a5a0 | 1006 | |
86038c5e PZI |
1007 | /* |
1008 | * 'Special' version for the scheduler, it hard assumes no recursion, | |
1009 | * which is guaranteed by us not actually scheduling inside other swevents | |
1010 | * because those disable preemption. | |
1011 | */ | |
1012 | static __always_inline void | |
1013 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) | |
1014 | { | |
c5905afb | 1015 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
86038c5e PZI |
1016 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); |
1017 | ||
1018 | perf_fetch_caller_regs(regs); | |
1019 | ___perf_sw_event(event_id, nr, regs, addr); | |
e49a5bd3 FW |
1020 | } |
1021 | } | |
1022 | ||
9107c89e | 1023 | extern struct static_key_false perf_sched_events; |
ee6dcfa4 | 1024 | |
ff303e66 PZ |
1025 | static __always_inline bool |
1026 | perf_sw_migrate_enabled(void) | |
1027 | { | |
1028 | if (static_key_false(&perf_swevent_enabled[PERF_COUNT_SW_CPU_MIGRATIONS])) | |
1029 | return true; | |
1030 | return false; | |
1031 | } | |
1032 | ||
1033 | static inline void perf_event_task_migrate(struct task_struct *task) | |
1034 | { | |
1035 | if (perf_sw_migrate_enabled()) | |
1036 | task->sched_migrated = 1; | |
1037 | } | |
1038 | ||
ab0cce56 | 1039 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 1040 | struct task_struct *task) |
ab0cce56 | 1041 | { |
9107c89e | 1042 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1043 | __perf_event_task_sched_in(prev, task); |
ff303e66 PZ |
1044 | |
1045 | if (perf_sw_migrate_enabled() && task->sched_migrated) { | |
1046 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); | |
1047 | ||
1048 | perf_fetch_caller_regs(regs); | |
1049 | ___perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, regs, 0); | |
1050 | task->sched_migrated = 0; | |
1051 | } | |
ab0cce56 JO |
1052 | } |
1053 | ||
1054 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
1055 | struct task_struct *next) | |
ee6dcfa4 | 1056 | { |
86038c5e | 1057 | perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0); |
ee6dcfa4 | 1058 | |
9107c89e | 1059 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1060 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1061 | } |
1062 | ||
eacd3ecc MF |
1063 | static inline u64 __perf_event_count(struct perf_event *event) |
1064 | { | |
1065 | return local64_read(&event->count) + atomic64_read(&event->child_count); | |
1066 | } | |
1067 | ||
3af9e859 | 1068 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1069 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1070 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1071 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1072 | |
e041e328 | 1073 | extern void perf_event_exec(void); |
82b89778 | 1074 | extern void perf_event_comm(struct task_struct *tsk, bool exec); |
cdd6c482 | 1075 | extern void perf_event_fork(struct task_struct *tsk); |
8d1b2d93 | 1076 | |
56962b44 FW |
1077 | /* Callchains */ |
1078 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1079 | ||
cfbcf468 ACM |
1080 | extern void perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); |
1081 | extern void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); | |
568b329a AS |
1082 | extern struct perf_callchain_entry * |
1083 | get_perf_callchain(struct pt_regs *regs, u32 init_nr, bool kernel, bool user, | |
cfbcf468 | 1084 | u32 max_stack, bool crosstask, bool add_mark); |
97c79a38 | 1085 | extern int get_callchain_buffers(int max_stack); |
568b329a | 1086 | extern void put_callchain_buffers(void); |
394ee076 | 1087 | |
c5dfd78e | 1088 | extern int sysctl_perf_event_max_stack; |
c85b0334 | 1089 | extern int sysctl_perf_event_max_contexts_per_stack; |
c5dfd78e | 1090 | |
c85b0334 ACM |
1091 | static inline int perf_callchain_store_context(struct perf_callchain_entry_ctx *ctx, u64 ip) |
1092 | { | |
1093 | if (ctx->contexts < sysctl_perf_event_max_contexts_per_stack) { | |
1094 | struct perf_callchain_entry *entry = ctx->entry; | |
1095 | entry->ip[entry->nr++] = ip; | |
1096 | ++ctx->contexts; | |
1097 | return 0; | |
1098 | } else { | |
1099 | ctx->contexts_maxed = true; | |
1100 | return -1; /* no more room, stop walking the stack */ | |
1101 | } | |
1102 | } | |
3e4de4ec | 1103 | |
cfbcf468 | 1104 | static inline int perf_callchain_store(struct perf_callchain_entry_ctx *ctx, u64 ip) |
70791ce9 | 1105 | { |
c85b0334 | 1106 | if (ctx->nr < ctx->max_stack && !ctx->contexts_maxed) { |
3b1fff08 | 1107 | struct perf_callchain_entry *entry = ctx->entry; |
70791ce9 | 1108 | entry->ip[entry->nr++] = ip; |
3b1fff08 | 1109 | ++ctx->nr; |
568b329a AS |
1110 | return 0; |
1111 | } else { | |
1112 | return -1; /* no more room, stop walking the stack */ | |
1113 | } | |
70791ce9 | 1114 | } |
394ee076 | 1115 | |
cdd6c482 IM |
1116 | extern int sysctl_perf_event_paranoid; |
1117 | extern int sysctl_perf_event_mlock; | |
1118 | extern int sysctl_perf_event_sample_rate; | |
14c63f17 DH |
1119 | extern int sysctl_perf_cpu_time_max_percent; |
1120 | ||
1121 | extern void perf_sample_event_took(u64 sample_len_ns); | |
1ccd1549 | 1122 | |
163ec435 PZ |
1123 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1124 | void __user *buffer, size_t *lenp, | |
1125 | loff_t *ppos); | |
14c63f17 DH |
1126 | extern int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, |
1127 | void __user *buffer, size_t *lenp, | |
1128 | loff_t *ppos); | |
1129 | ||
c5dfd78e ACM |
1130 | int perf_event_max_stack_handler(struct ctl_table *table, int write, |
1131 | void __user *buffer, size_t *lenp, loff_t *ppos); | |
163ec435 | 1132 | |
320ebf09 PZ |
1133 | static inline bool perf_paranoid_tracepoint_raw(void) |
1134 | { | |
1135 | return sysctl_perf_event_paranoid > -1; | |
1136 | } | |
1137 | ||
1138 | static inline bool perf_paranoid_cpu(void) | |
1139 | { | |
1140 | return sysctl_perf_event_paranoid > 0; | |
1141 | } | |
1142 | ||
1143 | static inline bool perf_paranoid_kernel(void) | |
1144 | { | |
1145 | return sysctl_perf_event_paranoid > 1; | |
1146 | } | |
1147 | ||
cdd6c482 | 1148 | extern void perf_event_init(void); |
1c024eca PZ |
1149 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1150 | int entry_size, struct pt_regs *regs, | |
e6dab5ff AV |
1151 | struct hlist_head *head, int rctx, |
1152 | struct task_struct *task); | |
24f1e32c | 1153 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1154 | |
9d23a90a | 1155 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1156 | # define perf_misc_flags(regs) \ |
1157 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1158 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1159 | #endif |
1160 | ||
bce38cd5 SE |
1161 | static inline bool has_branch_stack(struct perf_event *event) |
1162 | { | |
1163 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
a46a2300 YZ |
1164 | } |
1165 | ||
1166 | static inline bool needs_branch_stack(struct perf_event *event) | |
1167 | { | |
1168 | return event->attr.branch_sample_type != 0; | |
bce38cd5 SE |
1169 | } |
1170 | ||
45bfb2e5 PZ |
1171 | static inline bool has_aux(struct perf_event *event) |
1172 | { | |
1173 | return event->pmu->setup_aux; | |
1174 | } | |
1175 | ||
9ecda41a WN |
1176 | static inline bool is_write_backward(struct perf_event *event) |
1177 | { | |
1178 | return !!event->attr.write_backward; | |
1179 | } | |
1180 | ||
375637bc AS |
1181 | static inline bool has_addr_filter(struct perf_event *event) |
1182 | { | |
1183 | return event->pmu->nr_addr_filters; | |
1184 | } | |
1185 | ||
1186 | /* | |
1187 | * An inherited event uses parent's filters | |
1188 | */ | |
1189 | static inline struct perf_addr_filters_head * | |
1190 | perf_event_addr_filters(struct perf_event *event) | |
1191 | { | |
1192 | struct perf_addr_filters_head *ifh = &event->addr_filters; | |
1193 | ||
1194 | if (event->parent) | |
1195 | ifh = &event->parent->addr_filters; | |
1196 | ||
1197 | return ifh; | |
1198 | } | |
1199 | ||
1200 | extern void perf_event_addr_filters_sync(struct perf_event *event); | |
1201 | ||
5622f295 | 1202 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1203 | struct perf_event *event, unsigned int size); |
9ecda41a WN |
1204 | extern int perf_output_begin_forward(struct perf_output_handle *handle, |
1205 | struct perf_event *event, | |
1206 | unsigned int size); | |
1207 | extern int perf_output_begin_backward(struct perf_output_handle *handle, | |
1208 | struct perf_event *event, | |
1209 | unsigned int size); | |
1210 | ||
5622f295 | 1211 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 1212 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 1213 | const void *buf, unsigned int len); |
5685e0ff JO |
1214 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
1215 | unsigned int len); | |
4ed7c92d PZ |
1216 | extern int perf_swevent_get_recursion_context(void); |
1217 | extern void perf_swevent_put_recursion_context(int rctx); | |
ab573844 | 1218 | extern u64 perf_swevent_set_period(struct perf_event *event); |
44234adc FW |
1219 | extern void perf_event_enable(struct perf_event *event); |
1220 | extern void perf_event_disable(struct perf_event *event); | |
fae3fde6 | 1221 | extern void perf_event_disable_local(struct perf_event *event); |
e9d2b064 | 1222 | extern void perf_event_task_tick(void); |
e041e328 | 1223 | #else /* !CONFIG_PERF_EVENTS: */ |
fdc26706 AS |
1224 | static inline void * |
1225 | perf_aux_output_begin(struct perf_output_handle *handle, | |
1226 | struct perf_event *event) { return NULL; } | |
1227 | static inline void | |
1228 | perf_aux_output_end(struct perf_output_handle *handle, unsigned long size, | |
1229 | bool truncated) { } | |
1230 | static inline int | |
1231 | perf_aux_output_skip(struct perf_output_handle *handle, | |
1232 | unsigned long size) { return -EINVAL; } | |
1233 | static inline void * | |
1234 | perf_get_aux(struct perf_output_handle *handle) { return NULL; } | |
0793a61d | 1235 | static inline void |
ff303e66 PZ |
1236 | perf_event_task_migrate(struct task_struct *task) { } |
1237 | static inline void | |
ab0cce56 JO |
1238 | perf_event_task_sched_in(struct task_struct *prev, |
1239 | struct task_struct *task) { } | |
1240 | static inline void | |
1241 | perf_event_task_sched_out(struct task_struct *prev, | |
1242 | struct task_struct *next) { } | |
cdd6c482 IM |
1243 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1244 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1245 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1246 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
e03e7ee3 | 1247 | static inline struct file *perf_event_get(unsigned int fd) { return ERR_PTR(-EINVAL); } |
ffe8690c KX |
1248 | static inline const struct perf_event_attr *perf_event_attrs(struct perf_event *event) |
1249 | { | |
1250 | return ERR_PTR(-EINVAL); | |
1251 | } | |
1252 | static inline u64 perf_event_read_local(struct perf_event *event) { return -EINVAL; } | |
57c0c15b | 1253 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1254 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1255 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1256 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1257 | { | |
1258 | return -EINVAL; | |
1259 | } | |
15dbf27c | 1260 | |
925d519a | 1261 | static inline void |
a8b0ca17 | 1262 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1263 | static inline void |
86038c5e PZI |
1264 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) { } |
1265 | static inline void | |
184f412c | 1266 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1267 | |
39447b38 | 1268 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1269 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1270 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1271 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1272 | |
57c0c15b | 1273 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
e041e328 | 1274 | static inline void perf_event_exec(void) { } |
82b89778 | 1275 | static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } |
cdd6c482 IM |
1276 | static inline void perf_event_fork(struct task_struct *tsk) { } |
1277 | static inline void perf_event_init(void) { } | |
184f412c | 1278 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1279 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
ab573844 | 1280 | static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } |
44234adc FW |
1281 | static inline void perf_event_enable(struct perf_event *event) { } |
1282 | static inline void perf_event_disable(struct perf_event *event) { } | |
500ad2d8 | 1283 | static inline int __perf_event_disable(void *info) { return -1; } |
e9d2b064 | 1284 | static inline void perf_event_task_tick(void) { } |
ffe8690c | 1285 | static inline int perf_event_release_kernel(struct perf_event *event) { return 0; } |
0793a61d TG |
1286 | #endif |
1287 | ||
6c4d3bc9 DR |
1288 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) |
1289 | extern void perf_restore_debug_store(void); | |
1290 | #else | |
1d9d8639 | 1291 | static inline void perf_restore_debug_store(void) { } |
0793a61d TG |
1292 | #endif |
1293 | ||
e7e7ee2e | 1294 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1295 | |
3f6da390 | 1296 | /* |
0a0fca9d | 1297 | * This has to have a higher priority than migration_notifier in sched/core.c. |
3f6da390 | 1298 | */ |
e7e7ee2e IM |
1299 | #define perf_cpu_notifier(fn) \ |
1300 | do { \ | |
0db0628d | 1301 | static struct notifier_block fn##_nb = \ |
e7e7ee2e | 1302 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ |
c13d38e4 | 1303 | unsigned long cpu = smp_processor_id(); \ |
6760bca9 | 1304 | unsigned long flags; \ |
f0bdb5e0 SB |
1305 | \ |
1306 | cpu_notifier_register_begin(); \ | |
e7e7ee2e | 1307 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ |
c13d38e4 | 1308 | (void *)(unsigned long)cpu); \ |
6760bca9 | 1309 | local_irq_save(flags); \ |
e7e7ee2e | 1310 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ |
c13d38e4 | 1311 | (void *)(unsigned long)cpu); \ |
6760bca9 | 1312 | local_irq_restore(flags); \ |
e7e7ee2e | 1313 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ |
c13d38e4 | 1314 | (void *)(unsigned long)cpu); \ |
f0bdb5e0 SB |
1315 | __register_cpu_notifier(&fn##_nb); \ |
1316 | cpu_notifier_register_done(); \ | |
3f6da390 PZ |
1317 | } while (0) |
1318 | ||
f0bdb5e0 SB |
1319 | /* |
1320 | * Bare-bones version of perf_cpu_notifier(), which doesn't invoke the | |
1321 | * callback for already online CPUs. | |
1322 | */ | |
1323 | #define __perf_cpu_notifier(fn) \ | |
1324 | do { \ | |
1325 | static struct notifier_block fn##_nb = \ | |
1326 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
1327 | \ | |
1328 | __register_cpu_notifier(&fn##_nb); \ | |
1329 | } while (0) | |
641cc938 | 1330 | |
2663960c SB |
1331 | struct perf_pmu_events_attr { |
1332 | struct device_attribute attr; | |
1333 | u64 id; | |
3a54aaa0 | 1334 | const char *event_str; |
2663960c SB |
1335 | }; |
1336 | ||
fd979c01 CS |
1337 | ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr, |
1338 | char *page); | |
1339 | ||
2663960c SB |
1340 | #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ |
1341 | static struct perf_pmu_events_attr _var = { \ | |
1342 | .attr = __ATTR(_name, 0444, _show, NULL), \ | |
1343 | .id = _id, \ | |
1344 | }; | |
1345 | ||
f0405b81 CS |
1346 | #define PMU_EVENT_ATTR_STRING(_name, _var, _str) \ |
1347 | static struct perf_pmu_events_attr _var = { \ | |
1348 | .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \ | |
1349 | .id = 0, \ | |
1350 | .event_str = _str, \ | |
1351 | }; | |
1352 | ||
641cc938 JO |
1353 | #define PMU_FORMAT_ATTR(_name, _format) \ |
1354 | static ssize_t \ | |
1355 | _name##_show(struct device *dev, \ | |
1356 | struct device_attribute *attr, \ | |
1357 | char *page) \ | |
1358 | { \ | |
1359 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1360 | return sprintf(page, _format "\n"); \ | |
1361 | } \ | |
1362 | \ | |
1363 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1364 | ||
cdd6c482 | 1365 | #endif /* _LINUX_PERF_EVENT_H */ |