perf tools: Adjust make rules
[deliverable/linux.git] / include / linux / perf_event.h
CommitLineData
0793a61d 1/*
57c0c15b 2 * Performance events:
0793a61d 3 *
a308444c 4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
e7e7ee2e
IM
5 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
0793a61d 7 *
57c0c15b 8 * Data type definitions, declarations, prototypes.
0793a61d 9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
0793a61d 11 *
57c0c15b 12 * For licencing details see kernel-base/COPYING
0793a61d 13 */
cdd6c482
IM
14#ifndef _LINUX_PERF_EVENT_H
15#define _LINUX_PERF_EVENT_H
0793a61d 16
f3dfd265
PM
17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
0793a61d
TG
20
21/*
9f66a381
IM
22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
a308444c
IM
29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
24f1e32c 34 PERF_TYPE_BREAKPOINT = 5,
b8e83514 35
a308444c 36 PERF_TYPE_MAX, /* non-ABI */
b8e83514 37};
6c594c21 38
b8e83514 39/*
cdd6c482
IM
40 * Generalized performance event event_id types, used by the
41 * attr.event_id parameter of the sys_perf_event_open()
a308444c 42 * syscall:
b8e83514 43 */
1c432d89 44enum perf_hw_id {
9f66a381 45 /*
b8e83514 46 * Common hardware events, generalized by the kernel:
9f66a381 47 */
f4dbfa8f
PZ
48 PERF_COUNT_HW_CPU_CYCLES = 0,
49 PERF_COUNT_HW_INSTRUCTIONS = 1,
50 PERF_COUNT_HW_CACHE_REFERENCES = 2,
51 PERF_COUNT_HW_CACHE_MISSES = 3,
52 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
53 PERF_COUNT_HW_BRANCH_MISSES = 5,
54 PERF_COUNT_HW_BUS_CYCLES = 6,
8f622422
IM
55 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7,
56 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8,
c37e1749 57 PERF_COUNT_HW_REF_CPU_CYCLES = 9,
f4dbfa8f 58
a308444c 59 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 60};
e077df4f 61
8326f44d 62/*
cdd6c482 63 * Generalized hardware cache events:
8326f44d 64 *
89d6c0b5 65 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
8326f44d
IM
66 * { read, write, prefetch } x
67 * { accesses, misses }
68 */
1c432d89 69enum perf_hw_cache_id {
a308444c
IM
70 PERF_COUNT_HW_CACHE_L1D = 0,
71 PERF_COUNT_HW_CACHE_L1I = 1,
72 PERF_COUNT_HW_CACHE_LL = 2,
73 PERF_COUNT_HW_CACHE_DTLB = 3,
74 PERF_COUNT_HW_CACHE_ITLB = 4,
75 PERF_COUNT_HW_CACHE_BPU = 5,
89d6c0b5 76 PERF_COUNT_HW_CACHE_NODE = 6,
a308444c
IM
77
78 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
8326f44d
IM
79};
80
1c432d89 81enum perf_hw_cache_op_id {
a308444c
IM
82 PERF_COUNT_HW_CACHE_OP_READ = 0,
83 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
84 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 85
a308444c 86 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
8326f44d
IM
87};
88
1c432d89
PZ
89enum perf_hw_cache_op_result_id {
90 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
91 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 92
a308444c 93 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
8326f44d
IM
94};
95
b8e83514 96/*
cdd6c482
IM
97 * Special "software" events provided by the kernel, even if the hardware
98 * does not support performance events. These events measure various
b8e83514
PZ
99 * physical and sw events of the kernel (and allow the profiling of them as
100 * well):
101 */
1c432d89 102enum perf_sw_ids {
a308444c
IM
103 PERF_COUNT_SW_CPU_CLOCK = 0,
104 PERF_COUNT_SW_TASK_CLOCK = 1,
105 PERF_COUNT_SW_PAGE_FAULTS = 2,
106 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
107 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
108 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
109 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
f7d79860
AB
110 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
111 PERF_COUNT_SW_EMULATION_FAULTS = 8,
a308444c
IM
112
113 PERF_COUNT_SW_MAX, /* non-ABI */
0793a61d
TG
114};
115
8a057d84 116/*
0d48696f 117 * Bits that can be set in attr.sample_type to request information
8a057d84
PZ
118 * in the overflow packets.
119 */
cdd6c482 120enum perf_event_sample_format {
a308444c
IM
121 PERF_SAMPLE_IP = 1U << 0,
122 PERF_SAMPLE_TID = 1U << 1,
123 PERF_SAMPLE_TIME = 1U << 2,
124 PERF_SAMPLE_ADDR = 1U << 3,
3dab77fb 125 PERF_SAMPLE_READ = 1U << 4,
a308444c
IM
126 PERF_SAMPLE_CALLCHAIN = 1U << 5,
127 PERF_SAMPLE_ID = 1U << 6,
128 PERF_SAMPLE_CPU = 1U << 7,
129 PERF_SAMPLE_PERIOD = 1U << 8,
7f453c24 130 PERF_SAMPLE_STREAM_ID = 1U << 9,
3a43ce68 131 PERF_SAMPLE_RAW = 1U << 10,
bce38cd5 132 PERF_SAMPLE_BRANCH_STACK = 1U << 11,
974802ea 133
bce38cd5 134 PERF_SAMPLE_MAX = 1U << 12, /* non-ABI */
8a057d84
PZ
135};
136
bce38cd5
SE
137/*
138 * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
139 *
140 * If the user does not pass priv level information via branch_sample_type,
141 * the kernel uses the event's priv level. Branch and event priv levels do
142 * not have to match. Branch priv level is checked for permissions.
143 *
144 * The branch types can be combined, however BRANCH_ANY covers all types
145 * of branches and therefore it supersedes all the other types.
146 */
147enum perf_branch_sample_type {
148 PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */
149 PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */
150 PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */
151
152 PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */
153 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */
154 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */
155 PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */
156
157 PERF_SAMPLE_BRANCH_MAX = 1U << 7, /* non-ABI */
158};
159
160#define PERF_SAMPLE_BRANCH_PLM_ALL \
161 (PERF_SAMPLE_BRANCH_USER|\
162 PERF_SAMPLE_BRANCH_KERNEL|\
163 PERF_SAMPLE_BRANCH_HV)
164
53cfbf59 165/*
cdd6c482 166 * The format of the data returned by read() on a perf event fd,
3dab77fb
PZ
167 * as specified by attr.read_format:
168 *
169 * struct read_format {
57c0c15b 170 * { u64 value;
d7ebe75b
VW
171 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
172 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
57c0c15b
IM
173 * { u64 id; } && PERF_FORMAT_ID
174 * } && !PERF_FORMAT_GROUP
3dab77fb 175 *
57c0c15b 176 * { u64 nr;
d7ebe75b
VW
177 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
178 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
57c0c15b
IM
179 * { u64 value;
180 * { u64 id; } && PERF_FORMAT_ID
181 * } cntr[nr];
182 * } && PERF_FORMAT_GROUP
3dab77fb 183 * };
53cfbf59 184 */
cdd6c482 185enum perf_event_read_format {
a308444c
IM
186 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
187 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
188 PERF_FORMAT_ID = 1U << 2,
3dab77fb 189 PERF_FORMAT_GROUP = 1U << 3,
974802ea 190
57c0c15b 191 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
53cfbf59
PM
192};
193
974802ea 194#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
cb5d7699
SE
195#define PERF_ATTR_SIZE_VER1 72 /* add: config2 */
196#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */
974802ea 197
9f66a381 198/*
cdd6c482 199 * Hardware event_id to monitor via a performance monitoring event:
9f66a381 200 */
cdd6c482 201struct perf_event_attr {
974802ea 202
f4a2deb4 203 /*
a21ca2ca
IM
204 * Major type: hardware/software/tracepoint/etc.
205 */
206 __u32 type;
974802ea
PZ
207
208 /*
209 * Size of the attr structure, for fwd/bwd compat.
210 */
211 __u32 size;
a21ca2ca
IM
212
213 /*
214 * Type specific configuration information.
f4a2deb4
PZ
215 */
216 __u64 config;
9f66a381 217
60db5e09 218 union {
b23f3325
PZ
219 __u64 sample_period;
220 __u64 sample_freq;
60db5e09
PZ
221 };
222
b23f3325
PZ
223 __u64 sample_type;
224 __u64 read_format;
9f66a381 225
2743a5b0 226 __u64 disabled : 1, /* off by default */
0475f9ea
PM
227 inherit : 1, /* children inherit it */
228 pinned : 1, /* must always be on PMU */
229 exclusive : 1, /* only group on PMU */
230 exclude_user : 1, /* don't count user */
231 exclude_kernel : 1, /* ditto kernel */
232 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 233 exclude_idle : 1, /* don't count when idle */
0a4a9391 234 mmap : 1, /* include mmap data */
8d1b2d93 235 comm : 1, /* include comm data */
60db5e09 236 freq : 1, /* use freq, not period */
bfbd3381 237 inherit_stat : 1, /* per task counts */
57e7986e 238 enable_on_exec : 1, /* next exec enables */
9f498cc5 239 task : 1, /* trace fork/exit */
2667de81 240 watermark : 1, /* wakeup_watermark */
ab608344
PZ
241 /*
242 * precise_ip:
243 *
244 * 0 - SAMPLE_IP can have arbitrary skid
245 * 1 - SAMPLE_IP must have constant skid
246 * 2 - SAMPLE_IP requested to have 0 skid
247 * 3 - SAMPLE_IP must have 0 skid
248 *
249 * See also PERF_RECORD_MISC_EXACT_IP
250 */
251 precise_ip : 2, /* skid constraint */
3af9e859 252 mmap_data : 1, /* non-exec mmap data */
c980d109 253 sample_id_all : 1, /* sample_type all events */
ab608344 254
a240f761
JR
255 exclude_host : 1, /* don't count in host */
256 exclude_guest : 1, /* don't count in guest */
257
258 __reserved_1 : 43;
2743a5b0 259
2667de81
PZ
260 union {
261 __u32 wakeup_events; /* wakeup every n events */
262 __u32 wakeup_watermark; /* bytes before wakeup */
263 };
24f1e32c 264
f13c12c6 265 __u32 bp_type;
a7e3ed1e
AK
266 union {
267 __u64 bp_addr;
268 __u64 config1; /* extension of config */
269 };
270 union {
271 __u64 bp_len;
272 __u64 config2; /* extension of config1 */
273 };
bce38cd5 274 __u64 branch_sample_type; /* enum branch_sample_type */
eab656ae
TG
275};
276
d859e29f 277/*
cdd6c482 278 * Ioctls that can be done on a perf event fd:
d859e29f 279 */
cdd6c482 280#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
57c0c15b
IM
281#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
282#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
cdd6c482 283#define PERF_EVENT_IOC_RESET _IO ('$', 3)
4c49b128 284#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
cdd6c482 285#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
6fb2915d 286#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
cdd6c482
IM
287
288enum perf_event_ioc_flags {
3df5edad
PZ
289 PERF_IOC_FLAG_GROUP = 1U << 0,
290};
d859e29f 291
37d81828
PM
292/*
293 * Structure of the page that can be mapped via mmap
294 */
cdd6c482 295struct perf_event_mmap_page {
37d81828
PM
296 __u32 version; /* version number of this structure */
297 __u32 compat_version; /* lowest version this is compat with */
38ff667b
PZ
298
299 /*
cdd6c482 300 * Bits needed to read the hw events in user-space.
38ff667b 301 *
92f22a38
PZ
302 * u32 seq;
303 * s64 count;
38ff667b 304 *
a2e87d06
PZ
305 * do {
306 * seq = pc->lock;
38ff667b 307 *
a2e87d06
PZ
308 * barrier()
309 * if (pc->index) {
310 * count = pmc_read(pc->index - 1);
311 * count += pc->offset;
312 * } else
313 * goto regular_read;
38ff667b 314 *
a2e87d06
PZ
315 * barrier();
316 * } while (pc->lock != seq);
38ff667b 317 *
92f22a38
PZ
318 * NOTE: for obvious reason this only works on self-monitoring
319 * processes.
38ff667b 320 */
37d81828 321 __u32 lock; /* seqlock for synchronization */
cdd6c482
IM
322 __u32 index; /* hardware event identifier */
323 __s64 offset; /* add to hardware event value */
324 __u64 time_enabled; /* time event active */
325 __u64 time_running; /* time event on cpu */
e3f3541c
PZ
326 __u32 time_mult, time_shift;
327 __u64 time_offset;
7b732a75 328
41f95331
PZ
329 /*
330 * Hole for extension of the self monitor capabilities
331 */
332
e3f3541c 333 __u64 __reserved[121]; /* align to 1k */
41f95331 334
38ff667b
PZ
335 /*
336 * Control data for the mmap() data buffer.
337 *
43a21ea8
PZ
338 * User-space reading the @data_head value should issue an rmb(), on
339 * SMP capable platforms, after reading this value -- see
cdd6c482 340 * perf_event_wakeup().
43a21ea8
PZ
341 *
342 * When the mapping is PROT_WRITE the @data_tail value should be
343 * written by userspace to reflect the last read data. In this case
344 * the kernel will not over-write unread data.
38ff667b 345 */
8e3747c1 346 __u64 data_head; /* head in the data section */
43a21ea8 347 __u64 data_tail; /* user-space written tail */
37d81828
PM
348};
349
39447b38 350#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
184f412c 351#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
cdd6c482
IM
352#define PERF_RECORD_MISC_KERNEL (1 << 0)
353#define PERF_RECORD_MISC_USER (2 << 0)
354#define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
39447b38
ZY
355#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
356#define PERF_RECORD_MISC_GUEST_USER (5 << 0)
6fab0192 357
ab608344
PZ
358/*
359 * Indicates that the content of PERF_SAMPLE_IP points to
360 * the actual instruction that triggered the event. See also
361 * perf_event_attr::precise_ip.
362 */
363#define PERF_RECORD_MISC_EXACT_IP (1 << 14)
ef21f683
PZ
364/*
365 * Reserve the last bit to indicate some extended misc field
366 */
367#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
368
5c148194
PZ
369struct perf_event_header {
370 __u32 type;
6fab0192
PZ
371 __u16 misc;
372 __u16 size;
5c148194
PZ
373};
374
375enum perf_event_type {
5ed00415 376
0c593b34 377 /*
c980d109
ACM
378 * If perf_event_attr.sample_id_all is set then all event types will
379 * have the sample_type selected fields related to where/when
380 * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID)
381 * described in PERF_RECORD_SAMPLE below, it will be stashed just after
382 * the perf_event_header and the fields already present for the existing
383 * fields, i.e. at the end of the payload. That way a newer perf.data
384 * file will be supported by older perf tools, with these new optional
385 * fields being ignored.
386 *
0c593b34
PZ
387 * The MMAP events record the PROT_EXEC mappings so that we can
388 * correlate userspace IPs to code. They have the following structure:
389 *
390 * struct {
0127c3ea 391 * struct perf_event_header header;
0c593b34 392 *
0127c3ea
IM
393 * u32 pid, tid;
394 * u64 addr;
395 * u64 len;
396 * u64 pgoff;
397 * char filename[];
0c593b34
PZ
398 * };
399 */
cdd6c482 400 PERF_RECORD_MMAP = 1,
0a4a9391 401
43a21ea8
PZ
402 /*
403 * struct {
57c0c15b
IM
404 * struct perf_event_header header;
405 * u64 id;
406 * u64 lost;
43a21ea8
PZ
407 * };
408 */
cdd6c482 409 PERF_RECORD_LOST = 2,
43a21ea8 410
8d1b2d93
PZ
411 /*
412 * struct {
0127c3ea 413 * struct perf_event_header header;
8d1b2d93 414 *
0127c3ea
IM
415 * u32 pid, tid;
416 * char comm[];
8d1b2d93
PZ
417 * };
418 */
cdd6c482 419 PERF_RECORD_COMM = 3,
8d1b2d93 420
9f498cc5
PZ
421 /*
422 * struct {
423 * struct perf_event_header header;
424 * u32 pid, ppid;
425 * u32 tid, ptid;
393b2ad8 426 * u64 time;
9f498cc5
PZ
427 * };
428 */
cdd6c482 429 PERF_RECORD_EXIT = 4,
9f498cc5 430
26b119bc
PZ
431 /*
432 * struct {
0127c3ea
IM
433 * struct perf_event_header header;
434 * u64 time;
689802b2 435 * u64 id;
7f453c24 436 * u64 stream_id;
a78ac325
PZ
437 * };
438 */
184f412c
IM
439 PERF_RECORD_THROTTLE = 5,
440 PERF_RECORD_UNTHROTTLE = 6,
a78ac325 441
60313ebe
PZ
442 /*
443 * struct {
a21ca2ca
IM
444 * struct perf_event_header header;
445 * u32 pid, ppid;
9f498cc5 446 * u32 tid, ptid;
a6f10a2f 447 * u64 time;
60313ebe
PZ
448 * };
449 */
cdd6c482 450 PERF_RECORD_FORK = 7,
60313ebe 451
38b200d6
PZ
452 /*
453 * struct {
184f412c
IM
454 * struct perf_event_header header;
455 * u32 pid, tid;
3dab77fb 456 *
184f412c 457 * struct read_format values;
38b200d6
PZ
458 * };
459 */
cdd6c482 460 PERF_RECORD_READ = 8,
38b200d6 461
8a057d84 462 /*
0c593b34 463 * struct {
0127c3ea 464 * struct perf_event_header header;
0c593b34 465 *
43a21ea8
PZ
466 * { u64 ip; } && PERF_SAMPLE_IP
467 * { u32 pid, tid; } && PERF_SAMPLE_TID
468 * { u64 time; } && PERF_SAMPLE_TIME
469 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 470 * { u64 id; } && PERF_SAMPLE_ID
7f453c24 471 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
43a21ea8 472 * { u32 cpu, res; } && PERF_SAMPLE_CPU
57c0c15b 473 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 474 *
3dab77fb 475 * { struct read_format values; } && PERF_SAMPLE_READ
0c593b34 476 *
f9188e02 477 * { u64 nr,
43a21ea8 478 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
3dab77fb 479 *
57c0c15b
IM
480 * #
481 * # The RAW record below is opaque data wrt the ABI
482 * #
483 * # That is, the ABI doesn't make any promises wrt to
484 * # the stability of its content, it may vary depending
485 * # on event, hardware, kernel version and phase of
486 * # the moon.
487 * #
488 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
489 * #
3dab77fb 490 *
a044560c
PZ
491 * { u32 size;
492 * char data[size];}&& PERF_SAMPLE_RAW
bce38cd5
SE
493 *
494 * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
0c593b34 495 * };
8a057d84 496 */
184f412c 497 PERF_RECORD_SAMPLE = 9,
e6e18ec7 498
cdd6c482 499 PERF_RECORD_MAX, /* non-ABI */
5c148194
PZ
500};
501
f9188e02
PZ
502enum perf_callchain_context {
503 PERF_CONTEXT_HV = (__u64)-32,
504 PERF_CONTEXT_KERNEL = (__u64)-128,
505 PERF_CONTEXT_USER = (__u64)-512,
7522060c 506
f9188e02
PZ
507 PERF_CONTEXT_GUEST = (__u64)-2048,
508 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
509 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
510
511 PERF_CONTEXT_MAX = (__u64)-4095,
7522060c
IM
512};
513
e7e7ee2e
IM
514#define PERF_FLAG_FD_NO_GROUP (1U << 0)
515#define PERF_FLAG_FD_OUTPUT (1U << 1)
516#define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */
a4be7c27 517
f3dfd265 518#ifdef __KERNEL__
9f66a381 519/*
f3dfd265 520 * Kernel-internal data types and definitions:
9f66a381
IM
521 */
522
cdd6c482 523#ifdef CONFIG_PERF_EVENTS
e5d1367f 524# include <linux/cgroup.h>
cdd6c482 525# include <asm/perf_event.h>
7be79236 526# include <asm/local64.h>
f3dfd265
PM
527#endif
528
39447b38 529struct perf_guest_info_callbacks {
e7e7ee2e
IM
530 int (*is_in_guest)(void);
531 int (*is_user_mode)(void);
532 unsigned long (*get_guest_ip)(void);
39447b38
ZY
533};
534
2ff6cfd7
AB
535#ifdef CONFIG_HAVE_HW_BREAKPOINT
536#include <asm/hw_breakpoint.h>
537#endif
538
f3dfd265
PM
539#include <linux/list.h>
540#include <linux/mutex.h>
541#include <linux/rculist.h>
542#include <linux/rcupdate.h>
543#include <linux/spinlock.h>
d6d020e9 544#include <linux/hrtimer.h>
3c446b3d 545#include <linux/fs.h>
709e50cf 546#include <linux/pid_namespace.h>
906010b2 547#include <linux/workqueue.h>
5331d7b8 548#include <linux/ftrace.h>
85cfabbc 549#include <linux/cpu.h>
e360adbe 550#include <linux/irq_work.h>
c5905afb 551#include <linux/static_key.h>
60063497 552#include <linux/atomic.h>
fa588151 553#include <asm/local.h>
f3dfd265 554
f9188e02
PZ
555#define PERF_MAX_STACK_DEPTH 255
556
557struct perf_callchain_entry {
558 __u64 nr;
559 __u64 ip[PERF_MAX_STACK_DEPTH];
560};
561
3a43ce68
FW
562struct perf_raw_record {
563 u32 size;
564 void *data;
f413cdb8
FW
565};
566
bce38cd5
SE
567/*
568 * single taken branch record layout:
569 *
570 * from: source instruction (may not always be a branch insn)
571 * to: branch target
572 * mispred: branch target was mispredicted
573 * predicted: branch target was predicted
574 *
575 * support for mispred, predicted is optional. In case it
576 * is not supported mispred = predicted = 0.
577 */
caff2bef 578struct perf_branch_entry {
bce38cd5
SE
579 __u64 from;
580 __u64 to;
581 __u64 mispred:1, /* target mispredicted */
582 predicted:1,/* target predicted */
583 reserved:62;
caff2bef
PZ
584};
585
bce38cd5
SE
586/*
587 * branch stack layout:
588 * nr: number of taken branches stored in entries[]
589 *
590 * Note that nr can vary from sample to sample
591 * branches (to, from) are stored from most recent
592 * to least recent, i.e., entries[0] contains the most
593 * recent branch.
594 */
caff2bef
PZ
595struct perf_branch_stack {
596 __u64 nr;
597 struct perf_branch_entry entries[0];
598};
599
f3dfd265
PM
600struct task_struct;
601
efc9f05d
SE
602/*
603 * extra PMU register associated with an event
604 */
605struct hw_perf_event_extra {
606 u64 config; /* register value */
607 unsigned int reg; /* register address or index */
608 int alloc; /* extra register already allocated */
609 int idx; /* index in shared_regs->regs[] */
610};
611
0793a61d 612/**
cdd6c482 613 * struct hw_perf_event - performance event hardware details:
0793a61d 614 */
cdd6c482
IM
615struct hw_perf_event {
616#ifdef CONFIG_PERF_EVENTS
d6d020e9
PZ
617 union {
618 struct { /* hardware */
a308444c 619 u64 config;
447a194b 620 u64 last_tag;
a308444c 621 unsigned long config_base;
cdd6c482 622 unsigned long event_base;
a308444c 623 int idx;
447a194b 624 int last_cpu;
bce38cd5 625
efc9f05d 626 struct hw_perf_event_extra extra_reg;
bce38cd5 627 struct hw_perf_event_extra branch_reg;
d6d020e9 628 };
721a669b 629 struct { /* software */
a308444c 630 struct hrtimer hrtimer;
d6d020e9 631 };
24f1e32c 632#ifdef CONFIG_HAVE_HW_BREAKPOINT
45a73372
FW
633 struct { /* breakpoint */
634 struct arch_hw_breakpoint info;
635 struct list_head bp_list;
d580ff86
PZ
636 /*
637 * Crufty hack to avoid the chicken and egg
638 * problem hw_breakpoint has with context
639 * creation and event initalization.
640 */
641 struct task_struct *bp_target;
45a73372 642 };
24f1e32c 643#endif
d6d020e9 644 };
a4eaf7f1 645 int state;
e7850595 646 local64_t prev_count;
b23f3325 647 u64 sample_period;
9e350de3 648 u64 last_period;
e7850595 649 local64_t period_left;
e050e3f0 650 u64 interrupts_seq;
60db5e09 651 u64 interrupts;
6a24ed6c 652
abd50713
PZ
653 u64 freq_time_stamp;
654 u64 freq_count_stamp;
ee06094f 655#endif
0793a61d
TG
656};
657
a4eaf7f1
PZ
658/*
659 * hw_perf_event::state flags
660 */
661#define PERF_HES_STOPPED 0x01 /* the counter is stopped */
662#define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */
663#define PERF_HES_ARCH 0x04
664
cdd6c482 665struct perf_event;
621a01ea 666
8d2cacbb
PZ
667/*
668 * Common implementation detail of pmu::{start,commit,cancel}_txn
669 */
670#define PERF_EVENT_TXN 0x1
6bde9b6c 671
621a01ea 672/**
4aeb0b42 673 * struct pmu - generic performance monitoring unit
621a01ea 674 */
4aeb0b42 675struct pmu {
b0a873eb
PZ
676 struct list_head entry;
677
abe43400 678 struct device *dev;
0c9d42ed 679 const struct attribute_group **attr_groups;
2e80a82a
PZ
680 char *name;
681 int type;
682
108b02cf
PZ
683 int * __percpu pmu_disable_count;
684 struct perf_cpu_context * __percpu pmu_cpu_context;
8dc85d54 685 int task_ctx_nr;
6bde9b6c
LM
686
687 /*
a4eaf7f1
PZ
688 * Fully disable/enable this PMU, can be used to protect from the PMI
689 * as well as for lazy/batch writing of the MSRs.
6bde9b6c 690 */
ad5133b7
PZ
691 void (*pmu_enable) (struct pmu *pmu); /* optional */
692 void (*pmu_disable) (struct pmu *pmu); /* optional */
6bde9b6c 693
8d2cacbb 694 /*
a4eaf7f1 695 * Try and initialize the event for this PMU.
24cd7f54 696 * Should return -ENOENT when the @event doesn't match this PMU.
8d2cacbb 697 */
b0a873eb
PZ
698 int (*event_init) (struct perf_event *event);
699
a4eaf7f1
PZ
700#define PERF_EF_START 0x01 /* start the counter when adding */
701#define PERF_EF_RELOAD 0x02 /* reload the counter when starting */
702#define PERF_EF_UPDATE 0x04 /* update the counter when stopping */
703
8d2cacbb 704 /*
a4eaf7f1
PZ
705 * Adds/Removes a counter to/from the PMU, can be done inside
706 * a transaction, see the ->*_txn() methods.
707 */
708 int (*add) (struct perf_event *event, int flags);
709 void (*del) (struct perf_event *event, int flags);
710
711 /*
712 * Starts/Stops a counter present on the PMU. The PMI handler
713 * should stop the counter when perf_event_overflow() returns
714 * !0. ->start() will be used to continue.
715 */
716 void (*start) (struct perf_event *event, int flags);
717 void (*stop) (struct perf_event *event, int flags);
718
719 /*
720 * Updates the counter value of the event.
721 */
cdd6c482 722 void (*read) (struct perf_event *event);
6bde9b6c
LM
723
724 /*
24cd7f54
PZ
725 * Group events scheduling is treated as a transaction, add
726 * group events as a whole and perform one schedulability test.
727 * If the test fails, roll back the whole group
a4eaf7f1
PZ
728 *
729 * Start the transaction, after this ->add() doesn't need to
24cd7f54 730 * do schedulability tests.
8d2cacbb 731 */
e7e7ee2e 732 void (*start_txn) (struct pmu *pmu); /* optional */
8d2cacbb 733 /*
a4eaf7f1 734 * If ->start_txn() disabled the ->add() schedulability test
8d2cacbb
PZ
735 * then ->commit_txn() is required to perform one. On success
736 * the transaction is closed. On error the transaction is kept
737 * open until ->cancel_txn() is called.
738 */
e7e7ee2e 739 int (*commit_txn) (struct pmu *pmu); /* optional */
8d2cacbb 740 /*
a4eaf7f1 741 * Will cancel the transaction, assumes ->del() is called
25985edc 742 * for each successful ->add() during the transaction.
8d2cacbb 743 */
e7e7ee2e 744 void (*cancel_txn) (struct pmu *pmu); /* optional */
35edc2a5
PZ
745
746 /*
747 * Will return the value for perf_event_mmap_page::index for this event,
748 * if no implementation is provided it will default to: event->hw.idx + 1.
749 */
750 int (*event_idx) (struct perf_event *event); /*optional */
d010b332
SE
751
752 /*
753 * flush branch stack on context-switches (needed in cpu-wide mode)
754 */
755 void (*flush_branch_stack) (void);
621a01ea
IM
756};
757
6a930700 758/**
cdd6c482 759 * enum perf_event_active_state - the states of a event
6a930700 760 */
cdd6c482 761enum perf_event_active_state {
57c0c15b 762 PERF_EVENT_STATE_ERROR = -2,
cdd6c482
IM
763 PERF_EVENT_STATE_OFF = -1,
764 PERF_EVENT_STATE_INACTIVE = 0,
57c0c15b 765 PERF_EVENT_STATE_ACTIVE = 1,
6a930700
IM
766};
767
9b51f66d 768struct file;
453f19ee
PZ
769struct perf_sample_data;
770
a8b0ca17 771typedef void (*perf_overflow_handler_t)(struct perf_event *,
b326e956
FW
772 struct perf_sample_data *,
773 struct pt_regs *regs);
774
d6f962b5 775enum perf_group_flag {
e7e7ee2e 776 PERF_GROUP_SOFTWARE = 0x1,
d6f962b5
FW
777};
778
e7e7ee2e
IM
779#define SWEVENT_HLIST_BITS 8
780#define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS)
76e1d904
FW
781
782struct swevent_hlist {
e7e7ee2e
IM
783 struct hlist_head heads[SWEVENT_HLIST_SIZE];
784 struct rcu_head rcu_head;
76e1d904
FW
785};
786
8a49542c
PZ
787#define PERF_ATTACH_CONTEXT 0x01
788#define PERF_ATTACH_GROUP 0x02
d580ff86 789#define PERF_ATTACH_TASK 0x04
8a49542c 790
e5d1367f
SE
791#ifdef CONFIG_CGROUP_PERF
792/*
793 * perf_cgroup_info keeps track of time_enabled for a cgroup.
794 * This is a per-cpu dynamically allocated data structure.
795 */
796struct perf_cgroup_info {
e7e7ee2e
IM
797 u64 time;
798 u64 timestamp;
e5d1367f
SE
799};
800
801struct perf_cgroup {
e7e7ee2e
IM
802 struct cgroup_subsys_state css;
803 struct perf_cgroup_info *info; /* timing info, one per cpu */
e5d1367f
SE
804};
805#endif
806
76369139
FW
807struct ring_buffer;
808
0793a61d 809/**
cdd6c482 810 * struct perf_event - performance event kernel representation:
0793a61d 811 */
cdd6c482
IM
812struct perf_event {
813#ifdef CONFIG_PERF_EVENTS
65abc865 814 struct list_head group_entry;
592903cd 815 struct list_head event_entry;
04289bb9 816 struct list_head sibling_list;
76e1d904 817 struct hlist_node hlist_entry;
0127c3ea 818 int nr_siblings;
d6f962b5 819 int group_flags;
cdd6c482 820 struct perf_event *group_leader;
a4eaf7f1 821 struct pmu *pmu;
04289bb9 822
cdd6c482 823 enum perf_event_active_state state;
8a49542c 824 unsigned int attach_state;
e7850595 825 local64_t count;
a6e6dea6 826 atomic64_t child_count;
ee06094f 827
53cfbf59 828 /*
cdd6c482 829 * These are the total time in nanoseconds that the event
53cfbf59 830 * has been enabled (i.e. eligible to run, and the task has
cdd6c482 831 * been scheduled in, if this is a per-task event)
53cfbf59
PM
832 * and running (scheduled onto the CPU), respectively.
833 *
834 * They are computed from tstamp_enabled, tstamp_running and
cdd6c482 835 * tstamp_stopped when the event is in INACTIVE or ACTIVE state.
53cfbf59
PM
836 */
837 u64 total_time_enabled;
838 u64 total_time_running;
839
840 /*
841 * These are timestamps used for computing total_time_enabled
cdd6c482 842 * and total_time_running when the event is in INACTIVE or
53cfbf59
PM
843 * ACTIVE state, measured in nanoseconds from an arbitrary point
844 * in time.
cdd6c482
IM
845 * tstamp_enabled: the notional time when the event was enabled
846 * tstamp_running: the notional time when the event was scheduled on
53cfbf59 847 * tstamp_stopped: in INACTIVE state, the notional time when the
cdd6c482 848 * event was scheduled off.
53cfbf59
PM
849 */
850 u64 tstamp_enabled;
851 u64 tstamp_running;
852 u64 tstamp_stopped;
853
eed01528
SE
854 /*
855 * timestamp shadows the actual context timing but it can
856 * be safely used in NMI interrupt context. It reflects the
857 * context time as it was when the event was last scheduled in.
858 *
859 * ctx_time already accounts for ctx->timestamp. Therefore to
860 * compute ctx_time for a sample, simply add perf_clock().
861 */
862 u64 shadow_ctx_time;
863
24f1e32c 864 struct perf_event_attr attr;
c320c7b7 865 u16 header_size;
6844c09d 866 u16 id_header_size;
c320c7b7 867 u16 read_size;
cdd6c482 868 struct hw_perf_event hw;
0793a61d 869
cdd6c482 870 struct perf_event_context *ctx;
9b51f66d 871 struct file *filp;
0793a61d 872
53cfbf59
PM
873 /*
874 * These accumulate total time (in nanoseconds) that children
cdd6c482 875 * events have been enabled and running, respectively.
53cfbf59
PM
876 */
877 atomic64_t child_total_time_enabled;
878 atomic64_t child_total_time_running;
879
0793a61d 880 /*
d859e29f 881 * Protect attach/detach and child_list:
0793a61d 882 */
fccc714b
PZ
883 struct mutex child_mutex;
884 struct list_head child_list;
cdd6c482 885 struct perf_event *parent;
0793a61d
TG
886
887 int oncpu;
888 int cpu;
889
082ff5a2
PZ
890 struct list_head owner_entry;
891 struct task_struct *owner;
892
7b732a75
PZ
893 /* mmap bits */
894 struct mutex mmap_mutex;
895 atomic_t mmap_count;
ac9721f3
PZ
896 int mmap_locked;
897 struct user_struct *mmap_user;
76369139 898 struct ring_buffer *rb;
10c6db11 899 struct list_head rb_entry;
37d81828 900
7b732a75 901 /* poll related */
0793a61d 902 wait_queue_head_t waitq;
3c446b3d 903 struct fasync_struct *fasync;
79f14641
PZ
904
905 /* delayed work for NMIs and such */
906 int pending_wakeup;
4c9e2542 907 int pending_kill;
79f14641 908 int pending_disable;
e360adbe 909 struct irq_work pending;
592903cd 910
79f14641
PZ
911 atomic_t event_limit;
912
cdd6c482 913 void (*destroy)(struct perf_event *);
592903cd 914 struct rcu_head rcu_head;
709e50cf
PZ
915
916 struct pid_namespace *ns;
8e5799b1 917 u64 id;
6fb2915d 918
b326e956 919 perf_overflow_handler_t overflow_handler;
4dc0da86 920 void *overflow_handler_context;
453f19ee 921
07b139c8 922#ifdef CONFIG_EVENT_TRACING
1c024eca 923 struct ftrace_event_call *tp_event;
6fb2915d 924 struct event_filter *filter;
ced39002
JO
925#ifdef CONFIG_FUNCTION_TRACER
926 struct ftrace_ops ftrace_ops;
927#endif
ee06094f 928#endif
6fb2915d 929
e5d1367f
SE
930#ifdef CONFIG_CGROUP_PERF
931 struct perf_cgroup *cgrp; /* cgroup event is attach to */
932 int cgrp_defer_enabled;
933#endif
934
6fb2915d 935#endif /* CONFIG_PERF_EVENTS */
0793a61d
TG
936};
937
b04243ef
PZ
938enum perf_event_context_type {
939 task_context,
940 cpu_context,
941};
942
0793a61d 943/**
cdd6c482 944 * struct perf_event_context - event context structure
0793a61d 945 *
cdd6c482 946 * Used as a container for task events and CPU events as well:
0793a61d 947 */
cdd6c482 948struct perf_event_context {
108b02cf 949 struct pmu *pmu;
ee643c41 950 enum perf_event_context_type type;
0793a61d 951 /*
cdd6c482 952 * Protect the states of the events in the list,
d859e29f 953 * nr_active, and the list:
0793a61d 954 */
e625cce1 955 raw_spinlock_t lock;
d859e29f 956 /*
cdd6c482 957 * Protect the list of events. Locking either mutex or lock
d859e29f
PM
958 * is sufficient to ensure the list doesn't change; to change
959 * the list you need to lock both the mutex and the spinlock.
960 */
a308444c 961 struct mutex mutex;
04289bb9 962
889ff015
FW
963 struct list_head pinned_groups;
964 struct list_head flexible_groups;
a308444c 965 struct list_head event_list;
cdd6c482 966 int nr_events;
a308444c
IM
967 int nr_active;
968 int is_active;
bfbd3381 969 int nr_stat;
0f5a2601 970 int nr_freq;
dddd3379 971 int rotate_disable;
a308444c
IM
972 atomic_t refcount;
973 struct task_struct *task;
53cfbf59
PM
974
975 /*
4af4998b 976 * Context clock, runs when context enabled.
53cfbf59 977 */
a308444c
IM
978 u64 time;
979 u64 timestamp;
564c2b21
PM
980
981 /*
982 * These fields let us detect when two contexts have both
983 * been cloned (inherited) from a common ancestor.
984 */
cdd6c482 985 struct perf_event_context *parent_ctx;
a308444c
IM
986 u64 parent_gen;
987 u64 generation;
988 int pin_count;
d010b332
SE
989 int nr_cgroups; /* cgroup evts */
990 int nr_branch_stack; /* branch_stack evt */
28009ce4 991 struct rcu_head rcu_head;
0793a61d
TG
992};
993
7ae07ea3
FW
994/*
995 * Number of contexts where an event can trigger:
e7e7ee2e 996 * task, softirq, hardirq, nmi.
7ae07ea3
FW
997 */
998#define PERF_NR_CONTEXTS 4
999
0793a61d 1000/**
cdd6c482 1001 * struct perf_event_cpu_context - per cpu event context structure
0793a61d
TG
1002 */
1003struct perf_cpu_context {
cdd6c482
IM
1004 struct perf_event_context ctx;
1005 struct perf_event_context *task_ctx;
0793a61d 1006 int active_oncpu;
3b6f9e5c 1007 int exclusive;
e9d2b064
PZ
1008 struct list_head rotation_list;
1009 int jiffies_interval;
51676957 1010 struct pmu *active_pmu;
e5d1367f 1011 struct perf_cgroup *cgrp;
0793a61d
TG
1012};
1013
5622f295 1014struct perf_output_handle {
57c0c15b 1015 struct perf_event *event;
76369139 1016 struct ring_buffer *rb;
6d1acfd5 1017 unsigned long wakeup;
5d967a8b
PZ
1018 unsigned long size;
1019 void *addr;
1020 int page;
5622f295
MM
1021};
1022
cdd6c482 1023#ifdef CONFIG_PERF_EVENTS
829b42dd 1024
2e80a82a 1025extern int perf_pmu_register(struct pmu *pmu, char *name, int type);
b0a873eb 1026extern void perf_pmu_unregister(struct pmu *pmu);
621a01ea 1027
3bf101ba 1028extern int perf_num_counters(void);
84c79910 1029extern const char *perf_pmu_name(void);
a8d757ef
SE
1030extern void __perf_event_task_sched_in(struct task_struct *prev,
1031 struct task_struct *task);
1032extern void __perf_event_task_sched_out(struct task_struct *prev,
1033 struct task_struct *next);
cdd6c482
IM
1034extern int perf_event_init_task(struct task_struct *child);
1035extern void perf_event_exit_task(struct task_struct *child);
1036extern void perf_event_free_task(struct task_struct *task);
4e231c79 1037extern void perf_event_delayed_put(struct task_struct *task);
cdd6c482 1038extern void perf_event_print_debug(void);
33696fc0
PZ
1039extern void perf_pmu_disable(struct pmu *pmu);
1040extern void perf_pmu_enable(struct pmu *pmu);
cdd6c482
IM
1041extern int perf_event_task_disable(void);
1042extern int perf_event_task_enable(void);
26ca5c11 1043extern int perf_event_refresh(struct perf_event *event, int refresh);
cdd6c482 1044extern void perf_event_update_userpage(struct perf_event *event);
fb0459d7
AV
1045extern int perf_event_release_kernel(struct perf_event *event);
1046extern struct perf_event *
1047perf_event_create_kernel_counter(struct perf_event_attr *attr,
1048 int cpu,
38a81da2 1049 struct task_struct *task,
4dc0da86
AK
1050 perf_overflow_handler_t callback,
1051 void *context);
59ed446f
PZ
1052extern u64 perf_event_read_value(struct perf_event *event,
1053 u64 *enabled, u64 *running);
5c92d124 1054
d010b332 1055
df1a132b 1056struct perf_sample_data {
5622f295
MM
1057 u64 type;
1058
1059 u64 ip;
1060 struct {
1061 u32 pid;
1062 u32 tid;
1063 } tid_entry;
1064 u64 time;
a308444c 1065 u64 addr;
5622f295
MM
1066 u64 id;
1067 u64 stream_id;
1068 struct {
1069 u32 cpu;
1070 u32 reserved;
1071 } cpu_entry;
a308444c 1072 u64 period;
5622f295 1073 struct perf_callchain_entry *callchain;
3a43ce68 1074 struct perf_raw_record *raw;
bce38cd5 1075 struct perf_branch_stack *br_stack;
df1a132b
PZ
1076};
1077
e7e7ee2e 1078static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr)
dc1d628a
PZ
1079{
1080 data->addr = addr;
1081 data->raw = NULL;
bce38cd5 1082 data->br_stack = NULL;
dc1d628a
PZ
1083}
1084
5622f295
MM
1085extern void perf_output_sample(struct perf_output_handle *handle,
1086 struct perf_event_header *header,
1087 struct perf_sample_data *data,
cdd6c482 1088 struct perf_event *event);
5622f295
MM
1089extern void perf_prepare_sample(struct perf_event_header *header,
1090 struct perf_sample_data *data,
cdd6c482 1091 struct perf_event *event,
5622f295
MM
1092 struct pt_regs *regs);
1093
a8b0ca17 1094extern int perf_event_overflow(struct perf_event *event,
5622f295
MM
1095 struct perf_sample_data *data,
1096 struct pt_regs *regs);
df1a132b 1097
6c7e550f
FBH
1098static inline bool is_sampling_event(struct perf_event *event)
1099{
1100 return event->attr.sample_period != 0;
1101}
1102
3b6f9e5c 1103/*
cdd6c482 1104 * Return 1 for a software event, 0 for a hardware event
3b6f9e5c 1105 */
cdd6c482 1106static inline int is_software_event(struct perf_event *event)
3b6f9e5c 1107{
89a1e187 1108 return event->pmu->task_ctx_nr == perf_sw_context;
3b6f9e5c
PM
1109}
1110
c5905afb 1111extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX];
f29ac756 1112
a8b0ca17 1113extern void __perf_sw_event(u32, u64, struct pt_regs *, u64);
f29ac756 1114
b0f82b81 1115#ifndef perf_arch_fetch_caller_regs
e7e7ee2e 1116static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { }
b0f82b81 1117#endif
5331d7b8
FW
1118
1119/*
1120 * Take a snapshot of the regs. Skip ip and frame pointer to
1121 * the nth caller. We only need a few of the regs:
1122 * - ip for PERF_SAMPLE_IP
1123 * - cs for user_mode() tests
1124 * - bp for callchains
1125 * - eflags, for future purposes, just in case
1126 */
b0f82b81 1127static inline void perf_fetch_caller_regs(struct pt_regs *regs)
5331d7b8 1128{
5331d7b8
FW
1129 memset(regs, 0, sizeof(*regs));
1130
b0f82b81 1131 perf_arch_fetch_caller_regs(regs, CALLER_ADDR0);
5331d7b8
FW
1132}
1133
7e54a5a0 1134static __always_inline void
a8b0ca17 1135perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr)
e49a5bd3 1136{
7e54a5a0
PZ
1137 struct pt_regs hot_regs;
1138
c5905afb 1139 if (static_key_false(&perf_swevent_enabled[event_id])) {
d430d3d7
JB
1140 if (!regs) {
1141 perf_fetch_caller_regs(&hot_regs);
1142 regs = &hot_regs;
1143 }
a8b0ca17 1144 __perf_sw_event(event_id, nr, regs, addr);
e49a5bd3
FW
1145 }
1146}
1147
c5905afb 1148extern struct static_key_deferred perf_sched_events;
ee6dcfa4 1149
a8d757ef
SE
1150static inline void perf_event_task_sched_in(struct task_struct *prev,
1151 struct task_struct *task)
ee6dcfa4 1152{
c5905afb 1153 if (static_key_false(&perf_sched_events.key))
a8d757ef 1154 __perf_event_task_sched_in(prev, task);
ee6dcfa4
PZ
1155}
1156
a8d757ef
SE
1157static inline void perf_event_task_sched_out(struct task_struct *prev,
1158 struct task_struct *next)
ee6dcfa4 1159{
a8b0ca17 1160 perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0);
ee6dcfa4 1161
c5905afb 1162 if (static_key_false(&perf_sched_events.key))
a8d757ef 1163 __perf_event_task_sched_out(prev, next);
ee6dcfa4
PZ
1164}
1165
3af9e859 1166extern void perf_event_mmap(struct vm_area_struct *vma);
39447b38 1167extern struct perf_guest_info_callbacks *perf_guest_cbs;
dcf46b94
ZY
1168extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
1169extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
39447b38 1170
cdd6c482
IM
1171extern void perf_event_comm(struct task_struct *tsk);
1172extern void perf_event_fork(struct task_struct *tsk);
8d1b2d93 1173
56962b44
FW
1174/* Callchains */
1175DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry);
1176
e7e7ee2e
IM
1177extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs);
1178extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs);
394ee076 1179
e7e7ee2e 1180static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip)
70791ce9
FW
1181{
1182 if (entry->nr < PERF_MAX_STACK_DEPTH)
1183 entry->ip[entry->nr++] = ip;
1184}
394ee076 1185
cdd6c482
IM
1186extern int sysctl_perf_event_paranoid;
1187extern int sysctl_perf_event_mlock;
1188extern int sysctl_perf_event_sample_rate;
1ccd1549 1189
163ec435
PZ
1190extern int perf_proc_update_handler(struct ctl_table *table, int write,
1191 void __user *buffer, size_t *lenp,
1192 loff_t *ppos);
1193
320ebf09
PZ
1194static inline bool perf_paranoid_tracepoint_raw(void)
1195{
1196 return sysctl_perf_event_paranoid > -1;
1197}
1198
1199static inline bool perf_paranoid_cpu(void)
1200{
1201 return sysctl_perf_event_paranoid > 0;
1202}
1203
1204static inline bool perf_paranoid_kernel(void)
1205{
1206 return sysctl_perf_event_paranoid > 1;
1207}
1208
cdd6c482 1209extern void perf_event_init(void);
1c024eca
PZ
1210extern void perf_tp_event(u64 addr, u64 count, void *record,
1211 int entry_size, struct pt_regs *regs,
ecc55f84 1212 struct hlist_head *head, int rctx);
24f1e32c 1213extern void perf_bp_event(struct perf_event *event, void *data);
0d905bca 1214
9d23a90a 1215#ifndef perf_misc_flags
e7e7ee2e
IM
1216# define perf_misc_flags(regs) \
1217 (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL)
1218# define perf_instruction_pointer(regs) instruction_pointer(regs)
9d23a90a
PM
1219#endif
1220
bce38cd5
SE
1221static inline bool has_branch_stack(struct perf_event *event)
1222{
1223 return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK;
1224}
1225
5622f295 1226extern int perf_output_begin(struct perf_output_handle *handle,
a7ac67ea 1227 struct perf_event *event, unsigned int size);
5622f295
MM
1228extern void perf_output_end(struct perf_output_handle *handle);
1229extern void perf_output_copy(struct perf_output_handle *handle,
1230 const void *buf, unsigned int len);
4ed7c92d
PZ
1231extern int perf_swevent_get_recursion_context(void);
1232extern void perf_swevent_put_recursion_context(int rctx);
44234adc
FW
1233extern void perf_event_enable(struct perf_event *event);
1234extern void perf_event_disable(struct perf_event *event);
e9d2b064 1235extern void perf_event_task_tick(void);
0793a61d
TG
1236#else
1237static inline void
a8d757ef
SE
1238perf_event_task_sched_in(struct task_struct *prev,
1239 struct task_struct *task) { }
0793a61d 1240static inline void
a8d757ef
SE
1241perf_event_task_sched_out(struct task_struct *prev,
1242 struct task_struct *next) { }
cdd6c482
IM
1243static inline int perf_event_init_task(struct task_struct *child) { return 0; }
1244static inline void perf_event_exit_task(struct task_struct *child) { }
1245static inline void perf_event_free_task(struct task_struct *task) { }
4e231c79 1246static inline void perf_event_delayed_put(struct task_struct *task) { }
57c0c15b 1247static inline void perf_event_print_debug(void) { }
57c0c15b
IM
1248static inline int perf_event_task_disable(void) { return -EINVAL; }
1249static inline int perf_event_task_enable(void) { return -EINVAL; }
26ca5c11
AK
1250static inline int perf_event_refresh(struct perf_event *event, int refresh)
1251{
1252 return -EINVAL;
1253}
15dbf27c 1254
925d519a 1255static inline void
a8b0ca17 1256perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { }
24f1e32c 1257static inline void
184f412c 1258perf_bp_event(struct perf_event *event, void *data) { }
0a4a9391 1259
39447b38 1260static inline int perf_register_guest_info_callbacks
e7e7ee2e 1261(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1262static inline int perf_unregister_guest_info_callbacks
e7e7ee2e 1263(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1264
57c0c15b 1265static inline void perf_event_mmap(struct vm_area_struct *vma) { }
cdd6c482
IM
1266static inline void perf_event_comm(struct task_struct *tsk) { }
1267static inline void perf_event_fork(struct task_struct *tsk) { }
1268static inline void perf_event_init(void) { }
184f412c 1269static inline int perf_swevent_get_recursion_context(void) { return -1; }
4ed7c92d 1270static inline void perf_swevent_put_recursion_context(int rctx) { }
44234adc
FW
1271static inline void perf_event_enable(struct perf_event *event) { }
1272static inline void perf_event_disable(struct perf_event *event) { }
e9d2b064 1273static inline void perf_event_task_tick(void) { }
0793a61d
TG
1274#endif
1275
e7e7ee2e 1276#define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x))
5622f295 1277
3f6da390
PZ
1278/*
1279 * This has to have a higher priority than migration_notifier in sched.c.
1280 */
e7e7ee2e
IM
1281#define perf_cpu_notifier(fn) \
1282do { \
1283 static struct notifier_block fn##_nb __cpuinitdata = \
1284 { .notifier_call = fn, .priority = CPU_PRI_PERF }; \
1285 fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \
1286 (void *)(unsigned long)smp_processor_id()); \
1287 fn(&fn##_nb, (unsigned long)CPU_STARTING, \
1288 (void *)(unsigned long)smp_processor_id()); \
1289 fn(&fn##_nb, (unsigned long)CPU_ONLINE, \
1290 (void *)(unsigned long)smp_processor_id()); \
1291 register_cpu_notifier(&fn##_nb); \
3f6da390
PZ
1292} while (0)
1293
f3dfd265 1294#endif /* __KERNEL__ */
cdd6c482 1295#endif /* _LINUX_PERF_EVENT_H */
This page took 0.290784 seconds and 5 git commands to generate.