Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / include / linux / perf_event.h
CommitLineData
0793a61d 1/*
57c0c15b 2 * Performance events:
0793a61d 3 *
a308444c 4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
e7e7ee2e
IM
5 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
0793a61d 7 *
57c0c15b 8 * Data type definitions, declarations, prototypes.
0793a61d 9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
0793a61d 11 *
57c0c15b 12 * For licencing details see kernel-base/COPYING
0793a61d 13 */
cdd6c482
IM
14#ifndef _LINUX_PERF_EVENT_H
15#define _LINUX_PERF_EVENT_H
0793a61d 16
f3dfd265
PM
17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
0793a61d
TG
20
21/*
9f66a381
IM
22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
a308444c
IM
29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
24f1e32c 34 PERF_TYPE_BREAKPOINT = 5,
b8e83514 35
a308444c 36 PERF_TYPE_MAX, /* non-ABI */
b8e83514 37};
6c594c21 38
b8e83514 39/*
cdd6c482
IM
40 * Generalized performance event event_id types, used by the
41 * attr.event_id parameter of the sys_perf_event_open()
a308444c 42 * syscall:
b8e83514 43 */
1c432d89 44enum perf_hw_id {
9f66a381 45 /*
b8e83514 46 * Common hardware events, generalized by the kernel:
9f66a381 47 */
f4dbfa8f
PZ
48 PERF_COUNT_HW_CPU_CYCLES = 0,
49 PERF_COUNT_HW_INSTRUCTIONS = 1,
50 PERF_COUNT_HW_CACHE_REFERENCES = 2,
51 PERF_COUNT_HW_CACHE_MISSES = 3,
52 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
53 PERF_COUNT_HW_BRANCH_MISSES = 5,
54 PERF_COUNT_HW_BUS_CYCLES = 6,
8f622422
IM
55 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7,
56 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8,
c37e1749 57 PERF_COUNT_HW_REF_CPU_CYCLES = 9,
f4dbfa8f 58
a308444c 59 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 60};
e077df4f 61
8326f44d 62/*
cdd6c482 63 * Generalized hardware cache events:
8326f44d 64 *
89d6c0b5 65 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
8326f44d
IM
66 * { read, write, prefetch } x
67 * { accesses, misses }
68 */
1c432d89 69enum perf_hw_cache_id {
a308444c
IM
70 PERF_COUNT_HW_CACHE_L1D = 0,
71 PERF_COUNT_HW_CACHE_L1I = 1,
72 PERF_COUNT_HW_CACHE_LL = 2,
73 PERF_COUNT_HW_CACHE_DTLB = 3,
74 PERF_COUNT_HW_CACHE_ITLB = 4,
75 PERF_COUNT_HW_CACHE_BPU = 5,
89d6c0b5 76 PERF_COUNT_HW_CACHE_NODE = 6,
a308444c
IM
77
78 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
8326f44d
IM
79};
80
1c432d89 81enum perf_hw_cache_op_id {
a308444c
IM
82 PERF_COUNT_HW_CACHE_OP_READ = 0,
83 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
84 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 85
a308444c 86 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
8326f44d
IM
87};
88
1c432d89
PZ
89enum perf_hw_cache_op_result_id {
90 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
91 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 92
a308444c 93 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
8326f44d
IM
94};
95
b8e83514 96/*
cdd6c482
IM
97 * Special "software" events provided by the kernel, even if the hardware
98 * does not support performance events. These events measure various
b8e83514
PZ
99 * physical and sw events of the kernel (and allow the profiling of them as
100 * well):
101 */
1c432d89 102enum perf_sw_ids {
a308444c
IM
103 PERF_COUNT_SW_CPU_CLOCK = 0,
104 PERF_COUNT_SW_TASK_CLOCK = 1,
105 PERF_COUNT_SW_PAGE_FAULTS = 2,
106 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
107 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
108 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
109 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
f7d79860
AB
110 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
111 PERF_COUNT_SW_EMULATION_FAULTS = 8,
a308444c
IM
112
113 PERF_COUNT_SW_MAX, /* non-ABI */
0793a61d
TG
114};
115
8a057d84 116/*
0d48696f 117 * Bits that can be set in attr.sample_type to request information
8a057d84
PZ
118 * in the overflow packets.
119 */
cdd6c482 120enum perf_event_sample_format {
a308444c
IM
121 PERF_SAMPLE_IP = 1U << 0,
122 PERF_SAMPLE_TID = 1U << 1,
123 PERF_SAMPLE_TIME = 1U << 2,
124 PERF_SAMPLE_ADDR = 1U << 3,
3dab77fb 125 PERF_SAMPLE_READ = 1U << 4,
a308444c
IM
126 PERF_SAMPLE_CALLCHAIN = 1U << 5,
127 PERF_SAMPLE_ID = 1U << 6,
128 PERF_SAMPLE_CPU = 1U << 7,
129 PERF_SAMPLE_PERIOD = 1U << 8,
7f453c24 130 PERF_SAMPLE_STREAM_ID = 1U << 9,
3a43ce68 131 PERF_SAMPLE_RAW = 1U << 10,
bce38cd5 132 PERF_SAMPLE_BRANCH_STACK = 1U << 11,
974802ea 133
bce38cd5 134 PERF_SAMPLE_MAX = 1U << 12, /* non-ABI */
8a057d84
PZ
135};
136
bce38cd5
SE
137/*
138 * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
139 *
140 * If the user does not pass priv level information via branch_sample_type,
141 * the kernel uses the event's priv level. Branch and event priv levels do
142 * not have to match. Branch priv level is checked for permissions.
143 *
144 * The branch types can be combined, however BRANCH_ANY covers all types
145 * of branches and therefore it supersedes all the other types.
146 */
147enum perf_branch_sample_type {
148 PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */
149 PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */
150 PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */
151
152 PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */
153 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */
154 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */
155 PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */
156
157 PERF_SAMPLE_BRANCH_MAX = 1U << 7, /* non-ABI */
158};
159
160#define PERF_SAMPLE_BRANCH_PLM_ALL \
161 (PERF_SAMPLE_BRANCH_USER|\
162 PERF_SAMPLE_BRANCH_KERNEL|\
163 PERF_SAMPLE_BRANCH_HV)
164
53cfbf59 165/*
cdd6c482 166 * The format of the data returned by read() on a perf event fd,
3dab77fb
PZ
167 * as specified by attr.read_format:
168 *
169 * struct read_format {
57c0c15b 170 * { u64 value;
d7ebe75b
VW
171 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
172 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
57c0c15b
IM
173 * { u64 id; } && PERF_FORMAT_ID
174 * } && !PERF_FORMAT_GROUP
3dab77fb 175 *
57c0c15b 176 * { u64 nr;
d7ebe75b
VW
177 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
178 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
57c0c15b
IM
179 * { u64 value;
180 * { u64 id; } && PERF_FORMAT_ID
181 * } cntr[nr];
182 * } && PERF_FORMAT_GROUP
3dab77fb 183 * };
53cfbf59 184 */
cdd6c482 185enum perf_event_read_format {
a308444c
IM
186 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
187 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
188 PERF_FORMAT_ID = 1U << 2,
3dab77fb 189 PERF_FORMAT_GROUP = 1U << 3,
974802ea 190
57c0c15b 191 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
53cfbf59
PM
192};
193
974802ea 194#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
cb5d7699
SE
195#define PERF_ATTR_SIZE_VER1 72 /* add: config2 */
196#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */
974802ea 197
9f66a381 198/*
cdd6c482 199 * Hardware event_id to monitor via a performance monitoring event:
9f66a381 200 */
cdd6c482 201struct perf_event_attr {
974802ea 202
f4a2deb4 203 /*
a21ca2ca
IM
204 * Major type: hardware/software/tracepoint/etc.
205 */
206 __u32 type;
974802ea
PZ
207
208 /*
209 * Size of the attr structure, for fwd/bwd compat.
210 */
211 __u32 size;
a21ca2ca
IM
212
213 /*
214 * Type specific configuration information.
f4a2deb4
PZ
215 */
216 __u64 config;
9f66a381 217
60db5e09 218 union {
b23f3325
PZ
219 __u64 sample_period;
220 __u64 sample_freq;
60db5e09
PZ
221 };
222
b23f3325
PZ
223 __u64 sample_type;
224 __u64 read_format;
9f66a381 225
2743a5b0 226 __u64 disabled : 1, /* off by default */
0475f9ea
PM
227 inherit : 1, /* children inherit it */
228 pinned : 1, /* must always be on PMU */
229 exclusive : 1, /* only group on PMU */
230 exclude_user : 1, /* don't count user */
231 exclude_kernel : 1, /* ditto kernel */
232 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 233 exclude_idle : 1, /* don't count when idle */
0a4a9391 234 mmap : 1, /* include mmap data */
8d1b2d93 235 comm : 1, /* include comm data */
60db5e09 236 freq : 1, /* use freq, not period */
bfbd3381 237 inherit_stat : 1, /* per task counts */
57e7986e 238 enable_on_exec : 1, /* next exec enables */
9f498cc5 239 task : 1, /* trace fork/exit */
2667de81 240 watermark : 1, /* wakeup_watermark */
ab608344
PZ
241 /*
242 * precise_ip:
243 *
244 * 0 - SAMPLE_IP can have arbitrary skid
245 * 1 - SAMPLE_IP must have constant skid
246 * 2 - SAMPLE_IP requested to have 0 skid
247 * 3 - SAMPLE_IP must have 0 skid
248 *
249 * See also PERF_RECORD_MISC_EXACT_IP
250 */
251 precise_ip : 2, /* skid constraint */
3af9e859 252 mmap_data : 1, /* non-exec mmap data */
c980d109 253 sample_id_all : 1, /* sample_type all events */
ab608344 254
a240f761
JR
255 exclude_host : 1, /* don't count in host */
256 exclude_guest : 1, /* don't count in guest */
257
258 __reserved_1 : 43;
2743a5b0 259
2667de81
PZ
260 union {
261 __u32 wakeup_events; /* wakeup every n events */
262 __u32 wakeup_watermark; /* bytes before wakeup */
263 };
24f1e32c 264
f13c12c6 265 __u32 bp_type;
a7e3ed1e
AK
266 union {
267 __u64 bp_addr;
268 __u64 config1; /* extension of config */
269 };
270 union {
271 __u64 bp_len;
272 __u64 config2; /* extension of config1 */
273 };
bce38cd5 274 __u64 branch_sample_type; /* enum branch_sample_type */
eab656ae
TG
275};
276
bad9ac2d
RR
277#define perf_flags(attr) (*(&(attr)->read_format + 1))
278
d859e29f 279/*
cdd6c482 280 * Ioctls that can be done on a perf event fd:
d859e29f 281 */
cdd6c482 282#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
57c0c15b
IM
283#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
284#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
cdd6c482 285#define PERF_EVENT_IOC_RESET _IO ('$', 3)
4c49b128 286#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
cdd6c482 287#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
6fb2915d 288#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
cdd6c482
IM
289
290enum perf_event_ioc_flags {
3df5edad
PZ
291 PERF_IOC_FLAG_GROUP = 1U << 0,
292};
d859e29f 293
37d81828
PM
294/*
295 * Structure of the page that can be mapped via mmap
296 */
cdd6c482 297struct perf_event_mmap_page {
37d81828
PM
298 __u32 version; /* version number of this structure */
299 __u32 compat_version; /* lowest version this is compat with */
38ff667b
PZ
300
301 /*
cdd6c482 302 * Bits needed to read the hw events in user-space.
38ff667b 303 *
c7206205
PZ
304 * u32 seq, time_mult, time_shift, idx, width;
305 * u64 count, enabled, running;
306 * u64 cyc, time_offset;
307 * s64 pmc = 0;
38ff667b 308 *
a2e87d06
PZ
309 * do {
310 * seq = pc->lock;
a2e87d06 311 * barrier()
c7206205
PZ
312 *
313 * enabled = pc->time_enabled;
314 * running = pc->time_running;
315 *
316 * if (pc->cap_usr_time && enabled != running) {
317 * cyc = rdtsc();
318 * time_offset = pc->time_offset;
319 * time_mult = pc->time_mult;
320 * time_shift = pc->time_shift;
321 * }
322 *
323 * idx = pc->index;
324 * count = pc->offset;
325 * if (pc->cap_usr_rdpmc && idx) {
326 * width = pc->pmc_width;
327 * pmc = rdpmc(idx - 1);
328 * }
38ff667b 329 *
a2e87d06
PZ
330 * barrier();
331 * } while (pc->lock != seq);
38ff667b 332 *
92f22a38
PZ
333 * NOTE: for obvious reason this only works on self-monitoring
334 * processes.
38ff667b 335 */
37d81828 336 __u32 lock; /* seqlock for synchronization */
cdd6c482
IM
337 __u32 index; /* hardware event identifier */
338 __s64 offset; /* add to hardware event value */
339 __u64 time_enabled; /* time event active */
340 __u64 time_running; /* time event on cpu */
c7206205
PZ
341 union {
342 __u64 capabilities;
343 __u64 cap_usr_time : 1,
344 cap_usr_rdpmc : 1,
345 cap_____res : 62;
346 };
347
348 /*
349 * If cap_usr_rdpmc this field provides the bit-width of the value
350 * read using the rdpmc() or equivalent instruction. This can be used
351 * to sign extend the result like:
352 *
353 * pmc <<= 64 - width;
354 * pmc >>= 64 - width; // signed shift right
355 * count += pmc;
356 */
357 __u16 pmc_width;
358
359 /*
360 * If cap_usr_time the below fields can be used to compute the time
361 * delta since time_enabled (in ns) using rdtsc or similar.
362 *
363 * u64 quot, rem;
364 * u64 delta;
365 *
366 * quot = (cyc >> time_shift);
367 * rem = cyc & ((1 << time_shift) - 1);
368 * delta = time_offset + quot * time_mult +
369 * ((rem * time_mult) >> time_shift);
370 *
371 * Where time_offset,time_mult,time_shift and cyc are read in the
372 * seqcount loop described above. This delta can then be added to
373 * enabled and possible running (if idx), improving the scaling:
374 *
375 * enabled += delta;
376 * if (idx)
377 * running += delta;
378 *
379 * quot = count / running;
380 * rem = count % running;
381 * count = quot * enabled + (rem * enabled) / running;
382 */
383 __u16 time_shift;
384 __u32 time_mult;
e3f3541c 385 __u64 time_offset;
7b732a75 386
41f95331
PZ
387 /*
388 * Hole for extension of the self monitor capabilities
389 */
390
c7206205 391 __u64 __reserved[120]; /* align to 1k */
41f95331 392
38ff667b
PZ
393 /*
394 * Control data for the mmap() data buffer.
395 *
43a21ea8
PZ
396 * User-space reading the @data_head value should issue an rmb(), on
397 * SMP capable platforms, after reading this value -- see
cdd6c482 398 * perf_event_wakeup().
43a21ea8
PZ
399 *
400 * When the mapping is PROT_WRITE the @data_tail value should be
401 * written by userspace to reflect the last read data. In this case
402 * the kernel will not over-write unread data.
38ff667b 403 */
8e3747c1 404 __u64 data_head; /* head in the data section */
43a21ea8 405 __u64 data_tail; /* user-space written tail */
37d81828
PM
406};
407
39447b38 408#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
184f412c 409#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
cdd6c482
IM
410#define PERF_RECORD_MISC_KERNEL (1 << 0)
411#define PERF_RECORD_MISC_USER (2 << 0)
412#define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
39447b38
ZY
413#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
414#define PERF_RECORD_MISC_GUEST_USER (5 << 0)
6fab0192 415
ab608344
PZ
416/*
417 * Indicates that the content of PERF_SAMPLE_IP points to
418 * the actual instruction that triggered the event. See also
419 * perf_event_attr::precise_ip.
420 */
421#define PERF_RECORD_MISC_EXACT_IP (1 << 14)
ef21f683
PZ
422/*
423 * Reserve the last bit to indicate some extended misc field
424 */
425#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
426
5c148194
PZ
427struct perf_event_header {
428 __u32 type;
6fab0192
PZ
429 __u16 misc;
430 __u16 size;
5c148194
PZ
431};
432
433enum perf_event_type {
5ed00415 434
0c593b34 435 /*
c980d109
ACM
436 * If perf_event_attr.sample_id_all is set then all event types will
437 * have the sample_type selected fields related to where/when
438 * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID)
439 * described in PERF_RECORD_SAMPLE below, it will be stashed just after
440 * the perf_event_header and the fields already present for the existing
441 * fields, i.e. at the end of the payload. That way a newer perf.data
442 * file will be supported by older perf tools, with these new optional
443 * fields being ignored.
444 *
0c593b34
PZ
445 * The MMAP events record the PROT_EXEC mappings so that we can
446 * correlate userspace IPs to code. They have the following structure:
447 *
448 * struct {
0127c3ea 449 * struct perf_event_header header;
0c593b34 450 *
0127c3ea
IM
451 * u32 pid, tid;
452 * u64 addr;
453 * u64 len;
454 * u64 pgoff;
455 * char filename[];
0c593b34
PZ
456 * };
457 */
cdd6c482 458 PERF_RECORD_MMAP = 1,
0a4a9391 459
43a21ea8
PZ
460 /*
461 * struct {
57c0c15b
IM
462 * struct perf_event_header header;
463 * u64 id;
464 * u64 lost;
43a21ea8
PZ
465 * };
466 */
cdd6c482 467 PERF_RECORD_LOST = 2,
43a21ea8 468
8d1b2d93
PZ
469 /*
470 * struct {
0127c3ea 471 * struct perf_event_header header;
8d1b2d93 472 *
0127c3ea
IM
473 * u32 pid, tid;
474 * char comm[];
8d1b2d93
PZ
475 * };
476 */
cdd6c482 477 PERF_RECORD_COMM = 3,
8d1b2d93 478
9f498cc5
PZ
479 /*
480 * struct {
481 * struct perf_event_header header;
482 * u32 pid, ppid;
483 * u32 tid, ptid;
393b2ad8 484 * u64 time;
9f498cc5
PZ
485 * };
486 */
cdd6c482 487 PERF_RECORD_EXIT = 4,
9f498cc5 488
26b119bc
PZ
489 /*
490 * struct {
0127c3ea
IM
491 * struct perf_event_header header;
492 * u64 time;
689802b2 493 * u64 id;
7f453c24 494 * u64 stream_id;
a78ac325
PZ
495 * };
496 */
184f412c
IM
497 PERF_RECORD_THROTTLE = 5,
498 PERF_RECORD_UNTHROTTLE = 6,
a78ac325 499
60313ebe
PZ
500 /*
501 * struct {
a21ca2ca
IM
502 * struct perf_event_header header;
503 * u32 pid, ppid;
9f498cc5 504 * u32 tid, ptid;
a6f10a2f 505 * u64 time;
60313ebe
PZ
506 * };
507 */
cdd6c482 508 PERF_RECORD_FORK = 7,
60313ebe 509
38b200d6
PZ
510 /*
511 * struct {
184f412c
IM
512 * struct perf_event_header header;
513 * u32 pid, tid;
3dab77fb 514 *
184f412c 515 * struct read_format values;
38b200d6
PZ
516 * };
517 */
cdd6c482 518 PERF_RECORD_READ = 8,
38b200d6 519
8a057d84 520 /*
0c593b34 521 * struct {
0127c3ea 522 * struct perf_event_header header;
0c593b34 523 *
43a21ea8
PZ
524 * { u64 ip; } && PERF_SAMPLE_IP
525 * { u32 pid, tid; } && PERF_SAMPLE_TID
526 * { u64 time; } && PERF_SAMPLE_TIME
527 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 528 * { u64 id; } && PERF_SAMPLE_ID
7f453c24 529 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
43a21ea8 530 * { u32 cpu, res; } && PERF_SAMPLE_CPU
57c0c15b 531 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 532 *
3dab77fb 533 * { struct read_format values; } && PERF_SAMPLE_READ
0c593b34 534 *
f9188e02 535 * { u64 nr,
43a21ea8 536 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
3dab77fb 537 *
57c0c15b
IM
538 * #
539 * # The RAW record below is opaque data wrt the ABI
540 * #
541 * # That is, the ABI doesn't make any promises wrt to
542 * # the stability of its content, it may vary depending
543 * # on event, hardware, kernel version and phase of
544 * # the moon.
545 * #
546 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
547 * #
3dab77fb 548 *
a044560c
PZ
549 * { u32 size;
550 * char data[size];}&& PERF_SAMPLE_RAW
bce38cd5
SE
551 *
552 * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
0c593b34 553 * };
8a057d84 554 */
184f412c 555 PERF_RECORD_SAMPLE = 9,
e6e18ec7 556
cdd6c482 557 PERF_RECORD_MAX, /* non-ABI */
5c148194
PZ
558};
559
0b0d9cf6 560#define PERF_MAX_STACK_DEPTH 127
114067b6 561
f9188e02
PZ
562enum perf_callchain_context {
563 PERF_CONTEXT_HV = (__u64)-32,
564 PERF_CONTEXT_KERNEL = (__u64)-128,
565 PERF_CONTEXT_USER = (__u64)-512,
7522060c 566
f9188e02
PZ
567 PERF_CONTEXT_GUEST = (__u64)-2048,
568 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
569 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
570
571 PERF_CONTEXT_MAX = (__u64)-4095,
7522060c
IM
572};
573
e7e7ee2e
IM
574#define PERF_FLAG_FD_NO_GROUP (1U << 0)
575#define PERF_FLAG_FD_OUTPUT (1U << 1)
576#define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */
a4be7c27 577
f3dfd265 578#ifdef __KERNEL__
9f66a381 579/*
f3dfd265 580 * Kernel-internal data types and definitions:
9f66a381
IM
581 */
582
cdd6c482 583#ifdef CONFIG_PERF_EVENTS
e5d1367f 584# include <linux/cgroup.h>
cdd6c482 585# include <asm/perf_event.h>
7be79236 586# include <asm/local64.h>
f3dfd265
PM
587#endif
588
39447b38 589struct perf_guest_info_callbacks {
e7e7ee2e
IM
590 int (*is_in_guest)(void);
591 int (*is_user_mode)(void);
592 unsigned long (*get_guest_ip)(void);
39447b38
ZY
593};
594
2ff6cfd7
AB
595#ifdef CONFIG_HAVE_HW_BREAKPOINT
596#include <asm/hw_breakpoint.h>
597#endif
598
f3dfd265
PM
599#include <linux/list.h>
600#include <linux/mutex.h>
601#include <linux/rculist.h>
602#include <linux/rcupdate.h>
603#include <linux/spinlock.h>
d6d020e9 604#include <linux/hrtimer.h>
3c446b3d 605#include <linux/fs.h>
709e50cf 606#include <linux/pid_namespace.h>
906010b2 607#include <linux/workqueue.h>
5331d7b8 608#include <linux/ftrace.h>
85cfabbc 609#include <linux/cpu.h>
e360adbe 610#include <linux/irq_work.h>
c5905afb 611#include <linux/static_key.h>
60063497 612#include <linux/atomic.h>
641cc938 613#include <linux/sysfs.h>
fa588151 614#include <asm/local.h>
f3dfd265 615
f9188e02
PZ
616struct perf_callchain_entry {
617 __u64 nr;
618 __u64 ip[PERF_MAX_STACK_DEPTH];
619};
620
3a43ce68
FW
621struct perf_raw_record {
622 u32 size;
623 void *data;
f413cdb8
FW
624};
625
bce38cd5
SE
626/*
627 * single taken branch record layout:
628 *
629 * from: source instruction (may not always be a branch insn)
630 * to: branch target
631 * mispred: branch target was mispredicted
632 * predicted: branch target was predicted
633 *
634 * support for mispred, predicted is optional. In case it
635 * is not supported mispred = predicted = 0.
636 */
caff2bef 637struct perf_branch_entry {
bce38cd5
SE
638 __u64 from;
639 __u64 to;
640 __u64 mispred:1, /* target mispredicted */
641 predicted:1,/* target predicted */
642 reserved:62;
caff2bef
PZ
643};
644
bce38cd5
SE
645/*
646 * branch stack layout:
647 * nr: number of taken branches stored in entries[]
648 *
649 * Note that nr can vary from sample to sample
650 * branches (to, from) are stored from most recent
651 * to least recent, i.e., entries[0] contains the most
652 * recent branch.
653 */
caff2bef
PZ
654struct perf_branch_stack {
655 __u64 nr;
656 struct perf_branch_entry entries[0];
657};
658
f3dfd265
PM
659struct task_struct;
660
efc9f05d
SE
661/*
662 * extra PMU register associated with an event
663 */
664struct hw_perf_event_extra {
665 u64 config; /* register value */
666 unsigned int reg; /* register address or index */
667 int alloc; /* extra register already allocated */
668 int idx; /* index in shared_regs->regs[] */
669};
670
0793a61d 671/**
cdd6c482 672 * struct hw_perf_event - performance event hardware details:
0793a61d 673 */
cdd6c482
IM
674struct hw_perf_event {
675#ifdef CONFIG_PERF_EVENTS
d6d020e9
PZ
676 union {
677 struct { /* hardware */
a308444c 678 u64 config;
447a194b 679 u64 last_tag;
a308444c 680 unsigned long config_base;
cdd6c482 681 unsigned long event_base;
c48b6053 682 int event_base_rdpmc;
a308444c 683 int idx;
447a194b 684 int last_cpu;
bce38cd5 685
efc9f05d 686 struct hw_perf_event_extra extra_reg;
bce38cd5 687 struct hw_perf_event_extra branch_reg;
d6d020e9 688 };
721a669b 689 struct { /* software */
a308444c 690 struct hrtimer hrtimer;
d6d020e9 691 };
24f1e32c 692#ifdef CONFIG_HAVE_HW_BREAKPOINT
45a73372
FW
693 struct { /* breakpoint */
694 struct arch_hw_breakpoint info;
695 struct list_head bp_list;
d580ff86
PZ
696 /*
697 * Crufty hack to avoid the chicken and egg
698 * problem hw_breakpoint has with context
699 * creation and event initalization.
700 */
701 struct task_struct *bp_target;
45a73372 702 };
24f1e32c 703#endif
d6d020e9 704 };
a4eaf7f1 705 int state;
e7850595 706 local64_t prev_count;
b23f3325 707 u64 sample_period;
9e350de3 708 u64 last_period;
e7850595 709 local64_t period_left;
e050e3f0 710 u64 interrupts_seq;
60db5e09 711 u64 interrupts;
6a24ed6c 712
abd50713
PZ
713 u64 freq_time_stamp;
714 u64 freq_count_stamp;
ee06094f 715#endif
0793a61d
TG
716};
717
a4eaf7f1
PZ
718/*
719 * hw_perf_event::state flags
720 */
721#define PERF_HES_STOPPED 0x01 /* the counter is stopped */
722#define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */
723#define PERF_HES_ARCH 0x04
724
cdd6c482 725struct perf_event;
621a01ea 726
8d2cacbb
PZ
727/*
728 * Common implementation detail of pmu::{start,commit,cancel}_txn
729 */
730#define PERF_EVENT_TXN 0x1
6bde9b6c 731
621a01ea 732/**
4aeb0b42 733 * struct pmu - generic performance monitoring unit
621a01ea 734 */
4aeb0b42 735struct pmu {
b0a873eb
PZ
736 struct list_head entry;
737
abe43400 738 struct device *dev;
0c9d42ed 739 const struct attribute_group **attr_groups;
2e80a82a
PZ
740 char *name;
741 int type;
742
108b02cf
PZ
743 int * __percpu pmu_disable_count;
744 struct perf_cpu_context * __percpu pmu_cpu_context;
8dc85d54 745 int task_ctx_nr;
6bde9b6c
LM
746
747 /*
a4eaf7f1
PZ
748 * Fully disable/enable this PMU, can be used to protect from the PMI
749 * as well as for lazy/batch writing of the MSRs.
6bde9b6c 750 */
ad5133b7
PZ
751 void (*pmu_enable) (struct pmu *pmu); /* optional */
752 void (*pmu_disable) (struct pmu *pmu); /* optional */
6bde9b6c 753
8d2cacbb 754 /*
a4eaf7f1 755 * Try and initialize the event for this PMU.
24cd7f54 756 * Should return -ENOENT when the @event doesn't match this PMU.
8d2cacbb 757 */
b0a873eb
PZ
758 int (*event_init) (struct perf_event *event);
759
a4eaf7f1
PZ
760#define PERF_EF_START 0x01 /* start the counter when adding */
761#define PERF_EF_RELOAD 0x02 /* reload the counter when starting */
762#define PERF_EF_UPDATE 0x04 /* update the counter when stopping */
763
8d2cacbb 764 /*
a4eaf7f1
PZ
765 * Adds/Removes a counter to/from the PMU, can be done inside
766 * a transaction, see the ->*_txn() methods.
767 */
768 int (*add) (struct perf_event *event, int flags);
769 void (*del) (struct perf_event *event, int flags);
770
771 /*
772 * Starts/Stops a counter present on the PMU. The PMI handler
773 * should stop the counter when perf_event_overflow() returns
774 * !0. ->start() will be used to continue.
775 */
776 void (*start) (struct perf_event *event, int flags);
777 void (*stop) (struct perf_event *event, int flags);
778
779 /*
780 * Updates the counter value of the event.
781 */
cdd6c482 782 void (*read) (struct perf_event *event);
6bde9b6c
LM
783
784 /*
24cd7f54
PZ
785 * Group events scheduling is treated as a transaction, add
786 * group events as a whole and perform one schedulability test.
787 * If the test fails, roll back the whole group
a4eaf7f1
PZ
788 *
789 * Start the transaction, after this ->add() doesn't need to
24cd7f54 790 * do schedulability tests.
8d2cacbb 791 */
e7e7ee2e 792 void (*start_txn) (struct pmu *pmu); /* optional */
8d2cacbb 793 /*
a4eaf7f1 794 * If ->start_txn() disabled the ->add() schedulability test
8d2cacbb
PZ
795 * then ->commit_txn() is required to perform one. On success
796 * the transaction is closed. On error the transaction is kept
797 * open until ->cancel_txn() is called.
798 */
e7e7ee2e 799 int (*commit_txn) (struct pmu *pmu); /* optional */
8d2cacbb 800 /*
a4eaf7f1 801 * Will cancel the transaction, assumes ->del() is called
25985edc 802 * for each successful ->add() during the transaction.
8d2cacbb 803 */
e7e7ee2e 804 void (*cancel_txn) (struct pmu *pmu); /* optional */
35edc2a5
PZ
805
806 /*
807 * Will return the value for perf_event_mmap_page::index for this event,
808 * if no implementation is provided it will default to: event->hw.idx + 1.
809 */
810 int (*event_idx) (struct perf_event *event); /*optional */
d010b332
SE
811
812 /*
813 * flush branch stack on context-switches (needed in cpu-wide mode)
814 */
815 void (*flush_branch_stack) (void);
621a01ea
IM
816};
817
6a930700 818/**
cdd6c482 819 * enum perf_event_active_state - the states of a event
6a930700 820 */
cdd6c482 821enum perf_event_active_state {
57c0c15b 822 PERF_EVENT_STATE_ERROR = -2,
cdd6c482
IM
823 PERF_EVENT_STATE_OFF = -1,
824 PERF_EVENT_STATE_INACTIVE = 0,
57c0c15b 825 PERF_EVENT_STATE_ACTIVE = 1,
6a930700
IM
826};
827
9b51f66d 828struct file;
453f19ee
PZ
829struct perf_sample_data;
830
a8b0ca17 831typedef void (*perf_overflow_handler_t)(struct perf_event *,
b326e956
FW
832 struct perf_sample_data *,
833 struct pt_regs *regs);
834
d6f962b5 835enum perf_group_flag {
e7e7ee2e 836 PERF_GROUP_SOFTWARE = 0x1,
d6f962b5
FW
837};
838
e7e7ee2e
IM
839#define SWEVENT_HLIST_BITS 8
840#define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS)
76e1d904
FW
841
842struct swevent_hlist {
e7e7ee2e
IM
843 struct hlist_head heads[SWEVENT_HLIST_SIZE];
844 struct rcu_head rcu_head;
76e1d904
FW
845};
846
8a49542c
PZ
847#define PERF_ATTACH_CONTEXT 0x01
848#define PERF_ATTACH_GROUP 0x02
d580ff86 849#define PERF_ATTACH_TASK 0x04
8a49542c 850
e5d1367f
SE
851#ifdef CONFIG_CGROUP_PERF
852/*
853 * perf_cgroup_info keeps track of time_enabled for a cgroup.
854 * This is a per-cpu dynamically allocated data structure.
855 */
856struct perf_cgroup_info {
e7e7ee2e
IM
857 u64 time;
858 u64 timestamp;
e5d1367f
SE
859};
860
861struct perf_cgroup {
e7e7ee2e
IM
862 struct cgroup_subsys_state css;
863 struct perf_cgroup_info *info; /* timing info, one per cpu */
e5d1367f
SE
864};
865#endif
866
76369139
FW
867struct ring_buffer;
868
0793a61d 869/**
cdd6c482 870 * struct perf_event - performance event kernel representation:
0793a61d 871 */
cdd6c482
IM
872struct perf_event {
873#ifdef CONFIG_PERF_EVENTS
65abc865 874 struct list_head group_entry;
592903cd 875 struct list_head event_entry;
04289bb9 876 struct list_head sibling_list;
76e1d904 877 struct hlist_node hlist_entry;
0127c3ea 878 int nr_siblings;
d6f962b5 879 int group_flags;
cdd6c482 880 struct perf_event *group_leader;
a4eaf7f1 881 struct pmu *pmu;
04289bb9 882
cdd6c482 883 enum perf_event_active_state state;
8a49542c 884 unsigned int attach_state;
e7850595 885 local64_t count;
a6e6dea6 886 atomic64_t child_count;
ee06094f 887
53cfbf59 888 /*
cdd6c482 889 * These are the total time in nanoseconds that the event
53cfbf59 890 * has been enabled (i.e. eligible to run, and the task has
cdd6c482 891 * been scheduled in, if this is a per-task event)
53cfbf59
PM
892 * and running (scheduled onto the CPU), respectively.
893 *
894 * They are computed from tstamp_enabled, tstamp_running and
cdd6c482 895 * tstamp_stopped when the event is in INACTIVE or ACTIVE state.
53cfbf59
PM
896 */
897 u64 total_time_enabled;
898 u64 total_time_running;
899
900 /*
901 * These are timestamps used for computing total_time_enabled
cdd6c482 902 * and total_time_running when the event is in INACTIVE or
53cfbf59
PM
903 * ACTIVE state, measured in nanoseconds from an arbitrary point
904 * in time.
cdd6c482
IM
905 * tstamp_enabled: the notional time when the event was enabled
906 * tstamp_running: the notional time when the event was scheduled on
53cfbf59 907 * tstamp_stopped: in INACTIVE state, the notional time when the
cdd6c482 908 * event was scheduled off.
53cfbf59
PM
909 */
910 u64 tstamp_enabled;
911 u64 tstamp_running;
912 u64 tstamp_stopped;
913
eed01528
SE
914 /*
915 * timestamp shadows the actual context timing but it can
916 * be safely used in NMI interrupt context. It reflects the
917 * context time as it was when the event was last scheduled in.
918 *
919 * ctx_time already accounts for ctx->timestamp. Therefore to
920 * compute ctx_time for a sample, simply add perf_clock().
921 */
922 u64 shadow_ctx_time;
923
24f1e32c 924 struct perf_event_attr attr;
c320c7b7 925 u16 header_size;
6844c09d 926 u16 id_header_size;
c320c7b7 927 u16 read_size;
cdd6c482 928 struct hw_perf_event hw;
0793a61d 929
cdd6c482 930 struct perf_event_context *ctx;
a6fa941d 931 atomic_long_t refcount;
0793a61d 932
53cfbf59
PM
933 /*
934 * These accumulate total time (in nanoseconds) that children
cdd6c482 935 * events have been enabled and running, respectively.
53cfbf59
PM
936 */
937 atomic64_t child_total_time_enabled;
938 atomic64_t child_total_time_running;
939
0793a61d 940 /*
d859e29f 941 * Protect attach/detach and child_list:
0793a61d 942 */
fccc714b
PZ
943 struct mutex child_mutex;
944 struct list_head child_list;
cdd6c482 945 struct perf_event *parent;
0793a61d
TG
946
947 int oncpu;
948 int cpu;
949
082ff5a2
PZ
950 struct list_head owner_entry;
951 struct task_struct *owner;
952
7b732a75
PZ
953 /* mmap bits */
954 struct mutex mmap_mutex;
955 atomic_t mmap_count;
ac9721f3
PZ
956 int mmap_locked;
957 struct user_struct *mmap_user;
76369139 958 struct ring_buffer *rb;
10c6db11 959 struct list_head rb_entry;
37d81828 960
7b732a75 961 /* poll related */
0793a61d 962 wait_queue_head_t waitq;
3c446b3d 963 struct fasync_struct *fasync;
79f14641
PZ
964
965 /* delayed work for NMIs and such */
966 int pending_wakeup;
4c9e2542 967 int pending_kill;
79f14641 968 int pending_disable;
e360adbe 969 struct irq_work pending;
592903cd 970
79f14641
PZ
971 atomic_t event_limit;
972
cdd6c482 973 void (*destroy)(struct perf_event *);
592903cd 974 struct rcu_head rcu_head;
709e50cf
PZ
975
976 struct pid_namespace *ns;
8e5799b1 977 u64 id;
6fb2915d 978
b326e956 979 perf_overflow_handler_t overflow_handler;
4dc0da86 980 void *overflow_handler_context;
453f19ee 981
07b139c8 982#ifdef CONFIG_EVENT_TRACING
1c024eca 983 struct ftrace_event_call *tp_event;
6fb2915d 984 struct event_filter *filter;
ced39002
JO
985#ifdef CONFIG_FUNCTION_TRACER
986 struct ftrace_ops ftrace_ops;
987#endif
ee06094f 988#endif
6fb2915d 989
e5d1367f
SE
990#ifdef CONFIG_CGROUP_PERF
991 struct perf_cgroup *cgrp; /* cgroup event is attach to */
992 int cgrp_defer_enabled;
993#endif
994
6fb2915d 995#endif /* CONFIG_PERF_EVENTS */
0793a61d
TG
996};
997
b04243ef
PZ
998enum perf_event_context_type {
999 task_context,
1000 cpu_context,
1001};
1002
0793a61d 1003/**
cdd6c482 1004 * struct perf_event_context - event context structure
0793a61d 1005 *
cdd6c482 1006 * Used as a container for task events and CPU events as well:
0793a61d 1007 */
cdd6c482 1008struct perf_event_context {
108b02cf 1009 struct pmu *pmu;
ee643c41 1010 enum perf_event_context_type type;
0793a61d 1011 /*
cdd6c482 1012 * Protect the states of the events in the list,
d859e29f 1013 * nr_active, and the list:
0793a61d 1014 */
e625cce1 1015 raw_spinlock_t lock;
d859e29f 1016 /*
cdd6c482 1017 * Protect the list of events. Locking either mutex or lock
d859e29f
PM
1018 * is sufficient to ensure the list doesn't change; to change
1019 * the list you need to lock both the mutex and the spinlock.
1020 */
a308444c 1021 struct mutex mutex;
04289bb9 1022
889ff015
FW
1023 struct list_head pinned_groups;
1024 struct list_head flexible_groups;
a308444c 1025 struct list_head event_list;
cdd6c482 1026 int nr_events;
a308444c
IM
1027 int nr_active;
1028 int is_active;
bfbd3381 1029 int nr_stat;
0f5a2601 1030 int nr_freq;
dddd3379 1031 int rotate_disable;
a308444c
IM
1032 atomic_t refcount;
1033 struct task_struct *task;
53cfbf59
PM
1034
1035 /*
4af4998b 1036 * Context clock, runs when context enabled.
53cfbf59 1037 */
a308444c
IM
1038 u64 time;
1039 u64 timestamp;
564c2b21
PM
1040
1041 /*
1042 * These fields let us detect when two contexts have both
1043 * been cloned (inherited) from a common ancestor.
1044 */
cdd6c482 1045 struct perf_event_context *parent_ctx;
a308444c
IM
1046 u64 parent_gen;
1047 u64 generation;
1048 int pin_count;
d010b332
SE
1049 int nr_cgroups; /* cgroup evts */
1050 int nr_branch_stack; /* branch_stack evt */
28009ce4 1051 struct rcu_head rcu_head;
0793a61d
TG
1052};
1053
7ae07ea3
FW
1054/*
1055 * Number of contexts where an event can trigger:
e7e7ee2e 1056 * task, softirq, hardirq, nmi.
7ae07ea3
FW
1057 */
1058#define PERF_NR_CONTEXTS 4
1059
0793a61d 1060/**
cdd6c482 1061 * struct perf_event_cpu_context - per cpu event context structure
0793a61d
TG
1062 */
1063struct perf_cpu_context {
cdd6c482
IM
1064 struct perf_event_context ctx;
1065 struct perf_event_context *task_ctx;
0793a61d 1066 int active_oncpu;
3b6f9e5c 1067 int exclusive;
e9d2b064
PZ
1068 struct list_head rotation_list;
1069 int jiffies_interval;
51676957 1070 struct pmu *active_pmu;
e5d1367f 1071 struct perf_cgroup *cgrp;
0793a61d
TG
1072};
1073
5622f295 1074struct perf_output_handle {
57c0c15b 1075 struct perf_event *event;
76369139 1076 struct ring_buffer *rb;
6d1acfd5 1077 unsigned long wakeup;
5d967a8b
PZ
1078 unsigned long size;
1079 void *addr;
1080 int page;
5622f295
MM
1081};
1082
cdd6c482 1083#ifdef CONFIG_PERF_EVENTS
829b42dd 1084
2e80a82a 1085extern int perf_pmu_register(struct pmu *pmu, char *name, int type);
b0a873eb 1086extern void perf_pmu_unregister(struct pmu *pmu);
621a01ea 1087
3bf101ba 1088extern int perf_num_counters(void);
84c79910 1089extern const char *perf_pmu_name(void);
ab0cce56
JO
1090extern void __perf_event_task_sched_in(struct task_struct *prev,
1091 struct task_struct *task);
1092extern void __perf_event_task_sched_out(struct task_struct *prev,
1093 struct task_struct *next);
cdd6c482
IM
1094extern int perf_event_init_task(struct task_struct *child);
1095extern void perf_event_exit_task(struct task_struct *child);
1096extern void perf_event_free_task(struct task_struct *task);
4e231c79 1097extern void perf_event_delayed_put(struct task_struct *task);
cdd6c482 1098extern void perf_event_print_debug(void);
33696fc0
PZ
1099extern void perf_pmu_disable(struct pmu *pmu);
1100extern void perf_pmu_enable(struct pmu *pmu);
cdd6c482
IM
1101extern int perf_event_task_disable(void);
1102extern int perf_event_task_enable(void);
26ca5c11 1103extern int perf_event_refresh(struct perf_event *event, int refresh);
cdd6c482 1104extern void perf_event_update_userpage(struct perf_event *event);
fb0459d7
AV
1105extern int perf_event_release_kernel(struct perf_event *event);
1106extern struct perf_event *
1107perf_event_create_kernel_counter(struct perf_event_attr *attr,
1108 int cpu,
38a81da2 1109 struct task_struct *task,
4dc0da86
AK
1110 perf_overflow_handler_t callback,
1111 void *context);
0cda4c02
YZ
1112extern void perf_pmu_migrate_context(struct pmu *pmu,
1113 int src_cpu, int dst_cpu);
59ed446f
PZ
1114extern u64 perf_event_read_value(struct perf_event *event,
1115 u64 *enabled, u64 *running);
5c92d124 1116
d010b332 1117
df1a132b 1118struct perf_sample_data {
5622f295
MM
1119 u64 type;
1120
1121 u64 ip;
1122 struct {
1123 u32 pid;
1124 u32 tid;
1125 } tid_entry;
1126 u64 time;
a308444c 1127 u64 addr;
5622f295
MM
1128 u64 id;
1129 u64 stream_id;
1130 struct {
1131 u32 cpu;
1132 u32 reserved;
1133 } cpu_entry;
a308444c 1134 u64 period;
5622f295 1135 struct perf_callchain_entry *callchain;
3a43ce68 1136 struct perf_raw_record *raw;
bce38cd5 1137 struct perf_branch_stack *br_stack;
df1a132b
PZ
1138};
1139
fd0d000b
RR
1140static inline void perf_sample_data_init(struct perf_sample_data *data,
1141 u64 addr, u64 period)
dc1d628a 1142{
fd0d000b 1143 /* remaining struct members initialized in perf_prepare_sample() */
dc1d628a
PZ
1144 data->addr = addr;
1145 data->raw = NULL;
bce38cd5 1146 data->br_stack = NULL;
fd0d000b 1147 data->period = period;
dc1d628a
PZ
1148}
1149
5622f295
MM
1150extern void perf_output_sample(struct perf_output_handle *handle,
1151 struct perf_event_header *header,
1152 struct perf_sample_data *data,
cdd6c482 1153 struct perf_event *event);
5622f295
MM
1154extern void perf_prepare_sample(struct perf_event_header *header,
1155 struct perf_sample_data *data,
cdd6c482 1156 struct perf_event *event,
5622f295
MM
1157 struct pt_regs *regs);
1158
a8b0ca17 1159extern int perf_event_overflow(struct perf_event *event,
5622f295
MM
1160 struct perf_sample_data *data,
1161 struct pt_regs *regs);
df1a132b 1162
6c7e550f
FBH
1163static inline bool is_sampling_event(struct perf_event *event)
1164{
1165 return event->attr.sample_period != 0;
1166}
1167
3b6f9e5c 1168/*
cdd6c482 1169 * Return 1 for a software event, 0 for a hardware event
3b6f9e5c 1170 */
cdd6c482 1171static inline int is_software_event(struct perf_event *event)
3b6f9e5c 1172{
89a1e187 1173 return event->pmu->task_ctx_nr == perf_sw_context;
3b6f9e5c
PM
1174}
1175
c5905afb 1176extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX];
f29ac756 1177
a8b0ca17 1178extern void __perf_sw_event(u32, u64, struct pt_regs *, u64);
f29ac756 1179
b0f82b81 1180#ifndef perf_arch_fetch_caller_regs
e7e7ee2e 1181static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { }
b0f82b81 1182#endif
5331d7b8
FW
1183
1184/*
1185 * Take a snapshot of the regs. Skip ip and frame pointer to
1186 * the nth caller. We only need a few of the regs:
1187 * - ip for PERF_SAMPLE_IP
1188 * - cs for user_mode() tests
1189 * - bp for callchains
1190 * - eflags, for future purposes, just in case
1191 */
b0f82b81 1192static inline void perf_fetch_caller_regs(struct pt_regs *regs)
5331d7b8 1193{
5331d7b8
FW
1194 memset(regs, 0, sizeof(*regs));
1195
b0f82b81 1196 perf_arch_fetch_caller_regs(regs, CALLER_ADDR0);
5331d7b8
FW
1197}
1198
7e54a5a0 1199static __always_inline void
a8b0ca17 1200perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr)
e49a5bd3 1201{
7e54a5a0
PZ
1202 struct pt_regs hot_regs;
1203
c5905afb 1204 if (static_key_false(&perf_swevent_enabled[event_id])) {
d430d3d7
JB
1205 if (!regs) {
1206 perf_fetch_caller_regs(&hot_regs);
1207 regs = &hot_regs;
1208 }
a8b0ca17 1209 __perf_sw_event(event_id, nr, regs, addr);
e49a5bd3
FW
1210 }
1211}
1212
c5905afb 1213extern struct static_key_deferred perf_sched_events;
ee6dcfa4 1214
ab0cce56 1215static inline void perf_event_task_sched_in(struct task_struct *prev,
a8d757ef 1216 struct task_struct *task)
ab0cce56
JO
1217{
1218 if (static_key_false(&perf_sched_events.key))
1219 __perf_event_task_sched_in(prev, task);
1220}
1221
1222static inline void perf_event_task_sched_out(struct task_struct *prev,
1223 struct task_struct *next)
ee6dcfa4 1224{
a8b0ca17 1225 perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0);
ee6dcfa4 1226
c5905afb 1227 if (static_key_false(&perf_sched_events.key))
ab0cce56 1228 __perf_event_task_sched_out(prev, next);
ee6dcfa4
PZ
1229}
1230
3af9e859 1231extern void perf_event_mmap(struct vm_area_struct *vma);
39447b38 1232extern struct perf_guest_info_callbacks *perf_guest_cbs;
dcf46b94
ZY
1233extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
1234extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
39447b38 1235
cdd6c482
IM
1236extern void perf_event_comm(struct task_struct *tsk);
1237extern void perf_event_fork(struct task_struct *tsk);
8d1b2d93 1238
56962b44
FW
1239/* Callchains */
1240DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry);
1241
e7e7ee2e
IM
1242extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs);
1243extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs);
394ee076 1244
e7e7ee2e 1245static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip)
70791ce9
FW
1246{
1247 if (entry->nr < PERF_MAX_STACK_DEPTH)
1248 entry->ip[entry->nr++] = ip;
1249}
394ee076 1250
cdd6c482
IM
1251extern int sysctl_perf_event_paranoid;
1252extern int sysctl_perf_event_mlock;
1253extern int sysctl_perf_event_sample_rate;
1ccd1549 1254
163ec435
PZ
1255extern int perf_proc_update_handler(struct ctl_table *table, int write,
1256 void __user *buffer, size_t *lenp,
1257 loff_t *ppos);
1258
320ebf09
PZ
1259static inline bool perf_paranoid_tracepoint_raw(void)
1260{
1261 return sysctl_perf_event_paranoid > -1;
1262}
1263
1264static inline bool perf_paranoid_cpu(void)
1265{
1266 return sysctl_perf_event_paranoid > 0;
1267}
1268
1269static inline bool perf_paranoid_kernel(void)
1270{
1271 return sysctl_perf_event_paranoid > 1;
1272}
1273
cdd6c482 1274extern void perf_event_init(void);
1c024eca
PZ
1275extern void perf_tp_event(u64 addr, u64 count, void *record,
1276 int entry_size, struct pt_regs *regs,
e6dab5ff
AV
1277 struct hlist_head *head, int rctx,
1278 struct task_struct *task);
24f1e32c 1279extern void perf_bp_event(struct perf_event *event, void *data);
0d905bca 1280
9d23a90a 1281#ifndef perf_misc_flags
e7e7ee2e
IM
1282# define perf_misc_flags(regs) \
1283 (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL)
1284# define perf_instruction_pointer(regs) instruction_pointer(regs)
9d23a90a
PM
1285#endif
1286
bce38cd5
SE
1287static inline bool has_branch_stack(struct perf_event *event)
1288{
1289 return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK;
1290}
1291
5622f295 1292extern int perf_output_begin(struct perf_output_handle *handle,
a7ac67ea 1293 struct perf_event *event, unsigned int size);
5622f295
MM
1294extern void perf_output_end(struct perf_output_handle *handle);
1295extern void perf_output_copy(struct perf_output_handle *handle,
1296 const void *buf, unsigned int len);
4ed7c92d
PZ
1297extern int perf_swevent_get_recursion_context(void);
1298extern void perf_swevent_put_recursion_context(int rctx);
44234adc
FW
1299extern void perf_event_enable(struct perf_event *event);
1300extern void perf_event_disable(struct perf_event *event);
500ad2d8 1301extern int __perf_event_disable(void *info);
e9d2b064 1302extern void perf_event_task_tick(void);
0793a61d
TG
1303#else
1304static inline void
ab0cce56
JO
1305perf_event_task_sched_in(struct task_struct *prev,
1306 struct task_struct *task) { }
1307static inline void
1308perf_event_task_sched_out(struct task_struct *prev,
1309 struct task_struct *next) { }
cdd6c482
IM
1310static inline int perf_event_init_task(struct task_struct *child) { return 0; }
1311static inline void perf_event_exit_task(struct task_struct *child) { }
1312static inline void perf_event_free_task(struct task_struct *task) { }
4e231c79 1313static inline void perf_event_delayed_put(struct task_struct *task) { }
57c0c15b 1314static inline void perf_event_print_debug(void) { }
57c0c15b
IM
1315static inline int perf_event_task_disable(void) { return -EINVAL; }
1316static inline int perf_event_task_enable(void) { return -EINVAL; }
26ca5c11
AK
1317static inline int perf_event_refresh(struct perf_event *event, int refresh)
1318{
1319 return -EINVAL;
1320}
15dbf27c 1321
925d519a 1322static inline void
a8b0ca17 1323perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { }
24f1e32c 1324static inline void
184f412c 1325perf_bp_event(struct perf_event *event, void *data) { }
0a4a9391 1326
39447b38 1327static inline int perf_register_guest_info_callbacks
e7e7ee2e 1328(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1329static inline int perf_unregister_guest_info_callbacks
e7e7ee2e 1330(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1331
57c0c15b 1332static inline void perf_event_mmap(struct vm_area_struct *vma) { }
cdd6c482
IM
1333static inline void perf_event_comm(struct task_struct *tsk) { }
1334static inline void perf_event_fork(struct task_struct *tsk) { }
1335static inline void perf_event_init(void) { }
184f412c 1336static inline int perf_swevent_get_recursion_context(void) { return -1; }
4ed7c92d 1337static inline void perf_swevent_put_recursion_context(int rctx) { }
44234adc
FW
1338static inline void perf_event_enable(struct perf_event *event) { }
1339static inline void perf_event_disable(struct perf_event *event) { }
500ad2d8 1340static inline int __perf_event_disable(void *info) { return -1; }
e9d2b064 1341static inline void perf_event_task_tick(void) { }
0793a61d
TG
1342#endif
1343
e7e7ee2e 1344#define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x))
5622f295 1345
3f6da390
PZ
1346/*
1347 * This has to have a higher priority than migration_notifier in sched.c.
1348 */
e7e7ee2e
IM
1349#define perf_cpu_notifier(fn) \
1350do { \
1351 static struct notifier_block fn##_nb __cpuinitdata = \
1352 { .notifier_call = fn, .priority = CPU_PRI_PERF }; \
1353 fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \
1354 (void *)(unsigned long)smp_processor_id()); \
1355 fn(&fn##_nb, (unsigned long)CPU_STARTING, \
1356 (void *)(unsigned long)smp_processor_id()); \
1357 fn(&fn##_nb, (unsigned long)CPU_ONLINE, \
1358 (void *)(unsigned long)smp_processor_id()); \
1359 register_cpu_notifier(&fn##_nb); \
3f6da390
PZ
1360} while (0)
1361
641cc938
JO
1362
1363#define PMU_FORMAT_ATTR(_name, _format) \
1364static ssize_t \
1365_name##_show(struct device *dev, \
1366 struct device_attribute *attr, \
1367 char *page) \
1368{ \
1369 BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
1370 return sprintf(page, _format "\n"); \
1371} \
1372 \
1373static struct device_attribute format_attr_##_name = __ATTR_RO(_name)
1374
f3dfd265 1375#endif /* __KERNEL__ */
cdd6c482 1376#endif /* _LINUX_PERF_EVENT_H */
This page took 0.331408 seconds and 5 git commands to generate.