Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
607ca46e | 17 | #include <uapi/linux/perf_event.h> |
0793a61d | 18 | |
9f66a381 | 19 | /* |
f3dfd265 | 20 | * Kernel-internal data types and definitions: |
9f66a381 IM |
21 | */ |
22 | ||
cdd6c482 IM |
23 | #ifdef CONFIG_PERF_EVENTS |
24 | # include <asm/perf_event.h> | |
7be79236 | 25 | # include <asm/local64.h> |
f3dfd265 PM |
26 | #endif |
27 | ||
39447b38 | 28 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
29 | int (*is_in_guest)(void); |
30 | int (*is_user_mode)(void); | |
31 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
32 | }; |
33 | ||
2ff6cfd7 AB |
34 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
35 | #include <asm/hw_breakpoint.h> | |
36 | #endif | |
37 | ||
f3dfd265 PM |
38 | #include <linux/list.h> |
39 | #include <linux/mutex.h> | |
40 | #include <linux/rculist.h> | |
41 | #include <linux/rcupdate.h> | |
42 | #include <linux/spinlock.h> | |
d6d020e9 | 43 | #include <linux/hrtimer.h> |
3c446b3d | 44 | #include <linux/fs.h> |
709e50cf | 45 | #include <linux/pid_namespace.h> |
906010b2 | 46 | #include <linux/workqueue.h> |
5331d7b8 | 47 | #include <linux/ftrace.h> |
85cfabbc | 48 | #include <linux/cpu.h> |
e360adbe | 49 | #include <linux/irq_work.h> |
c5905afb | 50 | #include <linux/static_key.h> |
851cf6e7 | 51 | #include <linux/jump_label_ratelimit.h> |
60063497 | 52 | #include <linux/atomic.h> |
641cc938 | 53 | #include <linux/sysfs.h> |
4018994f | 54 | #include <linux/perf_regs.h> |
fadfe7be | 55 | #include <linux/workqueue.h> |
39bed6cb | 56 | #include <linux/cgroup.h> |
fa588151 | 57 | #include <asm/local.h> |
f3dfd265 | 58 | |
f9188e02 PZ |
59 | struct perf_callchain_entry { |
60 | __u64 nr; | |
61 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
62 | }; | |
63 | ||
3a43ce68 FW |
64 | struct perf_raw_record { |
65 | u32 size; | |
66 | void *data; | |
f413cdb8 FW |
67 | }; |
68 | ||
bce38cd5 SE |
69 | /* |
70 | * branch stack layout: | |
71 | * nr: number of taken branches stored in entries[] | |
72 | * | |
73 | * Note that nr can vary from sample to sample | |
74 | * branches (to, from) are stored from most recent | |
75 | * to least recent, i.e., entries[0] contains the most | |
76 | * recent branch. | |
77 | */ | |
caff2bef PZ |
78 | struct perf_branch_stack { |
79 | __u64 nr; | |
80 | struct perf_branch_entry entries[0]; | |
81 | }; | |
82 | ||
f3dfd265 PM |
83 | struct task_struct; |
84 | ||
efc9f05d SE |
85 | /* |
86 | * extra PMU register associated with an event | |
87 | */ | |
88 | struct hw_perf_event_extra { | |
89 | u64 config; /* register value */ | |
90 | unsigned int reg; /* register address or index */ | |
91 | int alloc; /* extra register already allocated */ | |
92 | int idx; /* index in shared_regs->regs[] */ | |
93 | }; | |
94 | ||
43b45780 AH |
95 | struct event_constraint; |
96 | ||
0793a61d | 97 | /** |
cdd6c482 | 98 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 99 | */ |
cdd6c482 IM |
100 | struct hw_perf_event { |
101 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
102 | union { |
103 | struct { /* hardware */ | |
a308444c | 104 | u64 config; |
447a194b | 105 | u64 last_tag; |
a308444c | 106 | unsigned long config_base; |
cdd6c482 | 107 | unsigned long event_base; |
c48b6053 | 108 | int event_base_rdpmc; |
a308444c | 109 | int idx; |
447a194b | 110 | int last_cpu; |
9fac2cf3 | 111 | int flags; |
bce38cd5 | 112 | |
efc9f05d | 113 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 114 | struct hw_perf_event_extra branch_reg; |
43b45780 AH |
115 | |
116 | struct event_constraint *constraint; | |
d6d020e9 | 117 | }; |
721a669b | 118 | struct { /* software */ |
a308444c | 119 | struct hrtimer hrtimer; |
d6d020e9 | 120 | }; |
f22c1bb6 | 121 | struct { /* tracepoint */ |
f22c1bb6 ON |
122 | /* for tp_event->class */ |
123 | struct list_head tp_list; | |
124 | }; | |
4afbb24c MF |
125 | struct { /* intel_cqm */ |
126 | int cqm_state; | |
127 | int cqm_rmid; | |
128 | struct list_head cqm_events_entry; | |
129 | struct list_head cqm_groups_entry; | |
130 | struct list_head cqm_group_entry; | |
131 | }; | |
24f1e32c | 132 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 | 133 | struct { /* breakpoint */ |
d580ff86 PZ |
134 | /* |
135 | * Crufty hack to avoid the chicken and egg | |
136 | * problem hw_breakpoint has with context | |
137 | * creation and event initalization. | |
138 | */ | |
f22c1bb6 ON |
139 | struct arch_hw_breakpoint info; |
140 | struct list_head bp_list; | |
45a73372 | 141 | }; |
24f1e32c | 142 | #endif |
d6d020e9 | 143 | }; |
50f16a8b | 144 | struct task_struct *target; |
a4eaf7f1 | 145 | int state; |
e7850595 | 146 | local64_t prev_count; |
b23f3325 | 147 | u64 sample_period; |
9e350de3 | 148 | u64 last_period; |
e7850595 | 149 | local64_t period_left; |
e050e3f0 | 150 | u64 interrupts_seq; |
60db5e09 | 151 | u64 interrupts; |
6a24ed6c | 152 | |
abd50713 PZ |
153 | u64 freq_time_stamp; |
154 | u64 freq_count_stamp; | |
ee06094f | 155 | #endif |
0793a61d TG |
156 | }; |
157 | ||
a4eaf7f1 PZ |
158 | /* |
159 | * hw_perf_event::state flags | |
160 | */ | |
161 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
162 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
163 | #define PERF_HES_ARCH 0x04 | |
164 | ||
cdd6c482 | 165 | struct perf_event; |
621a01ea | 166 | |
8d2cacbb PZ |
167 | /* |
168 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
169 | */ | |
170 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 171 | |
53b25335 VW |
172 | /** |
173 | * pmu::capabilities flags | |
174 | */ | |
175 | #define PERF_PMU_CAP_NO_INTERRUPT 0x01 | |
34f43927 | 176 | #define PERF_PMU_CAP_NO_NMI 0x02 |
0a4e38e6 | 177 | #define PERF_PMU_CAP_AUX_NO_SG 0x04 |
6a279230 | 178 | #define PERF_PMU_CAP_AUX_SW_DOUBLEBUF 0x08 |
53b25335 | 179 | |
621a01ea | 180 | /** |
4aeb0b42 | 181 | * struct pmu - generic performance monitoring unit |
621a01ea | 182 | */ |
4aeb0b42 | 183 | struct pmu { |
b0a873eb PZ |
184 | struct list_head entry; |
185 | ||
c464c76e | 186 | struct module *module; |
abe43400 | 187 | struct device *dev; |
0c9d42ed | 188 | const struct attribute_group **attr_groups; |
03d8e80b | 189 | const char *name; |
2e80a82a PZ |
190 | int type; |
191 | ||
53b25335 VW |
192 | /* |
193 | * various common per-pmu feature flags | |
194 | */ | |
195 | int capabilities; | |
196 | ||
108b02cf PZ |
197 | int * __percpu pmu_disable_count; |
198 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 199 | int task_ctx_nr; |
62b85639 | 200 | int hrtimer_interval_ms; |
6bde9b6c LM |
201 | |
202 | /* | |
a4eaf7f1 PZ |
203 | * Fully disable/enable this PMU, can be used to protect from the PMI |
204 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 205 | */ |
ad5133b7 PZ |
206 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
207 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 208 | |
8d2cacbb | 209 | /* |
a4eaf7f1 | 210 | * Try and initialize the event for this PMU. |
24cd7f54 | 211 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 212 | */ |
b0a873eb PZ |
213 | int (*event_init) (struct perf_event *event); |
214 | ||
1e0fb9ec AL |
215 | /* |
216 | * Notification that the event was mapped or unmapped. Called | |
217 | * in the context of the mapping task. | |
218 | */ | |
219 | void (*event_mapped) (struct perf_event *event); /*optional*/ | |
220 | void (*event_unmapped) (struct perf_event *event); /*optional*/ | |
221 | ||
a4eaf7f1 PZ |
222 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
223 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
224 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
225 | ||
8d2cacbb | 226 | /* |
a4eaf7f1 PZ |
227 | * Adds/Removes a counter to/from the PMU, can be done inside |
228 | * a transaction, see the ->*_txn() methods. | |
229 | */ | |
230 | int (*add) (struct perf_event *event, int flags); | |
231 | void (*del) (struct perf_event *event, int flags); | |
232 | ||
233 | /* | |
234 | * Starts/Stops a counter present on the PMU. The PMI handler | |
235 | * should stop the counter when perf_event_overflow() returns | |
236 | * !0. ->start() will be used to continue. | |
237 | */ | |
238 | void (*start) (struct perf_event *event, int flags); | |
239 | void (*stop) (struct perf_event *event, int flags); | |
240 | ||
241 | /* | |
242 | * Updates the counter value of the event. | |
243 | */ | |
cdd6c482 | 244 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
245 | |
246 | /* | |
24cd7f54 PZ |
247 | * Group events scheduling is treated as a transaction, add |
248 | * group events as a whole and perform one schedulability test. | |
249 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
250 | * |
251 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 252 | * do schedulability tests. |
8d2cacbb | 253 | */ |
e7e7ee2e | 254 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 255 | /* |
a4eaf7f1 | 256 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
257 | * then ->commit_txn() is required to perform one. On success |
258 | * the transaction is closed. On error the transaction is kept | |
259 | * open until ->cancel_txn() is called. | |
260 | */ | |
e7e7ee2e | 261 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 262 | /* |
a4eaf7f1 | 263 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 264 | * for each successful ->add() during the transaction. |
8d2cacbb | 265 | */ |
e7e7ee2e | 266 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
35edc2a5 PZ |
267 | |
268 | /* | |
269 | * Will return the value for perf_event_mmap_page::index for this event, | |
270 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
271 | */ | |
272 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 | 273 | |
ba532500 YZ |
274 | /* |
275 | * context-switches callback | |
276 | */ | |
277 | void (*sched_task) (struct perf_event_context *ctx, | |
278 | bool sched_in); | |
4af57ef2 YZ |
279 | /* |
280 | * PMU specific data size | |
281 | */ | |
282 | size_t task_ctx_size; | |
ba532500 | 283 | |
eacd3ecc MF |
284 | |
285 | /* | |
286 | * Return the count value for a counter. | |
287 | */ | |
288 | u64 (*count) (struct perf_event *event); /*optional*/ | |
45bfb2e5 PZ |
289 | |
290 | /* | |
291 | * Set up pmu-private data structures for an AUX area | |
292 | */ | |
293 | void *(*setup_aux) (int cpu, void **pages, | |
294 | int nr_pages, bool overwrite); | |
295 | /* optional */ | |
296 | ||
297 | /* | |
298 | * Free pmu-private AUX data structures | |
299 | */ | |
300 | void (*free_aux) (void *aux); /* optional */ | |
621a01ea IM |
301 | }; |
302 | ||
6a930700 | 303 | /** |
cdd6c482 | 304 | * enum perf_event_active_state - the states of a event |
6a930700 | 305 | */ |
cdd6c482 | 306 | enum perf_event_active_state { |
179033b3 | 307 | PERF_EVENT_STATE_EXIT = -3, |
57c0c15b | 308 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
309 | PERF_EVENT_STATE_OFF = -1, |
310 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 311 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
312 | }; |
313 | ||
9b51f66d | 314 | struct file; |
453f19ee PZ |
315 | struct perf_sample_data; |
316 | ||
a8b0ca17 | 317 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
318 | struct perf_sample_data *, |
319 | struct pt_regs *regs); | |
320 | ||
d6f962b5 | 321 | enum perf_group_flag { |
e7e7ee2e | 322 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
323 | }; |
324 | ||
e7e7ee2e IM |
325 | #define SWEVENT_HLIST_BITS 8 |
326 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
327 | |
328 | struct swevent_hlist { | |
e7e7ee2e IM |
329 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
330 | struct rcu_head rcu_head; | |
76e1d904 FW |
331 | }; |
332 | ||
8a49542c PZ |
333 | #define PERF_ATTACH_CONTEXT 0x01 |
334 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 335 | #define PERF_ATTACH_TASK 0x04 |
4af57ef2 | 336 | #define PERF_ATTACH_TASK_DATA 0x08 |
8a49542c | 337 | |
877c6856 | 338 | struct perf_cgroup; |
76369139 FW |
339 | struct ring_buffer; |
340 | ||
0793a61d | 341 | /** |
cdd6c482 | 342 | * struct perf_event - performance event kernel representation: |
0793a61d | 343 | */ |
cdd6c482 IM |
344 | struct perf_event { |
345 | #ifdef CONFIG_PERF_EVENTS | |
9886167d PZ |
346 | /* |
347 | * entry onto perf_event_context::event_list; | |
348 | * modifications require ctx->lock | |
349 | * RCU safe iterations. | |
350 | */ | |
592903cd | 351 | struct list_head event_entry; |
9886167d PZ |
352 | |
353 | /* | |
354 | * XXX: group_entry and sibling_list should be mutually exclusive; | |
355 | * either you're a sibling on a group, or you're the group leader. | |
356 | * Rework the code to always use the same list element. | |
357 | * | |
358 | * Locked for modification by both ctx->mutex and ctx->lock; holding | |
359 | * either sufficies for read. | |
360 | */ | |
361 | struct list_head group_entry; | |
04289bb9 | 362 | struct list_head sibling_list; |
9886167d PZ |
363 | |
364 | /* | |
365 | * We need storage to track the entries in perf_pmu_migrate_context; we | |
366 | * cannot use the event_entry because of RCU and we want to keep the | |
367 | * group in tact which avoids us using the other two entries. | |
368 | */ | |
369 | struct list_head migrate_entry; | |
370 | ||
f3ae75de SE |
371 | struct hlist_node hlist_entry; |
372 | struct list_head active_entry; | |
0127c3ea | 373 | int nr_siblings; |
d6f962b5 | 374 | int group_flags; |
cdd6c482 | 375 | struct perf_event *group_leader; |
a4eaf7f1 | 376 | struct pmu *pmu; |
04289bb9 | 377 | |
cdd6c482 | 378 | enum perf_event_active_state state; |
8a49542c | 379 | unsigned int attach_state; |
e7850595 | 380 | local64_t count; |
a6e6dea6 | 381 | atomic64_t child_count; |
ee06094f | 382 | |
53cfbf59 | 383 | /* |
cdd6c482 | 384 | * These are the total time in nanoseconds that the event |
53cfbf59 | 385 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 386 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
387 | * and running (scheduled onto the CPU), respectively. |
388 | * | |
389 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 390 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
391 | */ |
392 | u64 total_time_enabled; | |
393 | u64 total_time_running; | |
394 | ||
395 | /* | |
396 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 397 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
398 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
399 | * in time. | |
cdd6c482 IM |
400 | * tstamp_enabled: the notional time when the event was enabled |
401 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 402 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 403 | * event was scheduled off. |
53cfbf59 PM |
404 | */ |
405 | u64 tstamp_enabled; | |
406 | u64 tstamp_running; | |
407 | u64 tstamp_stopped; | |
408 | ||
eed01528 SE |
409 | /* |
410 | * timestamp shadows the actual context timing but it can | |
411 | * be safely used in NMI interrupt context. It reflects the | |
412 | * context time as it was when the event was last scheduled in. | |
413 | * | |
414 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
415 | * compute ctx_time for a sample, simply add perf_clock(). | |
416 | */ | |
417 | u64 shadow_ctx_time; | |
418 | ||
24f1e32c | 419 | struct perf_event_attr attr; |
c320c7b7 | 420 | u16 header_size; |
6844c09d | 421 | u16 id_header_size; |
c320c7b7 | 422 | u16 read_size; |
cdd6c482 | 423 | struct hw_perf_event hw; |
0793a61d | 424 | |
cdd6c482 | 425 | struct perf_event_context *ctx; |
a6fa941d | 426 | atomic_long_t refcount; |
0793a61d | 427 | |
53cfbf59 PM |
428 | /* |
429 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 430 | * events have been enabled and running, respectively. |
53cfbf59 PM |
431 | */ |
432 | atomic64_t child_total_time_enabled; | |
433 | atomic64_t child_total_time_running; | |
434 | ||
0793a61d | 435 | /* |
d859e29f | 436 | * Protect attach/detach and child_list: |
0793a61d | 437 | */ |
fccc714b PZ |
438 | struct mutex child_mutex; |
439 | struct list_head child_list; | |
cdd6c482 | 440 | struct perf_event *parent; |
0793a61d TG |
441 | |
442 | int oncpu; | |
443 | int cpu; | |
444 | ||
082ff5a2 PZ |
445 | struct list_head owner_entry; |
446 | struct task_struct *owner; | |
447 | ||
7b732a75 PZ |
448 | /* mmap bits */ |
449 | struct mutex mmap_mutex; | |
450 | atomic_t mmap_count; | |
26cb63ad | 451 | |
76369139 | 452 | struct ring_buffer *rb; |
10c6db11 | 453 | struct list_head rb_entry; |
b69cf536 PZ |
454 | unsigned long rcu_batches; |
455 | int rcu_pending; | |
37d81828 | 456 | |
7b732a75 | 457 | /* poll related */ |
0793a61d | 458 | wait_queue_head_t waitq; |
3c446b3d | 459 | struct fasync_struct *fasync; |
79f14641 PZ |
460 | |
461 | /* delayed work for NMIs and such */ | |
462 | int pending_wakeup; | |
4c9e2542 | 463 | int pending_kill; |
79f14641 | 464 | int pending_disable; |
e360adbe | 465 | struct irq_work pending; |
592903cd | 466 | |
79f14641 PZ |
467 | atomic_t event_limit; |
468 | ||
cdd6c482 | 469 | void (*destroy)(struct perf_event *); |
592903cd | 470 | struct rcu_head rcu_head; |
709e50cf PZ |
471 | |
472 | struct pid_namespace *ns; | |
8e5799b1 | 473 | u64 id; |
6fb2915d | 474 | |
34f43927 | 475 | u64 (*clock)(void); |
b326e956 | 476 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 477 | void *overflow_handler_context; |
453f19ee | 478 | |
07b139c8 | 479 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 480 | struct ftrace_event_call *tp_event; |
6fb2915d | 481 | struct event_filter *filter; |
ced39002 JO |
482 | #ifdef CONFIG_FUNCTION_TRACER |
483 | struct ftrace_ops ftrace_ops; | |
484 | #endif | |
ee06094f | 485 | #endif |
6fb2915d | 486 | |
e5d1367f SE |
487 | #ifdef CONFIG_CGROUP_PERF |
488 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
489 | int cgrp_defer_enabled; | |
490 | #endif | |
491 | ||
6fb2915d | 492 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
493 | }; |
494 | ||
495 | /** | |
cdd6c482 | 496 | * struct perf_event_context - event context structure |
0793a61d | 497 | * |
cdd6c482 | 498 | * Used as a container for task events and CPU events as well: |
0793a61d | 499 | */ |
cdd6c482 | 500 | struct perf_event_context { |
108b02cf | 501 | struct pmu *pmu; |
0793a61d | 502 | /* |
cdd6c482 | 503 | * Protect the states of the events in the list, |
d859e29f | 504 | * nr_active, and the list: |
0793a61d | 505 | */ |
e625cce1 | 506 | raw_spinlock_t lock; |
d859e29f | 507 | /* |
cdd6c482 | 508 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
509 | * is sufficient to ensure the list doesn't change; to change |
510 | * the list you need to lock both the mutex and the spinlock. | |
511 | */ | |
a308444c | 512 | struct mutex mutex; |
04289bb9 | 513 | |
2fde4f94 | 514 | struct list_head active_ctx_list; |
889ff015 FW |
515 | struct list_head pinned_groups; |
516 | struct list_head flexible_groups; | |
a308444c | 517 | struct list_head event_list; |
cdd6c482 | 518 | int nr_events; |
a308444c IM |
519 | int nr_active; |
520 | int is_active; | |
bfbd3381 | 521 | int nr_stat; |
0f5a2601 | 522 | int nr_freq; |
dddd3379 | 523 | int rotate_disable; |
a308444c IM |
524 | atomic_t refcount; |
525 | struct task_struct *task; | |
53cfbf59 PM |
526 | |
527 | /* | |
4af4998b | 528 | * Context clock, runs when context enabled. |
53cfbf59 | 529 | */ |
a308444c IM |
530 | u64 time; |
531 | u64 timestamp; | |
564c2b21 PM |
532 | |
533 | /* | |
534 | * These fields let us detect when two contexts have both | |
535 | * been cloned (inherited) from a common ancestor. | |
536 | */ | |
cdd6c482 | 537 | struct perf_event_context *parent_ctx; |
a308444c IM |
538 | u64 parent_gen; |
539 | u64 generation; | |
540 | int pin_count; | |
d010b332 | 541 | int nr_cgroups; /* cgroup evts */ |
4af57ef2 | 542 | void *task_ctx_data; /* pmu specific data */ |
28009ce4 | 543 | struct rcu_head rcu_head; |
fadfe7be JO |
544 | |
545 | struct delayed_work orphans_remove; | |
546 | bool orphans_remove_sched; | |
0793a61d TG |
547 | }; |
548 | ||
7ae07ea3 FW |
549 | /* |
550 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 551 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
552 | */ |
553 | #define PERF_NR_CONTEXTS 4 | |
554 | ||
0793a61d | 555 | /** |
cdd6c482 | 556 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
557 | */ |
558 | struct perf_cpu_context { | |
cdd6c482 IM |
559 | struct perf_event_context ctx; |
560 | struct perf_event_context *task_ctx; | |
0793a61d | 561 | int active_oncpu; |
3b6f9e5c | 562 | int exclusive; |
9e630205 SE |
563 | struct hrtimer hrtimer; |
564 | ktime_t hrtimer_interval; | |
3f1f3320 | 565 | struct pmu *unique_pmu; |
e5d1367f | 566 | struct perf_cgroup *cgrp; |
0793a61d TG |
567 | }; |
568 | ||
5622f295 | 569 | struct perf_output_handle { |
57c0c15b | 570 | struct perf_event *event; |
76369139 | 571 | struct ring_buffer *rb; |
6d1acfd5 | 572 | unsigned long wakeup; |
5d967a8b PZ |
573 | unsigned long size; |
574 | void *addr; | |
575 | int page; | |
5622f295 MM |
576 | }; |
577 | ||
39bed6cb MF |
578 | #ifdef CONFIG_CGROUP_PERF |
579 | ||
580 | /* | |
581 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
582 | * This is a per-cpu dynamically allocated data structure. | |
583 | */ | |
584 | struct perf_cgroup_info { | |
585 | u64 time; | |
586 | u64 timestamp; | |
587 | }; | |
588 | ||
589 | struct perf_cgroup { | |
590 | struct cgroup_subsys_state css; | |
591 | struct perf_cgroup_info __percpu *info; | |
592 | }; | |
593 | ||
594 | /* | |
595 | * Must ensure cgroup is pinned (css_get) before calling | |
596 | * this function. In other words, we cannot call this function | |
597 | * if there is no cgroup event for the current CPU context. | |
598 | */ | |
599 | static inline struct perf_cgroup * | |
600 | perf_cgroup_from_task(struct task_struct *task) | |
601 | { | |
602 | return container_of(task_css(task, perf_event_cgrp_id), | |
603 | struct perf_cgroup, css); | |
604 | } | |
605 | #endif /* CONFIG_CGROUP_PERF */ | |
606 | ||
cdd6c482 | 607 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 608 | |
03d8e80b | 609 | extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); |
b0a873eb | 610 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 611 | |
3bf101ba | 612 | extern int perf_num_counters(void); |
84c79910 | 613 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
614 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
615 | struct task_struct *task); | |
616 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
617 | struct task_struct *next); | |
cdd6c482 IM |
618 | extern int perf_event_init_task(struct task_struct *child); |
619 | extern void perf_event_exit_task(struct task_struct *child); | |
620 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 621 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 622 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
623 | extern void perf_pmu_disable(struct pmu *pmu); |
624 | extern void perf_pmu_enable(struct pmu *pmu); | |
ba532500 YZ |
625 | extern void perf_sched_cb_dec(struct pmu *pmu); |
626 | extern void perf_sched_cb_inc(struct pmu *pmu); | |
cdd6c482 IM |
627 | extern int perf_event_task_disable(void); |
628 | extern int perf_event_task_enable(void); | |
26ca5c11 | 629 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 630 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
631 | extern int perf_event_release_kernel(struct perf_event *event); |
632 | extern struct perf_event * | |
633 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
634 | int cpu, | |
38a81da2 | 635 | struct task_struct *task, |
4dc0da86 AK |
636 | perf_overflow_handler_t callback, |
637 | void *context); | |
0cda4c02 YZ |
638 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
639 | int src_cpu, int dst_cpu); | |
59ed446f PZ |
640 | extern u64 perf_event_read_value(struct perf_event *event, |
641 | u64 *enabled, u64 *running); | |
5c92d124 | 642 | |
d010b332 | 643 | |
df1a132b | 644 | struct perf_sample_data { |
2565711f PZ |
645 | /* |
646 | * Fields set by perf_sample_data_init(), group so as to | |
647 | * minimize the cachelines touched. | |
648 | */ | |
649 | u64 addr; | |
650 | struct perf_raw_record *raw; | |
651 | struct perf_branch_stack *br_stack; | |
652 | u64 period; | |
653 | u64 weight; | |
654 | u64 txn; | |
655 | union perf_mem_data_src data_src; | |
5622f295 | 656 | |
2565711f PZ |
657 | /* |
658 | * The other fields, optionally {set,used} by | |
659 | * perf_{prepare,output}_sample(). | |
660 | */ | |
661 | u64 type; | |
5622f295 MM |
662 | u64 ip; |
663 | struct { | |
664 | u32 pid; | |
665 | u32 tid; | |
666 | } tid_entry; | |
667 | u64 time; | |
5622f295 MM |
668 | u64 id; |
669 | u64 stream_id; | |
670 | struct { | |
671 | u32 cpu; | |
672 | u32 reserved; | |
673 | } cpu_entry; | |
5622f295 | 674 | struct perf_callchain_entry *callchain; |
88a7c26a AL |
675 | |
676 | /* | |
677 | * regs_user may point to task_pt_regs or to regs_user_copy, depending | |
678 | * on arch details. | |
679 | */ | |
60e2364e | 680 | struct perf_regs regs_user; |
88a7c26a AL |
681 | struct pt_regs regs_user_copy; |
682 | ||
60e2364e | 683 | struct perf_regs regs_intr; |
c5ebcedb | 684 | u64 stack_user_size; |
2565711f | 685 | } ____cacheline_aligned; |
df1a132b | 686 | |
770eee1f SE |
687 | /* default value for data source */ |
688 | #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ | |
689 | PERF_MEM_S(LVL, NA) |\ | |
690 | PERF_MEM_S(SNOOP, NA) |\ | |
691 | PERF_MEM_S(LOCK, NA) |\ | |
692 | PERF_MEM_S(TLB, NA)) | |
693 | ||
fd0d000b RR |
694 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
695 | u64 addr, u64 period) | |
dc1d628a | 696 | { |
fd0d000b | 697 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
698 | data->addr = addr; |
699 | data->raw = NULL; | |
bce38cd5 | 700 | data->br_stack = NULL; |
4018994f | 701 | data->period = period; |
c3feedf2 | 702 | data->weight = 0; |
770eee1f | 703 | data->data_src.val = PERF_MEM_NA; |
fdfbbd07 | 704 | data->txn = 0; |
dc1d628a PZ |
705 | } |
706 | ||
5622f295 MM |
707 | extern void perf_output_sample(struct perf_output_handle *handle, |
708 | struct perf_event_header *header, | |
709 | struct perf_sample_data *data, | |
cdd6c482 | 710 | struct perf_event *event); |
5622f295 MM |
711 | extern void perf_prepare_sample(struct perf_event_header *header, |
712 | struct perf_sample_data *data, | |
cdd6c482 | 713 | struct perf_event *event, |
5622f295 MM |
714 | struct pt_regs *regs); |
715 | ||
a8b0ca17 | 716 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
717 | struct perf_sample_data *data, |
718 | struct pt_regs *regs); | |
df1a132b | 719 | |
6c7e550f FBH |
720 | static inline bool is_sampling_event(struct perf_event *event) |
721 | { | |
722 | return event->attr.sample_period != 0; | |
723 | } | |
724 | ||
3b6f9e5c | 725 | /* |
cdd6c482 | 726 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 727 | */ |
cdd6c482 | 728 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 729 | { |
89a1e187 | 730 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
731 | } |
732 | ||
c5905afb | 733 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 734 | |
86038c5e | 735 | extern void ___perf_sw_event(u32, u64, struct pt_regs *, u64); |
a8b0ca17 | 736 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 737 | |
b0f82b81 | 738 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 739 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 740 | #endif |
5331d7b8 FW |
741 | |
742 | /* | |
743 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
744 | * the nth caller. We only need a few of the regs: | |
745 | * - ip for PERF_SAMPLE_IP | |
746 | * - cs for user_mode() tests | |
747 | * - bp for callchains | |
748 | * - eflags, for future purposes, just in case | |
749 | */ | |
b0f82b81 | 750 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 751 | { |
5331d7b8 FW |
752 | memset(regs, 0, sizeof(*regs)); |
753 | ||
b0f82b81 | 754 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
755 | } |
756 | ||
7e54a5a0 | 757 | static __always_inline void |
a8b0ca17 | 758 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 759 | { |
86038c5e PZI |
760 | if (static_key_false(&perf_swevent_enabled[event_id])) |
761 | __perf_sw_event(event_id, nr, regs, addr); | |
762 | } | |
763 | ||
764 | DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]); | |
7e54a5a0 | 765 | |
86038c5e PZI |
766 | /* |
767 | * 'Special' version for the scheduler, it hard assumes no recursion, | |
768 | * which is guaranteed by us not actually scheduling inside other swevents | |
769 | * because those disable preemption. | |
770 | */ | |
771 | static __always_inline void | |
772 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) | |
773 | { | |
c5905afb | 774 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
86038c5e PZI |
775 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); |
776 | ||
777 | perf_fetch_caller_regs(regs); | |
778 | ___perf_sw_event(event_id, nr, regs, addr); | |
e49a5bd3 FW |
779 | } |
780 | } | |
781 | ||
c5905afb | 782 | extern struct static_key_deferred perf_sched_events; |
ee6dcfa4 | 783 | |
ab0cce56 | 784 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 785 | struct task_struct *task) |
ab0cce56 JO |
786 | { |
787 | if (static_key_false(&perf_sched_events.key)) | |
788 | __perf_event_task_sched_in(prev, task); | |
789 | } | |
790 | ||
791 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
792 | struct task_struct *next) | |
ee6dcfa4 | 793 | { |
86038c5e | 794 | perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0); |
ee6dcfa4 | 795 | |
c5905afb | 796 | if (static_key_false(&perf_sched_events.key)) |
ab0cce56 | 797 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
798 | } |
799 | ||
eacd3ecc MF |
800 | static inline u64 __perf_event_count(struct perf_event *event) |
801 | { | |
802 | return local64_read(&event->count) + atomic64_read(&event->child_count); | |
803 | } | |
804 | ||
3af9e859 | 805 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 806 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
807 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
808 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 809 | |
e041e328 | 810 | extern void perf_event_exec(void); |
82b89778 | 811 | extern void perf_event_comm(struct task_struct *tsk, bool exec); |
cdd6c482 | 812 | extern void perf_event_fork(struct task_struct *tsk); |
8d1b2d93 | 813 | |
56962b44 FW |
814 | /* Callchains */ |
815 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
816 | ||
e7e7ee2e IM |
817 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
818 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 819 | |
e7e7ee2e | 820 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
821 | { |
822 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
823 | entry->ip[entry->nr++] = ip; | |
824 | } | |
394ee076 | 825 | |
cdd6c482 IM |
826 | extern int sysctl_perf_event_paranoid; |
827 | extern int sysctl_perf_event_mlock; | |
828 | extern int sysctl_perf_event_sample_rate; | |
14c63f17 DH |
829 | extern int sysctl_perf_cpu_time_max_percent; |
830 | ||
831 | extern void perf_sample_event_took(u64 sample_len_ns); | |
1ccd1549 | 832 | |
163ec435 PZ |
833 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
834 | void __user *buffer, size_t *lenp, | |
835 | loff_t *ppos); | |
14c63f17 DH |
836 | extern int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, |
837 | void __user *buffer, size_t *lenp, | |
838 | loff_t *ppos); | |
839 | ||
163ec435 | 840 | |
320ebf09 PZ |
841 | static inline bool perf_paranoid_tracepoint_raw(void) |
842 | { | |
843 | return sysctl_perf_event_paranoid > -1; | |
844 | } | |
845 | ||
846 | static inline bool perf_paranoid_cpu(void) | |
847 | { | |
848 | return sysctl_perf_event_paranoid > 0; | |
849 | } | |
850 | ||
851 | static inline bool perf_paranoid_kernel(void) | |
852 | { | |
853 | return sysctl_perf_event_paranoid > 1; | |
854 | } | |
855 | ||
cdd6c482 | 856 | extern void perf_event_init(void); |
1c024eca PZ |
857 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
858 | int entry_size, struct pt_regs *regs, | |
e6dab5ff AV |
859 | struct hlist_head *head, int rctx, |
860 | struct task_struct *task); | |
24f1e32c | 861 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 862 | |
9d23a90a | 863 | #ifndef perf_misc_flags |
e7e7ee2e IM |
864 | # define perf_misc_flags(regs) \ |
865 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
866 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
867 | #endif |
868 | ||
bce38cd5 SE |
869 | static inline bool has_branch_stack(struct perf_event *event) |
870 | { | |
871 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
a46a2300 YZ |
872 | } |
873 | ||
874 | static inline bool needs_branch_stack(struct perf_event *event) | |
875 | { | |
876 | return event->attr.branch_sample_type != 0; | |
bce38cd5 SE |
877 | } |
878 | ||
45bfb2e5 PZ |
879 | static inline bool has_aux(struct perf_event *event) |
880 | { | |
881 | return event->pmu->setup_aux; | |
882 | } | |
883 | ||
5622f295 | 884 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 885 | struct perf_event *event, unsigned int size); |
5622f295 | 886 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 887 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 888 | const void *buf, unsigned int len); |
5685e0ff JO |
889 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
890 | unsigned int len); | |
4ed7c92d PZ |
891 | extern int perf_swevent_get_recursion_context(void); |
892 | extern void perf_swevent_put_recursion_context(int rctx); | |
ab573844 | 893 | extern u64 perf_swevent_set_period(struct perf_event *event); |
44234adc FW |
894 | extern void perf_event_enable(struct perf_event *event); |
895 | extern void perf_event_disable(struct perf_event *event); | |
500ad2d8 | 896 | extern int __perf_event_disable(void *info); |
e9d2b064 | 897 | extern void perf_event_task_tick(void); |
e041e328 | 898 | #else /* !CONFIG_PERF_EVENTS: */ |
0793a61d | 899 | static inline void |
ab0cce56 JO |
900 | perf_event_task_sched_in(struct task_struct *prev, |
901 | struct task_struct *task) { } | |
902 | static inline void | |
903 | perf_event_task_sched_out(struct task_struct *prev, | |
904 | struct task_struct *next) { } | |
cdd6c482 IM |
905 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
906 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
907 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 908 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 909 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
910 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
911 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
912 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
913 | { | |
914 | return -EINVAL; | |
915 | } | |
15dbf27c | 916 | |
925d519a | 917 | static inline void |
a8b0ca17 | 918 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 919 | static inline void |
86038c5e PZI |
920 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) { } |
921 | static inline void | |
184f412c | 922 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 923 | |
39447b38 | 924 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 925 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 926 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 927 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 928 | |
57c0c15b | 929 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
e041e328 | 930 | static inline void perf_event_exec(void) { } |
82b89778 | 931 | static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } |
cdd6c482 IM |
932 | static inline void perf_event_fork(struct task_struct *tsk) { } |
933 | static inline void perf_event_init(void) { } | |
184f412c | 934 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 935 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
ab573844 | 936 | static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } |
44234adc FW |
937 | static inline void perf_event_enable(struct perf_event *event) { } |
938 | static inline void perf_event_disable(struct perf_event *event) { } | |
500ad2d8 | 939 | static inline int __perf_event_disable(void *info) { return -1; } |
e9d2b064 | 940 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
941 | #endif |
942 | ||
026249ef FW |
943 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_NO_HZ_FULL) |
944 | extern bool perf_event_can_stop_tick(void); | |
945 | #else | |
946 | static inline bool perf_event_can_stop_tick(void) { return true; } | |
947 | #endif | |
948 | ||
6c4d3bc9 DR |
949 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) |
950 | extern void perf_restore_debug_store(void); | |
951 | #else | |
1d9d8639 | 952 | static inline void perf_restore_debug_store(void) { } |
0793a61d TG |
953 | #endif |
954 | ||
e7e7ee2e | 955 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 956 | |
3f6da390 | 957 | /* |
0a0fca9d | 958 | * This has to have a higher priority than migration_notifier in sched/core.c. |
3f6da390 | 959 | */ |
e7e7ee2e IM |
960 | #define perf_cpu_notifier(fn) \ |
961 | do { \ | |
0db0628d | 962 | static struct notifier_block fn##_nb = \ |
e7e7ee2e | 963 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ |
c13d38e4 | 964 | unsigned long cpu = smp_processor_id(); \ |
6760bca9 | 965 | unsigned long flags; \ |
f0bdb5e0 SB |
966 | \ |
967 | cpu_notifier_register_begin(); \ | |
e7e7ee2e | 968 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ |
c13d38e4 | 969 | (void *)(unsigned long)cpu); \ |
6760bca9 | 970 | local_irq_save(flags); \ |
e7e7ee2e | 971 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ |
c13d38e4 | 972 | (void *)(unsigned long)cpu); \ |
6760bca9 | 973 | local_irq_restore(flags); \ |
e7e7ee2e | 974 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ |
c13d38e4 | 975 | (void *)(unsigned long)cpu); \ |
f0bdb5e0 SB |
976 | __register_cpu_notifier(&fn##_nb); \ |
977 | cpu_notifier_register_done(); \ | |
3f6da390 PZ |
978 | } while (0) |
979 | ||
f0bdb5e0 SB |
980 | /* |
981 | * Bare-bones version of perf_cpu_notifier(), which doesn't invoke the | |
982 | * callback for already online CPUs. | |
983 | */ | |
984 | #define __perf_cpu_notifier(fn) \ | |
985 | do { \ | |
986 | static struct notifier_block fn##_nb = \ | |
987 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
988 | \ | |
989 | __register_cpu_notifier(&fn##_nb); \ | |
990 | } while (0) | |
641cc938 | 991 | |
2663960c SB |
992 | struct perf_pmu_events_attr { |
993 | struct device_attribute attr; | |
994 | u64 id; | |
3a54aaa0 | 995 | const char *event_str; |
2663960c SB |
996 | }; |
997 | ||
fd979c01 CS |
998 | ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr, |
999 | char *page); | |
1000 | ||
2663960c SB |
1001 | #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ |
1002 | static struct perf_pmu_events_attr _var = { \ | |
1003 | .attr = __ATTR(_name, 0444, _show, NULL), \ | |
1004 | .id = _id, \ | |
1005 | }; | |
1006 | ||
f0405b81 CS |
1007 | #define PMU_EVENT_ATTR_STRING(_name, _var, _str) \ |
1008 | static struct perf_pmu_events_attr _var = { \ | |
1009 | .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \ | |
1010 | .id = 0, \ | |
1011 | .event_str = _str, \ | |
1012 | }; | |
1013 | ||
641cc938 JO |
1014 | #define PMU_FORMAT_ATTR(_name, _format) \ |
1015 | static ssize_t \ | |
1016 | _name##_show(struct device *dev, \ | |
1017 | struct device_attribute *attr, \ | |
1018 | char *page) \ | |
1019 | { \ | |
1020 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1021 | return sprintf(page, _format "\n"); \ | |
1022 | } \ | |
1023 | \ | |
1024 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1025 | ||
cdd6c482 | 1026 | #endif /* _LINUX_PERF_EVENT_H */ |