Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
607ca46e | 17 | #include <uapi/linux/perf_event.h> |
0793a61d | 18 | |
9f66a381 | 19 | /* |
f3dfd265 | 20 | * Kernel-internal data types and definitions: |
9f66a381 IM |
21 | */ |
22 | ||
cdd6c482 IM |
23 | #ifdef CONFIG_PERF_EVENTS |
24 | # include <asm/perf_event.h> | |
7be79236 | 25 | # include <asm/local64.h> |
f3dfd265 PM |
26 | #endif |
27 | ||
39447b38 | 28 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
29 | int (*is_in_guest)(void); |
30 | int (*is_user_mode)(void); | |
31 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
32 | }; |
33 | ||
2ff6cfd7 AB |
34 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
35 | #include <asm/hw_breakpoint.h> | |
36 | #endif | |
37 | ||
f3dfd265 PM |
38 | #include <linux/list.h> |
39 | #include <linux/mutex.h> | |
40 | #include <linux/rculist.h> | |
41 | #include <linux/rcupdate.h> | |
42 | #include <linux/spinlock.h> | |
d6d020e9 | 43 | #include <linux/hrtimer.h> |
3c446b3d | 44 | #include <linux/fs.h> |
709e50cf | 45 | #include <linux/pid_namespace.h> |
906010b2 | 46 | #include <linux/workqueue.h> |
5331d7b8 | 47 | #include <linux/ftrace.h> |
85cfabbc | 48 | #include <linux/cpu.h> |
e360adbe | 49 | #include <linux/irq_work.h> |
c5905afb | 50 | #include <linux/static_key.h> |
60063497 | 51 | #include <linux/atomic.h> |
641cc938 | 52 | #include <linux/sysfs.h> |
4018994f | 53 | #include <linux/perf_regs.h> |
fa588151 | 54 | #include <asm/local.h> |
f3dfd265 | 55 | |
f9188e02 PZ |
56 | struct perf_callchain_entry { |
57 | __u64 nr; | |
58 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
59 | }; | |
60 | ||
3a43ce68 FW |
61 | struct perf_raw_record { |
62 | u32 size; | |
63 | void *data; | |
f413cdb8 FW |
64 | }; |
65 | ||
bce38cd5 SE |
66 | /* |
67 | * single taken branch record layout: | |
68 | * | |
69 | * from: source instruction (may not always be a branch insn) | |
70 | * to: branch target | |
71 | * mispred: branch target was mispredicted | |
72 | * predicted: branch target was predicted | |
73 | * | |
74 | * support for mispred, predicted is optional. In case it | |
75 | * is not supported mispred = predicted = 0. | |
135c5612 AK |
76 | * |
77 | * in_tx: running in a hardware transaction | |
78 | * abort: aborting a hardware transaction | |
bce38cd5 | 79 | */ |
caff2bef | 80 | struct perf_branch_entry { |
bce38cd5 SE |
81 | __u64 from; |
82 | __u64 to; | |
83 | __u64 mispred:1, /* target mispredicted */ | |
84 | predicted:1,/* target predicted */ | |
135c5612 AK |
85 | in_tx:1, /* in transaction */ |
86 | abort:1, /* transaction abort */ | |
87 | reserved:60; | |
caff2bef PZ |
88 | }; |
89 | ||
bce38cd5 SE |
90 | /* |
91 | * branch stack layout: | |
92 | * nr: number of taken branches stored in entries[] | |
93 | * | |
94 | * Note that nr can vary from sample to sample | |
95 | * branches (to, from) are stored from most recent | |
96 | * to least recent, i.e., entries[0] contains the most | |
97 | * recent branch. | |
98 | */ | |
caff2bef PZ |
99 | struct perf_branch_stack { |
100 | __u64 nr; | |
101 | struct perf_branch_entry entries[0]; | |
102 | }; | |
103 | ||
4018994f JO |
104 | struct perf_regs_user { |
105 | __u64 abi; | |
106 | struct pt_regs *regs; | |
107 | }; | |
108 | ||
f3dfd265 PM |
109 | struct task_struct; |
110 | ||
efc9f05d SE |
111 | /* |
112 | * extra PMU register associated with an event | |
113 | */ | |
114 | struct hw_perf_event_extra { | |
115 | u64 config; /* register value */ | |
116 | unsigned int reg; /* register address or index */ | |
117 | int alloc; /* extra register already allocated */ | |
118 | int idx; /* index in shared_regs->regs[] */ | |
119 | }; | |
120 | ||
43b45780 AH |
121 | struct event_constraint; |
122 | ||
0793a61d | 123 | /** |
cdd6c482 | 124 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 125 | */ |
cdd6c482 IM |
126 | struct hw_perf_event { |
127 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
128 | union { |
129 | struct { /* hardware */ | |
a308444c | 130 | u64 config; |
447a194b | 131 | u64 last_tag; |
a308444c | 132 | unsigned long config_base; |
cdd6c482 | 133 | unsigned long event_base; |
c48b6053 | 134 | int event_base_rdpmc; |
a308444c | 135 | int idx; |
447a194b | 136 | int last_cpu; |
9fac2cf3 | 137 | int flags; |
bce38cd5 | 138 | |
efc9f05d | 139 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 140 | struct hw_perf_event_extra branch_reg; |
43b45780 AH |
141 | |
142 | struct event_constraint *constraint; | |
d6d020e9 | 143 | }; |
721a669b | 144 | struct { /* software */ |
a308444c | 145 | struct hrtimer hrtimer; |
d6d020e9 | 146 | }; |
f22c1bb6 ON |
147 | struct { /* tracepoint */ |
148 | struct task_struct *tp_target; | |
149 | /* for tp_event->class */ | |
150 | struct list_head tp_list; | |
151 | }; | |
24f1e32c | 152 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 | 153 | struct { /* breakpoint */ |
d580ff86 PZ |
154 | /* |
155 | * Crufty hack to avoid the chicken and egg | |
156 | * problem hw_breakpoint has with context | |
157 | * creation and event initalization. | |
158 | */ | |
159 | struct task_struct *bp_target; | |
f22c1bb6 ON |
160 | struct arch_hw_breakpoint info; |
161 | struct list_head bp_list; | |
45a73372 | 162 | }; |
24f1e32c | 163 | #endif |
d6d020e9 | 164 | }; |
a4eaf7f1 | 165 | int state; |
e7850595 | 166 | local64_t prev_count; |
b23f3325 | 167 | u64 sample_period; |
9e350de3 | 168 | u64 last_period; |
e7850595 | 169 | local64_t period_left; |
e050e3f0 | 170 | u64 interrupts_seq; |
60db5e09 | 171 | u64 interrupts; |
6a24ed6c | 172 | |
abd50713 PZ |
173 | u64 freq_time_stamp; |
174 | u64 freq_count_stamp; | |
ee06094f | 175 | #endif |
0793a61d TG |
176 | }; |
177 | ||
a4eaf7f1 PZ |
178 | /* |
179 | * hw_perf_event::state flags | |
180 | */ | |
181 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
182 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
183 | #define PERF_HES_ARCH 0x04 | |
184 | ||
cdd6c482 | 185 | struct perf_event; |
621a01ea | 186 | |
8d2cacbb PZ |
187 | /* |
188 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
189 | */ | |
190 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 191 | |
621a01ea | 192 | /** |
4aeb0b42 | 193 | * struct pmu - generic performance monitoring unit |
621a01ea | 194 | */ |
4aeb0b42 | 195 | struct pmu { |
b0a873eb PZ |
196 | struct list_head entry; |
197 | ||
abe43400 | 198 | struct device *dev; |
0c9d42ed | 199 | const struct attribute_group **attr_groups; |
03d8e80b | 200 | const char *name; |
2e80a82a PZ |
201 | int type; |
202 | ||
108b02cf PZ |
203 | int * __percpu pmu_disable_count; |
204 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 205 | int task_ctx_nr; |
62b85639 | 206 | int hrtimer_interval_ms; |
6bde9b6c LM |
207 | |
208 | /* | |
a4eaf7f1 PZ |
209 | * Fully disable/enable this PMU, can be used to protect from the PMI |
210 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 211 | */ |
ad5133b7 PZ |
212 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
213 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 214 | |
8d2cacbb | 215 | /* |
a4eaf7f1 | 216 | * Try and initialize the event for this PMU. |
24cd7f54 | 217 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 218 | */ |
b0a873eb PZ |
219 | int (*event_init) (struct perf_event *event); |
220 | ||
a4eaf7f1 PZ |
221 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
222 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
223 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
224 | ||
8d2cacbb | 225 | /* |
a4eaf7f1 PZ |
226 | * Adds/Removes a counter to/from the PMU, can be done inside |
227 | * a transaction, see the ->*_txn() methods. | |
228 | */ | |
229 | int (*add) (struct perf_event *event, int flags); | |
230 | void (*del) (struct perf_event *event, int flags); | |
231 | ||
232 | /* | |
233 | * Starts/Stops a counter present on the PMU. The PMI handler | |
234 | * should stop the counter when perf_event_overflow() returns | |
235 | * !0. ->start() will be used to continue. | |
236 | */ | |
237 | void (*start) (struct perf_event *event, int flags); | |
238 | void (*stop) (struct perf_event *event, int flags); | |
239 | ||
240 | /* | |
241 | * Updates the counter value of the event. | |
242 | */ | |
cdd6c482 | 243 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
244 | |
245 | /* | |
24cd7f54 PZ |
246 | * Group events scheduling is treated as a transaction, add |
247 | * group events as a whole and perform one schedulability test. | |
248 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
249 | * |
250 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 251 | * do schedulability tests. |
8d2cacbb | 252 | */ |
e7e7ee2e | 253 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 254 | /* |
a4eaf7f1 | 255 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
256 | * then ->commit_txn() is required to perform one. On success |
257 | * the transaction is closed. On error the transaction is kept | |
258 | * open until ->cancel_txn() is called. | |
259 | */ | |
e7e7ee2e | 260 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 261 | /* |
a4eaf7f1 | 262 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 263 | * for each successful ->add() during the transaction. |
8d2cacbb | 264 | */ |
e7e7ee2e | 265 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
35edc2a5 PZ |
266 | |
267 | /* | |
268 | * Will return the value for perf_event_mmap_page::index for this event, | |
269 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
270 | */ | |
271 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 SE |
272 | |
273 | /* | |
274 | * flush branch stack on context-switches (needed in cpu-wide mode) | |
275 | */ | |
276 | void (*flush_branch_stack) (void); | |
621a01ea IM |
277 | }; |
278 | ||
6a930700 | 279 | /** |
cdd6c482 | 280 | * enum perf_event_active_state - the states of a event |
6a930700 | 281 | */ |
cdd6c482 | 282 | enum perf_event_active_state { |
57c0c15b | 283 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
284 | PERF_EVENT_STATE_OFF = -1, |
285 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 286 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
287 | }; |
288 | ||
9b51f66d | 289 | struct file; |
453f19ee PZ |
290 | struct perf_sample_data; |
291 | ||
a8b0ca17 | 292 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
293 | struct perf_sample_data *, |
294 | struct pt_regs *regs); | |
295 | ||
d6f962b5 | 296 | enum perf_group_flag { |
e7e7ee2e | 297 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
298 | }; |
299 | ||
e7e7ee2e IM |
300 | #define SWEVENT_HLIST_BITS 8 |
301 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
302 | |
303 | struct swevent_hlist { | |
e7e7ee2e IM |
304 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
305 | struct rcu_head rcu_head; | |
76e1d904 FW |
306 | }; |
307 | ||
8a49542c PZ |
308 | #define PERF_ATTACH_CONTEXT 0x01 |
309 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 310 | #define PERF_ATTACH_TASK 0x04 |
8a49542c | 311 | |
877c6856 | 312 | struct perf_cgroup; |
76369139 FW |
313 | struct ring_buffer; |
314 | ||
0793a61d | 315 | /** |
cdd6c482 | 316 | * struct perf_event - performance event kernel representation: |
0793a61d | 317 | */ |
cdd6c482 IM |
318 | struct perf_event { |
319 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 320 | struct list_head group_entry; |
592903cd | 321 | struct list_head event_entry; |
04289bb9 | 322 | struct list_head sibling_list; |
76e1d904 | 323 | struct hlist_node hlist_entry; |
0127c3ea | 324 | int nr_siblings; |
d6f962b5 | 325 | int group_flags; |
cdd6c482 | 326 | struct perf_event *group_leader; |
a4eaf7f1 | 327 | struct pmu *pmu; |
04289bb9 | 328 | |
cdd6c482 | 329 | enum perf_event_active_state state; |
8a49542c | 330 | unsigned int attach_state; |
e7850595 | 331 | local64_t count; |
a6e6dea6 | 332 | atomic64_t child_count; |
ee06094f | 333 | |
53cfbf59 | 334 | /* |
cdd6c482 | 335 | * These are the total time in nanoseconds that the event |
53cfbf59 | 336 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 337 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
338 | * and running (scheduled onto the CPU), respectively. |
339 | * | |
340 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 341 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
342 | */ |
343 | u64 total_time_enabled; | |
344 | u64 total_time_running; | |
345 | ||
346 | /* | |
347 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 348 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
349 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
350 | * in time. | |
cdd6c482 IM |
351 | * tstamp_enabled: the notional time when the event was enabled |
352 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 353 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 354 | * event was scheduled off. |
53cfbf59 PM |
355 | */ |
356 | u64 tstamp_enabled; | |
357 | u64 tstamp_running; | |
358 | u64 tstamp_stopped; | |
359 | ||
eed01528 SE |
360 | /* |
361 | * timestamp shadows the actual context timing but it can | |
362 | * be safely used in NMI interrupt context. It reflects the | |
363 | * context time as it was when the event was last scheduled in. | |
364 | * | |
365 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
366 | * compute ctx_time for a sample, simply add perf_clock(). | |
367 | */ | |
368 | u64 shadow_ctx_time; | |
369 | ||
24f1e32c | 370 | struct perf_event_attr attr; |
c320c7b7 | 371 | u16 header_size; |
6844c09d | 372 | u16 id_header_size; |
c320c7b7 | 373 | u16 read_size; |
cdd6c482 | 374 | struct hw_perf_event hw; |
0793a61d | 375 | |
cdd6c482 | 376 | struct perf_event_context *ctx; |
a6fa941d | 377 | atomic_long_t refcount; |
0793a61d | 378 | |
53cfbf59 PM |
379 | /* |
380 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 381 | * events have been enabled and running, respectively. |
53cfbf59 PM |
382 | */ |
383 | atomic64_t child_total_time_enabled; | |
384 | atomic64_t child_total_time_running; | |
385 | ||
0793a61d | 386 | /* |
d859e29f | 387 | * Protect attach/detach and child_list: |
0793a61d | 388 | */ |
fccc714b PZ |
389 | struct mutex child_mutex; |
390 | struct list_head child_list; | |
cdd6c482 | 391 | struct perf_event *parent; |
0793a61d TG |
392 | |
393 | int oncpu; | |
394 | int cpu; | |
395 | ||
082ff5a2 PZ |
396 | struct list_head owner_entry; |
397 | struct task_struct *owner; | |
398 | ||
7b732a75 PZ |
399 | /* mmap bits */ |
400 | struct mutex mmap_mutex; | |
401 | atomic_t mmap_count; | |
26cb63ad | 402 | |
76369139 | 403 | struct ring_buffer *rb; |
10c6db11 | 404 | struct list_head rb_entry; |
37d81828 | 405 | |
7b732a75 | 406 | /* poll related */ |
0793a61d | 407 | wait_queue_head_t waitq; |
3c446b3d | 408 | struct fasync_struct *fasync; |
79f14641 PZ |
409 | |
410 | /* delayed work for NMIs and such */ | |
411 | int pending_wakeup; | |
4c9e2542 | 412 | int pending_kill; |
79f14641 | 413 | int pending_disable; |
e360adbe | 414 | struct irq_work pending; |
592903cd | 415 | |
79f14641 PZ |
416 | atomic_t event_limit; |
417 | ||
cdd6c482 | 418 | void (*destroy)(struct perf_event *); |
592903cd | 419 | struct rcu_head rcu_head; |
709e50cf PZ |
420 | |
421 | struct pid_namespace *ns; | |
8e5799b1 | 422 | u64 id; |
6fb2915d | 423 | |
b326e956 | 424 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 425 | void *overflow_handler_context; |
453f19ee | 426 | |
07b139c8 | 427 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 428 | struct ftrace_event_call *tp_event; |
6fb2915d | 429 | struct event_filter *filter; |
ced39002 JO |
430 | #ifdef CONFIG_FUNCTION_TRACER |
431 | struct ftrace_ops ftrace_ops; | |
432 | #endif | |
ee06094f | 433 | #endif |
6fb2915d | 434 | |
e5d1367f SE |
435 | #ifdef CONFIG_CGROUP_PERF |
436 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
437 | int cgrp_defer_enabled; | |
438 | #endif | |
439 | ||
6fb2915d | 440 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
441 | }; |
442 | ||
b04243ef PZ |
443 | enum perf_event_context_type { |
444 | task_context, | |
445 | cpu_context, | |
446 | }; | |
447 | ||
0793a61d | 448 | /** |
cdd6c482 | 449 | * struct perf_event_context - event context structure |
0793a61d | 450 | * |
cdd6c482 | 451 | * Used as a container for task events and CPU events as well: |
0793a61d | 452 | */ |
cdd6c482 | 453 | struct perf_event_context { |
108b02cf | 454 | struct pmu *pmu; |
ee643c41 | 455 | enum perf_event_context_type type; |
0793a61d | 456 | /* |
cdd6c482 | 457 | * Protect the states of the events in the list, |
d859e29f | 458 | * nr_active, and the list: |
0793a61d | 459 | */ |
e625cce1 | 460 | raw_spinlock_t lock; |
d859e29f | 461 | /* |
cdd6c482 | 462 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
463 | * is sufficient to ensure the list doesn't change; to change |
464 | * the list you need to lock both the mutex and the spinlock. | |
465 | */ | |
a308444c | 466 | struct mutex mutex; |
04289bb9 | 467 | |
889ff015 FW |
468 | struct list_head pinned_groups; |
469 | struct list_head flexible_groups; | |
a308444c | 470 | struct list_head event_list; |
cdd6c482 | 471 | int nr_events; |
a308444c IM |
472 | int nr_active; |
473 | int is_active; | |
bfbd3381 | 474 | int nr_stat; |
0f5a2601 | 475 | int nr_freq; |
dddd3379 | 476 | int rotate_disable; |
a308444c IM |
477 | atomic_t refcount; |
478 | struct task_struct *task; | |
53cfbf59 PM |
479 | |
480 | /* | |
4af4998b | 481 | * Context clock, runs when context enabled. |
53cfbf59 | 482 | */ |
a308444c IM |
483 | u64 time; |
484 | u64 timestamp; | |
564c2b21 PM |
485 | |
486 | /* | |
487 | * These fields let us detect when two contexts have both | |
488 | * been cloned (inherited) from a common ancestor. | |
489 | */ | |
cdd6c482 | 490 | struct perf_event_context *parent_ctx; |
a308444c IM |
491 | u64 parent_gen; |
492 | u64 generation; | |
493 | int pin_count; | |
d010b332 SE |
494 | int nr_cgroups; /* cgroup evts */ |
495 | int nr_branch_stack; /* branch_stack evt */ | |
28009ce4 | 496 | struct rcu_head rcu_head; |
0793a61d TG |
497 | }; |
498 | ||
7ae07ea3 FW |
499 | /* |
500 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 501 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
502 | */ |
503 | #define PERF_NR_CONTEXTS 4 | |
504 | ||
0793a61d | 505 | /** |
cdd6c482 | 506 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
507 | */ |
508 | struct perf_cpu_context { | |
cdd6c482 IM |
509 | struct perf_event_context ctx; |
510 | struct perf_event_context *task_ctx; | |
0793a61d | 511 | int active_oncpu; |
3b6f9e5c | 512 | int exclusive; |
9e630205 SE |
513 | struct hrtimer hrtimer; |
514 | ktime_t hrtimer_interval; | |
e9d2b064 | 515 | struct list_head rotation_list; |
3f1f3320 | 516 | struct pmu *unique_pmu; |
e5d1367f | 517 | struct perf_cgroup *cgrp; |
0793a61d TG |
518 | }; |
519 | ||
5622f295 | 520 | struct perf_output_handle { |
57c0c15b | 521 | struct perf_event *event; |
76369139 | 522 | struct ring_buffer *rb; |
6d1acfd5 | 523 | unsigned long wakeup; |
5d967a8b PZ |
524 | unsigned long size; |
525 | void *addr; | |
526 | int page; | |
5622f295 MM |
527 | }; |
528 | ||
cdd6c482 | 529 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 530 | |
03d8e80b | 531 | extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); |
b0a873eb | 532 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 533 | |
3bf101ba | 534 | extern int perf_num_counters(void); |
84c79910 | 535 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
536 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
537 | struct task_struct *task); | |
538 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
539 | struct task_struct *next); | |
cdd6c482 IM |
540 | extern int perf_event_init_task(struct task_struct *child); |
541 | extern void perf_event_exit_task(struct task_struct *child); | |
542 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 543 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 544 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
545 | extern void perf_pmu_disable(struct pmu *pmu); |
546 | extern void perf_pmu_enable(struct pmu *pmu); | |
cdd6c482 IM |
547 | extern int perf_event_task_disable(void); |
548 | extern int perf_event_task_enable(void); | |
26ca5c11 | 549 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 550 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
551 | extern int perf_event_release_kernel(struct perf_event *event); |
552 | extern struct perf_event * | |
553 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
554 | int cpu, | |
38a81da2 | 555 | struct task_struct *task, |
4dc0da86 AK |
556 | perf_overflow_handler_t callback, |
557 | void *context); | |
0cda4c02 YZ |
558 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
559 | int src_cpu, int dst_cpu); | |
59ed446f PZ |
560 | extern u64 perf_event_read_value(struct perf_event *event, |
561 | u64 *enabled, u64 *running); | |
5c92d124 | 562 | |
d010b332 | 563 | |
df1a132b | 564 | struct perf_sample_data { |
5622f295 MM |
565 | u64 type; |
566 | ||
567 | u64 ip; | |
568 | struct { | |
569 | u32 pid; | |
570 | u32 tid; | |
571 | } tid_entry; | |
572 | u64 time; | |
a308444c | 573 | u64 addr; |
5622f295 MM |
574 | u64 id; |
575 | u64 stream_id; | |
576 | struct { | |
577 | u32 cpu; | |
578 | u32 reserved; | |
579 | } cpu_entry; | |
a308444c | 580 | u64 period; |
d6be9ad6 | 581 | union perf_mem_data_src data_src; |
5622f295 | 582 | struct perf_callchain_entry *callchain; |
3a43ce68 | 583 | struct perf_raw_record *raw; |
bce38cd5 | 584 | struct perf_branch_stack *br_stack; |
4018994f | 585 | struct perf_regs_user regs_user; |
c5ebcedb | 586 | u64 stack_user_size; |
c3feedf2 | 587 | u64 weight; |
df1a132b PZ |
588 | }; |
589 | ||
fd0d000b RR |
590 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
591 | u64 addr, u64 period) | |
dc1d628a | 592 | { |
fd0d000b | 593 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
594 | data->addr = addr; |
595 | data->raw = NULL; | |
bce38cd5 | 596 | data->br_stack = NULL; |
4018994f JO |
597 | data->period = period; |
598 | data->regs_user.abi = PERF_SAMPLE_REGS_ABI_NONE; | |
599 | data->regs_user.regs = NULL; | |
c5ebcedb | 600 | data->stack_user_size = 0; |
c3feedf2 | 601 | data->weight = 0; |
d6be9ad6 | 602 | data->data_src.val = 0; |
dc1d628a PZ |
603 | } |
604 | ||
5622f295 MM |
605 | extern void perf_output_sample(struct perf_output_handle *handle, |
606 | struct perf_event_header *header, | |
607 | struct perf_sample_data *data, | |
cdd6c482 | 608 | struct perf_event *event); |
5622f295 MM |
609 | extern void perf_prepare_sample(struct perf_event_header *header, |
610 | struct perf_sample_data *data, | |
cdd6c482 | 611 | struct perf_event *event, |
5622f295 MM |
612 | struct pt_regs *regs); |
613 | ||
a8b0ca17 | 614 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
615 | struct perf_sample_data *data, |
616 | struct pt_regs *regs); | |
df1a132b | 617 | |
6c7e550f FBH |
618 | static inline bool is_sampling_event(struct perf_event *event) |
619 | { | |
620 | return event->attr.sample_period != 0; | |
621 | } | |
622 | ||
3b6f9e5c | 623 | /* |
cdd6c482 | 624 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 625 | */ |
cdd6c482 | 626 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 627 | { |
89a1e187 | 628 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
629 | } |
630 | ||
c5905afb | 631 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 632 | |
a8b0ca17 | 633 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 634 | |
b0f82b81 | 635 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 636 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 637 | #endif |
5331d7b8 FW |
638 | |
639 | /* | |
640 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
641 | * the nth caller. We only need a few of the regs: | |
642 | * - ip for PERF_SAMPLE_IP | |
643 | * - cs for user_mode() tests | |
644 | * - bp for callchains | |
645 | * - eflags, for future purposes, just in case | |
646 | */ | |
b0f82b81 | 647 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 648 | { |
5331d7b8 FW |
649 | memset(regs, 0, sizeof(*regs)); |
650 | ||
b0f82b81 | 651 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
652 | } |
653 | ||
7e54a5a0 | 654 | static __always_inline void |
a8b0ca17 | 655 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 656 | { |
7e54a5a0 PZ |
657 | struct pt_regs hot_regs; |
658 | ||
c5905afb | 659 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
d430d3d7 JB |
660 | if (!regs) { |
661 | perf_fetch_caller_regs(&hot_regs); | |
662 | regs = &hot_regs; | |
663 | } | |
a8b0ca17 | 664 | __perf_sw_event(event_id, nr, regs, addr); |
e49a5bd3 FW |
665 | } |
666 | } | |
667 | ||
c5905afb | 668 | extern struct static_key_deferred perf_sched_events; |
ee6dcfa4 | 669 | |
ab0cce56 | 670 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 671 | struct task_struct *task) |
ab0cce56 JO |
672 | { |
673 | if (static_key_false(&perf_sched_events.key)) | |
674 | __perf_event_task_sched_in(prev, task); | |
675 | } | |
676 | ||
677 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
678 | struct task_struct *next) | |
ee6dcfa4 | 679 | { |
a8b0ca17 | 680 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
ee6dcfa4 | 681 | |
c5905afb | 682 | if (static_key_false(&perf_sched_events.key)) |
ab0cce56 | 683 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
684 | } |
685 | ||
3af9e859 | 686 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 687 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
688 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
689 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 690 | |
cdd6c482 IM |
691 | extern void perf_event_comm(struct task_struct *tsk); |
692 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 693 | |
56962b44 FW |
694 | /* Callchains */ |
695 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
696 | ||
e7e7ee2e IM |
697 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
698 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 699 | |
e7e7ee2e | 700 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
701 | { |
702 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
703 | entry->ip[entry->nr++] = ip; | |
704 | } | |
394ee076 | 705 | |
cdd6c482 IM |
706 | extern int sysctl_perf_event_paranoid; |
707 | extern int sysctl_perf_event_mlock; | |
708 | extern int sysctl_perf_event_sample_rate; | |
14c63f17 DH |
709 | extern int sysctl_perf_cpu_time_max_percent; |
710 | ||
711 | extern void perf_sample_event_took(u64 sample_len_ns); | |
1ccd1549 | 712 | |
163ec435 PZ |
713 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
714 | void __user *buffer, size_t *lenp, | |
715 | loff_t *ppos); | |
14c63f17 DH |
716 | extern int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, |
717 | void __user *buffer, size_t *lenp, | |
718 | loff_t *ppos); | |
719 | ||
163ec435 | 720 | |
320ebf09 PZ |
721 | static inline bool perf_paranoid_tracepoint_raw(void) |
722 | { | |
723 | return sysctl_perf_event_paranoid > -1; | |
724 | } | |
725 | ||
726 | static inline bool perf_paranoid_cpu(void) | |
727 | { | |
728 | return sysctl_perf_event_paranoid > 0; | |
729 | } | |
730 | ||
731 | static inline bool perf_paranoid_kernel(void) | |
732 | { | |
733 | return sysctl_perf_event_paranoid > 1; | |
734 | } | |
735 | ||
cdd6c482 | 736 | extern void perf_event_init(void); |
1c024eca PZ |
737 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
738 | int entry_size, struct pt_regs *regs, | |
e6dab5ff AV |
739 | struct hlist_head *head, int rctx, |
740 | struct task_struct *task); | |
24f1e32c | 741 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 742 | |
9d23a90a | 743 | #ifndef perf_misc_flags |
e7e7ee2e IM |
744 | # define perf_misc_flags(regs) \ |
745 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
746 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
747 | #endif |
748 | ||
bce38cd5 SE |
749 | static inline bool has_branch_stack(struct perf_event *event) |
750 | { | |
751 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
752 | } | |
753 | ||
5622f295 | 754 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 755 | struct perf_event *event, unsigned int size); |
5622f295 | 756 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 757 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 758 | const void *buf, unsigned int len); |
5685e0ff JO |
759 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
760 | unsigned int len); | |
4ed7c92d PZ |
761 | extern int perf_swevent_get_recursion_context(void); |
762 | extern void perf_swevent_put_recursion_context(int rctx); | |
ab573844 | 763 | extern u64 perf_swevent_set_period(struct perf_event *event); |
44234adc FW |
764 | extern void perf_event_enable(struct perf_event *event); |
765 | extern void perf_event_disable(struct perf_event *event); | |
500ad2d8 | 766 | extern int __perf_event_disable(void *info); |
e9d2b064 | 767 | extern void perf_event_task_tick(void); |
0793a61d TG |
768 | #else |
769 | static inline void | |
ab0cce56 JO |
770 | perf_event_task_sched_in(struct task_struct *prev, |
771 | struct task_struct *task) { } | |
772 | static inline void | |
773 | perf_event_task_sched_out(struct task_struct *prev, | |
774 | struct task_struct *next) { } | |
cdd6c482 IM |
775 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
776 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
777 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 778 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 779 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
780 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
781 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
782 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
783 | { | |
784 | return -EINVAL; | |
785 | } | |
15dbf27c | 786 | |
925d519a | 787 | static inline void |
a8b0ca17 | 788 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 789 | static inline void |
184f412c | 790 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 791 | |
39447b38 | 792 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 793 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 794 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 795 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 796 | |
57c0c15b | 797 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
798 | static inline void perf_event_comm(struct task_struct *tsk) { } |
799 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
800 | static inline void perf_event_init(void) { } | |
184f412c | 801 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 802 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
ab573844 | 803 | static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } |
44234adc FW |
804 | static inline void perf_event_enable(struct perf_event *event) { } |
805 | static inline void perf_event_disable(struct perf_event *event) { } | |
500ad2d8 | 806 | static inline int __perf_event_disable(void *info) { return -1; } |
e9d2b064 | 807 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
808 | #endif |
809 | ||
026249ef FW |
810 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_NO_HZ_FULL) |
811 | extern bool perf_event_can_stop_tick(void); | |
812 | #else | |
813 | static inline bool perf_event_can_stop_tick(void) { return true; } | |
814 | #endif | |
815 | ||
6c4d3bc9 DR |
816 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) |
817 | extern void perf_restore_debug_store(void); | |
818 | #else | |
1d9d8639 | 819 | static inline void perf_restore_debug_store(void) { } |
0793a61d TG |
820 | #endif |
821 | ||
e7e7ee2e | 822 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 823 | |
3f6da390 | 824 | /* |
0a0fca9d | 825 | * This has to have a higher priority than migration_notifier in sched/core.c. |
3f6da390 | 826 | */ |
e7e7ee2e IM |
827 | #define perf_cpu_notifier(fn) \ |
828 | do { \ | |
829 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
830 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
c13d38e4 | 831 | unsigned long cpu = smp_processor_id(); \ |
6760bca9 | 832 | unsigned long flags; \ |
e7e7ee2e | 833 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ |
c13d38e4 | 834 | (void *)(unsigned long)cpu); \ |
6760bca9 | 835 | local_irq_save(flags); \ |
e7e7ee2e | 836 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ |
c13d38e4 | 837 | (void *)(unsigned long)cpu); \ |
6760bca9 | 838 | local_irq_restore(flags); \ |
e7e7ee2e | 839 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ |
c13d38e4 | 840 | (void *)(unsigned long)cpu); \ |
e7e7ee2e | 841 | register_cpu_notifier(&fn##_nb); \ |
3f6da390 PZ |
842 | } while (0) |
843 | ||
641cc938 | 844 | |
2663960c SB |
845 | struct perf_pmu_events_attr { |
846 | struct device_attribute attr; | |
847 | u64 id; | |
3a54aaa0 | 848 | const char *event_str; |
2663960c SB |
849 | }; |
850 | ||
851 | #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ | |
852 | static struct perf_pmu_events_attr _var = { \ | |
853 | .attr = __ATTR(_name, 0444, _show, NULL), \ | |
854 | .id = _id, \ | |
855 | }; | |
856 | ||
641cc938 JO |
857 | #define PMU_FORMAT_ATTR(_name, _format) \ |
858 | static ssize_t \ | |
859 | _name##_show(struct device *dev, \ | |
860 | struct device_attribute *attr, \ | |
861 | char *page) \ | |
862 | { \ | |
863 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
864 | return sprintf(page, _format "\n"); \ | |
865 | } \ | |
866 | \ | |
867 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
868 | ||
cdd6c482 | 869 | #endif /* _LINUX_PERF_EVENT_H */ |