Commit | Line | Data |
---|---|---|
0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c IM |
4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
5 | * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar | |
6 | * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
55 | ||
a308444c | 56 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 57 | }; |
e077df4f | 58 | |
8326f44d | 59 | /* |
cdd6c482 | 60 | * Generalized hardware cache events: |
8326f44d | 61 | * |
8be6e8f3 | 62 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x |
8326f44d IM |
63 | * { read, write, prefetch } x |
64 | * { accesses, misses } | |
65 | */ | |
1c432d89 | 66 | enum perf_hw_cache_id { |
a308444c IM |
67 | PERF_COUNT_HW_CACHE_L1D = 0, |
68 | PERF_COUNT_HW_CACHE_L1I = 1, | |
69 | PERF_COUNT_HW_CACHE_LL = 2, | |
70 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
71 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
72 | PERF_COUNT_HW_CACHE_BPU = 5, | |
73 | ||
74 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
75 | }; |
76 | ||
1c432d89 | 77 | enum perf_hw_cache_op_id { |
a308444c IM |
78 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
79 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
80 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 81 | |
a308444c | 82 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
83 | }; |
84 | ||
1c432d89 PZ |
85 | enum perf_hw_cache_op_result_id { |
86 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
87 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 88 | |
a308444c | 89 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
90 | }; |
91 | ||
b8e83514 | 92 | /* |
cdd6c482 IM |
93 | * Special "software" events provided by the kernel, even if the hardware |
94 | * does not support performance events. These events measure various | |
b8e83514 PZ |
95 | * physical and sw events of the kernel (and allow the profiling of them as |
96 | * well): | |
97 | */ | |
1c432d89 | 98 | enum perf_sw_ids { |
a308444c IM |
99 | PERF_COUNT_SW_CPU_CLOCK = 0, |
100 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
101 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
102 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
103 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
104 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
105 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
106 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
107 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
108 | |
109 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
110 | }; |
111 | ||
8a057d84 | 112 | /* |
0d48696f | 113 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
114 | * in the overflow packets. |
115 | */ | |
cdd6c482 | 116 | enum perf_event_sample_format { |
a308444c IM |
117 | PERF_SAMPLE_IP = 1U << 0, |
118 | PERF_SAMPLE_TID = 1U << 1, | |
119 | PERF_SAMPLE_TIME = 1U << 2, | |
120 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 121 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
122 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
123 | PERF_SAMPLE_ID = 1U << 6, | |
124 | PERF_SAMPLE_CPU = 1U << 7, | |
125 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 126 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 127 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 128 | |
f413cdb8 | 129 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
130 | }; |
131 | ||
53cfbf59 | 132 | /* |
cdd6c482 | 133 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
134 | * as specified by attr.read_format: |
135 | * | |
136 | * struct read_format { | |
57c0c15b IM |
137 | * { u64 value; |
138 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
139 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
140 | * { u64 id; } && PERF_FORMAT_ID | |
141 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 142 | * |
57c0c15b IM |
143 | * { u64 nr; |
144 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
145 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
146 | * { u64 value; | |
147 | * { u64 id; } && PERF_FORMAT_ID | |
148 | * } cntr[nr]; | |
149 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 150 | * }; |
53cfbf59 | 151 | */ |
cdd6c482 | 152 | enum perf_event_read_format { |
a308444c IM |
153 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
154 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
155 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 156 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 157 | |
57c0c15b | 158 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
159 | }; |
160 | ||
974802ea PZ |
161 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
162 | ||
9f66a381 | 163 | /* |
cdd6c482 | 164 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 165 | */ |
cdd6c482 | 166 | struct perf_event_attr { |
974802ea | 167 | |
f4a2deb4 | 168 | /* |
a21ca2ca IM |
169 | * Major type: hardware/software/tracepoint/etc. |
170 | */ | |
171 | __u32 type; | |
974802ea PZ |
172 | |
173 | /* | |
174 | * Size of the attr structure, for fwd/bwd compat. | |
175 | */ | |
176 | __u32 size; | |
a21ca2ca IM |
177 | |
178 | /* | |
179 | * Type specific configuration information. | |
f4a2deb4 PZ |
180 | */ |
181 | __u64 config; | |
9f66a381 | 182 | |
60db5e09 | 183 | union { |
b23f3325 PZ |
184 | __u64 sample_period; |
185 | __u64 sample_freq; | |
60db5e09 PZ |
186 | }; |
187 | ||
b23f3325 PZ |
188 | __u64 sample_type; |
189 | __u64 read_format; | |
9f66a381 | 190 | |
2743a5b0 | 191 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
192 | inherit : 1, /* children inherit it */ |
193 | pinned : 1, /* must always be on PMU */ | |
194 | exclusive : 1, /* only group on PMU */ | |
195 | exclude_user : 1, /* don't count user */ | |
196 | exclude_kernel : 1, /* ditto kernel */ | |
197 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 198 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 199 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 200 | comm : 1, /* include comm data */ |
60db5e09 | 201 | freq : 1, /* use freq, not period */ |
bfbd3381 | 202 | inherit_stat : 1, /* per task counts */ |
57e7986e | 203 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 204 | task : 1, /* trace fork/exit */ |
2667de81 | 205 | watermark : 1, /* wakeup_watermark */ |
ab608344 PZ |
206 | /* |
207 | * precise_ip: | |
208 | * | |
209 | * 0 - SAMPLE_IP can have arbitrary skid | |
210 | * 1 - SAMPLE_IP must have constant skid | |
211 | * 2 - SAMPLE_IP requested to have 0 skid | |
212 | * 3 - SAMPLE_IP must have 0 skid | |
213 | * | |
214 | * See also PERF_RECORD_MISC_EXACT_IP | |
215 | */ | |
216 | precise_ip : 2, /* skid constraint */ | |
3af9e859 | 217 | mmap_data : 1, /* non-exec mmap data */ |
ab608344 | 218 | |
3af9e859 | 219 | __reserved_1 : 46; |
2743a5b0 | 220 | |
2667de81 PZ |
221 | union { |
222 | __u32 wakeup_events; /* wakeup every n events */ | |
223 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
224 | }; | |
24f1e32c | 225 | |
f13c12c6 | 226 | __u32 bp_type; |
cd757645 MS |
227 | __u64 bp_addr; |
228 | __u64 bp_len; | |
eab656ae TG |
229 | }; |
230 | ||
d859e29f | 231 | /* |
cdd6c482 | 232 | * Ioctls that can be done on a perf event fd: |
d859e29f | 233 | */ |
cdd6c482 | 234 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
235 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
236 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 237 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 238 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 239 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 240 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
241 | |
242 | enum perf_event_ioc_flags { | |
3df5edad PZ |
243 | PERF_IOC_FLAG_GROUP = 1U << 0, |
244 | }; | |
d859e29f | 245 | |
37d81828 PM |
246 | /* |
247 | * Structure of the page that can be mapped via mmap | |
248 | */ | |
cdd6c482 | 249 | struct perf_event_mmap_page { |
37d81828 PM |
250 | __u32 version; /* version number of this structure */ |
251 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
252 | |
253 | /* | |
cdd6c482 | 254 | * Bits needed to read the hw events in user-space. |
38ff667b | 255 | * |
92f22a38 PZ |
256 | * u32 seq; |
257 | * s64 count; | |
38ff667b | 258 | * |
a2e87d06 PZ |
259 | * do { |
260 | * seq = pc->lock; | |
38ff667b | 261 | * |
a2e87d06 PZ |
262 | * barrier() |
263 | * if (pc->index) { | |
264 | * count = pmc_read(pc->index - 1); | |
265 | * count += pc->offset; | |
266 | * } else | |
267 | * goto regular_read; | |
38ff667b | 268 | * |
a2e87d06 PZ |
269 | * barrier(); |
270 | * } while (pc->lock != seq); | |
38ff667b | 271 | * |
92f22a38 PZ |
272 | * NOTE: for obvious reason this only works on self-monitoring |
273 | * processes. | |
38ff667b | 274 | */ |
37d81828 | 275 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
276 | __u32 index; /* hardware event identifier */ |
277 | __s64 offset; /* add to hardware event value */ | |
278 | __u64 time_enabled; /* time event active */ | |
279 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 280 | |
41f95331 PZ |
281 | /* |
282 | * Hole for extension of the self monitor capabilities | |
283 | */ | |
284 | ||
7f8b4e4e | 285 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 286 | |
38ff667b PZ |
287 | /* |
288 | * Control data for the mmap() data buffer. | |
289 | * | |
43a21ea8 PZ |
290 | * User-space reading the @data_head value should issue an rmb(), on |
291 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 292 | * perf_event_wakeup(). |
43a21ea8 PZ |
293 | * |
294 | * When the mapping is PROT_WRITE the @data_tail value should be | |
295 | * written by userspace to reflect the last read data. In this case | |
296 | * the kernel will not over-write unread data. | |
38ff667b | 297 | */ |
8e3747c1 | 298 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 299 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
300 | }; |
301 | ||
39447b38 | 302 | #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) |
184f412c | 303 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
304 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
305 | #define PERF_RECORD_MISC_USER (2 << 0) | |
306 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
39447b38 ZY |
307 | #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) |
308 | #define PERF_RECORD_MISC_GUEST_USER (5 << 0) | |
6fab0192 | 309 | |
ab608344 PZ |
310 | /* |
311 | * Indicates that the content of PERF_SAMPLE_IP points to | |
312 | * the actual instruction that triggered the event. See also | |
313 | * perf_event_attr::precise_ip. | |
314 | */ | |
315 | #define PERF_RECORD_MISC_EXACT_IP (1 << 14) | |
ef21f683 PZ |
316 | /* |
317 | * Reserve the last bit to indicate some extended misc field | |
318 | */ | |
319 | #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) | |
320 | ||
5c148194 PZ |
321 | struct perf_event_header { |
322 | __u32 type; | |
6fab0192 PZ |
323 | __u16 misc; |
324 | __u16 size; | |
5c148194 PZ |
325 | }; |
326 | ||
327 | enum perf_event_type { | |
5ed00415 | 328 | |
0c593b34 PZ |
329 | /* |
330 | * The MMAP events record the PROT_EXEC mappings so that we can | |
331 | * correlate userspace IPs to code. They have the following structure: | |
332 | * | |
333 | * struct { | |
0127c3ea | 334 | * struct perf_event_header header; |
0c593b34 | 335 | * |
0127c3ea IM |
336 | * u32 pid, tid; |
337 | * u64 addr; | |
338 | * u64 len; | |
339 | * u64 pgoff; | |
340 | * char filename[]; | |
0c593b34 PZ |
341 | * }; |
342 | */ | |
cdd6c482 | 343 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 344 | |
43a21ea8 PZ |
345 | /* |
346 | * struct { | |
57c0c15b IM |
347 | * struct perf_event_header header; |
348 | * u64 id; | |
349 | * u64 lost; | |
43a21ea8 PZ |
350 | * }; |
351 | */ | |
cdd6c482 | 352 | PERF_RECORD_LOST = 2, |
43a21ea8 | 353 | |
8d1b2d93 PZ |
354 | /* |
355 | * struct { | |
0127c3ea | 356 | * struct perf_event_header header; |
8d1b2d93 | 357 | * |
0127c3ea IM |
358 | * u32 pid, tid; |
359 | * char comm[]; | |
8d1b2d93 PZ |
360 | * }; |
361 | */ | |
cdd6c482 | 362 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 363 | |
9f498cc5 PZ |
364 | /* |
365 | * struct { | |
366 | * struct perf_event_header header; | |
367 | * u32 pid, ppid; | |
368 | * u32 tid, ptid; | |
393b2ad8 | 369 | * u64 time; |
9f498cc5 PZ |
370 | * }; |
371 | */ | |
cdd6c482 | 372 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 373 | |
26b119bc PZ |
374 | /* |
375 | * struct { | |
0127c3ea IM |
376 | * struct perf_event_header header; |
377 | * u64 time; | |
689802b2 | 378 | * u64 id; |
7f453c24 | 379 | * u64 stream_id; |
a78ac325 PZ |
380 | * }; |
381 | */ | |
184f412c IM |
382 | PERF_RECORD_THROTTLE = 5, |
383 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 384 | |
60313ebe PZ |
385 | /* |
386 | * struct { | |
a21ca2ca IM |
387 | * struct perf_event_header header; |
388 | * u32 pid, ppid; | |
9f498cc5 | 389 | * u32 tid, ptid; |
a6f10a2f | 390 | * u64 time; |
60313ebe PZ |
391 | * }; |
392 | */ | |
cdd6c482 | 393 | PERF_RECORD_FORK = 7, |
60313ebe | 394 | |
38b200d6 PZ |
395 | /* |
396 | * struct { | |
184f412c IM |
397 | * struct perf_event_header header; |
398 | * u32 pid, tid; | |
3dab77fb | 399 | * |
184f412c | 400 | * struct read_format values; |
38b200d6 PZ |
401 | * }; |
402 | */ | |
cdd6c482 | 403 | PERF_RECORD_READ = 8, |
38b200d6 | 404 | |
8a057d84 | 405 | /* |
0c593b34 | 406 | * struct { |
0127c3ea | 407 | * struct perf_event_header header; |
0c593b34 | 408 | * |
43a21ea8 PZ |
409 | * { u64 ip; } && PERF_SAMPLE_IP |
410 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
411 | * { u64 time; } && PERF_SAMPLE_TIME | |
412 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 413 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 414 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 415 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 416 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 417 | * |
3dab77fb | 418 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 419 | * |
f9188e02 | 420 | * { u64 nr, |
43a21ea8 | 421 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 422 | * |
57c0c15b IM |
423 | * # |
424 | * # The RAW record below is opaque data wrt the ABI | |
425 | * # | |
426 | * # That is, the ABI doesn't make any promises wrt to | |
427 | * # the stability of its content, it may vary depending | |
428 | * # on event, hardware, kernel version and phase of | |
429 | * # the moon. | |
430 | * # | |
431 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
432 | * # | |
3dab77fb | 433 | * |
a044560c PZ |
434 | * { u32 size; |
435 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 436 | * }; |
8a057d84 | 437 | */ |
184f412c | 438 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 439 | |
cdd6c482 | 440 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
441 | }; |
442 | ||
f9188e02 PZ |
443 | enum perf_callchain_context { |
444 | PERF_CONTEXT_HV = (__u64)-32, | |
445 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
446 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 447 | |
f9188e02 PZ |
448 | PERF_CONTEXT_GUEST = (__u64)-2048, |
449 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
450 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
451 | ||
452 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
453 | }; |
454 | ||
a4be7c27 PZ |
455 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
456 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
457 | ||
f3dfd265 | 458 | #ifdef __KERNEL__ |
9f66a381 | 459 | /* |
f3dfd265 | 460 | * Kernel-internal data types and definitions: |
9f66a381 IM |
461 | */ |
462 | ||
cdd6c482 IM |
463 | #ifdef CONFIG_PERF_EVENTS |
464 | # include <asm/perf_event.h> | |
f3dfd265 PM |
465 | #endif |
466 | ||
39447b38 ZY |
467 | struct perf_guest_info_callbacks { |
468 | int (*is_in_guest) (void); | |
469 | int (*is_user_mode) (void); | |
470 | unsigned long (*get_guest_ip) (void); | |
471 | }; | |
472 | ||
2ff6cfd7 AB |
473 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
474 | #include <asm/hw_breakpoint.h> | |
475 | #endif | |
476 | ||
f3dfd265 PM |
477 | #include <linux/list.h> |
478 | #include <linux/mutex.h> | |
479 | #include <linux/rculist.h> | |
480 | #include <linux/rcupdate.h> | |
481 | #include <linux/spinlock.h> | |
d6d020e9 | 482 | #include <linux/hrtimer.h> |
3c446b3d | 483 | #include <linux/fs.h> |
709e50cf | 484 | #include <linux/pid_namespace.h> |
906010b2 | 485 | #include <linux/workqueue.h> |
5331d7b8 | 486 | #include <linux/ftrace.h> |
85cfabbc | 487 | #include <linux/cpu.h> |
f3dfd265 | 488 | #include <asm/atomic.h> |
fa588151 | 489 | #include <asm/local.h> |
f3dfd265 | 490 | |
f9188e02 PZ |
491 | #define PERF_MAX_STACK_DEPTH 255 |
492 | ||
493 | struct perf_callchain_entry { | |
494 | __u64 nr; | |
495 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
496 | }; | |
497 | ||
3a43ce68 FW |
498 | struct perf_raw_record { |
499 | u32 size; | |
500 | void *data; | |
f413cdb8 FW |
501 | }; |
502 | ||
caff2bef PZ |
503 | struct perf_branch_entry { |
504 | __u64 from; | |
505 | __u64 to; | |
506 | __u64 flags; | |
507 | }; | |
508 | ||
509 | struct perf_branch_stack { | |
510 | __u64 nr; | |
511 | struct perf_branch_entry entries[0]; | |
512 | }; | |
513 | ||
f3dfd265 PM |
514 | struct task_struct; |
515 | ||
0793a61d | 516 | /** |
cdd6c482 | 517 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 518 | */ |
cdd6c482 IM |
519 | struct hw_perf_event { |
520 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
521 | union { |
522 | struct { /* hardware */ | |
a308444c | 523 | u64 config; |
447a194b | 524 | u64 last_tag; |
a308444c | 525 | unsigned long config_base; |
cdd6c482 | 526 | unsigned long event_base; |
a308444c | 527 | int idx; |
447a194b | 528 | int last_cpu; |
d6d020e9 | 529 | }; |
721a669b SS |
530 | struct { /* software */ |
531 | s64 remaining; | |
a308444c | 532 | struct hrtimer hrtimer; |
d6d020e9 | 533 | }; |
24f1e32c | 534 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
dd8b1cf6 FW |
535 | /* breakpoint */ |
536 | struct arch_hw_breakpoint info; | |
24f1e32c | 537 | #endif |
d6d020e9 | 538 | }; |
ee06094f | 539 | atomic64_t prev_count; |
b23f3325 | 540 | u64 sample_period; |
9e350de3 | 541 | u64 last_period; |
ee06094f | 542 | atomic64_t period_left; |
60db5e09 | 543 | u64 interrupts; |
6a24ed6c | 544 | |
abd50713 PZ |
545 | u64 freq_time_stamp; |
546 | u64 freq_count_stamp; | |
ee06094f | 547 | #endif |
0793a61d TG |
548 | }; |
549 | ||
cdd6c482 | 550 | struct perf_event; |
621a01ea | 551 | |
8d2cacbb PZ |
552 | /* |
553 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
554 | */ | |
555 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 556 | |
621a01ea | 557 | /** |
4aeb0b42 | 558 | * struct pmu - generic performance monitoring unit |
621a01ea | 559 | */ |
4aeb0b42 | 560 | struct pmu { |
cdd6c482 IM |
561 | int (*enable) (struct perf_event *event); |
562 | void (*disable) (struct perf_event *event); | |
d76a0812 SE |
563 | int (*start) (struct perf_event *event); |
564 | void (*stop) (struct perf_event *event); | |
cdd6c482 IM |
565 | void (*read) (struct perf_event *event); |
566 | void (*unthrottle) (struct perf_event *event); | |
6bde9b6c LM |
567 | |
568 | /* | |
8d2cacbb PZ |
569 | * Group events scheduling is treated as a transaction, add group |
570 | * events as a whole and perform one schedulability test. If the test | |
571 | * fails, roll back the whole group | |
6bde9b6c LM |
572 | */ |
573 | ||
8d2cacbb PZ |
574 | /* |
575 | * Start the transaction, after this ->enable() doesn't need | |
576 | * to do schedulability tests. | |
577 | */ | |
6bde9b6c | 578 | void (*start_txn) (const struct pmu *pmu); |
8d2cacbb PZ |
579 | /* |
580 | * If ->start_txn() disabled the ->enable() schedulability test | |
581 | * then ->commit_txn() is required to perform one. On success | |
582 | * the transaction is closed. On error the transaction is kept | |
583 | * open until ->cancel_txn() is called. | |
584 | */ | |
6bde9b6c | 585 | int (*commit_txn) (const struct pmu *pmu); |
8d2cacbb PZ |
586 | /* |
587 | * Will cancel the transaction, assumes ->disable() is called for | |
588 | * each successfull ->enable() during the transaction. | |
589 | */ | |
590 | void (*cancel_txn) (const struct pmu *pmu); | |
621a01ea IM |
591 | }; |
592 | ||
6a930700 | 593 | /** |
cdd6c482 | 594 | * enum perf_event_active_state - the states of a event |
6a930700 | 595 | */ |
cdd6c482 | 596 | enum perf_event_active_state { |
57c0c15b | 597 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
598 | PERF_EVENT_STATE_OFF = -1, |
599 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 600 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
601 | }; |
602 | ||
9b51f66d IM |
603 | struct file; |
604 | ||
d57e34fd PZ |
605 | #define PERF_BUFFER_WRITABLE 0x01 |
606 | ||
ca5135e6 | 607 | struct perf_buffer { |
ac9721f3 | 608 | atomic_t refcount; |
7b732a75 | 609 | struct rcu_head rcu_head; |
906010b2 PZ |
610 | #ifdef CONFIG_PERF_USE_VMALLOC |
611 | struct work_struct work; | |
3cafa9fb | 612 | int page_order; /* allocation order */ |
906010b2 | 613 | #endif |
8740f941 | 614 | int nr_pages; /* nr of data pages */ |
43a21ea8 | 615 | int writable; /* are we writable */ |
8740f941 | 616 | |
c33a0bc4 | 617 | atomic_t poll; /* POLL_ for wakeups */ |
8740f941 | 618 | |
fa588151 PZ |
619 | local_t head; /* write position */ |
620 | local_t nest; /* nested writers */ | |
621 | local_t events; /* event limit */ | |
adb8e118 | 622 | local_t wakeup; /* wakeup stamp */ |
fa588151 | 623 | local_t lost; /* nr records lost */ |
ef60777c | 624 | |
2667de81 PZ |
625 | long watermark; /* wakeup watermark */ |
626 | ||
57c0c15b | 627 | struct perf_event_mmap_page *user_page; |
0127c3ea | 628 | void *data_pages[0]; |
7b732a75 PZ |
629 | }; |
630 | ||
671dec5d PZ |
631 | struct perf_pending_entry { |
632 | struct perf_pending_entry *next; | |
633 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
634 | }; |
635 | ||
453f19ee PZ |
636 | struct perf_sample_data; |
637 | ||
b326e956 FW |
638 | typedef void (*perf_overflow_handler_t)(struct perf_event *, int, |
639 | struct perf_sample_data *, | |
640 | struct pt_regs *regs); | |
641 | ||
d6f962b5 FW |
642 | enum perf_group_flag { |
643 | PERF_GROUP_SOFTWARE = 0x1, | |
644 | }; | |
645 | ||
76e1d904 FW |
646 | #define SWEVENT_HLIST_BITS 8 |
647 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
648 | ||
649 | struct swevent_hlist { | |
650 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; | |
651 | struct rcu_head rcu_head; | |
652 | }; | |
653 | ||
8a49542c PZ |
654 | #define PERF_ATTACH_CONTEXT 0x01 |
655 | #define PERF_ATTACH_GROUP 0x02 | |
656 | ||
0793a61d | 657 | /** |
cdd6c482 | 658 | * struct perf_event - performance event kernel representation: |
0793a61d | 659 | */ |
cdd6c482 IM |
660 | struct perf_event { |
661 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 662 | struct list_head group_entry; |
592903cd | 663 | struct list_head event_entry; |
04289bb9 | 664 | struct list_head sibling_list; |
76e1d904 | 665 | struct hlist_node hlist_entry; |
0127c3ea | 666 | int nr_siblings; |
d6f962b5 | 667 | int group_flags; |
cdd6c482 | 668 | struct perf_event *group_leader; |
4aeb0b42 | 669 | const struct pmu *pmu; |
04289bb9 | 670 | |
cdd6c482 | 671 | enum perf_event_active_state state; |
8a49542c | 672 | unsigned int attach_state; |
0793a61d | 673 | atomic64_t count; |
a6e6dea6 | 674 | atomic64_t child_count; |
ee06094f | 675 | |
53cfbf59 | 676 | /* |
cdd6c482 | 677 | * These are the total time in nanoseconds that the event |
53cfbf59 | 678 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 679 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
680 | * and running (scheduled onto the CPU), respectively. |
681 | * | |
682 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 683 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
684 | */ |
685 | u64 total_time_enabled; | |
686 | u64 total_time_running; | |
687 | ||
688 | /* | |
689 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 690 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
691 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
692 | * in time. | |
cdd6c482 IM |
693 | * tstamp_enabled: the notional time when the event was enabled |
694 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 695 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 696 | * event was scheduled off. |
53cfbf59 PM |
697 | */ |
698 | u64 tstamp_enabled; | |
699 | u64 tstamp_running; | |
700 | u64 tstamp_stopped; | |
701 | ||
24f1e32c | 702 | struct perf_event_attr attr; |
cdd6c482 | 703 | struct hw_perf_event hw; |
0793a61d | 704 | |
cdd6c482 | 705 | struct perf_event_context *ctx; |
9b51f66d | 706 | struct file *filp; |
0793a61d | 707 | |
53cfbf59 PM |
708 | /* |
709 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 710 | * events have been enabled and running, respectively. |
53cfbf59 PM |
711 | */ |
712 | atomic64_t child_total_time_enabled; | |
713 | atomic64_t child_total_time_running; | |
714 | ||
0793a61d | 715 | /* |
d859e29f | 716 | * Protect attach/detach and child_list: |
0793a61d | 717 | */ |
fccc714b PZ |
718 | struct mutex child_mutex; |
719 | struct list_head child_list; | |
cdd6c482 | 720 | struct perf_event *parent; |
0793a61d TG |
721 | |
722 | int oncpu; | |
723 | int cpu; | |
724 | ||
082ff5a2 PZ |
725 | struct list_head owner_entry; |
726 | struct task_struct *owner; | |
727 | ||
7b732a75 PZ |
728 | /* mmap bits */ |
729 | struct mutex mmap_mutex; | |
730 | atomic_t mmap_count; | |
ac9721f3 PZ |
731 | int mmap_locked; |
732 | struct user_struct *mmap_user; | |
ca5135e6 | 733 | struct perf_buffer *buffer; |
37d81828 | 734 | |
7b732a75 | 735 | /* poll related */ |
0793a61d | 736 | wait_queue_head_t waitq; |
3c446b3d | 737 | struct fasync_struct *fasync; |
79f14641 PZ |
738 | |
739 | /* delayed work for NMIs and such */ | |
740 | int pending_wakeup; | |
4c9e2542 | 741 | int pending_kill; |
79f14641 | 742 | int pending_disable; |
671dec5d | 743 | struct perf_pending_entry pending; |
592903cd | 744 | |
79f14641 PZ |
745 | atomic_t event_limit; |
746 | ||
cdd6c482 | 747 | void (*destroy)(struct perf_event *); |
592903cd | 748 | struct rcu_head rcu_head; |
709e50cf PZ |
749 | |
750 | struct pid_namespace *ns; | |
8e5799b1 | 751 | u64 id; |
6fb2915d | 752 | |
b326e956 | 753 | perf_overflow_handler_t overflow_handler; |
453f19ee | 754 | |
07b139c8 | 755 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 756 | struct ftrace_event_call *tp_event; |
6fb2915d | 757 | struct event_filter *filter; |
ee06094f | 758 | #endif |
6fb2915d LZ |
759 | |
760 | #endif /* CONFIG_PERF_EVENTS */ | |
0793a61d TG |
761 | }; |
762 | ||
763 | /** | |
cdd6c482 | 764 | * struct perf_event_context - event context structure |
0793a61d | 765 | * |
cdd6c482 | 766 | * Used as a container for task events and CPU events as well: |
0793a61d | 767 | */ |
cdd6c482 | 768 | struct perf_event_context { |
0793a61d | 769 | /* |
cdd6c482 | 770 | * Protect the states of the events in the list, |
d859e29f | 771 | * nr_active, and the list: |
0793a61d | 772 | */ |
e625cce1 | 773 | raw_spinlock_t lock; |
d859e29f | 774 | /* |
cdd6c482 | 775 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
776 | * is sufficient to ensure the list doesn't change; to change |
777 | * the list you need to lock both the mutex and the spinlock. | |
778 | */ | |
a308444c | 779 | struct mutex mutex; |
04289bb9 | 780 | |
889ff015 FW |
781 | struct list_head pinned_groups; |
782 | struct list_head flexible_groups; | |
a308444c | 783 | struct list_head event_list; |
cdd6c482 | 784 | int nr_events; |
a308444c IM |
785 | int nr_active; |
786 | int is_active; | |
bfbd3381 | 787 | int nr_stat; |
a308444c IM |
788 | atomic_t refcount; |
789 | struct task_struct *task; | |
53cfbf59 PM |
790 | |
791 | /* | |
4af4998b | 792 | * Context clock, runs when context enabled. |
53cfbf59 | 793 | */ |
a308444c IM |
794 | u64 time; |
795 | u64 timestamp; | |
564c2b21 PM |
796 | |
797 | /* | |
798 | * These fields let us detect when two contexts have both | |
799 | * been cloned (inherited) from a common ancestor. | |
800 | */ | |
cdd6c482 | 801 | struct perf_event_context *parent_ctx; |
a308444c IM |
802 | u64 parent_gen; |
803 | u64 generation; | |
804 | int pin_count; | |
805 | struct rcu_head rcu_head; | |
0793a61d TG |
806 | }; |
807 | ||
808 | /** | |
cdd6c482 | 809 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
810 | */ |
811 | struct perf_cpu_context { | |
cdd6c482 IM |
812 | struct perf_event_context ctx; |
813 | struct perf_event_context *task_ctx; | |
0793a61d TG |
814 | int active_oncpu; |
815 | int max_pertask; | |
3b6f9e5c | 816 | int exclusive; |
76e1d904 FW |
817 | struct swevent_hlist *swevent_hlist; |
818 | struct mutex hlist_mutex; | |
819 | int hlist_refcount; | |
96f6d444 PZ |
820 | |
821 | /* | |
822 | * Recursion avoidance: | |
823 | * | |
824 | * task, softirq, irq, nmi context | |
825 | */ | |
22a4f650 | 826 | int recursion[4]; |
0793a61d TG |
827 | }; |
828 | ||
5622f295 | 829 | struct perf_output_handle { |
57c0c15b | 830 | struct perf_event *event; |
ca5135e6 | 831 | struct perf_buffer *buffer; |
6d1acfd5 | 832 | unsigned long wakeup; |
5d967a8b PZ |
833 | unsigned long size; |
834 | void *addr; | |
835 | int page; | |
57c0c15b IM |
836 | int nmi; |
837 | int sample; | |
5622f295 MM |
838 | }; |
839 | ||
cdd6c482 | 840 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 841 | |
0793a61d TG |
842 | /* |
843 | * Set by architecture code: | |
844 | */ | |
cdd6c482 | 845 | extern int perf_max_events; |
0793a61d | 846 | |
cdd6c482 | 847 | extern const struct pmu *hw_perf_event_init(struct perf_event *event); |
621a01ea | 848 | |
49f47433 | 849 | extern void perf_event_task_sched_in(struct task_struct *task); |
184f412c | 850 | extern void perf_event_task_sched_out(struct task_struct *task, struct task_struct *next); |
49f47433 | 851 | extern void perf_event_task_tick(struct task_struct *task); |
cdd6c482 IM |
852 | extern int perf_event_init_task(struct task_struct *child); |
853 | extern void perf_event_exit_task(struct task_struct *child); | |
854 | extern void perf_event_free_task(struct task_struct *task); | |
855 | extern void set_perf_event_pending(void); | |
856 | extern void perf_event_do_pending(void); | |
857 | extern void perf_event_print_debug(void); | |
9e35ad38 PZ |
858 | extern void __perf_disable(void); |
859 | extern bool __perf_enable(void); | |
860 | extern void perf_disable(void); | |
861 | extern void perf_enable(void); | |
cdd6c482 IM |
862 | extern int perf_event_task_disable(void); |
863 | extern int perf_event_task_enable(void); | |
cdd6c482 | 864 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
865 | extern int perf_event_release_kernel(struct perf_event *event); |
866 | extern struct perf_event * | |
867 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
868 | int cpu, | |
97eaf530 | 869 | pid_t pid, |
b326e956 | 870 | perf_overflow_handler_t callback); |
59ed446f PZ |
871 | extern u64 perf_event_read_value(struct perf_event *event, |
872 | u64 *enabled, u64 *running); | |
5c92d124 | 873 | |
df1a132b | 874 | struct perf_sample_data { |
5622f295 MM |
875 | u64 type; |
876 | ||
877 | u64 ip; | |
878 | struct { | |
879 | u32 pid; | |
880 | u32 tid; | |
881 | } tid_entry; | |
882 | u64 time; | |
a308444c | 883 | u64 addr; |
5622f295 MM |
884 | u64 id; |
885 | u64 stream_id; | |
886 | struct { | |
887 | u32 cpu; | |
888 | u32 reserved; | |
889 | } cpu_entry; | |
a308444c | 890 | u64 period; |
5622f295 | 891 | struct perf_callchain_entry *callchain; |
3a43ce68 | 892 | struct perf_raw_record *raw; |
df1a132b PZ |
893 | }; |
894 | ||
dc1d628a PZ |
895 | static inline |
896 | void perf_sample_data_init(struct perf_sample_data *data, u64 addr) | |
897 | { | |
898 | data->addr = addr; | |
899 | data->raw = NULL; | |
900 | } | |
901 | ||
5622f295 MM |
902 | extern void perf_output_sample(struct perf_output_handle *handle, |
903 | struct perf_event_header *header, | |
904 | struct perf_sample_data *data, | |
cdd6c482 | 905 | struct perf_event *event); |
5622f295 MM |
906 | extern void perf_prepare_sample(struct perf_event_header *header, |
907 | struct perf_sample_data *data, | |
cdd6c482 | 908 | struct perf_event *event, |
5622f295 MM |
909 | struct pt_regs *regs); |
910 | ||
cdd6c482 | 911 | extern int perf_event_overflow(struct perf_event *event, int nmi, |
5622f295 MM |
912 | struct perf_sample_data *data, |
913 | struct pt_regs *regs); | |
df1a132b | 914 | |
3b6f9e5c | 915 | /* |
cdd6c482 | 916 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 917 | */ |
cdd6c482 | 918 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 919 | { |
92b67598 PZ |
920 | switch (event->attr.type) { |
921 | case PERF_TYPE_SOFTWARE: | |
922 | case PERF_TYPE_TRACEPOINT: | |
923 | /* for now the breakpoint stuff also works as software event */ | |
924 | case PERF_TYPE_BREAKPOINT: | |
925 | return 1; | |
926 | } | |
927 | return 0; | |
3b6f9e5c PM |
928 | } |
929 | ||
cdd6c482 | 930 | extern atomic_t perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 931 | |
cdd6c482 | 932 | extern void __perf_sw_event(u32, u64, int, struct pt_regs *, u64); |
f29ac756 | 933 | |
5331d7b8 FW |
934 | extern void |
935 | perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int skip); | |
936 | ||
937 | /* | |
938 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
939 | * the nth caller. We only need a few of the regs: | |
940 | * - ip for PERF_SAMPLE_IP | |
941 | * - cs for user_mode() tests | |
942 | * - bp for callchains | |
943 | * - eflags, for future purposes, just in case | |
944 | */ | |
945 | static inline void perf_fetch_caller_regs(struct pt_regs *regs, int skip) | |
946 | { | |
947 | unsigned long ip; | |
948 | ||
949 | memset(regs, 0, sizeof(*regs)); | |
950 | ||
951 | switch (skip) { | |
952 | case 1 : | |
953 | ip = CALLER_ADDR0; | |
954 | break; | |
955 | case 2 : | |
956 | ip = CALLER_ADDR1; | |
957 | break; | |
958 | case 3 : | |
959 | ip = CALLER_ADDR2; | |
960 | break; | |
961 | case 4: | |
962 | ip = CALLER_ADDR3; | |
963 | break; | |
964 | /* No need to support further for now */ | |
965 | default: | |
966 | ip = 0; | |
967 | } | |
968 | ||
969 | return perf_arch_fetch_caller_regs(regs, ip, skip); | |
970 | } | |
971 | ||
e49a5bd3 FW |
972 | static inline void |
973 | perf_sw_event(u32 event_id, u64 nr, int nmi, struct pt_regs *regs, u64 addr) | |
974 | { | |
975 | if (atomic_read(&perf_swevent_enabled[event_id])) { | |
976 | struct pt_regs hot_regs; | |
977 | ||
978 | if (!regs) { | |
979 | perf_fetch_caller_regs(&hot_regs, 1); | |
980 | regs = &hot_regs; | |
981 | } | |
982 | __perf_sw_event(event_id, nr, nmi, regs, addr); | |
983 | } | |
984 | } | |
985 | ||
3af9e859 | 986 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 987 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
988 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
989 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 990 | |
cdd6c482 IM |
991 | extern void perf_event_comm(struct task_struct *tsk); |
992 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 993 | |
394ee076 PZ |
994 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); |
995 | ||
cdd6c482 IM |
996 | extern int sysctl_perf_event_paranoid; |
997 | extern int sysctl_perf_event_mlock; | |
998 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 999 | |
320ebf09 PZ |
1000 | static inline bool perf_paranoid_tracepoint_raw(void) |
1001 | { | |
1002 | return sysctl_perf_event_paranoid > -1; | |
1003 | } | |
1004 | ||
1005 | static inline bool perf_paranoid_cpu(void) | |
1006 | { | |
1007 | return sysctl_perf_event_paranoid > 0; | |
1008 | } | |
1009 | ||
1010 | static inline bool perf_paranoid_kernel(void) | |
1011 | { | |
1012 | return sysctl_perf_event_paranoid > 1; | |
1013 | } | |
1014 | ||
cdd6c482 | 1015 | extern void perf_event_init(void); |
1c024eca PZ |
1016 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1017 | int entry_size, struct pt_regs *regs, | |
ecc55f84 | 1018 | struct hlist_head *head, int rctx); |
24f1e32c | 1019 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1020 | |
9d23a90a | 1021 | #ifndef perf_misc_flags |
cdd6c482 IM |
1022 | #define perf_misc_flags(regs) (user_mode(regs) ? PERF_RECORD_MISC_USER : \ |
1023 | PERF_RECORD_MISC_KERNEL) | |
9d23a90a PM |
1024 | #define perf_instruction_pointer(regs) instruction_pointer(regs) |
1025 | #endif | |
1026 | ||
5622f295 | 1027 | extern int perf_output_begin(struct perf_output_handle *handle, |
cdd6c482 | 1028 | struct perf_event *event, unsigned int size, |
5622f295 MM |
1029 | int nmi, int sample); |
1030 | extern void perf_output_end(struct perf_output_handle *handle); | |
1031 | extern void perf_output_copy(struct perf_output_handle *handle, | |
1032 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
1033 | extern int perf_swevent_get_recursion_context(void); |
1034 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
1035 | extern void perf_event_enable(struct perf_event *event); |
1036 | extern void perf_event_disable(struct perf_event *event); | |
0793a61d TG |
1037 | #else |
1038 | static inline void | |
49f47433 | 1039 | perf_event_task_sched_in(struct task_struct *task) { } |
0793a61d | 1040 | static inline void |
cdd6c482 | 1041 | perf_event_task_sched_out(struct task_struct *task, |
49f47433 | 1042 | struct task_struct *next) { } |
0793a61d | 1043 | static inline void |
49f47433 | 1044 | perf_event_task_tick(struct task_struct *task) { } |
cdd6c482 IM |
1045 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1046 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1047 | static inline void perf_event_free_task(struct task_struct *task) { } | |
57c0c15b IM |
1048 | static inline void perf_event_do_pending(void) { } |
1049 | static inline void perf_event_print_debug(void) { } | |
9e35ad38 PZ |
1050 | static inline void perf_disable(void) { } |
1051 | static inline void perf_enable(void) { } | |
57c0c15b IM |
1052 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1053 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
15dbf27c | 1054 | |
925d519a | 1055 | static inline void |
cdd6c482 | 1056 | perf_sw_event(u32 event_id, u64 nr, int nmi, |
78f13e95 | 1057 | struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1058 | static inline void |
184f412c | 1059 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1060 | |
39447b38 | 1061 | static inline int perf_register_guest_info_callbacks |
dcf46b94 | 1062 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1063 | static inline int perf_unregister_guest_info_callbacks |
dcf46b94 | 1064 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1065 | |
57c0c15b | 1066 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
1067 | static inline void perf_event_comm(struct task_struct *tsk) { } |
1068 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
1069 | static inline void perf_event_init(void) { } | |
184f412c | 1070 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1071 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
1072 | static inline void perf_event_enable(struct perf_event *event) { } |
1073 | static inline void perf_event_disable(struct perf_event *event) { } | |
0793a61d TG |
1074 | #endif |
1075 | ||
5622f295 MM |
1076 | #define perf_output_put(handle, x) \ |
1077 | perf_output_copy((handle), &(x), sizeof(x)) | |
1078 | ||
3f6da390 PZ |
1079 | /* |
1080 | * This has to have a higher priority than migration_notifier in sched.c. | |
1081 | */ | |
1082 | #define perf_cpu_notifier(fn) \ | |
1083 | do { \ | |
1084 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
1085 | { .notifier_call = fn, .priority = 20 }; \ | |
1086 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
1087 | (void *)(unsigned long)smp_processor_id()); \ | |
1088 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
1089 | (void *)(unsigned long)smp_processor_id()); \ | |
1090 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
1091 | (void *)(unsigned long)smp_processor_id()); \ | |
1092 | register_cpu_notifier(&fn##_nb); \ | |
1093 | } while (0) | |
1094 | ||
f3dfd265 | 1095 | #endif /* __KERNEL__ */ |
cdd6c482 | 1096 | #endif /* _LINUX_PERF_EVENT_H */ |