ftrace: Add FTRACE_ENTRY_REG macro to allow event registration
[deliverable/linux.git] / include / linux / perf_event.h
CommitLineData
0793a61d 1/*
57c0c15b 2 * Performance events:
0793a61d 3 *
a308444c 4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
e7e7ee2e
IM
5 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
0793a61d 7 *
57c0c15b 8 * Data type definitions, declarations, prototypes.
0793a61d 9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
0793a61d 11 *
57c0c15b 12 * For licencing details see kernel-base/COPYING
0793a61d 13 */
cdd6c482
IM
14#ifndef _LINUX_PERF_EVENT_H
15#define _LINUX_PERF_EVENT_H
0793a61d 16
f3dfd265
PM
17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
0793a61d
TG
20
21/*
9f66a381
IM
22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
a308444c
IM
29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
24f1e32c 34 PERF_TYPE_BREAKPOINT = 5,
b8e83514 35
a308444c 36 PERF_TYPE_MAX, /* non-ABI */
b8e83514 37};
6c594c21 38
b8e83514 39/*
cdd6c482
IM
40 * Generalized performance event event_id types, used by the
41 * attr.event_id parameter of the sys_perf_event_open()
a308444c 42 * syscall:
b8e83514 43 */
1c432d89 44enum perf_hw_id {
9f66a381 45 /*
b8e83514 46 * Common hardware events, generalized by the kernel:
9f66a381 47 */
f4dbfa8f
PZ
48 PERF_COUNT_HW_CPU_CYCLES = 0,
49 PERF_COUNT_HW_INSTRUCTIONS = 1,
50 PERF_COUNT_HW_CACHE_REFERENCES = 2,
51 PERF_COUNT_HW_CACHE_MISSES = 3,
52 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
53 PERF_COUNT_HW_BRANCH_MISSES = 5,
54 PERF_COUNT_HW_BUS_CYCLES = 6,
8f622422
IM
55 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7,
56 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8,
c37e1749 57 PERF_COUNT_HW_REF_CPU_CYCLES = 9,
f4dbfa8f 58
a308444c 59 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 60};
e077df4f 61
8326f44d 62/*
cdd6c482 63 * Generalized hardware cache events:
8326f44d 64 *
89d6c0b5 65 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
8326f44d
IM
66 * { read, write, prefetch } x
67 * { accesses, misses }
68 */
1c432d89 69enum perf_hw_cache_id {
a308444c
IM
70 PERF_COUNT_HW_CACHE_L1D = 0,
71 PERF_COUNT_HW_CACHE_L1I = 1,
72 PERF_COUNT_HW_CACHE_LL = 2,
73 PERF_COUNT_HW_CACHE_DTLB = 3,
74 PERF_COUNT_HW_CACHE_ITLB = 4,
75 PERF_COUNT_HW_CACHE_BPU = 5,
89d6c0b5 76 PERF_COUNT_HW_CACHE_NODE = 6,
a308444c
IM
77
78 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
8326f44d
IM
79};
80
1c432d89 81enum perf_hw_cache_op_id {
a308444c
IM
82 PERF_COUNT_HW_CACHE_OP_READ = 0,
83 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
84 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 85
a308444c 86 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
8326f44d
IM
87};
88
1c432d89
PZ
89enum perf_hw_cache_op_result_id {
90 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
91 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 92
a308444c 93 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
8326f44d
IM
94};
95
b8e83514 96/*
cdd6c482
IM
97 * Special "software" events provided by the kernel, even if the hardware
98 * does not support performance events. These events measure various
b8e83514
PZ
99 * physical and sw events of the kernel (and allow the profiling of them as
100 * well):
101 */
1c432d89 102enum perf_sw_ids {
a308444c
IM
103 PERF_COUNT_SW_CPU_CLOCK = 0,
104 PERF_COUNT_SW_TASK_CLOCK = 1,
105 PERF_COUNT_SW_PAGE_FAULTS = 2,
106 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
107 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
108 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
109 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
f7d79860
AB
110 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
111 PERF_COUNT_SW_EMULATION_FAULTS = 8,
a308444c
IM
112
113 PERF_COUNT_SW_MAX, /* non-ABI */
0793a61d
TG
114};
115
8a057d84 116/*
0d48696f 117 * Bits that can be set in attr.sample_type to request information
8a057d84
PZ
118 * in the overflow packets.
119 */
cdd6c482 120enum perf_event_sample_format {
a308444c
IM
121 PERF_SAMPLE_IP = 1U << 0,
122 PERF_SAMPLE_TID = 1U << 1,
123 PERF_SAMPLE_TIME = 1U << 2,
124 PERF_SAMPLE_ADDR = 1U << 3,
3dab77fb 125 PERF_SAMPLE_READ = 1U << 4,
a308444c
IM
126 PERF_SAMPLE_CALLCHAIN = 1U << 5,
127 PERF_SAMPLE_ID = 1U << 6,
128 PERF_SAMPLE_CPU = 1U << 7,
129 PERF_SAMPLE_PERIOD = 1U << 8,
7f453c24 130 PERF_SAMPLE_STREAM_ID = 1U << 9,
3a43ce68 131 PERF_SAMPLE_RAW = 1U << 10,
974802ea 132
f413cdb8 133 PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */
8a057d84
PZ
134};
135
53cfbf59 136/*
cdd6c482 137 * The format of the data returned by read() on a perf event fd,
3dab77fb
PZ
138 * as specified by attr.read_format:
139 *
140 * struct read_format {
57c0c15b 141 * { u64 value;
d7ebe75b
VW
142 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
143 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
57c0c15b
IM
144 * { u64 id; } && PERF_FORMAT_ID
145 * } && !PERF_FORMAT_GROUP
3dab77fb 146 *
57c0c15b 147 * { u64 nr;
d7ebe75b
VW
148 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
149 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
57c0c15b
IM
150 * { u64 value;
151 * { u64 id; } && PERF_FORMAT_ID
152 * } cntr[nr];
153 * } && PERF_FORMAT_GROUP
3dab77fb 154 * };
53cfbf59 155 */
cdd6c482 156enum perf_event_read_format {
a308444c
IM
157 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
158 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
159 PERF_FORMAT_ID = 1U << 2,
3dab77fb 160 PERF_FORMAT_GROUP = 1U << 3,
974802ea 161
57c0c15b 162 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
53cfbf59
PM
163};
164
974802ea
PZ
165#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
166
9f66a381 167/*
cdd6c482 168 * Hardware event_id to monitor via a performance monitoring event:
9f66a381 169 */
cdd6c482 170struct perf_event_attr {
974802ea 171
f4a2deb4 172 /*
a21ca2ca
IM
173 * Major type: hardware/software/tracepoint/etc.
174 */
175 __u32 type;
974802ea
PZ
176
177 /*
178 * Size of the attr structure, for fwd/bwd compat.
179 */
180 __u32 size;
a21ca2ca
IM
181
182 /*
183 * Type specific configuration information.
f4a2deb4
PZ
184 */
185 __u64 config;
9f66a381 186
60db5e09 187 union {
b23f3325
PZ
188 __u64 sample_period;
189 __u64 sample_freq;
60db5e09
PZ
190 };
191
b23f3325
PZ
192 __u64 sample_type;
193 __u64 read_format;
9f66a381 194
2743a5b0 195 __u64 disabled : 1, /* off by default */
0475f9ea
PM
196 inherit : 1, /* children inherit it */
197 pinned : 1, /* must always be on PMU */
198 exclusive : 1, /* only group on PMU */
199 exclude_user : 1, /* don't count user */
200 exclude_kernel : 1, /* ditto kernel */
201 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 202 exclude_idle : 1, /* don't count when idle */
0a4a9391 203 mmap : 1, /* include mmap data */
8d1b2d93 204 comm : 1, /* include comm data */
60db5e09 205 freq : 1, /* use freq, not period */
bfbd3381 206 inherit_stat : 1, /* per task counts */
57e7986e 207 enable_on_exec : 1, /* next exec enables */
9f498cc5 208 task : 1, /* trace fork/exit */
2667de81 209 watermark : 1, /* wakeup_watermark */
ab608344
PZ
210 /*
211 * precise_ip:
212 *
213 * 0 - SAMPLE_IP can have arbitrary skid
214 * 1 - SAMPLE_IP must have constant skid
215 * 2 - SAMPLE_IP requested to have 0 skid
216 * 3 - SAMPLE_IP must have 0 skid
217 *
218 * See also PERF_RECORD_MISC_EXACT_IP
219 */
220 precise_ip : 2, /* skid constraint */
3af9e859 221 mmap_data : 1, /* non-exec mmap data */
c980d109 222 sample_id_all : 1, /* sample_type all events */
ab608344 223
a240f761
JR
224 exclude_host : 1, /* don't count in host */
225 exclude_guest : 1, /* don't count in guest */
226
227 __reserved_1 : 43;
2743a5b0 228
2667de81
PZ
229 union {
230 __u32 wakeup_events; /* wakeup every n events */
231 __u32 wakeup_watermark; /* bytes before wakeup */
232 };
24f1e32c 233
f13c12c6 234 __u32 bp_type;
a7e3ed1e
AK
235 union {
236 __u64 bp_addr;
237 __u64 config1; /* extension of config */
238 };
239 union {
240 __u64 bp_len;
241 __u64 config2; /* extension of config1 */
242 };
eab656ae
TG
243};
244
d859e29f 245/*
cdd6c482 246 * Ioctls that can be done on a perf event fd:
d859e29f 247 */
cdd6c482 248#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
57c0c15b
IM
249#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
250#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
cdd6c482 251#define PERF_EVENT_IOC_RESET _IO ('$', 3)
4c49b128 252#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
cdd6c482 253#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
6fb2915d 254#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
cdd6c482
IM
255
256enum perf_event_ioc_flags {
3df5edad
PZ
257 PERF_IOC_FLAG_GROUP = 1U << 0,
258};
d859e29f 259
37d81828
PM
260/*
261 * Structure of the page that can be mapped via mmap
262 */
cdd6c482 263struct perf_event_mmap_page {
37d81828
PM
264 __u32 version; /* version number of this structure */
265 __u32 compat_version; /* lowest version this is compat with */
38ff667b
PZ
266
267 /*
cdd6c482 268 * Bits needed to read the hw events in user-space.
38ff667b 269 *
92f22a38
PZ
270 * u32 seq;
271 * s64 count;
38ff667b 272 *
a2e87d06
PZ
273 * do {
274 * seq = pc->lock;
38ff667b 275 *
a2e87d06
PZ
276 * barrier()
277 * if (pc->index) {
278 * count = pmc_read(pc->index - 1);
279 * count += pc->offset;
280 * } else
281 * goto regular_read;
38ff667b 282 *
a2e87d06
PZ
283 * barrier();
284 * } while (pc->lock != seq);
38ff667b 285 *
92f22a38
PZ
286 * NOTE: for obvious reason this only works on self-monitoring
287 * processes.
38ff667b 288 */
37d81828 289 __u32 lock; /* seqlock for synchronization */
cdd6c482
IM
290 __u32 index; /* hardware event identifier */
291 __s64 offset; /* add to hardware event value */
292 __u64 time_enabled; /* time event active */
293 __u64 time_running; /* time event on cpu */
e3f3541c
PZ
294 __u32 time_mult, time_shift;
295 __u64 time_offset;
7b732a75 296
41f95331
PZ
297 /*
298 * Hole for extension of the self monitor capabilities
299 */
300
e3f3541c 301 __u64 __reserved[121]; /* align to 1k */
41f95331 302
38ff667b
PZ
303 /*
304 * Control data for the mmap() data buffer.
305 *
43a21ea8
PZ
306 * User-space reading the @data_head value should issue an rmb(), on
307 * SMP capable platforms, after reading this value -- see
cdd6c482 308 * perf_event_wakeup().
43a21ea8
PZ
309 *
310 * When the mapping is PROT_WRITE the @data_tail value should be
311 * written by userspace to reflect the last read data. In this case
312 * the kernel will not over-write unread data.
38ff667b 313 */
8e3747c1 314 __u64 data_head; /* head in the data section */
43a21ea8 315 __u64 data_tail; /* user-space written tail */
37d81828
PM
316};
317
39447b38 318#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
184f412c 319#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
cdd6c482
IM
320#define PERF_RECORD_MISC_KERNEL (1 << 0)
321#define PERF_RECORD_MISC_USER (2 << 0)
322#define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
39447b38
ZY
323#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
324#define PERF_RECORD_MISC_GUEST_USER (5 << 0)
6fab0192 325
ab608344
PZ
326/*
327 * Indicates that the content of PERF_SAMPLE_IP points to
328 * the actual instruction that triggered the event. See also
329 * perf_event_attr::precise_ip.
330 */
331#define PERF_RECORD_MISC_EXACT_IP (1 << 14)
ef21f683
PZ
332/*
333 * Reserve the last bit to indicate some extended misc field
334 */
335#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
336
5c148194
PZ
337struct perf_event_header {
338 __u32 type;
6fab0192
PZ
339 __u16 misc;
340 __u16 size;
5c148194
PZ
341};
342
343enum perf_event_type {
5ed00415 344
0c593b34 345 /*
c980d109
ACM
346 * If perf_event_attr.sample_id_all is set then all event types will
347 * have the sample_type selected fields related to where/when
348 * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID)
349 * described in PERF_RECORD_SAMPLE below, it will be stashed just after
350 * the perf_event_header and the fields already present for the existing
351 * fields, i.e. at the end of the payload. That way a newer perf.data
352 * file will be supported by older perf tools, with these new optional
353 * fields being ignored.
354 *
0c593b34
PZ
355 * The MMAP events record the PROT_EXEC mappings so that we can
356 * correlate userspace IPs to code. They have the following structure:
357 *
358 * struct {
0127c3ea 359 * struct perf_event_header header;
0c593b34 360 *
0127c3ea
IM
361 * u32 pid, tid;
362 * u64 addr;
363 * u64 len;
364 * u64 pgoff;
365 * char filename[];
0c593b34
PZ
366 * };
367 */
cdd6c482 368 PERF_RECORD_MMAP = 1,
0a4a9391 369
43a21ea8
PZ
370 /*
371 * struct {
57c0c15b
IM
372 * struct perf_event_header header;
373 * u64 id;
374 * u64 lost;
43a21ea8
PZ
375 * };
376 */
cdd6c482 377 PERF_RECORD_LOST = 2,
43a21ea8 378
8d1b2d93
PZ
379 /*
380 * struct {
0127c3ea 381 * struct perf_event_header header;
8d1b2d93 382 *
0127c3ea
IM
383 * u32 pid, tid;
384 * char comm[];
8d1b2d93
PZ
385 * };
386 */
cdd6c482 387 PERF_RECORD_COMM = 3,
8d1b2d93 388
9f498cc5
PZ
389 /*
390 * struct {
391 * struct perf_event_header header;
392 * u32 pid, ppid;
393 * u32 tid, ptid;
393b2ad8 394 * u64 time;
9f498cc5
PZ
395 * };
396 */
cdd6c482 397 PERF_RECORD_EXIT = 4,
9f498cc5 398
26b119bc
PZ
399 /*
400 * struct {
0127c3ea
IM
401 * struct perf_event_header header;
402 * u64 time;
689802b2 403 * u64 id;
7f453c24 404 * u64 stream_id;
a78ac325
PZ
405 * };
406 */
184f412c
IM
407 PERF_RECORD_THROTTLE = 5,
408 PERF_RECORD_UNTHROTTLE = 6,
a78ac325 409
60313ebe
PZ
410 /*
411 * struct {
a21ca2ca
IM
412 * struct perf_event_header header;
413 * u32 pid, ppid;
9f498cc5 414 * u32 tid, ptid;
a6f10a2f 415 * u64 time;
60313ebe
PZ
416 * };
417 */
cdd6c482 418 PERF_RECORD_FORK = 7,
60313ebe 419
38b200d6
PZ
420 /*
421 * struct {
184f412c
IM
422 * struct perf_event_header header;
423 * u32 pid, tid;
3dab77fb 424 *
184f412c 425 * struct read_format values;
38b200d6
PZ
426 * };
427 */
cdd6c482 428 PERF_RECORD_READ = 8,
38b200d6 429
8a057d84 430 /*
0c593b34 431 * struct {
0127c3ea 432 * struct perf_event_header header;
0c593b34 433 *
43a21ea8
PZ
434 * { u64 ip; } && PERF_SAMPLE_IP
435 * { u32 pid, tid; } && PERF_SAMPLE_TID
436 * { u64 time; } && PERF_SAMPLE_TIME
437 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 438 * { u64 id; } && PERF_SAMPLE_ID
7f453c24 439 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
43a21ea8 440 * { u32 cpu, res; } && PERF_SAMPLE_CPU
57c0c15b 441 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 442 *
3dab77fb 443 * { struct read_format values; } && PERF_SAMPLE_READ
0c593b34 444 *
f9188e02 445 * { u64 nr,
43a21ea8 446 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
3dab77fb 447 *
57c0c15b
IM
448 * #
449 * # The RAW record below is opaque data wrt the ABI
450 * #
451 * # That is, the ABI doesn't make any promises wrt to
452 * # the stability of its content, it may vary depending
453 * # on event, hardware, kernel version and phase of
454 * # the moon.
455 * #
456 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
457 * #
3dab77fb 458 *
a044560c
PZ
459 * { u32 size;
460 * char data[size];}&& PERF_SAMPLE_RAW
0c593b34 461 * };
8a057d84 462 */
184f412c 463 PERF_RECORD_SAMPLE = 9,
e6e18ec7 464
cdd6c482 465 PERF_RECORD_MAX, /* non-ABI */
5c148194
PZ
466};
467
f9188e02
PZ
468enum perf_callchain_context {
469 PERF_CONTEXT_HV = (__u64)-32,
470 PERF_CONTEXT_KERNEL = (__u64)-128,
471 PERF_CONTEXT_USER = (__u64)-512,
7522060c 472
f9188e02
PZ
473 PERF_CONTEXT_GUEST = (__u64)-2048,
474 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
475 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
476
477 PERF_CONTEXT_MAX = (__u64)-4095,
7522060c
IM
478};
479
e7e7ee2e
IM
480#define PERF_FLAG_FD_NO_GROUP (1U << 0)
481#define PERF_FLAG_FD_OUTPUT (1U << 1)
482#define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */
a4be7c27 483
f3dfd265 484#ifdef __KERNEL__
9f66a381 485/*
f3dfd265 486 * Kernel-internal data types and definitions:
9f66a381
IM
487 */
488
cdd6c482 489#ifdef CONFIG_PERF_EVENTS
e5d1367f 490# include <linux/cgroup.h>
cdd6c482 491# include <asm/perf_event.h>
7be79236 492# include <asm/local64.h>
f3dfd265
PM
493#endif
494
39447b38 495struct perf_guest_info_callbacks {
e7e7ee2e
IM
496 int (*is_in_guest)(void);
497 int (*is_user_mode)(void);
498 unsigned long (*get_guest_ip)(void);
39447b38
ZY
499};
500
2ff6cfd7
AB
501#ifdef CONFIG_HAVE_HW_BREAKPOINT
502#include <asm/hw_breakpoint.h>
503#endif
504
f3dfd265
PM
505#include <linux/list.h>
506#include <linux/mutex.h>
507#include <linux/rculist.h>
508#include <linux/rcupdate.h>
509#include <linux/spinlock.h>
d6d020e9 510#include <linux/hrtimer.h>
3c446b3d 511#include <linux/fs.h>
709e50cf 512#include <linux/pid_namespace.h>
906010b2 513#include <linux/workqueue.h>
5331d7b8 514#include <linux/ftrace.h>
85cfabbc 515#include <linux/cpu.h>
e360adbe 516#include <linux/irq_work.h>
d430d3d7 517#include <linux/jump_label.h>
60063497 518#include <linux/atomic.h>
fa588151 519#include <asm/local.h>
f3dfd265 520
f9188e02
PZ
521#define PERF_MAX_STACK_DEPTH 255
522
523struct perf_callchain_entry {
524 __u64 nr;
525 __u64 ip[PERF_MAX_STACK_DEPTH];
526};
527
3a43ce68
FW
528struct perf_raw_record {
529 u32 size;
530 void *data;
f413cdb8
FW
531};
532
caff2bef
PZ
533struct perf_branch_entry {
534 __u64 from;
535 __u64 to;
536 __u64 flags;
537};
538
539struct perf_branch_stack {
540 __u64 nr;
541 struct perf_branch_entry entries[0];
542};
543
f3dfd265
PM
544struct task_struct;
545
efc9f05d
SE
546/*
547 * extra PMU register associated with an event
548 */
549struct hw_perf_event_extra {
550 u64 config; /* register value */
551 unsigned int reg; /* register address or index */
552 int alloc; /* extra register already allocated */
553 int idx; /* index in shared_regs->regs[] */
554};
555
0793a61d 556/**
cdd6c482 557 * struct hw_perf_event - performance event hardware details:
0793a61d 558 */
cdd6c482
IM
559struct hw_perf_event {
560#ifdef CONFIG_PERF_EVENTS
d6d020e9
PZ
561 union {
562 struct { /* hardware */
a308444c 563 u64 config;
447a194b 564 u64 last_tag;
a308444c 565 unsigned long config_base;
cdd6c482 566 unsigned long event_base;
a308444c 567 int idx;
447a194b 568 int last_cpu;
efc9f05d 569 struct hw_perf_event_extra extra_reg;
d6d020e9 570 };
721a669b 571 struct { /* software */
a308444c 572 struct hrtimer hrtimer;
d6d020e9 573 };
24f1e32c 574#ifdef CONFIG_HAVE_HW_BREAKPOINT
45a73372
FW
575 struct { /* breakpoint */
576 struct arch_hw_breakpoint info;
577 struct list_head bp_list;
d580ff86
PZ
578 /*
579 * Crufty hack to avoid the chicken and egg
580 * problem hw_breakpoint has with context
581 * creation and event initalization.
582 */
583 struct task_struct *bp_target;
45a73372 584 };
24f1e32c 585#endif
d6d020e9 586 };
a4eaf7f1 587 int state;
e7850595 588 local64_t prev_count;
b23f3325 589 u64 sample_period;
9e350de3 590 u64 last_period;
e7850595 591 local64_t period_left;
e050e3f0 592 u64 interrupts_seq;
60db5e09 593 u64 interrupts;
6a24ed6c 594
abd50713
PZ
595 u64 freq_time_stamp;
596 u64 freq_count_stamp;
ee06094f 597#endif
0793a61d
TG
598};
599
a4eaf7f1
PZ
600/*
601 * hw_perf_event::state flags
602 */
603#define PERF_HES_STOPPED 0x01 /* the counter is stopped */
604#define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */
605#define PERF_HES_ARCH 0x04
606
cdd6c482 607struct perf_event;
621a01ea 608
8d2cacbb
PZ
609/*
610 * Common implementation detail of pmu::{start,commit,cancel}_txn
611 */
612#define PERF_EVENT_TXN 0x1
6bde9b6c 613
621a01ea 614/**
4aeb0b42 615 * struct pmu - generic performance monitoring unit
621a01ea 616 */
4aeb0b42 617struct pmu {
b0a873eb
PZ
618 struct list_head entry;
619
abe43400 620 struct device *dev;
0c9d42ed 621 const struct attribute_group **attr_groups;
2e80a82a
PZ
622 char *name;
623 int type;
624
108b02cf
PZ
625 int * __percpu pmu_disable_count;
626 struct perf_cpu_context * __percpu pmu_cpu_context;
8dc85d54 627 int task_ctx_nr;
6bde9b6c
LM
628
629 /*
a4eaf7f1
PZ
630 * Fully disable/enable this PMU, can be used to protect from the PMI
631 * as well as for lazy/batch writing of the MSRs.
6bde9b6c 632 */
ad5133b7
PZ
633 void (*pmu_enable) (struct pmu *pmu); /* optional */
634 void (*pmu_disable) (struct pmu *pmu); /* optional */
6bde9b6c 635
8d2cacbb 636 /*
a4eaf7f1 637 * Try and initialize the event for this PMU.
24cd7f54 638 * Should return -ENOENT when the @event doesn't match this PMU.
8d2cacbb 639 */
b0a873eb
PZ
640 int (*event_init) (struct perf_event *event);
641
a4eaf7f1
PZ
642#define PERF_EF_START 0x01 /* start the counter when adding */
643#define PERF_EF_RELOAD 0x02 /* reload the counter when starting */
644#define PERF_EF_UPDATE 0x04 /* update the counter when stopping */
645
8d2cacbb 646 /*
a4eaf7f1
PZ
647 * Adds/Removes a counter to/from the PMU, can be done inside
648 * a transaction, see the ->*_txn() methods.
649 */
650 int (*add) (struct perf_event *event, int flags);
651 void (*del) (struct perf_event *event, int flags);
652
653 /*
654 * Starts/Stops a counter present on the PMU. The PMI handler
655 * should stop the counter when perf_event_overflow() returns
656 * !0. ->start() will be used to continue.
657 */
658 void (*start) (struct perf_event *event, int flags);
659 void (*stop) (struct perf_event *event, int flags);
660
661 /*
662 * Updates the counter value of the event.
663 */
cdd6c482 664 void (*read) (struct perf_event *event);
6bde9b6c
LM
665
666 /*
24cd7f54
PZ
667 * Group events scheduling is treated as a transaction, add
668 * group events as a whole and perform one schedulability test.
669 * If the test fails, roll back the whole group
a4eaf7f1
PZ
670 *
671 * Start the transaction, after this ->add() doesn't need to
24cd7f54 672 * do schedulability tests.
8d2cacbb 673 */
e7e7ee2e 674 void (*start_txn) (struct pmu *pmu); /* optional */
8d2cacbb 675 /*
a4eaf7f1 676 * If ->start_txn() disabled the ->add() schedulability test
8d2cacbb
PZ
677 * then ->commit_txn() is required to perform one. On success
678 * the transaction is closed. On error the transaction is kept
679 * open until ->cancel_txn() is called.
680 */
e7e7ee2e 681 int (*commit_txn) (struct pmu *pmu); /* optional */
8d2cacbb 682 /*
a4eaf7f1 683 * Will cancel the transaction, assumes ->del() is called
25985edc 684 * for each successful ->add() during the transaction.
8d2cacbb 685 */
e7e7ee2e 686 void (*cancel_txn) (struct pmu *pmu); /* optional */
35edc2a5
PZ
687
688 /*
689 * Will return the value for perf_event_mmap_page::index for this event,
690 * if no implementation is provided it will default to: event->hw.idx + 1.
691 */
692 int (*event_idx) (struct perf_event *event); /*optional */
621a01ea
IM
693};
694
6a930700 695/**
cdd6c482 696 * enum perf_event_active_state - the states of a event
6a930700 697 */
cdd6c482 698enum perf_event_active_state {
57c0c15b 699 PERF_EVENT_STATE_ERROR = -2,
cdd6c482
IM
700 PERF_EVENT_STATE_OFF = -1,
701 PERF_EVENT_STATE_INACTIVE = 0,
57c0c15b 702 PERF_EVENT_STATE_ACTIVE = 1,
6a930700
IM
703};
704
9b51f66d 705struct file;
453f19ee
PZ
706struct perf_sample_data;
707
a8b0ca17 708typedef void (*perf_overflow_handler_t)(struct perf_event *,
b326e956
FW
709 struct perf_sample_data *,
710 struct pt_regs *regs);
711
d6f962b5 712enum perf_group_flag {
e7e7ee2e 713 PERF_GROUP_SOFTWARE = 0x1,
d6f962b5
FW
714};
715
e7e7ee2e
IM
716#define SWEVENT_HLIST_BITS 8
717#define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS)
76e1d904
FW
718
719struct swevent_hlist {
e7e7ee2e
IM
720 struct hlist_head heads[SWEVENT_HLIST_SIZE];
721 struct rcu_head rcu_head;
76e1d904
FW
722};
723
8a49542c
PZ
724#define PERF_ATTACH_CONTEXT 0x01
725#define PERF_ATTACH_GROUP 0x02
d580ff86 726#define PERF_ATTACH_TASK 0x04
8a49542c 727
e5d1367f
SE
728#ifdef CONFIG_CGROUP_PERF
729/*
730 * perf_cgroup_info keeps track of time_enabled for a cgroup.
731 * This is a per-cpu dynamically allocated data structure.
732 */
733struct perf_cgroup_info {
e7e7ee2e
IM
734 u64 time;
735 u64 timestamp;
e5d1367f
SE
736};
737
738struct perf_cgroup {
e7e7ee2e
IM
739 struct cgroup_subsys_state css;
740 struct perf_cgroup_info *info; /* timing info, one per cpu */
e5d1367f
SE
741};
742#endif
743
76369139
FW
744struct ring_buffer;
745
0793a61d 746/**
cdd6c482 747 * struct perf_event - performance event kernel representation:
0793a61d 748 */
cdd6c482
IM
749struct perf_event {
750#ifdef CONFIG_PERF_EVENTS
65abc865 751 struct list_head group_entry;
592903cd 752 struct list_head event_entry;
04289bb9 753 struct list_head sibling_list;
76e1d904 754 struct hlist_node hlist_entry;
0127c3ea 755 int nr_siblings;
d6f962b5 756 int group_flags;
cdd6c482 757 struct perf_event *group_leader;
a4eaf7f1 758 struct pmu *pmu;
04289bb9 759
cdd6c482 760 enum perf_event_active_state state;
8a49542c 761 unsigned int attach_state;
e7850595 762 local64_t count;
a6e6dea6 763 atomic64_t child_count;
ee06094f 764
53cfbf59 765 /*
cdd6c482 766 * These are the total time in nanoseconds that the event
53cfbf59 767 * has been enabled (i.e. eligible to run, and the task has
cdd6c482 768 * been scheduled in, if this is a per-task event)
53cfbf59
PM
769 * and running (scheduled onto the CPU), respectively.
770 *
771 * They are computed from tstamp_enabled, tstamp_running and
cdd6c482 772 * tstamp_stopped when the event is in INACTIVE or ACTIVE state.
53cfbf59
PM
773 */
774 u64 total_time_enabled;
775 u64 total_time_running;
776
777 /*
778 * These are timestamps used for computing total_time_enabled
cdd6c482 779 * and total_time_running when the event is in INACTIVE or
53cfbf59
PM
780 * ACTIVE state, measured in nanoseconds from an arbitrary point
781 * in time.
cdd6c482
IM
782 * tstamp_enabled: the notional time when the event was enabled
783 * tstamp_running: the notional time when the event was scheduled on
53cfbf59 784 * tstamp_stopped: in INACTIVE state, the notional time when the
cdd6c482 785 * event was scheduled off.
53cfbf59
PM
786 */
787 u64 tstamp_enabled;
788 u64 tstamp_running;
789 u64 tstamp_stopped;
790
eed01528
SE
791 /*
792 * timestamp shadows the actual context timing but it can
793 * be safely used in NMI interrupt context. It reflects the
794 * context time as it was when the event was last scheduled in.
795 *
796 * ctx_time already accounts for ctx->timestamp. Therefore to
797 * compute ctx_time for a sample, simply add perf_clock().
798 */
799 u64 shadow_ctx_time;
800
24f1e32c 801 struct perf_event_attr attr;
c320c7b7 802 u16 header_size;
6844c09d 803 u16 id_header_size;
c320c7b7 804 u16 read_size;
cdd6c482 805 struct hw_perf_event hw;
0793a61d 806
cdd6c482 807 struct perf_event_context *ctx;
9b51f66d 808 struct file *filp;
0793a61d 809
53cfbf59
PM
810 /*
811 * These accumulate total time (in nanoseconds) that children
cdd6c482 812 * events have been enabled and running, respectively.
53cfbf59
PM
813 */
814 atomic64_t child_total_time_enabled;
815 atomic64_t child_total_time_running;
816
0793a61d 817 /*
d859e29f 818 * Protect attach/detach and child_list:
0793a61d 819 */
fccc714b
PZ
820 struct mutex child_mutex;
821 struct list_head child_list;
cdd6c482 822 struct perf_event *parent;
0793a61d
TG
823
824 int oncpu;
825 int cpu;
826
082ff5a2
PZ
827 struct list_head owner_entry;
828 struct task_struct *owner;
829
7b732a75
PZ
830 /* mmap bits */
831 struct mutex mmap_mutex;
832 atomic_t mmap_count;
ac9721f3
PZ
833 int mmap_locked;
834 struct user_struct *mmap_user;
76369139 835 struct ring_buffer *rb;
10c6db11 836 struct list_head rb_entry;
37d81828 837
7b732a75 838 /* poll related */
0793a61d 839 wait_queue_head_t waitq;
3c446b3d 840 struct fasync_struct *fasync;
79f14641
PZ
841
842 /* delayed work for NMIs and such */
843 int pending_wakeup;
4c9e2542 844 int pending_kill;
79f14641 845 int pending_disable;
e360adbe 846 struct irq_work pending;
592903cd 847
79f14641
PZ
848 atomic_t event_limit;
849
cdd6c482 850 void (*destroy)(struct perf_event *);
592903cd 851 struct rcu_head rcu_head;
709e50cf
PZ
852
853 struct pid_namespace *ns;
8e5799b1 854 u64 id;
6fb2915d 855
b326e956 856 perf_overflow_handler_t overflow_handler;
4dc0da86 857 void *overflow_handler_context;
453f19ee 858
07b139c8 859#ifdef CONFIG_EVENT_TRACING
1c024eca 860 struct ftrace_event_call *tp_event;
6fb2915d 861 struct event_filter *filter;
ee06094f 862#endif
6fb2915d 863
e5d1367f
SE
864#ifdef CONFIG_CGROUP_PERF
865 struct perf_cgroup *cgrp; /* cgroup event is attach to */
866 int cgrp_defer_enabled;
867#endif
868
6fb2915d 869#endif /* CONFIG_PERF_EVENTS */
0793a61d
TG
870};
871
b04243ef
PZ
872enum perf_event_context_type {
873 task_context,
874 cpu_context,
875};
876
0793a61d 877/**
cdd6c482 878 * struct perf_event_context - event context structure
0793a61d 879 *
cdd6c482 880 * Used as a container for task events and CPU events as well:
0793a61d 881 */
cdd6c482 882struct perf_event_context {
108b02cf 883 struct pmu *pmu;
ee643c41 884 enum perf_event_context_type type;
0793a61d 885 /*
cdd6c482 886 * Protect the states of the events in the list,
d859e29f 887 * nr_active, and the list:
0793a61d 888 */
e625cce1 889 raw_spinlock_t lock;
d859e29f 890 /*
cdd6c482 891 * Protect the list of events. Locking either mutex or lock
d859e29f
PM
892 * is sufficient to ensure the list doesn't change; to change
893 * the list you need to lock both the mutex and the spinlock.
894 */
a308444c 895 struct mutex mutex;
04289bb9 896
889ff015
FW
897 struct list_head pinned_groups;
898 struct list_head flexible_groups;
a308444c 899 struct list_head event_list;
cdd6c482 900 int nr_events;
a308444c
IM
901 int nr_active;
902 int is_active;
bfbd3381 903 int nr_stat;
0f5a2601 904 int nr_freq;
dddd3379 905 int rotate_disable;
a308444c
IM
906 atomic_t refcount;
907 struct task_struct *task;
53cfbf59
PM
908
909 /*
4af4998b 910 * Context clock, runs when context enabled.
53cfbf59 911 */
a308444c
IM
912 u64 time;
913 u64 timestamp;
564c2b21
PM
914
915 /*
916 * These fields let us detect when two contexts have both
917 * been cloned (inherited) from a common ancestor.
918 */
cdd6c482 919 struct perf_event_context *parent_ctx;
a308444c
IM
920 u64 parent_gen;
921 u64 generation;
922 int pin_count;
e5d1367f 923 int nr_cgroups; /* cgroup events present */
28009ce4 924 struct rcu_head rcu_head;
0793a61d
TG
925};
926
7ae07ea3
FW
927/*
928 * Number of contexts where an event can trigger:
e7e7ee2e 929 * task, softirq, hardirq, nmi.
7ae07ea3
FW
930 */
931#define PERF_NR_CONTEXTS 4
932
0793a61d 933/**
cdd6c482 934 * struct perf_event_cpu_context - per cpu event context structure
0793a61d
TG
935 */
936struct perf_cpu_context {
cdd6c482
IM
937 struct perf_event_context ctx;
938 struct perf_event_context *task_ctx;
0793a61d 939 int active_oncpu;
3b6f9e5c 940 int exclusive;
e9d2b064
PZ
941 struct list_head rotation_list;
942 int jiffies_interval;
51676957 943 struct pmu *active_pmu;
e5d1367f 944 struct perf_cgroup *cgrp;
0793a61d
TG
945};
946
5622f295 947struct perf_output_handle {
57c0c15b 948 struct perf_event *event;
76369139 949 struct ring_buffer *rb;
6d1acfd5 950 unsigned long wakeup;
5d967a8b
PZ
951 unsigned long size;
952 void *addr;
953 int page;
5622f295
MM
954};
955
cdd6c482 956#ifdef CONFIG_PERF_EVENTS
829b42dd 957
2e80a82a 958extern int perf_pmu_register(struct pmu *pmu, char *name, int type);
b0a873eb 959extern void perf_pmu_unregister(struct pmu *pmu);
621a01ea 960
3bf101ba 961extern int perf_num_counters(void);
84c79910 962extern const char *perf_pmu_name(void);
a8d757ef
SE
963extern void __perf_event_task_sched_in(struct task_struct *prev,
964 struct task_struct *task);
965extern void __perf_event_task_sched_out(struct task_struct *prev,
966 struct task_struct *next);
cdd6c482
IM
967extern int perf_event_init_task(struct task_struct *child);
968extern void perf_event_exit_task(struct task_struct *child);
969extern void perf_event_free_task(struct task_struct *task);
4e231c79 970extern void perf_event_delayed_put(struct task_struct *task);
cdd6c482 971extern void perf_event_print_debug(void);
33696fc0
PZ
972extern void perf_pmu_disable(struct pmu *pmu);
973extern void perf_pmu_enable(struct pmu *pmu);
cdd6c482
IM
974extern int perf_event_task_disable(void);
975extern int perf_event_task_enable(void);
26ca5c11 976extern int perf_event_refresh(struct perf_event *event, int refresh);
cdd6c482 977extern void perf_event_update_userpage(struct perf_event *event);
fb0459d7
AV
978extern int perf_event_release_kernel(struct perf_event *event);
979extern struct perf_event *
980perf_event_create_kernel_counter(struct perf_event_attr *attr,
981 int cpu,
38a81da2 982 struct task_struct *task,
4dc0da86
AK
983 perf_overflow_handler_t callback,
984 void *context);
59ed446f
PZ
985extern u64 perf_event_read_value(struct perf_event *event,
986 u64 *enabled, u64 *running);
5c92d124 987
df1a132b 988struct perf_sample_data {
5622f295
MM
989 u64 type;
990
991 u64 ip;
992 struct {
993 u32 pid;
994 u32 tid;
995 } tid_entry;
996 u64 time;
a308444c 997 u64 addr;
5622f295
MM
998 u64 id;
999 u64 stream_id;
1000 struct {
1001 u32 cpu;
1002 u32 reserved;
1003 } cpu_entry;
a308444c 1004 u64 period;
5622f295 1005 struct perf_callchain_entry *callchain;
3a43ce68 1006 struct perf_raw_record *raw;
df1a132b
PZ
1007};
1008
e7e7ee2e 1009static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr)
dc1d628a
PZ
1010{
1011 data->addr = addr;
1012 data->raw = NULL;
1013}
1014
5622f295
MM
1015extern void perf_output_sample(struct perf_output_handle *handle,
1016 struct perf_event_header *header,
1017 struct perf_sample_data *data,
cdd6c482 1018 struct perf_event *event);
5622f295
MM
1019extern void perf_prepare_sample(struct perf_event_header *header,
1020 struct perf_sample_data *data,
cdd6c482 1021 struct perf_event *event,
5622f295
MM
1022 struct pt_regs *regs);
1023
a8b0ca17 1024extern int perf_event_overflow(struct perf_event *event,
5622f295
MM
1025 struct perf_sample_data *data,
1026 struct pt_regs *regs);
df1a132b 1027
6c7e550f
FBH
1028static inline bool is_sampling_event(struct perf_event *event)
1029{
1030 return event->attr.sample_period != 0;
1031}
1032
3b6f9e5c 1033/*
cdd6c482 1034 * Return 1 for a software event, 0 for a hardware event
3b6f9e5c 1035 */
cdd6c482 1036static inline int is_software_event(struct perf_event *event)
3b6f9e5c 1037{
89a1e187 1038 return event->pmu->task_ctx_nr == perf_sw_context;
3b6f9e5c
PM
1039}
1040
d430d3d7 1041extern struct jump_label_key perf_swevent_enabled[PERF_COUNT_SW_MAX];
f29ac756 1042
a8b0ca17 1043extern void __perf_sw_event(u32, u64, struct pt_regs *, u64);
f29ac756 1044
b0f82b81 1045#ifndef perf_arch_fetch_caller_regs
e7e7ee2e 1046static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { }
b0f82b81 1047#endif
5331d7b8
FW
1048
1049/*
1050 * Take a snapshot of the regs. Skip ip and frame pointer to
1051 * the nth caller. We only need a few of the regs:
1052 * - ip for PERF_SAMPLE_IP
1053 * - cs for user_mode() tests
1054 * - bp for callchains
1055 * - eflags, for future purposes, just in case
1056 */
b0f82b81 1057static inline void perf_fetch_caller_regs(struct pt_regs *regs)
5331d7b8 1058{
5331d7b8
FW
1059 memset(regs, 0, sizeof(*regs));
1060
b0f82b81 1061 perf_arch_fetch_caller_regs(regs, CALLER_ADDR0);
5331d7b8
FW
1062}
1063
7e54a5a0 1064static __always_inline void
a8b0ca17 1065perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr)
e49a5bd3 1066{
7e54a5a0
PZ
1067 struct pt_regs hot_regs;
1068
d430d3d7
JB
1069 if (static_branch(&perf_swevent_enabled[event_id])) {
1070 if (!regs) {
1071 perf_fetch_caller_regs(&hot_regs);
1072 regs = &hot_regs;
1073 }
a8b0ca17 1074 __perf_sw_event(event_id, nr, regs, addr);
e49a5bd3
FW
1075 }
1076}
1077
b2029520 1078extern struct jump_label_key_deferred perf_sched_events;
ee6dcfa4 1079
a8d757ef
SE
1080static inline void perf_event_task_sched_in(struct task_struct *prev,
1081 struct task_struct *task)
ee6dcfa4 1082{
b2029520 1083 if (static_branch(&perf_sched_events.key))
a8d757ef 1084 __perf_event_task_sched_in(prev, task);
ee6dcfa4
PZ
1085}
1086
a8d757ef
SE
1087static inline void perf_event_task_sched_out(struct task_struct *prev,
1088 struct task_struct *next)
ee6dcfa4 1089{
a8b0ca17 1090 perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0);
ee6dcfa4 1091
b2029520 1092 if (static_branch(&perf_sched_events.key))
a8d757ef 1093 __perf_event_task_sched_out(prev, next);
ee6dcfa4
PZ
1094}
1095
3af9e859 1096extern void perf_event_mmap(struct vm_area_struct *vma);
39447b38 1097extern struct perf_guest_info_callbacks *perf_guest_cbs;
dcf46b94
ZY
1098extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
1099extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
39447b38 1100
cdd6c482
IM
1101extern void perf_event_comm(struct task_struct *tsk);
1102extern void perf_event_fork(struct task_struct *tsk);
8d1b2d93 1103
56962b44
FW
1104/* Callchains */
1105DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry);
1106
e7e7ee2e
IM
1107extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs);
1108extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs);
394ee076 1109
e7e7ee2e 1110static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip)
70791ce9
FW
1111{
1112 if (entry->nr < PERF_MAX_STACK_DEPTH)
1113 entry->ip[entry->nr++] = ip;
1114}
394ee076 1115
cdd6c482
IM
1116extern int sysctl_perf_event_paranoid;
1117extern int sysctl_perf_event_mlock;
1118extern int sysctl_perf_event_sample_rate;
1ccd1549 1119
163ec435
PZ
1120extern int perf_proc_update_handler(struct ctl_table *table, int write,
1121 void __user *buffer, size_t *lenp,
1122 loff_t *ppos);
1123
320ebf09
PZ
1124static inline bool perf_paranoid_tracepoint_raw(void)
1125{
1126 return sysctl_perf_event_paranoid > -1;
1127}
1128
1129static inline bool perf_paranoid_cpu(void)
1130{
1131 return sysctl_perf_event_paranoid > 0;
1132}
1133
1134static inline bool perf_paranoid_kernel(void)
1135{
1136 return sysctl_perf_event_paranoid > 1;
1137}
1138
cdd6c482 1139extern void perf_event_init(void);
1c024eca
PZ
1140extern void perf_tp_event(u64 addr, u64 count, void *record,
1141 int entry_size, struct pt_regs *regs,
ecc55f84 1142 struct hlist_head *head, int rctx);
24f1e32c 1143extern void perf_bp_event(struct perf_event *event, void *data);
0d905bca 1144
9d23a90a 1145#ifndef perf_misc_flags
e7e7ee2e
IM
1146# define perf_misc_flags(regs) \
1147 (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL)
1148# define perf_instruction_pointer(regs) instruction_pointer(regs)
9d23a90a
PM
1149#endif
1150
5622f295 1151extern int perf_output_begin(struct perf_output_handle *handle,
a7ac67ea 1152 struct perf_event *event, unsigned int size);
5622f295
MM
1153extern void perf_output_end(struct perf_output_handle *handle);
1154extern void perf_output_copy(struct perf_output_handle *handle,
1155 const void *buf, unsigned int len);
4ed7c92d
PZ
1156extern int perf_swevent_get_recursion_context(void);
1157extern void perf_swevent_put_recursion_context(int rctx);
44234adc
FW
1158extern void perf_event_enable(struct perf_event *event);
1159extern void perf_event_disable(struct perf_event *event);
e9d2b064 1160extern void perf_event_task_tick(void);
0793a61d
TG
1161#else
1162static inline void
a8d757ef
SE
1163perf_event_task_sched_in(struct task_struct *prev,
1164 struct task_struct *task) { }
0793a61d 1165static inline void
a8d757ef
SE
1166perf_event_task_sched_out(struct task_struct *prev,
1167 struct task_struct *next) { }
cdd6c482
IM
1168static inline int perf_event_init_task(struct task_struct *child) { return 0; }
1169static inline void perf_event_exit_task(struct task_struct *child) { }
1170static inline void perf_event_free_task(struct task_struct *task) { }
4e231c79 1171static inline void perf_event_delayed_put(struct task_struct *task) { }
57c0c15b 1172static inline void perf_event_print_debug(void) { }
57c0c15b
IM
1173static inline int perf_event_task_disable(void) { return -EINVAL; }
1174static inline int perf_event_task_enable(void) { return -EINVAL; }
26ca5c11
AK
1175static inline int perf_event_refresh(struct perf_event *event, int refresh)
1176{
1177 return -EINVAL;
1178}
15dbf27c 1179
925d519a 1180static inline void
a8b0ca17 1181perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { }
24f1e32c 1182static inline void
184f412c 1183perf_bp_event(struct perf_event *event, void *data) { }
0a4a9391 1184
39447b38 1185static inline int perf_register_guest_info_callbacks
e7e7ee2e 1186(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1187static inline int perf_unregister_guest_info_callbacks
e7e7ee2e 1188(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1189
57c0c15b 1190static inline void perf_event_mmap(struct vm_area_struct *vma) { }
cdd6c482
IM
1191static inline void perf_event_comm(struct task_struct *tsk) { }
1192static inline void perf_event_fork(struct task_struct *tsk) { }
1193static inline void perf_event_init(void) { }
184f412c 1194static inline int perf_swevent_get_recursion_context(void) { return -1; }
4ed7c92d 1195static inline void perf_swevent_put_recursion_context(int rctx) { }
44234adc
FW
1196static inline void perf_event_enable(struct perf_event *event) { }
1197static inline void perf_event_disable(struct perf_event *event) { }
e9d2b064 1198static inline void perf_event_task_tick(void) { }
0793a61d
TG
1199#endif
1200
e7e7ee2e 1201#define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x))
5622f295 1202
3f6da390
PZ
1203/*
1204 * This has to have a higher priority than migration_notifier in sched.c.
1205 */
e7e7ee2e
IM
1206#define perf_cpu_notifier(fn) \
1207do { \
1208 static struct notifier_block fn##_nb __cpuinitdata = \
1209 { .notifier_call = fn, .priority = CPU_PRI_PERF }; \
1210 fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \
1211 (void *)(unsigned long)smp_processor_id()); \
1212 fn(&fn##_nb, (unsigned long)CPU_STARTING, \
1213 (void *)(unsigned long)smp_processor_id()); \
1214 fn(&fn##_nb, (unsigned long)CPU_ONLINE, \
1215 (void *)(unsigned long)smp_processor_id()); \
1216 register_cpu_notifier(&fn##_nb); \
3f6da390
PZ
1217} while (0)
1218
f3dfd265 1219#endif /* __KERNEL__ */
cdd6c482 1220#endif /* _LINUX_PERF_EVENT_H */
This page took 0.290634 seconds and 5 git commands to generate.