net: phy: expose PHY device interface mode
[deliverable/linux.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
19#include <linux/spinlock.h>
13df29f6
MR
20#include <linux/ethtool.h>
21#include <linux/mii.h>
22#include <linux/timer.h>
23#include <linux/workqueue.h>
8626d3b4 24#include <linux/mod_devicetable.h>
00db8189 25
60063497 26#include <linux/atomic.h>
0ac49527 27
e9fbdf17 28#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
29 SUPPORTED_TP | \
30 SUPPORTED_MII)
31
e9fbdf17
FF
32#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
33 SUPPORTED_10baseT_Full)
34
35#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
36 SUPPORTED_100baseT_Full)
37
38#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
39 SUPPORTED_1000baseT_Full)
40
e9fbdf17
FF
41#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
42 PHY_100BT_FEATURES | \
43 PHY_DEFAULT_FEATURES)
44
45#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
46 PHY_1000BT_FEATURES)
47
48
c5e38a94
AF
49/*
50 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
51 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
52 * the attached driver handles the interrupt
53 */
54#define PHY_POLL -1
55#define PHY_IGNORE_INTERRUPT -2
56
57#define PHY_HAS_INTERRUPT 0x00000001
58#define PHY_HAS_MAGICANEG 0x00000002
4284b6a5 59#define PHY_IS_INTERNAL 0x00000004
00db8189 60
e8a2b6a4
AF
61/* Interface Mode definitions */
62typedef enum {
4157ef1b 63 PHY_INTERFACE_MODE_NA,
e8a2b6a4
AF
64 PHY_INTERFACE_MODE_MII,
65 PHY_INTERFACE_MODE_GMII,
66 PHY_INTERFACE_MODE_SGMII,
67 PHY_INTERFACE_MODE_TBI,
2cc70ba4 68 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
69 PHY_INTERFACE_MODE_RMII,
70 PHY_INTERFACE_MODE_RGMII,
a999589c 71 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
72 PHY_INTERFACE_MODE_RGMII_RXID,
73 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
74 PHY_INTERFACE_MODE_RTBI,
75 PHY_INTERFACE_MODE_SMII,
898dd0bd 76 PHY_INTERFACE_MODE_XGMII,
8a2fe56e 77 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
78} phy_interface_t;
79
8a2fe56e
FF
80/**
81 * It maps 'enum phy_interface_t' found in include/linux/phy.h
82 * into the device tree binding of 'phy-mode', so that Ethernet
83 * device driver can get phy interface from device tree.
84 */
85static inline const char *phy_modes(phy_interface_t interface)
86{
87 switch (interface) {
88 case PHY_INTERFACE_MODE_NA:
89 return "";
90 case PHY_INTERFACE_MODE_MII:
91 return "mii";
92 case PHY_INTERFACE_MODE_GMII:
93 return "gmii";
94 case PHY_INTERFACE_MODE_SGMII:
95 return "sgmii";
96 case PHY_INTERFACE_MODE_TBI:
97 return "tbi";
98 case PHY_INTERFACE_MODE_REVMII:
99 return "rev-mii";
100 case PHY_INTERFACE_MODE_RMII:
101 return "rmii";
102 case PHY_INTERFACE_MODE_RGMII:
103 return "rgmii";
104 case PHY_INTERFACE_MODE_RGMII_ID:
105 return "rgmii-id";
106 case PHY_INTERFACE_MODE_RGMII_RXID:
107 return "rgmii-rxid";
108 case PHY_INTERFACE_MODE_RGMII_TXID:
109 return "rgmii-txid";
110 case PHY_INTERFACE_MODE_RTBI:
111 return "rtbi";
112 case PHY_INTERFACE_MODE_SMII:
113 return "smii";
114 case PHY_INTERFACE_MODE_XGMII:
115 return "xgmii";
116 default:
117 return "unknown";
118 }
119}
120
00db8189 121
e8a2b6a4 122#define PHY_INIT_TIMEOUT 100000
00db8189
AF
123#define PHY_STATE_TIME 1
124#define PHY_FORCE_TIMEOUT 10
125#define PHY_AN_TIMEOUT 10
126
e8a2b6a4 127#define PHY_MAX_ADDR 32
00db8189 128
a4d00f17 129/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
9d9326d3
AF
130#define PHY_ID_FMT "%s:%02x"
131
132/*
133 * Need to be a little smaller than phydev->dev.bus_id to leave room
134 * for the ":%02x"
135 */
8e401ecc 136#define MII_BUS_ID_SIZE (20 - 3)
a4d00f17 137
abf35df2
JG
138/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
139 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
140#define MII_ADDR_C45 (1<<30)
141
313162d0
PG
142struct device;
143struct sk_buff;
144
c5e38a94
AF
145/*
146 * The Bus class for PHYs. Devices which provide access to
147 * PHYs should register using this structure
148 */
00db8189
AF
149struct mii_bus {
150 const char *name;
9d9326d3 151 char id[MII_BUS_ID_SIZE];
00db8189
AF
152 void *priv;
153 int (*read)(struct mii_bus *bus, int phy_id, int regnum);
154 int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val);
155 int (*reset)(struct mii_bus *bus);
156
c5e38a94
AF
157 /*
158 * A lock to ensure that only one thing can read/write
159 * the MDIO bus at a time
160 */
35b5f6b1 161 struct mutex mdio_lock;
00db8189 162
18ee49dd 163 struct device *parent;
46abc021
LB
164 enum {
165 MDIOBUS_ALLOCATED = 1,
166 MDIOBUS_REGISTERED,
167 MDIOBUS_UNREGISTERED,
168 MDIOBUS_RELEASED,
169 } state;
170 struct device dev;
00db8189
AF
171
172 /* list of all PHYs on bus */
173 struct phy_device *phy_map[PHY_MAX_ADDR];
174
c6883996 175 /* PHY addresses to be ignored when probing */
f896424c
MP
176 u32 phy_mask;
177
c5e38a94
AF
178 /*
179 * Pointer to an array of interrupts, each PHY's
180 * interrupt at the index matching its address
181 */
00db8189
AF
182 int *irq;
183};
46abc021 184#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 185
eb8a54a7
TT
186struct mii_bus *mdiobus_alloc_size(size_t);
187static inline struct mii_bus *mdiobus_alloc(void)
188{
189 return mdiobus_alloc_size(0);
190}
191
2e888103
LB
192int mdiobus_register(struct mii_bus *bus);
193void mdiobus_unregister(struct mii_bus *bus);
194void mdiobus_free(struct mii_bus *bus);
195struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
abf35df2
JG
196int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
197int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
2e888103
LB
198
199
e8a2b6a4
AF
200#define PHY_INTERRUPT_DISABLED 0x0
201#define PHY_INTERRUPT_ENABLED 0x80000000
00db8189
AF
202
203/* PHY state machine states:
204 *
205 * DOWN: PHY device and driver are not ready for anything. probe
206 * should be called if and only if the PHY is in this state,
207 * given that the PHY device exists.
208 * - PHY driver probe function will, depending on the PHY, set
209 * the state to STARTING or READY
210 *
211 * STARTING: PHY device is coming up, and the ethernet driver is
212 * not ready. PHY drivers may set this in the probe function.
213 * If they do, they are responsible for making sure the state is
214 * eventually set to indicate whether the PHY is UP or READY,
215 * depending on the state when the PHY is done starting up.
216 * - PHY driver will set the state to READY
217 * - start will set the state to PENDING
218 *
219 * READY: PHY is ready to send and receive packets, but the
220 * controller is not. By default, PHYs which do not implement
221 * probe will be set to this state by phy_probe(). If the PHY
222 * driver knows the PHY is ready, and the PHY state is STARTING,
223 * then it sets this STATE.
224 * - start will set the state to UP
225 *
226 * PENDING: PHY device is coming up, but the ethernet driver is
227 * ready. phy_start will set this state if the PHY state is
228 * STARTING.
229 * - PHY driver will set the state to UP when the PHY is ready
230 *
231 * UP: The PHY and attached device are ready to do work.
232 * Interrupts should be started here.
233 * - timer moves to AN
234 *
235 * AN: The PHY is currently negotiating the link state. Link is
236 * therefore down for now. phy_timer will set this state when it
237 * detects the state is UP. config_aneg will set this state
238 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
239 * - If autonegotiation finishes, but there's no link, it sets
240 * the state to NOLINK.
241 * - If aneg finishes with link, it sets the state to RUNNING,
242 * and calls adjust_link
243 * - If autonegotiation did not finish after an arbitrary amount
244 * of time, autonegotiation should be tried again if the PHY
245 * supports "magic" autonegotiation (back to AN)
246 * - If it didn't finish, and no magic_aneg, move to FORCING.
247 *
248 * NOLINK: PHY is up, but not currently plugged in.
249 * - If the timer notes that the link comes back, we move to RUNNING
250 * - config_aneg moves to AN
251 * - phy_stop moves to HALTED
252 *
253 * FORCING: PHY is being configured with forced settings
254 * - if link is up, move to RUNNING
255 * - If link is down, we drop to the next highest setting, and
256 * retry (FORCING) after a timeout
257 * - phy_stop moves to HALTED
258 *
259 * RUNNING: PHY is currently up, running, and possibly sending
260 * and/or receiving packets
261 * - timer will set CHANGELINK if we're polling (this ensures the
262 * link state is polled every other cycle of this state machine,
263 * which makes it every other second)
264 * - irq will set CHANGELINK
265 * - config_aneg will set AN
266 * - phy_stop moves to HALTED
267 *
268 * CHANGELINK: PHY experienced a change in link state
269 * - timer moves to RUNNING if link
270 * - timer moves to NOLINK if the link is down
271 * - phy_stop moves to HALTED
272 *
273 * HALTED: PHY is up, but no polling or interrupts are done. Or
274 * PHY is in an error state.
275 *
276 * - phy_start moves to RESUMING
277 *
278 * RESUMING: PHY was halted, but now wants to run again.
279 * - If we are forcing, or aneg is done, timer moves to RUNNING
280 * - If aneg is not done, timer moves to AN
281 * - phy_stop moves to HALTED
282 */
283enum phy_state {
4017b4d3 284 PHY_DOWN = 0,
00db8189
AF
285 PHY_STARTING,
286 PHY_READY,
287 PHY_PENDING,
288 PHY_UP,
289 PHY_AN,
290 PHY_RUNNING,
291 PHY_NOLINK,
292 PHY_FORCING,
293 PHY_CHANGELINK,
294 PHY_HALTED,
295 PHY_RESUMING
296};
297
ac28b9f8
DD
298/**
299 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
300 * @devices_in_package: Bit vector of devices present.
301 * @device_ids: The device identifer for each present device.
302 */
303struct phy_c45_device_ids {
304 u32 devices_in_package;
305 u32 device_ids[8];
306};
c1f19b51 307
00db8189
AF
308/* phy_device: An instance of a PHY
309 *
310 * drv: Pointer to the driver for this PHY instance
311 * bus: Pointer to the bus this PHY is on
312 * dev: driver model device structure for this PHY
313 * phy_id: UID for this device found during discovery
ac28b9f8
DD
314 * c45_ids: 802.3-c45 Device Identifers if is_c45.
315 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 316 * is_internal: Set to true if this phy is internal to a MAC.
00db8189
AF
317 * state: state of the PHY for management purposes
318 * dev_flags: Device-specific flags used by the PHY driver.
319 * addr: Bus address of PHY
320 * link_timeout: The number of timer firings to wait before the
321 * giving up on the current attempt at acquiring a link
322 * irq: IRQ number of the PHY's interrupt (-1 if none)
323 * phy_timer: The timer for handling the state machine
324 * phy_queue: A work_queue for the interrupt
325 * attached_dev: The attached enet driver's device instance ptr
326 * adjust_link: Callback for the enet controller to respond to
327 * changes in the link state.
00db8189 328 *
114002bc
FF
329 * speed, duplex, pause, supported, advertising, lp_advertising,
330 * and autoneg are used like in mii_if_info
00db8189
AF
331 *
332 * interrupts currently only supports enabled or disabled,
333 * but could be changed in the future to support enabling
334 * and disabling specific interrupts
335 *
336 * Contains some infrastructure for polling and interrupt
337 * handling, as well as handling shifts in PHY hardware state
338 */
339struct phy_device {
340 /* Information about the PHY type */
341 /* And management functions */
342 struct phy_driver *drv;
343
344 struct mii_bus *bus;
345
346 struct device dev;
347
348 u32 phy_id;
349
ac28b9f8
DD
350 struct phy_c45_device_ids c45_ids;
351 bool is_c45;
4284b6a5 352 bool is_internal;
ac28b9f8 353
00db8189
AF
354 enum phy_state state;
355
356 u32 dev_flags;
357
e8a2b6a4
AF
358 phy_interface_t interface;
359
c6883996 360 /* Bus address of the PHY (0-31) */
00db8189
AF
361 int addr;
362
c5e38a94
AF
363 /*
364 * forced speed & duplex (no autoneg)
00db8189
AF
365 * partner speed & duplex & pause (autoneg)
366 */
367 int speed;
368 int duplex;
369 int pause;
370 int asym_pause;
371
372 /* The most recently read link state */
373 int link;
374
375 /* Enabled Interrupts */
376 u32 interrupts;
377
378 /* Union of PHY and Attached devices' supported modes */
379 /* See mii.h for more info */
380 u32 supported;
381 u32 advertising;
114002bc 382 u32 lp_advertising;
00db8189
AF
383
384 int autoneg;
385
386 int link_timeout;
387
c5e38a94
AF
388 /*
389 * Interrupt number for this PHY
390 * -1 means no interrupt
391 */
00db8189
AF
392 int irq;
393
394 /* private data pointer */
395 /* For use by PHYs to maintain extra state */
396 void *priv;
397
398 /* Interrupt and Polling infrastructure */
399 struct work_struct phy_queue;
a390d1f3 400 struct delayed_work state_queue;
0ac49527 401 atomic_t irq_disable;
00db8189 402
35b5f6b1 403 struct mutex lock;
00db8189
AF
404
405 struct net_device *attached_dev;
406
407 void (*adjust_link)(struct net_device *dev);
00db8189
AF
408};
409#define to_phy_device(d) container_of(d, struct phy_device, dev)
410
411/* struct phy_driver: Driver structure for a particular PHY type
412 *
413 * phy_id: The result of reading the UID registers of this PHY
414 * type, and ANDing them with the phy_id_mask. This driver
415 * only works for PHYs with IDs which match this field
416 * name: The friendly name of this PHY type
417 * phy_id_mask: Defines the important bits of the phy_id
418 * features: A list of features (speed, duplex, etc) supported
419 * by this PHY
420 * flags: A bitfield defining certain other features this PHY
421 * supports (like interrupts)
422 *
423 * The drivers must implement config_aneg and read_status. All
424 * other functions are optional. Note that none of these
425 * functions should be called from interrupt time. The goal is
426 * for the bus read/write functions to be able to block when the
427 * bus transaction is happening, and be freed up by an interrupt
428 * (The MPC85xx has this ability, though it is not currently
429 * supported in the driver).
430 */
431struct phy_driver {
432 u32 phy_id;
433 char *name;
434 unsigned int phy_id_mask;
435 u32 features;
436 u32 flags;
437
c5e38a94
AF
438 /*
439 * Called to initialize the PHY,
440 * including after a reset
441 */
00db8189
AF
442 int (*config_init)(struct phy_device *phydev);
443
c5e38a94
AF
444 /*
445 * Called during discovery. Used to set
446 * up device-specific structures, if any
447 */
00db8189
AF
448 int (*probe)(struct phy_device *phydev);
449
450 /* PHY Power Management */
451 int (*suspend)(struct phy_device *phydev);
452 int (*resume)(struct phy_device *phydev);
453
c5e38a94
AF
454 /*
455 * Configures the advertisement and resets
00db8189
AF
456 * autonegotiation if phydev->autoneg is on,
457 * forces the speed to the current settings in phydev
c5e38a94
AF
458 * if phydev->autoneg is off
459 */
00db8189
AF
460 int (*config_aneg)(struct phy_device *phydev);
461
76a423a3
FF
462 /* Determines the auto negotiation result */
463 int (*aneg_done)(struct phy_device *phydev);
464
00db8189
AF
465 /* Determines the negotiated speed and duplex */
466 int (*read_status)(struct phy_device *phydev);
467
468 /* Clears any pending interrupts */
469 int (*ack_interrupt)(struct phy_device *phydev);
470
471 /* Enables or disables interrupts */
472 int (*config_intr)(struct phy_device *phydev);
473
a8729eb3
AG
474 /*
475 * Checks if the PHY generated an interrupt.
476 * For multi-PHY devices with shared PHY interrupt pin
477 */
478 int (*did_interrupt)(struct phy_device *phydev);
479
00db8189
AF
480 /* Clears up any memory if needed */
481 void (*remove)(struct phy_device *phydev);
482
a30e2c18
DD
483 /* Returns true if this is a suitable driver for the given
484 * phydev. If NULL, matching is based on phy_id and
485 * phy_id_mask.
486 */
487 int (*match_phy_device)(struct phy_device *phydev);
488
c8f3a8c3
RC
489 /* Handles ethtool queries for hardware time stamping. */
490 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
491
c1f19b51
RC
492 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
493 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
494
495 /*
496 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
497 * the phy driver promises to deliver it using netif_rx() as
498 * soon as a timestamp becomes available. One of the
499 * PTP_CLASS_ values is passed in 'type'. The function must
500 * return true if the skb is accepted for delivery.
501 */
502 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
503
504 /*
505 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 506 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
507 * timestamp becomes available. One of the PTP_CLASS_ values
508 * is passed in 'type'.
509 */
510 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
511
42e836eb
MS
512 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
513 * enable Wake on LAN, so set_wol is provided to be called in the
514 * ethernet driver's set_wol function. */
515 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
516
517 /* See set_wol, but for checking whether Wake on LAN is enabled. */
518 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
519
00db8189
AF
520 struct device_driver driver;
521};
522#define to_phy_driver(d) container_of(d, struct phy_driver, driver)
523
f62220d3
AF
524#define PHY_ANY_ID "MATCH ANY PHY"
525#define PHY_ANY_UID 0xffffffff
526
527/* A Structure for boards to register fixups with the PHY Lib */
528struct phy_fixup {
529 struct list_head list;
8e401ecc 530 char bus_id[20];
f62220d3
AF
531 u32 phy_uid;
532 u32 phy_uid_mask;
533 int (*run)(struct phy_device *phydev);
534};
535
efabdfb9
AF
536/**
537 * phy_read_mmd - Convenience function for reading a register
538 * from an MMD on a given PHY.
539 * @phydev: The phy_device struct
540 * @devad: The MMD to read from
541 * @regnum: The register on the MMD to read
542 *
543 * Same rules as for phy_read();
544 */
545static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
546{
547 if (!phydev->is_c45)
548 return -EOPNOTSUPP;
549
550 return mdiobus_read(phydev->bus, phydev->addr,
551 MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff));
552}
553
2e888103
LB
554/**
555 * phy_read - Convenience function for reading a given PHY register
556 * @phydev: the phy_device struct
557 * @regnum: register number to read
558 *
559 * NOTE: MUST NOT be called from interrupt context,
560 * because the bus read/write functions may wait for an interrupt
561 * to conclude the operation.
562 */
abf35df2 563static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103
LB
564{
565 return mdiobus_read(phydev->bus, phydev->addr, regnum);
566}
567
568/**
569 * phy_write - Convenience function for writing a given PHY register
570 * @phydev: the phy_device struct
571 * @regnum: register number to write
572 * @val: value to write to @regnum
573 *
574 * NOTE: MUST NOT be called from interrupt context,
575 * because the bus read/write functions may wait for an interrupt
576 * to conclude the operation.
577 */
abf35df2 578static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103
LB
579{
580 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
581}
582
2c7b4921
FF
583/**
584 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
585 * @phydev: the phy_device struct
586 *
587 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
588 * PHY_IGNORE_INTERRUPT
589 */
590static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
591{
592 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
593}
594
4284b6a5
FF
595/**
596 * phy_is_internal - Convenience function for testing if a PHY is internal
597 * @phydev: the phy_device struct
598 */
599static inline bool phy_is_internal(struct phy_device *phydev)
600{
601 return phydev->is_internal;
602}
603
efabdfb9
AF
604/**
605 * phy_write_mmd - Convenience function for writing a register
606 * on an MMD on a given PHY.
607 * @phydev: The phy_device struct
608 * @devad: The MMD to read from
609 * @regnum: The register on the MMD to read
610 * @val: value to write to @regnum
611 *
612 * Same rules as for phy_write();
613 */
614static inline int phy_write_mmd(struct phy_device *phydev, int devad,
615 u32 regnum, u16 val)
616{
617 if (!phydev->is_c45)
618 return -EOPNOTSUPP;
619
620 regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff);
621
622 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
623}
624
ac28b9f8 625struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
626 bool is_c45,
627 struct phy_c45_device_ids *c45_ids);
ac28b9f8 628struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 629int phy_device_register(struct phy_device *phy);
2f5cb434 630int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
631int phy_suspend(struct phy_device *phydev);
632int phy_resume(struct phy_device *phydev);
4017b4d3
SS
633struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
634 phy_interface_t interface);
f8f76db1 635struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
636int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
637 u32 flags, phy_interface_t interface);
fa94f6d9 638int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
639 void (*handler)(struct net_device *),
640 phy_interface_t interface);
641struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
642 void (*handler)(struct net_device *),
643 phy_interface_t interface);
e1393456
AF
644void phy_disconnect(struct phy_device *phydev);
645void phy_detach(struct phy_device *phydev);
646void phy_start(struct phy_device *phydev);
647void phy_stop(struct phy_device *phydev);
648int phy_start_aneg(struct phy_device *phydev);
649
e1393456 650int phy_stop_interrupts(struct phy_device *phydev);
00db8189 651
4017b4d3
SS
652static inline int phy_read_status(struct phy_device *phydev)
653{
00db8189
AF
654 return phydev->drv->read_status(phydev);
655}
656
3fb69bca 657int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
658int genphy_restart_aneg(struct phy_device *phydev);
659int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 660int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
661int genphy_update_link(struct phy_device *phydev);
662int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
663int genphy_suspend(struct phy_device *phydev);
664int genphy_resume(struct phy_device *phydev);
00db8189 665void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 666void phy_drivers_unregister(struct phy_driver *drv, int n);
00db8189 667int phy_driver_register(struct phy_driver *new_driver);
d5bf9071 668int phy_drivers_register(struct phy_driver *new_driver, int n);
4f9c85a1 669void phy_state_machine(struct work_struct *work);
5ea94e76
FF
670void phy_change(struct work_struct *work);
671void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 672void phy_start_machine(struct phy_device *phydev);
00db8189
AF
673void phy_stop_machine(struct phy_device *phydev);
674int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
675int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
4017b4d3 676int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
677int phy_start_interrupts(struct phy_device *phydev);
678void phy_print_status(struct phy_device *phydev);
6f4a7f41 679void phy_device_free(struct phy_device *phydev);
00db8189 680
f62220d3 681int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 682 int (*run)(struct phy_device *));
f62220d3 683int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 684 int (*run)(struct phy_device *));
f62220d3 685int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 686 int (*run)(struct phy_device *));
f62220d3 687
a59a4d19
GC
688int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
689int phy_get_eee_err(struct phy_device *phydev);
690int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
691int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 692int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
693void phy_ethtool_get_wol(struct phy_device *phydev,
694 struct ethtool_wolinfo *wol);
a59a4d19 695
9b9a8bfc
AF
696int __init mdio_bus_init(void);
697void mdio_bus_exit(void);
698
00db8189 699extern struct bus_type mdio_bus_type;
00db8189 700#endif /* __PHY_H */
This page took 1.275675 seconds and 5 git commands to generate.