projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 963eb4b8 | 1 | /* |
| 398ccccb JB |
2 | * Copyright (C) 2009 Samsung Electronics Ltd. |
| 3 | * Jaswinder Singh <jassi.brar@samsung.com> | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify | |
| 6 | * it under the terms of the GNU General Public License version 2 as | |
| 7 | * published by the Free Software Foundation. | |
| 8 | */ | |
| 9 | ||
| 963eb4b8 SK |
10 | #ifndef __SPI_S3C64XX_H |
| 11 | #define __SPI_S3C64XX_H | |
| 398ccccb | 12 | |
| 78843727 AB |
13 | #include <linux/dmaengine.h> |
| 14 | ||
| 5b0b34ea MB |
15 | struct platform_device; |
| 16 | ||
| 398ccccb JB |
17 | /** |
| 18 | * struct s3c64xx_spi_csinfo - ChipSelect description | |
| 19 | * @fb_delay: Slave specific feedback delay. | |
| 20 | * Refer to FB_CLK_SEL register definition in SPI chapter. | |
| 21 | * @line: Custom 'identity' of the CS line. | |
| 398ccccb JB |
22 | * |
| 23 | * This is per SPI-Slave Chipselect information. | |
| 24 | * Allocate and initialize one in machine init code and make the | |
| 25 | * spi_board_info.controller_data point to it. | |
| 26 | */ | |
| 27 | struct s3c64xx_spi_csinfo { | |
| 28 | u8 fb_delay; | |
| 29 | unsigned line; | |
| 398ccccb JB |
30 | }; |
| 31 | ||
| 32 | /** | |
| 33 | * struct s3c64xx_spi_info - SPI Controller defining structure | |
| 34 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. | |
| 398ccccb JB |
35 | * @num_cs: Number of CS this controller emulates. |
| 36 | * @cfg_gpio: Configure pins for this SPI controller. | |
| 398ccccb JB |
37 | */ |
| 38 | struct s3c64xx_spi_info { | |
| 39 | int src_clk_nr; | |
| 398ccccb | 40 | int num_cs; |
| 868dee91 | 41 | int (*cfg_gpio)(void); |
| 78843727 | 42 | dma_filter_fn filter; |
| 398ccccb JB |
43 | }; |
| 44 | ||
| 45 | /** | |
| 875a5937 | 46 | * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board |
| 398ccccb | 47 | * initialization code. |
| 4d0efdd5 | 48 | * @cfg_gpio: Pointer to gpio setup function. |
| 398ccccb JB |
49 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. |
| 50 | * @num_cs: Number of elements in the 'cs' array. | |
| 51 | * | |
| 52 | * Call this from machine init code for each SPI Controller that | |
| 53 | * has some chips attached to it. | |
| 54 | */ | |
| 4d0efdd5 TA |
55 | extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
| 56 | int num_cs); | |
| 57 | extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |
| 58 | int num_cs); | |
| 59 | extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |
| 60 | int num_cs); | |
| 4566c7f7 PV |
61 | |
| 62 | /* defined by architecture to configure gpio */ | |
| 868dee91 TA |
63 | extern int s3c64xx_spi0_cfg_gpio(void); |
| 64 | extern int s3c64xx_spi1_cfg_gpio(void); | |
| 65 | extern int s3c64xx_spi2_cfg_gpio(void); | |
| 4566c7f7 PV |
66 | |
| 67 | extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; | |
| 68 | extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; | |
| 323d7717 | 69 | extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; |
| 963eb4b8 | 70 | #endif /*__SPI_S3C64XX_H */ |