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e8db0be1 JP |
1 | #ifndef _LINUX_PM_QOS_H |
2 | #define _LINUX_PM_QOS_H | |
d82b3518 MG |
3 | /* interface for the pm_qos_power infrastructure of the linux kernel. |
4 | * | |
bf1db69f | 5 | * Mark Gross <mgross@linux.intel.com> |
d82b3518 | 6 | */ |
82f68251 | 7 | #include <linux/plist.h> |
d82b3518 MG |
8 | #include <linux/notifier.h> |
9 | #include <linux/miscdevice.h> | |
1a9a9152 | 10 | #include <linux/device.h> |
c4772d19 | 11 | #include <linux/workqueue.h> |
d82b3518 | 12 | |
d031e1de AF |
13 | enum { |
14 | PM_QOS_RESERVED = 0, | |
15 | PM_QOS_CPU_DMA_LATENCY, | |
16 | PM_QOS_NETWORK_LATENCY, | |
17 | PM_QOS_NETWORK_THROUGHPUT, | |
7990da71 | 18 | PM_QOS_MEMORY_BANDWIDTH, |
d031e1de AF |
19 | |
20 | /* insert new class ID */ | |
21 | PM_QOS_NUM_CLASSES, | |
22 | }; | |
d82b3518 | 23 | |
ae0fb4b7 RW |
24 | enum pm_qos_flags_status { |
25 | PM_QOS_FLAGS_UNDEFINED = -1, | |
26 | PM_QOS_FLAGS_NONE, | |
27 | PM_QOS_FLAGS_SOME, | |
28 | PM_QOS_FLAGS_ALL, | |
29 | }; | |
30 | ||
d82b3518 MG |
31 | #define PM_QOS_DEFAULT_VALUE -1 |
32 | ||
333c5ae9 TC |
33 | #define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) |
34 | #define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) | |
35 | #define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0 | |
7990da71 | 36 | #define PM_QOS_MEMORY_BANDWIDTH_DEFAULT_VALUE 0 |
b02f6695 | 37 | #define PM_QOS_RESUME_LATENCY_DEFAULT_VALUE 0 |
2d984ad1 RW |
38 | #define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE 0 |
39 | #define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT (-1) | |
40 | #define PM_QOS_LATENCY_ANY ((s32)(~(__u32)0 >> 1)) | |
333c5ae9 | 41 | |
e39473d0 RW |
42 | #define PM_QOS_FLAG_NO_POWER_OFF (1 << 0) |
43 | #define PM_QOS_FLAG_REMOTE_WAKEUP (1 << 1) | |
44 | ||
cc749986 JP |
45 | struct pm_qos_request { |
46 | struct plist_node node; | |
82f68251 | 47 | int pm_qos_class; |
c4772d19 | 48 | struct delayed_work work; /* for pm_qos_update_request_timeout */ |
82f68251 | 49 | }; |
d82b3518 | 50 | |
5efbe427 RW |
51 | struct pm_qos_flags_request { |
52 | struct list_head node; | |
53 | s32 flags; /* Do not change to 64 bit */ | |
54 | }; | |
55 | ||
ae0fb4b7 | 56 | enum dev_pm_qos_req_type { |
b02f6695 | 57 | DEV_PM_QOS_RESUME_LATENCY = 1, |
2d984ad1 | 58 | DEV_PM_QOS_LATENCY_TOLERANCE, |
ae0fb4b7 RW |
59 | DEV_PM_QOS_FLAGS, |
60 | }; | |
61 | ||
91ff4cb8 | 62 | struct dev_pm_qos_request { |
ae0fb4b7 | 63 | enum dev_pm_qos_req_type type; |
021c870b RW |
64 | union { |
65 | struct plist_node pnode; | |
ae0fb4b7 | 66 | struct pm_qos_flags_request flr; |
021c870b | 67 | } data; |
91ff4cb8 JP |
68 | struct device *dev; |
69 | }; | |
70 | ||
4e1779ba JP |
71 | enum pm_qos_type { |
72 | PM_QOS_UNITIALIZED, | |
73 | PM_QOS_MAX, /* return the largest value */ | |
7990da71 TV |
74 | PM_QOS_MIN, /* return the smallest value */ |
75 | PM_QOS_SUM /* return the sum */ | |
4e1779ba JP |
76 | }; |
77 | ||
78 | /* | |
5efbe427 RW |
79 | * Note: The lockless read path depends on the CPU accessing target_value |
80 | * or effective_flags atomically. Atomic access is only guaranteed on all CPU | |
4e1779ba JP |
81 | * types linux supports for 32 bit quantites |
82 | */ | |
83 | struct pm_qos_constraints { | |
84 | struct plist_head list; | |
85 | s32 target_value; /* Do not change to 64 bit */ | |
86 | s32 default_value; | |
327adaed | 87 | s32 no_constraint_value; |
4e1779ba JP |
88 | enum pm_qos_type type; |
89 | struct blocking_notifier_head *notifiers; | |
90 | }; | |
91 | ||
5efbe427 RW |
92 | struct pm_qos_flags { |
93 | struct list_head list; | |
94 | s32 effective_flags; /* Do not change to 64 bit */ | |
95 | }; | |
96 | ||
5f986c59 | 97 | struct dev_pm_qos { |
b02f6695 | 98 | struct pm_qos_constraints resume_latency; |
2d984ad1 | 99 | struct pm_qos_constraints latency_tolerance; |
ae0fb4b7 | 100 | struct pm_qos_flags flags; |
b02f6695 | 101 | struct dev_pm_qos_request *resume_latency_req; |
2d984ad1 | 102 | struct dev_pm_qos_request *latency_tolerance_req; |
e39473d0 | 103 | struct dev_pm_qos_request *flags_req; |
5f986c59 RW |
104 | }; |
105 | ||
abe98ec2 JP |
106 | /* Action requested to pm_qos_update_target */ |
107 | enum pm_qos_req_action { | |
108 | PM_QOS_ADD_REQ, /* Add a new request */ | |
109 | PM_QOS_UPDATE_REQ, /* Update an existing request */ | |
110 | PM_QOS_REMOVE_REQ /* Remove an existing request */ | |
111 | }; | |
112 | ||
91ff4cb8 JP |
113 | static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req) |
114 | { | |
83618092 | 115 | return req->dev != NULL; |
91ff4cb8 JP |
116 | } |
117 | ||
abe98ec2 JP |
118 | int pm_qos_update_target(struct pm_qos_constraints *c, struct plist_node *node, |
119 | enum pm_qos_req_action action, int value); | |
5efbe427 RW |
120 | bool pm_qos_update_flags(struct pm_qos_flags *pqf, |
121 | struct pm_qos_flags_request *req, | |
122 | enum pm_qos_req_action action, s32 val); | |
cc749986 JP |
123 | void pm_qos_add_request(struct pm_qos_request *req, int pm_qos_class, |
124 | s32 value); | |
125 | void pm_qos_update_request(struct pm_qos_request *req, | |
e8db0be1 | 126 | s32 new_value); |
c4772d19 MH |
127 | void pm_qos_update_request_timeout(struct pm_qos_request *req, |
128 | s32 new_value, unsigned long timeout_us); | |
cc749986 | 129 | void pm_qos_remove_request(struct pm_qos_request *req); |
d82b3518 | 130 | |
ed77134b MG |
131 | int pm_qos_request(int pm_qos_class); |
132 | int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier); | |
133 | int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier); | |
cc749986 | 134 | int pm_qos_request_active(struct pm_qos_request *req); |
b66213cd | 135 | s32 pm_qos_read_value(struct pm_qos_constraints *c); |
91ff4cb8 | 136 | |
a9b542ee | 137 | #ifdef CONFIG_PM |
ae0fb4b7 RW |
138 | enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask); |
139 | enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask); | |
00dc9ad1 | 140 | s32 __dev_pm_qos_read_value(struct device *dev); |
1a9a9152 | 141 | s32 dev_pm_qos_read_value(struct device *dev); |
91ff4cb8 | 142 | int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req, |
ae0fb4b7 | 143 | enum dev_pm_qos_req_type type, s32 value); |
91ff4cb8 JP |
144 | int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value); |
145 | int dev_pm_qos_remove_request(struct dev_pm_qos_request *req); | |
146 | int dev_pm_qos_add_notifier(struct device *dev, | |
147 | struct notifier_block *notifier); | |
148 | int dev_pm_qos_remove_notifier(struct device *dev, | |
149 | struct notifier_block *notifier); | |
b66213cd JP |
150 | int dev_pm_qos_add_global_notifier(struct notifier_block *notifier); |
151 | int dev_pm_qos_remove_global_notifier(struct notifier_block *notifier); | |
91ff4cb8 JP |
152 | void dev_pm_qos_constraints_init(struct device *dev); |
153 | void dev_pm_qos_constraints_destroy(struct device *dev); | |
40a5f8be | 154 | int dev_pm_qos_add_ancestor_request(struct device *dev, |
71d821fd RW |
155 | struct dev_pm_qos_request *req, |
156 | enum dev_pm_qos_req_type type, s32 value); | |
d30d819d RW |
157 | int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value); |
158 | void dev_pm_qos_hide_latency_limit(struct device *dev); | |
159 | int dev_pm_qos_expose_flags(struct device *dev, s32 value); | |
160 | void dev_pm_qos_hide_flags(struct device *dev); | |
161 | int dev_pm_qos_update_flags(struct device *dev, s32 mask, bool set); | |
162 | s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev); | |
163 | int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val); | |
164 | ||
165 | static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev) | |
166 | { | |
167 | return dev->power.qos->resume_latency_req->data.pnode.prio; | |
168 | } | |
169 | ||
170 | static inline s32 dev_pm_qos_requested_flags(struct device *dev) | |
171 | { | |
172 | return dev->power.qos->flags_req->data.flr.flags; | |
173 | } | |
e8db0be1 | 174 | #else |
ae0fb4b7 RW |
175 | static inline enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, |
176 | s32 mask) | |
177 | { return PM_QOS_FLAGS_UNDEFINED; } | |
178 | static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, | |
179 | s32 mask) | |
180 | { return PM_QOS_FLAGS_UNDEFINED; } | |
00dc9ad1 RW |
181 | static inline s32 __dev_pm_qos_read_value(struct device *dev) |
182 | { return 0; } | |
1a9a9152 RW |
183 | static inline s32 dev_pm_qos_read_value(struct device *dev) |
184 | { return 0; } | |
91ff4cb8 JP |
185 | static inline int dev_pm_qos_add_request(struct device *dev, |
186 | struct dev_pm_qos_request *req, | |
ae0fb4b7 | 187 | enum dev_pm_qos_req_type type, |
91ff4cb8 JP |
188 | s32 value) |
189 | { return 0; } | |
190 | static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req, | |
191 | s32 new_value) | |
192 | { return 0; } | |
193 | static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req) | |
194 | { return 0; } | |
195 | static inline int dev_pm_qos_add_notifier(struct device *dev, | |
196 | struct notifier_block *notifier) | |
197 | { return 0; } | |
198 | static inline int dev_pm_qos_remove_notifier(struct device *dev, | |
199 | struct notifier_block *notifier) | |
200 | { return 0; } | |
b66213cd JP |
201 | static inline int dev_pm_qos_add_global_notifier( |
202 | struct notifier_block *notifier) | |
203 | { return 0; } | |
204 | static inline int dev_pm_qos_remove_global_notifier( | |
205 | struct notifier_block *notifier) | |
206 | { return 0; } | |
91ff4cb8 | 207 | static inline void dev_pm_qos_constraints_init(struct device *dev) |
1a9a9152 RW |
208 | { |
209 | dev->power.power_state = PMSG_ON; | |
210 | } | |
91ff4cb8 | 211 | static inline void dev_pm_qos_constraints_destroy(struct device *dev) |
1a9a9152 RW |
212 | { |
213 | dev->power.power_state = PMSG_INVALID; | |
214 | } | |
40a5f8be | 215 | static inline int dev_pm_qos_add_ancestor_request(struct device *dev, |
71d821fd RW |
216 | struct dev_pm_qos_request *req, |
217 | enum dev_pm_qos_req_type type, | |
218 | s32 value) | |
40a5f8be | 219 | { return 0; } |
85dc0b8a RW |
220 | static inline int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value) |
221 | { return 0; } | |
222 | static inline void dev_pm_qos_hide_latency_limit(struct device *dev) {} | |
e39473d0 RW |
223 | static inline int dev_pm_qos_expose_flags(struct device *dev, s32 value) |
224 | { return 0; } | |
225 | static inline void dev_pm_qos_hide_flags(struct device *dev) {} | |
226 | static inline int dev_pm_qos_update_flags(struct device *dev, s32 m, bool set) | |
227 | { return 0; } | |
2d984ad1 RW |
228 | static inline s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev) |
229 | { return PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT; } | |
230 | static inline int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val) | |
231 | { return 0; } | |
e39473d0 | 232 | |
b02f6695 | 233 | static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev) { return 0; } |
e39473d0 | 234 | static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; } |
85dc0b8a RW |
235 | #endif |
236 | ||
82f68251 | 237 | #endif |