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b83a313b MB |
1 | #ifndef __LINUX_REGMAP_H |
2 | #define __LINUX_REGMAP_H | |
3 | ||
4 | /* | |
5 | * Register map access API | |
6 | * | |
7 | * Copyright 2011 Wolfson Microelectronics plc | |
8 | * | |
9 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
b83a313b | 16 | #include <linux/list.h> |
6863ca62 | 17 | #include <linux/rbtree.h> |
b83a313b | 18 | |
de477254 | 19 | struct module; |
313162d0 | 20 | struct device; |
9943fa30 | 21 | struct i2c_client; |
a676f083 | 22 | struct spi_device; |
b83d2ff0 | 23 | struct regmap; |
6863ca62 | 24 | struct regmap_range_cfg; |
9943fa30 | 25 | |
9fabe24e DP |
26 | /* An enum of all the supported cache types */ |
27 | enum regcache_type { | |
28 | REGCACHE_NONE, | |
28644c80 | 29 | REGCACHE_RBTREE, |
50b776fc | 30 | REGCACHE_COMPRESSED |
9fabe24e DP |
31 | }; |
32 | ||
bd20eb54 MB |
33 | /** |
34 | * Default value for a register. We use an array of structs rather | |
35 | * than a simple array as many modern devices have very sparse | |
36 | * register maps. | |
37 | * | |
38 | * @reg: Register address. | |
39 | * @def: Register default value. | |
40 | */ | |
41 | struct reg_default { | |
42 | unsigned int reg; | |
43 | unsigned int def; | |
44 | }; | |
45 | ||
b83d2ff0 MB |
46 | #ifdef CONFIG_REGMAP |
47 | ||
141eba2e SW |
48 | enum regmap_endian { |
49 | /* Unspecified -> 0 -> Backwards compatible default */ | |
50 | REGMAP_ENDIAN_DEFAULT = 0, | |
51 | REGMAP_ENDIAN_BIG, | |
52 | REGMAP_ENDIAN_LITTLE, | |
53 | REGMAP_ENDIAN_NATIVE, | |
54 | }; | |
55 | ||
dd898b20 MB |
56 | /** |
57 | * Configuration for the register map of a device. | |
58 | * | |
d3c242e1 SW |
59 | * @name: Optional name of the regmap. Useful when a device has multiple |
60 | * register regions. | |
61 | * | |
dd898b20 | 62 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
63 | * @reg_stride: The register address stride. Valid register addresses are a |
64 | * multiple of this value. If set to 0, a value of 1 will be | |
65 | * used. | |
82159ba8 | 66 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 67 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 68 | * |
3566cc9d MB |
69 | * @writeable_reg: Optional callback returning true if the register |
70 | * can be written to. | |
71 | * @readable_reg: Optional callback returning true if the register | |
72 | * can be read from. | |
73 | * @volatile_reg: Optional callback returning true if the register | |
74 | * value can't be cached. | |
75 | * @precious_reg: Optional callback returning true if the rgister | |
76 | * should not be read outside of a call from the driver | |
77 | * (eg, a clear on read interrupt status register). | |
bd20eb54 MB |
78 | * |
79 | * @max_register: Optional, specifies the maximum valid register index. | |
80 | * @reg_defaults: Power on reset values for registers (for use with | |
81 | * register cache support). | |
82 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 LPC |
83 | * |
84 | * @read_flag_mask: Mask to be set in the top byte of the register when doing | |
85 | * a read. | |
86 | * @write_flag_mask: Mask to be set in the top byte of the register when doing | |
87 | * a write. If both read_flag_mask and write_flag_mask are | |
88 | * empty the regmap_bus default masks are used. | |
2e33caf1 AJ |
89 | * @use_single_rw: If set, converts the bulk read and write operations into |
90 | * a series of single read and write operations. This is useful | |
91 | * for device that does not support bulk read and write. | |
9fabe24e DP |
92 | * |
93 | * @cache_type: The actual cache type. | |
94 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
95 | * register cache support). | |
96 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
97 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
98 | * DEFAULT, the @reg_format_endian_default value from the | |
99 | * regmap bus is used. | |
100 | * @val_format_endian: Endianness for formatted register values. If this is | |
101 | * DEFAULT, the @reg_format_endian_default value from the | |
102 | * regmap bus is used. | |
6863ca62 KG |
103 | * |
104 | * @ranges: Array of configuration entries for virtual address ranges. | |
105 | * @num_ranges: Number of range configuration entries. | |
dd898b20 | 106 | */ |
b83a313b | 107 | struct regmap_config { |
d3c242e1 SW |
108 | const char *name; |
109 | ||
b83a313b | 110 | int reg_bits; |
f01ee60f | 111 | int reg_stride; |
82159ba8 | 112 | int pad_bits; |
b83a313b | 113 | int val_bits; |
2e2ae66d | 114 | |
2e2ae66d MB |
115 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
116 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
117 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 118 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
bd20eb54 MB |
119 | |
120 | unsigned int max_register; | |
720e4616 | 121 | const struct reg_default *reg_defaults; |
9fabe24e DP |
122 | unsigned int num_reg_defaults; |
123 | enum regcache_type cache_type; | |
124 | const void *reg_defaults_raw; | |
125 | unsigned int num_reg_defaults_raw; | |
6f306441 LPC |
126 | |
127 | u8 read_flag_mask; | |
128 | u8 write_flag_mask; | |
2e33caf1 AJ |
129 | |
130 | bool use_single_rw; | |
141eba2e SW |
131 | |
132 | enum regmap_endian reg_format_endian; | |
133 | enum regmap_endian val_format_endian; | |
38e23194 | 134 | |
6863ca62 KG |
135 | const struct regmap_range_cfg *ranges; |
136 | unsigned int n_ranges; | |
137 | }; | |
138 | ||
139 | /** | |
140 | * Configuration for indirectly accessed or paged registers. | |
141 | * Registers, mapped to this virtual range, are accessed in two steps: | |
142 | * 1. page selector register update; | |
143 | * 2. access through data window registers. | |
144 | * | |
145 | * @range_min: Address of the lowest register address in virtual range. | |
146 | * @range_max: Address of the highest register in virtual range. | |
147 | * | |
148 | * @page_sel_reg: Register with selector field. | |
149 | * @page_sel_mask: Bit shift for selector value. | |
150 | * @page_sel_shift: Bit mask for selector value. | |
151 | * | |
152 | * @window_start: Address of first (lowest) register in data window. | |
153 | * @window_len: Number of registers in data window. | |
154 | */ | |
155 | struct regmap_range_cfg { | |
156 | /* Registers of virtual address range */ | |
157 | unsigned int range_min; | |
158 | unsigned int range_max; | |
159 | ||
160 | /* Page selector for indirect addressing */ | |
161 | unsigned int selector_reg; | |
162 | unsigned int selector_mask; | |
163 | int selector_shift; | |
164 | ||
165 | /* Data window (per each page) */ | |
166 | unsigned int window_start; | |
167 | unsigned int window_len; | |
b83a313b MB |
168 | }; |
169 | ||
0135bbcc | 170 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 171 | size_t count); |
0135bbcc | 172 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
173 | const void *reg, size_t reg_len, |
174 | const void *val, size_t val_len); | |
0135bbcc | 175 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
176 | const void *reg_buf, size_t reg_size, |
177 | void *val_buf, size_t val_size); | |
0135bbcc | 178 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
179 | |
180 | /** | |
181 | * Description of a hardware bus for the register map infrastructure. | |
182 | * | |
bacdbe07 SW |
183 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
184 | * to perform locking. | |
b83a313b MB |
185 | * @write: Write operation. |
186 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
187 | * if not implemented on a given device. | |
188 | * @read: Read operation. Data is returned in the buffer used to transmit | |
189 | * data. | |
b83a313b MB |
190 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
191 | * a read. | |
141eba2e SW |
192 | * @reg_format_endian_default: Default endianness for formatted register |
193 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
194 | * DEFAULT, BIG is assumed. | |
195 | * @val_format_endian_default: Default endianness for formatted register | |
196 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
197 | * DEFAULT, BIG is assumed. | |
b83a313b MB |
198 | */ |
199 | struct regmap_bus { | |
bacdbe07 | 200 | bool fast_io; |
b83a313b MB |
201 | regmap_hw_write write; |
202 | regmap_hw_gather_write gather_write; | |
203 | regmap_hw_read read; | |
0135bbcc | 204 | regmap_hw_free_context free_context; |
b83a313b | 205 | u8 read_flag_mask; |
141eba2e SW |
206 | enum regmap_endian reg_format_endian_default; |
207 | enum regmap_endian val_format_endian_default; | |
b83a313b MB |
208 | }; |
209 | ||
210 | struct regmap *regmap_init(struct device *dev, | |
211 | const struct regmap_bus *bus, | |
0135bbcc | 212 | void *bus_context, |
b83a313b | 213 | const struct regmap_config *config); |
9943fa30 MB |
214 | struct regmap *regmap_init_i2c(struct i2c_client *i2c, |
215 | const struct regmap_config *config); | |
a676f083 MB |
216 | struct regmap *regmap_init_spi(struct spi_device *dev, |
217 | const struct regmap_config *config); | |
45f5ff81 SW |
218 | struct regmap *regmap_init_mmio(struct device *dev, |
219 | void __iomem *regs, | |
220 | const struct regmap_config *config); | |
a676f083 | 221 | |
c0eb4676 MB |
222 | struct regmap *devm_regmap_init(struct device *dev, |
223 | const struct regmap_bus *bus, | |
0135bbcc | 224 | void *bus_context, |
c0eb4676 MB |
225 | const struct regmap_config *config); |
226 | struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, | |
227 | const struct regmap_config *config); | |
228 | struct regmap *devm_regmap_init_spi(struct spi_device *dev, | |
229 | const struct regmap_config *config); | |
45f5ff81 SW |
230 | struct regmap *devm_regmap_init_mmio(struct device *dev, |
231 | void __iomem *regs, | |
232 | const struct regmap_config *config); | |
c0eb4676 | 233 | |
b83a313b | 234 | void regmap_exit(struct regmap *map); |
bf315173 MB |
235 | int regmap_reinit_cache(struct regmap *map, |
236 | const struct regmap_config *config); | |
72b39f6f | 237 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
b83a313b MB |
238 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
239 | int regmap_raw_write(struct regmap *map, unsigned int reg, | |
240 | const void *val, size_t val_len); | |
8eaeb219 LD |
241 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
242 | size_t val_count); | |
b83a313b MB |
243 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
244 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
245 | void *val, size_t val_len); | |
246 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
247 | size_t val_count); | |
248 | int regmap_update_bits(struct regmap *map, unsigned int reg, | |
249 | unsigned int mask, unsigned int val); | |
018690d3 MB |
250 | int regmap_update_bits_check(struct regmap *map, unsigned int reg, |
251 | unsigned int mask, unsigned int val, | |
252 | bool *change); | |
a6539c32 | 253 | int regmap_get_val_bytes(struct regmap *map); |
b83a313b | 254 | |
39a58439 | 255 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
256 | int regcache_sync_region(struct regmap *map, unsigned int min, |
257 | unsigned int max); | |
92afb286 | 258 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 259 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 260 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 261 | |
22f0d90a MB |
262 | int regmap_register_patch(struct regmap *map, const struct reg_default *regs, |
263 | int num_regs); | |
264 | ||
f8beab2b MB |
265 | /** |
266 | * Description of an IRQ for the generic regmap irq_chip. | |
267 | * | |
268 | * @reg_offset: Offset of the status/mask register within the bank | |
269 | * @mask: Mask used to flag/control the register. | |
270 | */ | |
271 | struct regmap_irq { | |
272 | unsigned int reg_offset; | |
273 | unsigned int mask; | |
274 | }; | |
275 | ||
276 | /** | |
277 | * Description of a generic regmap irq_chip. This is not intended to | |
278 | * handle every possible interrupt controller, but it should handle a | |
279 | * substantial proportion of those that are found in the wild. | |
280 | * | |
281 | * @name: Descriptive name for IRQ controller. | |
282 | * | |
283 | * @status_base: Base status register address. | |
284 | * @mask_base: Base mask register address. | |
285 | * @ack_base: Base ack address. If zero then the chip is clear on read. | |
a43fd50d | 286 | * @wake_base: Base address for wake enables. If zero unsupported. |
022f926a | 287 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
0c00c50b | 288 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
289 | * |
290 | * @num_regs: Number of registers in each control bank. | |
291 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
292 | * assigned based on the index in the array of the interrupt. | |
293 | * @num_irqs: Number of descriptors. | |
294 | */ | |
295 | struct regmap_irq_chip { | |
296 | const char *name; | |
297 | ||
298 | unsigned int status_base; | |
299 | unsigned int mask_base; | |
300 | unsigned int ack_base; | |
a43fd50d | 301 | unsigned int wake_base; |
022f926a | 302 | unsigned int irq_reg_stride; |
36ac914b | 303 | unsigned int mask_invert; |
0c00c50b | 304 | bool runtime_pm; |
f8beab2b MB |
305 | |
306 | int num_regs; | |
307 | ||
308 | const struct regmap_irq *irqs; | |
309 | int num_irqs; | |
310 | }; | |
311 | ||
312 | struct regmap_irq_chip_data; | |
313 | ||
314 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 315 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b MB |
316 | struct regmap_irq_chip_data **data); |
317 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); | |
209a6006 | 318 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 319 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
92afb286 | 320 | |
9cde5fcd MB |
321 | #else |
322 | ||
323 | /* | |
324 | * These stubs should only ever be called by generic code which has | |
325 | * regmap based facilities, if they ever get called at runtime | |
326 | * something is going wrong and something probably needs to select | |
327 | * REGMAP. | |
328 | */ | |
329 | ||
330 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
331 | unsigned int val) | |
332 | { | |
333 | WARN_ONCE(1, "regmap API is disabled"); | |
334 | return -EINVAL; | |
335 | } | |
336 | ||
337 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, | |
338 | const void *val, size_t val_len) | |
339 | { | |
340 | WARN_ONCE(1, "regmap API is disabled"); | |
341 | return -EINVAL; | |
342 | } | |
343 | ||
344 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, | |
345 | const void *val, size_t val_count) | |
346 | { | |
347 | WARN_ONCE(1, "regmap API is disabled"); | |
348 | return -EINVAL; | |
349 | } | |
350 | ||
351 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
352 | unsigned int *val) | |
353 | { | |
354 | WARN_ONCE(1, "regmap API is disabled"); | |
355 | return -EINVAL; | |
356 | } | |
357 | ||
358 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
359 | void *val, size_t val_len) | |
360 | { | |
361 | WARN_ONCE(1, "regmap API is disabled"); | |
362 | return -EINVAL; | |
363 | } | |
364 | ||
365 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, | |
366 | void *val, size_t val_count) | |
367 | { | |
368 | WARN_ONCE(1, "regmap API is disabled"); | |
369 | return -EINVAL; | |
370 | } | |
371 | ||
372 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
373 | unsigned int mask, unsigned int val) | |
374 | { | |
375 | WARN_ONCE(1, "regmap API is disabled"); | |
376 | return -EINVAL; | |
377 | } | |
378 | ||
379 | static inline int regmap_update_bits_check(struct regmap *map, | |
380 | unsigned int reg, | |
381 | unsigned int mask, unsigned int val, | |
382 | bool *change) | |
383 | { | |
384 | WARN_ONCE(1, "regmap API is disabled"); | |
385 | return -EINVAL; | |
386 | } | |
387 | ||
388 | static inline int regmap_get_val_bytes(struct regmap *map) | |
389 | { | |
390 | WARN_ONCE(1, "regmap API is disabled"); | |
391 | return -EINVAL; | |
392 | } | |
393 | ||
394 | static inline int regcache_sync(struct regmap *map) | |
395 | { | |
396 | WARN_ONCE(1, "regmap API is disabled"); | |
397 | return -EINVAL; | |
398 | } | |
399 | ||
a313f9f5 MB |
400 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
401 | unsigned int max) | |
402 | { | |
403 | WARN_ONCE(1, "regmap API is disabled"); | |
404 | return -EINVAL; | |
405 | } | |
406 | ||
9cde5fcd MB |
407 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
408 | { | |
409 | WARN_ONCE(1, "regmap API is disabled"); | |
410 | } | |
411 | ||
412 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
413 | { | |
414 | WARN_ONCE(1, "regmap API is disabled"); | |
415 | } | |
416 | ||
417 | static inline void regcache_mark_dirty(struct regmap *map) | |
418 | { | |
419 | WARN_ONCE(1, "regmap API is disabled"); | |
420 | } | |
421 | ||
422 | static inline int regmap_register_patch(struct regmap *map, | |
423 | const struct reg_default *regs, | |
424 | int num_regs) | |
425 | { | |
426 | WARN_ONCE(1, "regmap API is disabled"); | |
427 | return -EINVAL; | |
428 | } | |
429 | ||
72b39f6f MB |
430 | static inline struct regmap *dev_get_regmap(struct device *dev, |
431 | const char *name) | |
432 | { | |
72b39f6f MB |
433 | return NULL; |
434 | } | |
435 | ||
9cde5fcd MB |
436 | #endif |
437 | ||
b83a313b | 438 | #endif |