[deliverable/linux.git] / include / linux / regulator / ab8500.h

/*
 * Copyright (C) ST-Ericsson SA 2010
 *
 * License Terms: GNU General Public License v2
 *
 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
 *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
 */

#ifndef __LINUX_MFD_AB8500_REGULATOR_H
#define __LINUX_MFD_AB8500_REGULATOR_H

/* AB8500 regulators */
enum ab8500_regulator_id {
	AB8500_LDO_AUX1,
	AB8500_LDO_AUX2,
	AB8500_LDO_AUX3,
	AB8500_LDO_INTCORE,
	AB8500_LDO_TVOUT,
	AB8500_LDO_USB,
	AB8500_LDO_AUDIO,
	AB8500_LDO_ANAMIC1,
	AB8500_LDO_ANAMIC2,
	AB8500_LDO_DMIC,
	AB8500_LDO_ANA,
	AB8500_NUM_REGULATORS,
};

/* AB9450 regulators */
enum ab9540_regulator_id {
	AB9540_LDO_AUX1,
	AB9540_LDO_AUX2,
	AB9540_LDO_AUX3,
	AB9540_LDO_AUX4,
	AB9540_LDO_INTCORE,
	AB9540_LDO_TVOUT,
	AB9540_LDO_USB,
	AB9540_LDO_AUDIO,
	AB9540_LDO_ANAMIC1,
	AB9540_LDO_ANAMIC2,
	AB9540_LDO_DMIC,
	AB9540_LDO_ANA,
	AB9540_SYSCLKREQ_2,
	AB9540_SYSCLKREQ_4,
	AB9540_NUM_REGULATORS,
};

/* AB8500 and AB9540 register initialization */
struct ab8500_regulator_reg_init {
	int id;
	u8 mask;
	u8 value;
};

#define INIT_REGULATOR_REGISTER(_id, _mask, _value)	\
	{						\
		.id = _id,				\
		.mask = _mask,				\
		.value = _value,			\
	}

/* AB8500 registers */
enum ab8500_regulator_reg {
	AB8500_REGUREQUESTCTRL2,
	AB8500_REGUREQUESTCTRL3,
	AB8500_REGUREQUESTCTRL4,
	AB8500_REGUSYSCLKREQ1HPVALID1,
	AB8500_REGUSYSCLKREQ1HPVALID2,
	AB8500_REGUHWHPREQ1VALID1,
	AB8500_REGUHWHPREQ1VALID2,
	AB8500_REGUHWHPREQ2VALID1,
	AB8500_REGUHWHPREQ2VALID2,
	AB8500_REGUSWHPREQVALID1,
	AB8500_REGUSWHPREQVALID2,
	AB8500_REGUSYSCLKREQVALID1,
	AB8500_REGUSYSCLKREQVALID2,
	AB8500_REGUMISC1,
	AB8500_VAUDIOSUPPLY,
	AB8500_REGUCTRL1VAMIC,
	AB8500_VPLLVANAREGU,
	AB8500_VREFDDR,
	AB8500_EXTSUPPLYREGU,
	AB8500_VAUX12REGU,
	AB8500_VRF1VAUX3REGU,
	AB8500_VAUX1SEL,
	AB8500_VAUX2SEL,
	AB8500_VRF1VAUX3SEL,
	AB8500_REGUCTRL2SPARE,
	AB8500_REGUCTRLDISCH,
	AB8500_REGUCTRLDISCH2,
	AB8500_ARMREGU2, /* NOTE! PRCMU register */
	AB8500_VBBSEL1, /* NOTE! PRCMU register */
	AB8500_VBBSEL2, /* NOTE! PRCMU register */
	AB8500_VSMPS1REGU,
	AB8500_VSMPS2REGU,
	AB8500_VSMPS3REGU, /* NOTE! PRCMU register */
	AB8500_VSMPS1SEL1,
	AB8500_VSMPS3SEL1, /* NOTE! PRCMU register */
	AB8500_VSMPS3SEL2, /* NOTE! PRCMU register */
	AB8500_NUM_REGULATOR_REGISTERS,
};


/* AB9540 registers */
enum ab9540_regulator_reg {
	AB9540_REGUREQUESTCTRL1,
	AB9540_REGUREQUESTCTRL2,
	AB9540_REGUREQUESTCTRL3,
	AB9540_REGUREQUESTCTRL4,
	AB9540_REGUSYSCLKREQ1HPVALID1,
	AB9540_REGUSYSCLKREQ1HPVALID2,
	AB9540_REGUHWHPREQ1VALID1,
	AB9540_REGUHWHPREQ1VALID2,
	AB9540_REGUHWHPREQ2VALID1,
	AB9540_REGUHWHPREQ2VALID2,
	AB9540_REGUSWHPREQVALID1,
	AB9540_REGUSWHPREQVALID2,
	AB9540_REGUSYSCLKREQVALID1,
	AB9540_REGUSYSCLKREQVALID2,
	AB9540_REGUVAUX4REQVALID,
	AB9540_REGUMISC1,
	AB9540_VAUDIOSUPPLY,
	AB9540_REGUCTRL1VAMIC,
	AB9540_VSMPS1REGU,
	AB9540_VSMPS2REGU,
	AB9540_VSMPS3REGU, /* NOTE! PRCMU register */
	AB9540_VPLLVANAREGU,
	AB9540_EXTSUPPLYREGU,
	AB9540_VAUX12REGU,
	AB9540_VRF1VAUX3REGU,
	AB9540_VSMPS1SEL1,
	AB9540_VSMPS1SEL2,
	AB9540_VSMPS1SEL3,
	AB9540_VSMPS2SEL1,
	AB9540_VSMPS2SEL2,
	AB9540_VSMPS2SEL3,
	AB9540_VSMPS3SEL1, /* NOTE! PRCMU register */
	AB9540_VSMPS3SEL2, /* NOTE! PRCMU register */
	AB9540_VAUX1SEL,
	AB9540_VAUX2SEL,
	AB9540_VRF1VAUX3SEL,
	AB9540_REGUCTRL2SPARE,
	AB9540_VAUX4REQCTRL,
	AB9540_VAUX4REGU,
	AB9540_VAUX4SEL,
	AB9540_REGUCTRLDISCH,
	AB9540_REGUCTRLDISCH2,
	AB9540_REGUCTRLDISCH3,
	AB9540_NUM_REGULATOR_REGISTERS,
};

#endif
Commit	Line	Data
549931f9 SI	1	/*
	2	* Copyright (C) ST-Ericsson SA 2010
	3	*
	4	* License Terms: GNU General Public License v2
	5	*
79568b94 BJ	6	* Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
79568b94 BJ	7	* Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
549931f9 SI	8	*/
	9
	10	#ifndef __LINUX_MFD_AB8500_REGULATOR_H
	11	#define __LINUX_MFD_AB8500_REGULATOR_H
	12
	13	/* AB8500 regulators */
cb189b07 BJ	14	enum ab8500_regulator_id {
	15	AB8500_LDO_AUX1,
	16	AB8500_LDO_AUX2,
	17	AB8500_LDO_AUX3,
	18	AB8500_LDO_INTCORE,
	19	AB8500_LDO_TVOUT,
ea05ef31	20	AB8500_LDO_USB,
cb189b07 BJ	21	AB8500_LDO_AUDIO,
	22	AB8500_LDO_ANAMIC1,
	23	AB8500_LDO_ANAMIC2,
	24	AB8500_LDO_DMIC,
	25	AB8500_LDO_ANA,
	26	AB8500_NUM_REGULATORS,
	27	};
79568b94	28
d6255529 LW	29	/* AB9450 regulators */
	30	enum ab9540_regulator_id {
	31	AB9540_LDO_AUX1,
	32	AB9540_LDO_AUX2,
	33	AB9540_LDO_AUX3,
	34	AB9540_LDO_AUX4,
	35	AB9540_LDO_INTCORE,
	36	AB9540_LDO_TVOUT,
	37	AB9540_LDO_USB,
	38	AB9540_LDO_AUDIO,
	39	AB9540_LDO_ANAMIC1,
	40	AB9540_LDO_ANAMIC2,
	41	AB9540_LDO_DMIC,
	42	AB9540_LDO_ANA,
	43	AB9540_SYSCLKREQ_2,
	44	AB9540_SYSCLKREQ_4,
	45	AB9540_NUM_REGULATORS,
	46	};
	47
	48	/* AB8500 and AB9540 register initialization */
79568b94 BJ	49	struct ab8500_regulator_reg_init {
79568b94 BJ	50	int id;
3c1b8438	51	u8 mask;
79568b94 BJ	52	u8 value;
	53	};
	54
3c1b8438 LJ	55	#define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
	56	{ \
	57	.id = _id, \
	58	.mask = _mask, \
	59	.value = _value, \
79568b94 BJ	60	}
	61
	62	/* AB8500 registers */
	63	enum ab8500_regulator_reg {
	64	AB8500_REGUREQUESTCTRL2,
	65	AB8500_REGUREQUESTCTRL3,
	66	AB8500_REGUREQUESTCTRL4,
	67	AB8500_REGUSYSCLKREQ1HPVALID1,
	68	AB8500_REGUSYSCLKREQ1HPVALID2,
	69	AB8500_REGUHWHPREQ1VALID1,
	70	AB8500_REGUHWHPREQ1VALID2,
	71	AB8500_REGUHWHPREQ2VALID1,
	72	AB8500_REGUHWHPREQ2VALID2,
	73	AB8500_REGUSWHPREQVALID1,
	74	AB8500_REGUSWHPREQVALID2,
	75	AB8500_REGUSYSCLKREQVALID1,
	76	AB8500_REGUSYSCLKREQVALID2,
	77	AB8500_REGUMISC1,
	78	AB8500_VAUDIOSUPPLY,
	79	AB8500_REGUCTRL1VAMIC,
	80	AB8500_VPLLVANAREGU,
	81	AB8500_VREFDDR,
	82	AB8500_EXTSUPPLYREGU,
	83	AB8500_VAUX12REGU,
	84	AB8500_VRF1VAUX3REGU,
	85	AB8500_VAUX1SEL,
	86	AB8500_VAUX2SEL,
	87	AB8500_VRF1VAUX3SEL,
	88	AB8500_REGUCTRL2SPARE,
	89	AB8500_REGUCTRLDISCH,
	90	AB8500_REGUCTRLDISCH2,
d79df329 LJ	91	AB8500_ARMREGU2, /* NOTE! PRCMU register */
	92	AB8500_VBBSEL1, /* NOTE! PRCMU register */
	93	AB8500_VBBSEL2, /* NOTE! PRCMU register */
	94	AB8500_VSMPS1REGU,
	95	AB8500_VSMPS2REGU,
	96	AB8500_VSMPS3REGU, /* NOTE! PRCMU register */
79568b94	97	AB8500_VSMPS1SEL1,
d79df329 LJ	98	AB8500_VSMPS3SEL1, /* NOTE! PRCMU register */
d79df329 LJ	99	AB8500_VSMPS3SEL2, /* NOTE! PRCMU register */
79568b94 BJ	100	AB8500_NUM_REGULATOR_REGISTERS,
	101	};
	102
d6255529 LW	103
	104	/* AB9540 registers */
	105	enum ab9540_regulator_reg {
	106	AB9540_REGUREQUESTCTRL1,
	107	AB9540_REGUREQUESTCTRL2,
	108	AB9540_REGUREQUESTCTRL3,
	109	AB9540_REGUREQUESTCTRL4,
	110	AB9540_REGUSYSCLKREQ1HPVALID1,
	111	AB9540_REGUSYSCLKREQ1HPVALID2,
	112	AB9540_REGUHWHPREQ1VALID1,
	113	AB9540_REGUHWHPREQ1VALID2,
	114	AB9540_REGUHWHPREQ2VALID1,
	115	AB9540_REGUHWHPREQ2VALID2,
	116	AB9540_REGUSWHPREQVALID1,
	117	AB9540_REGUSWHPREQVALID2,
	118	AB9540_REGUSYSCLKREQVALID1,
	119	AB9540_REGUSYSCLKREQVALID2,
	120	AB9540_REGUVAUX4REQVALID,
	121	AB9540_REGUMISC1,
	122	AB9540_VAUDIOSUPPLY,
	123	AB9540_REGUCTRL1VAMIC,
	124	AB9540_VSMPS1REGU,
	125	AB9540_VSMPS2REGU,
	126	AB9540_VSMPS3REGU, /* NOTE! PRCMU register */
	127	AB9540_VPLLVANAREGU,
	128	AB9540_EXTSUPPLYREGU,
	129	AB9540_VAUX12REGU,
	130	AB9540_VRF1VAUX3REGU,
	131	AB9540_VSMPS1SEL1,
	132	AB9540_VSMPS1SEL2,
	133	AB9540_VSMPS1SEL3,
	134	AB9540_VSMPS2SEL1,
	135	AB9540_VSMPS2SEL2,
	136	AB9540_VSMPS2SEL3,
	137	AB9540_VSMPS3SEL1, /* NOTE! PRCMU register */
	138	AB9540_VSMPS3SEL2, /* NOTE! PRCMU register */
	139	AB9540_VAUX1SEL,
	140	AB9540_VAUX2SEL,
	141	AB9540_VRF1VAUX3SEL,
	142	AB9540_REGUCTRL2SPARE,
	143	AB9540_VAUX4REQCTRL,
	144	AB9540_VAUX4REGU,
	145	AB9540_VAUX4SEL,
	146	AB9540_REGUCTRLDISCH,
	147	AB9540_REGUCTRLDISCH2,
	148	AB9540_REGUCTRLDISCH3,
	149	AB9540_NUM_REGULATOR_REGISTERS,
	150	};
	151
549931f9	152	#endif