Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/char/serial_core.h | |
3 | * | |
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | #ifndef LINUX_SERIAL_CORE_H | |
21 | #define LINUX_SERIAL_CORE_H | |
22 | ||
1da177e4 | 23 | |
661f83a6 | 24 | #include <linux/compiler.h> |
1da177e4 LT |
25 | #include <linux/interrupt.h> |
26 | #include <linux/circ_buf.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/sched.h> | |
29 | #include <linux/tty.h> | |
e2862f6a | 30 | #include <linux/mutex.h> |
b11115c1 | 31 | #include <linux/sysrq.h> |
607ca46e | 32 | #include <uapi/linux/serial_core.h> |
1da177e4 | 33 | |
cf0ebee0 SP |
34 | #ifdef CONFIG_SERIAL_CORE_CONSOLE |
35 | #define uart_console(port) \ | |
36 | ((port)->cons && (port)->cons->index == (port)->line) | |
37 | #else | |
6b3cddcc | 38 | #define uart_console(port) ({ (void)port; 0; }) |
cf0ebee0 SP |
39 | #endif |
40 | ||
1da177e4 | 41 | struct uart_port; |
1da177e4 LT |
42 | struct serial_struct; |
43 | struct device; | |
44 | ||
45 | /* | |
e759d7c5 KC |
46 | * This structure describes all the operations that can be done on the |
47 | * physical hardware. See Documentation/serial/driver for details. | |
1da177e4 LT |
48 | */ |
49 | struct uart_ops { | |
50 | unsigned int (*tx_empty)(struct uart_port *); | |
51 | void (*set_mctrl)(struct uart_port *, unsigned int mctrl); | |
52 | unsigned int (*get_mctrl)(struct uart_port *); | |
b129a8cc RK |
53 | void (*stop_tx)(struct uart_port *); |
54 | void (*start_tx)(struct uart_port *); | |
9aba8d5b RK |
55 | void (*throttle)(struct uart_port *); |
56 | void (*unthrottle)(struct uart_port *); | |
1da177e4 LT |
57 | void (*send_xchar)(struct uart_port *, char ch); |
58 | void (*stop_rx)(struct uart_port *); | |
59 | void (*enable_ms)(struct uart_port *); | |
60 | void (*break_ctl)(struct uart_port *, int ctl); | |
61 | int (*startup)(struct uart_port *); | |
62 | void (*shutdown)(struct uart_port *); | |
6bb0e3a5 | 63 | void (*flush_buffer)(struct uart_port *); |
606d099c AC |
64 | void (*set_termios)(struct uart_port *, struct ktermios *new, |
65 | struct ktermios *old); | |
732a84a0 | 66 | void (*set_ldisc)(struct uart_port *, struct ktermios *); |
1da177e4 LT |
67 | void (*pm)(struct uart_port *, unsigned int state, |
68 | unsigned int oldstate); | |
1da177e4 LT |
69 | |
70 | /* | |
71 | * Return a string describing the type of the port | |
72 | */ | |
e759d7c5 | 73 | const char *(*type)(struct uart_port *); |
1da177e4 LT |
74 | |
75 | /* | |
76 | * Release IO and memory resources used by the port. | |
77 | * This includes iounmap if necessary. | |
78 | */ | |
79 | void (*release_port)(struct uart_port *); | |
80 | ||
81 | /* | |
82 | * Request IO and memory resources used by the port. | |
83 | * This includes iomapping the port if necessary. | |
84 | */ | |
85 | int (*request_port)(struct uart_port *); | |
86 | void (*config_port)(struct uart_port *, int); | |
87 | int (*verify_port)(struct uart_port *, struct serial_struct *); | |
88 | int (*ioctl)(struct uart_port *, unsigned int, unsigned long); | |
f2d937f3 | 89 | #ifdef CONFIG_CONSOLE_POLL |
c7f3e708 | 90 | int (*poll_init)(struct uart_port *); |
e759d7c5 | 91 | void (*poll_put_char)(struct uart_port *, unsigned char); |
f2d937f3 JW |
92 | int (*poll_get_char)(struct uart_port *); |
93 | #endif | |
1da177e4 LT |
94 | }; |
95 | ||
f5316b4a | 96 | #define NO_POLL_CHAR 0x00ff0000 |
1da177e4 LT |
97 | #define UART_CONFIG_TYPE (1 << 0) |
98 | #define UART_CONFIG_IRQ (1 << 1) | |
99 | ||
100 | struct uart_icount { | |
101 | __u32 cts; | |
102 | __u32 dsr; | |
103 | __u32 rng; | |
104 | __u32 dcd; | |
105 | __u32 rx; | |
106 | __u32 tx; | |
107 | __u32 frame; | |
108 | __u32 overrun; | |
109 | __u32 parity; | |
110 | __u32 brk; | |
111 | __u32 buf_overrun; | |
112 | }; | |
113 | ||
0077d45e | 114 | typedef unsigned int __bitwise__ upf_t; |
299245a1 | 115 | typedef unsigned int __bitwise__ upstat_t; |
0077d45e | 116 | |
1da177e4 LT |
117 | struct uart_port { |
118 | spinlock_t lock; /* port lock */ | |
0c8946d9 | 119 | unsigned long iobase; /* in/out[bwl] */ |
1da177e4 | 120 | unsigned char __iomem *membase; /* read/write[bwl] */ |
7d6a07d1 DD |
121 | unsigned int (*serial_in)(struct uart_port *, int); |
122 | void (*serial_out)(struct uart_port *, int, int); | |
235dae5d PL |
123 | void (*set_termios)(struct uart_port *, |
124 | struct ktermios *new, | |
125 | struct ktermios *old); | |
144ef5c2 | 126 | unsigned int (*get_mctrl)(struct uart_port *); |
4bf4ea9d | 127 | void (*set_mctrl)(struct uart_port *, unsigned int); |
b99b121b SAS |
128 | int (*startup)(struct uart_port *port); |
129 | void (*shutdown)(struct uart_port *port); | |
234abab1 SAS |
130 | void (*throttle)(struct uart_port *port); |
131 | void (*unthrottle)(struct uart_port *port); | |
a74036f5 | 132 | int (*handle_irq)(struct uart_port *); |
c161afe9 ML |
133 | void (*pm)(struct uart_port *, unsigned int state, |
134 | unsigned int old); | |
bf03f65b | 135 | void (*handle_break)(struct uart_port *); |
a5f276f1 RRD |
136 | int (*rs485_config)(struct uart_port *, |
137 | struct serial_rs485 *rs485); | |
1da177e4 | 138 | unsigned int irq; /* irq number */ |
1c2f0493 | 139 | unsigned long irqflags; /* irq flags */ |
1da177e4 | 140 | unsigned int uartclk; /* base uart clock */ |
947deee8 | 141 | unsigned int fifosize; /* tx fifo size */ |
1da177e4 LT |
142 | unsigned char x_char; /* xon/xoff char */ |
143 | unsigned char regshift; /* reg offset shift */ | |
144 | unsigned char iotype; /* io access style */ | |
947deee8 | 145 | unsigned char unused1; |
1da177e4 | 146 | |
647f162b PH |
147 | #define UPIO_PORT (SERIAL_IO_PORT) /* 8b I/O port access */ |
148 | #define UPIO_HUB6 (SERIAL_IO_HUB6) /* Hub6 ISA card */ | |
858965d9 | 149 | #define UPIO_MEM (SERIAL_IO_MEM) /* driver-specific */ |
647f162b PH |
150 | #define UPIO_MEM32 (SERIAL_IO_MEM32) /* 32b little endian */ |
151 | #define UPIO_AU (SERIAL_IO_AU) /* Au1x00 and RT288x type IO */ | |
152 | #define UPIO_TSI (SERIAL_IO_TSI) /* Tsi108/109 type IO */ | |
153 | #define UPIO_MEM32BE (SERIAL_IO_MEM32BE) /* 32b big endian */ | |
bd94c407 | 154 | #define UPIO_MEM16 (SERIAL_IO_MEM16) /* 16b little endian */ |
1da177e4 LT |
155 | |
156 | unsigned int read_status_mask; /* driver specific */ | |
157 | unsigned int ignore_status_mask; /* driver specific */ | |
ebd2c8f6 | 158 | struct uart_state *state; /* pointer to parent state */ |
1da177e4 LT |
159 | struct uart_icount icount; /* statistics */ |
160 | ||
161 | struct console *cons; /* struct console, if any */ | |
06e82df0 | 162 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ) |
1da177e4 LT |
163 | unsigned long sysrq; /* sysrq timeout */ |
164 | #endif | |
165 | ||
8a949b07 | 166 | /* flags must be updated while holding port mutex */ |
0077d45e RK |
167 | upf_t flags; |
168 | ||
904326ec PH |
169 | /* |
170 | * These flags must be equivalent to the flags defined in | |
171 | * include/uapi/linux/tty_flags.h which are the userspace definitions | |
172 | * assigned from the serial_struct flags in uart_set_info() | |
173 | * [for bit definitions in the UPF_CHANGE_MASK] | |
174 | * | |
175 | * Bits [0..UPF_LAST_USER] are userspace defined/visible/changeable | |
176 | * except bit 15 (UPF_NO_TXEN_TEST) which is masked off. | |
177 | * The remaining bits are serial-core specific and not modifiable by | |
178 | * userspace. | |
179 | */ | |
180 | #define UPF_FOURPORT ((__force upf_t) ASYNC_FOURPORT /* 1 */ ) | |
181 | #define UPF_SAK ((__force upf_t) ASYNC_SAK /* 2 */ ) | |
182 | #define UPF_SPD_HI ((__force upf_t) ASYNC_SPD_HI /* 4 */ ) | |
183 | #define UPF_SPD_VHI ((__force upf_t) ASYNC_SPD_VHI /* 5 */ ) | |
184 | #define UPF_SPD_CUST ((__force upf_t) ASYNC_SPD_CUST /* 0x0030 */ ) | |
185 | #define UPF_SPD_WARP ((__force upf_t) ASYNC_SPD_WARP /* 0x1010 */ ) | |
186 | #define UPF_SPD_MASK ((__force upf_t) ASYNC_SPD_MASK /* 0x1030 */ ) | |
187 | #define UPF_SKIP_TEST ((__force upf_t) ASYNC_SKIP_TEST /* 6 */ ) | |
188 | #define UPF_AUTO_IRQ ((__force upf_t) ASYNC_AUTO_IRQ /* 7 */ ) | |
189 | #define UPF_HARDPPS_CD ((__force upf_t) ASYNC_HARDPPS_CD /* 11 */ ) | |
190 | #define UPF_SPD_SHI ((__force upf_t) ASYNC_SPD_SHI /* 12 */ ) | |
191 | #define UPF_LOW_LATENCY ((__force upf_t) ASYNC_LOW_LATENCY /* 13 */ ) | |
192 | #define UPF_BUGGY_UART ((__force upf_t) ASYNC_BUGGY_UART /* 14 */ ) | |
b6adea33 | 193 | #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15)) |
904326ec PH |
194 | #define UPF_MAGIC_MULTIPLIER ((__force upf_t) ASYNC_MAGIC_MULTIPLIER /* 16 */ ) |
195 | ||
391f93f2 PH |
196 | /* Port has hardware-assisted h/w flow control */ |
197 | #define UPF_AUTO_CTS ((__force upf_t) (1 << 20)) | |
198 | #define UPF_AUTO_RTS ((__force upf_t) (1 << 21)) | |
199 | #define UPF_HARD_FLOW ((__force upf_t) (UPF_AUTO_CTS | UPF_AUTO_RTS)) | |
2cbacafd RK |
200 | /* Port has hardware-assisted s/w flow control */ |
201 | #define UPF_SOFT_FLOW ((__force upf_t) (1 << 22)) | |
0077d45e RK |
202 | #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) |
203 | #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) | |
06315348 | 204 | #define UPF_EXAR_EFR ((__force upf_t) (1 << 25)) |
bc02d15a | 205 | #define UPF_BUG_THRE ((__force upf_t) (1 << 26)) |
8e23fcc8 DD |
206 | /* The exact UART type is known and should not be probed. */ |
207 | #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) | |
0077d45e | 208 | #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) |
abb4a239 | 209 | #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) |
68ac64cd | 210 | #define UPF_DEAD ((__force upf_t) (1 << 30)) |
0077d45e RK |
211 | #define UPF_IOREMAP ((__force upf_t) (1 << 31)) |
212 | ||
904326ec PH |
213 | #define __UPF_CHANGE_MASK 0x17fff |
214 | #define UPF_CHANGE_MASK ((__force upf_t) __UPF_CHANGE_MASK) | |
0077d45e | 215 | #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) |
1da177e4 | 216 | |
904326ec PH |
217 | #if __UPF_CHANGE_MASK > ASYNC_FLAGS |
218 | #error Change mask not equivalent to userspace-visible bit defines | |
219 | #endif | |
220 | ||
391f93f2 PH |
221 | /* |
222 | * Must hold termios_rwsem, port mutex and port lock to change; | |
223 | * can hold any one lock to read. | |
224 | */ | |
299245a1 PH |
225 | upstat_t status; |
226 | ||
227 | #define UPSTAT_CTS_ENABLE ((__force upstat_t) (1 << 0)) | |
228 | #define UPSTAT_DCD_ENABLE ((__force upstat_t) (1 << 1)) | |
391f93f2 PH |
229 | #define UPSTAT_AUTORTS ((__force upstat_t) (1 << 2)) |
230 | #define UPSTAT_AUTOCTS ((__force upstat_t) (1 << 3)) | |
231 | #define UPSTAT_AUTOXOFF ((__force upstat_t) (1 << 4)) | |
299245a1 | 232 | |
d01f4d18 | 233 | int hw_stopped; /* sw-assisted CTS flow state */ |
1da177e4 LT |
234 | unsigned int mctrl; /* current modem ctrl settings */ |
235 | unsigned int timeout; /* character-based timeout */ | |
236 | unsigned int type; /* port type */ | |
ba899dbc | 237 | const struct uart_ops *ops; |
1da177e4 LT |
238 | unsigned int custom_divisor; |
239 | unsigned int line; /* port index */ | |
959801fe | 240 | unsigned int minor; |
4f640efb | 241 | resource_size_t mapbase; /* for ioremap */ |
ee97d0e3 | 242 | resource_size_t mapsize; |
1da177e4 LT |
243 | struct device *dev; /* parent device */ |
244 | unsigned char hub6; /* this should be in the 8250 driver */ | |
b3b708fa | 245 | unsigned char suspended; |
3f960dbb | 246 | unsigned char irq_wake; |
b3b708fa | 247 | unsigned char unused[2]; |
266dcff0 GKH |
248 | struct attribute_group *attr_group; /* port specific attributes */ |
249 | const struct attribute_group **tty_groups; /* all attributes (serial core use only) */ | |
a5f276f1 | 250 | struct serial_rs485 rs485; |
beab697a | 251 | void *private_data; /* generic platform data pointer */ |
1da177e4 LT |
252 | }; |
253 | ||
927353a7 PG |
254 | static inline int serial_port_in(struct uart_port *up, int offset) |
255 | { | |
256 | return up->serial_in(up, offset); | |
257 | } | |
258 | ||
259 | static inline void serial_port_out(struct uart_port *up, int offset, int value) | |
260 | { | |
261 | up->serial_out(up, offset, value); | |
262 | } | |
263 | ||
6f538fe3 LW |
264 | /** |
265 | * enum uart_pm_state - power states for UARTs | |
266 | * @UART_PM_STATE_ON: UART is powered, up and operational | |
267 | * @UART_PM_STATE_OFF: UART is powered off | |
268 | * @UART_PM_STATE_UNDEFINED: sentinel | |
269 | */ | |
270 | enum uart_pm_state { | |
271 | UART_PM_STATE_ON = 0, | |
272 | UART_PM_STATE_OFF = 3, /* number taken from ACPI */ | |
273 | UART_PM_STATE_UNDEFINED, | |
274 | }; | |
275 | ||
ebd2c8f6 AC |
276 | /* |
277 | * This is the state information which is persistent across opens. | |
ebd2c8f6 AC |
278 | */ |
279 | struct uart_state { | |
df4f4dd4 | 280 | struct tty_port port; |
ebd2c8f6 | 281 | |
6f538fe3 | 282 | enum uart_pm_state pm_state; |
1da177e4 | 283 | struct circ_buf xmit; |
1da177e4 | 284 | |
9ed19428 PH |
285 | atomic_t refcount; |
286 | wait_queue_head_t remove_wait; | |
ebd2c8f6 | 287 | struct uart_port *uart_port; |
f751928e AC |
288 | }; |
289 | ||
290 | #define UART_XMIT_SIZE PAGE_SIZE | |
291 | ||
292 | ||
1da177e4 LT |
293 | /* number of characters left in xmit buffer before we ask for more */ |
294 | #define WAKEUP_CHARS 256 | |
295 | ||
296 | struct module; | |
297 | struct tty_driver; | |
298 | ||
299 | struct uart_driver { | |
300 | struct module *owner; | |
301 | const char *driver_name; | |
302 | const char *dev_name; | |
1da177e4 LT |
303 | int major; |
304 | int minor; | |
305 | int nr; | |
306 | struct console *cons; | |
307 | ||
308 | /* | |
309 | * these are private; the low level driver should not | |
310 | * touch these; they should be initialised to NULL | |
311 | */ | |
312 | struct uart_state *state; | |
313 | struct tty_driver *tty_driver; | |
314 | }; | |
315 | ||
316 | void uart_write_wakeup(struct uart_port *port); | |
317 | ||
318 | /* | |
319 | * Baud rate helpers. | |
320 | */ | |
321 | void uart_update_timeout(struct uart_port *port, unsigned int cflag, | |
322 | unsigned int baud); | |
606d099c AC |
323 | unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, |
324 | struct ktermios *old, unsigned int min, | |
1da177e4 LT |
325 | unsigned int max); |
326 | unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); | |
327 | ||
54381067 AV |
328 | /* Base timer interval for polling */ |
329 | static inline int uart_poll_timeout(struct uart_port *port) | |
330 | { | |
331 | int timeout = port->timeout; | |
332 | ||
333 | return timeout > 6 ? (timeout / 2 - 2) : 1; | |
334 | } | |
335 | ||
1da177e4 LT |
336 | /* |
337 | * Console helpers. | |
338 | */ | |
9aac5887 RH |
339 | struct earlycon_device { |
340 | struct console *con; | |
341 | struct uart_port port; | |
342 | char options[16]; /* e.g., 115200n8 */ | |
343 | unsigned int baud; | |
344 | }; | |
9aac5887 | 345 | |
470ca0de PH |
346 | struct earlycon_id { |
347 | char name[16]; | |
2eaa7909 | 348 | char compatible[128]; |
470ca0de | 349 | int (*setup)(struct earlycon_device *, const char *options); |
99492c39 | 350 | } __aligned(32); |
470ca0de | 351 | |
2eaa7909 PH |
352 | extern const struct earlycon_id __earlycon_table[]; |
353 | extern const struct earlycon_id __earlycon_table_end[]; | |
354 | ||
355 | #define OF_EARLYCON_DECLARE(_name, compat, fn) \ | |
356 | static const struct earlycon_id __UNIQUE_ID(__earlycon_##_name) \ | |
357 | __used __section(__earlycon_table) \ | |
358 | = { .name = __stringify(_name), \ | |
359 | .compatible = compat, \ | |
360 | .setup = fn } | |
361 | ||
362 | #define EARLYCON_DECLARE(_name, fn) OF_EARLYCON_DECLARE(_name, "", fn) | |
363 | ||
470ca0de | 364 | extern int setup_earlycon(char *buf); |
c90fe9c0 | 365 | extern int of_setup_earlycon(const struct earlycon_id *match, |
088da2a1 | 366 | unsigned long node, |
4d118c9a | 367 | const char *options); |
b0b6abd3 | 368 | |
1da177e4 LT |
369 | struct uart_port *uart_get_console(struct uart_port *ports, int nr, |
370 | struct console *c); | |
73abaf87 PH |
371 | int uart_parse_earlycon(char *p, unsigned char *iotype, unsigned long *addr, |
372 | char **options); | |
1da177e4 LT |
373 | void uart_parse_options(char *options, int *baud, int *parity, int *bits, |
374 | int *flow); | |
375 | int uart_set_options(struct uart_port *port, struct console *co, int baud, | |
376 | int parity, int bits, int flow); | |
377 | struct tty_driver *uart_console_device(struct console *co, int *index); | |
d358788f RK |
378 | void uart_console_write(struct uart_port *port, const char *s, |
379 | unsigned int count, | |
380 | void (*putchar)(struct uart_port *, int)); | |
1da177e4 LT |
381 | |
382 | /* | |
383 | * Port/driver registration/removal | |
384 | */ | |
385 | int uart_register_driver(struct uart_driver *uart); | |
386 | void uart_unregister_driver(struct uart_driver *uart); | |
1da177e4 LT |
387 | int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); |
388 | int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); | |
389 | int uart_match_port(struct uart_port *port1, struct uart_port *port2); | |
390 | ||
391 | /* | |
392 | * Power Management | |
393 | */ | |
394 | int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); | |
395 | int uart_resume_port(struct uart_driver *reg, struct uart_port *port); | |
396 | ||
397 | #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) | |
398 | #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) | |
399 | ||
400 | #define uart_circ_chars_pending(circ) \ | |
401 | (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) | |
402 | ||
403 | #define uart_circ_chars_free(circ) \ | |
404 | (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) | |
405 | ||
f751928e AC |
406 | static inline int uart_tx_stopped(struct uart_port *port) |
407 | { | |
ebd2c8f6 | 408 | struct tty_struct *tty = port->state->port.tty; |
d01f4d18 | 409 | if (tty->stopped || port->hw_stopped) |
f751928e AC |
410 | return 1; |
411 | return 0; | |
412 | } | |
1da177e4 | 413 | |
299245a1 PH |
414 | static inline bool uart_cts_enabled(struct uart_port *uport) |
415 | { | |
d4260b51 | 416 | return !!(uport->status & UPSTAT_CTS_ENABLE); |
299245a1 PH |
417 | } |
418 | ||
391f93f2 PH |
419 | static inline bool uart_softcts_mode(struct uart_port *uport) |
420 | { | |
421 | upstat_t mask = UPSTAT_CTS_ENABLE | UPSTAT_AUTOCTS; | |
422 | ||
423 | return ((uport->status & mask) == UPSTAT_CTS_ENABLE); | |
424 | } | |
425 | ||
1da177e4 LT |
426 | /* |
427 | * The following are helper functions for the low level drivers. | |
428 | */ | |
027d7dac JS |
429 | |
430 | extern void uart_handle_dcd_change(struct uart_port *uport, | |
431 | unsigned int status); | |
432 | extern void uart_handle_cts_change(struct uart_port *uport, | |
433 | unsigned int status); | |
434 | ||
435 | extern void uart_insert_char(struct uart_port *port, unsigned int status, | |
436 | unsigned int overrun, unsigned int ch, unsigned int flag); | |
437 | ||
438 | #ifdef SUPPORT_SYSRQ | |
1da177e4 | 439 | static inline int |
7d12e780 | 440 | uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) |
1da177e4 LT |
441 | { |
442 | if (port->sysrq) { | |
443 | if (ch && time_before(jiffies, port->sysrq)) { | |
f335397d | 444 | handle_sysrq(ch); |
1da177e4 LT |
445 | port->sysrq = 0; |
446 | return 1; | |
447 | } | |
448 | port->sysrq = 0; | |
449 | } | |
450 | return 0; | |
451 | } | |
027d7dac JS |
452 | #else |
453 | #define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; }) | |
4e149184 | 454 | #endif |
1da177e4 LT |
455 | |
456 | /* | |
457 | * We do the SysRQ and SAK checking like this... | |
458 | */ | |
459 | static inline int uart_handle_break(struct uart_port *port) | |
460 | { | |
ebd2c8f6 | 461 | struct uart_state *state = port->state; |
bf03f65b DW |
462 | |
463 | if (port->handle_break) | |
464 | port->handle_break(port); | |
465 | ||
1da177e4 LT |
466 | #ifdef SUPPORT_SYSRQ |
467 | if (port->cons && port->cons->index == port->line) { | |
468 | if (!port->sysrq) { | |
469 | port->sysrq = jiffies + HZ*5; | |
470 | return 1; | |
471 | } | |
472 | port->sysrq = 0; | |
473 | } | |
474 | #endif | |
27ae7a74 | 475 | if (port->flags & UPF_SAK) |
ebd2c8f6 | 476 | do_SAK(state->port.tty); |
1da177e4 LT |
477 | return 0; |
478 | } | |
479 | ||
1da177e4 LT |
480 | /* |
481 | * UART_ENABLE_MS - determine if port should enable modem status irqs | |
482 | */ | |
483 | #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ | |
484 | (cflag) & CRTSCTS || \ | |
485 | !((cflag) & CLOCAL)) | |
486 | ||
1da177e4 | 487 | #endif /* LINUX_SERIAL_CORE_H */ |