[deliverable/linux.git] / include / linux / serial_core.h

/*
 *  linux/drivers/char/serial_core.h
 *
 *  Copyright (C) 2000 Deep Blue Solutions Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#ifndef LINUX_SERIAL_CORE_H
#define LINUX_SERIAL_CORE_H

/*
 * The type definitions.  These are from Ted Ts'o's serial.h
 */
#define PORT_UNKNOWN	0
#define PORT_8250	1
#define PORT_16450	2
#define PORT_16550	3
#define PORT_16550A	4
#define PORT_CIRRUS	5
#define PORT_16650	6
#define PORT_16650V2	7
#define PORT_16750	8
#define PORT_STARTECH	9
#define PORT_16C950	10
#define PORT_16654	11
#define PORT_16850	12
#define PORT_RSA	13
#define PORT_NS16550A	14
#define PORT_XSCALE	15
#define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
#define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
#define PORT_MAX_8250	17	/* max port ID */

/*
 * ARM specific type numbers.  These are not currently guaranteed
 * to be implemented, and will change in the future.  These are
 * separate so any additions to the old serial.c that occur before
 * we are merged can be easily merged here.
 */
#define PORT_PXA	31
#define PORT_AMBA	32
#define PORT_CLPS711X	33
#define PORT_SA1100	34
#define PORT_UART00	35
#define PORT_21285	37

/* Sparc type numbers.  */
#define PORT_SUNZILOG	38
#define PORT_SUNSAB	39

/* DEC */
#define PORT_DZ		46
#define PORT_ZS		47

/* Parisc type numbers. */
#define PORT_MUX	48

/* Atmel AT91 / AT32 SoC */
#define PORT_ATMEL	49

/* Macintosh Zilog type numbers */
#define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
#define PORT_PMAC_ZILOG	51

/* SH-SCI */
#define PORT_SCI	52
#define PORT_SCIF	53
#define PORT_IRDA	54

/* Samsung S3C2410 SoC and derivatives thereof */
#define PORT_S3C2410    55

/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
#define PORT_IP22ZILOG	56

/* Sharp LH7a40x -- an ARM9 SoC series */
#define PORT_LH7A40X	57

/* PPC CPM type number */
#define PORT_CPM        58

/* MPC52xx type numbers */
#define PORT_MPC52xx	59

/* IBM icom */
#define PORT_ICOM	60

/* Samsung S3C2440 SoC */
#define PORT_S3C2440	61

/* Motorola i.MX SoC */
#define PORT_IMX	62

/* Marvell MPSC */
#define PORT_MPSC	63

/* TXX9 type number */
#define PORT_TXX9	64

/* NEC VR4100 series SIU/DSIU */
#define PORT_VR41XX_SIU		65
#define PORT_VR41XX_DSIU	66

/* Samsung S3C2400 SoC */
#define PORT_S3C2400	67

/* M32R SIO */
#define PORT_M32R_SIO	68

/*Digi jsm */
#define PORT_JSM        69

#define PORT_PNX8XXX	70

/* Hilscher netx */
#define PORT_NETX	71

/* SUN4V Hypervisor Console */
#define PORT_SUNHV	72

#define PORT_S3C2412	73

/* Xilinx uartlite */
#define PORT_UARTLITE	74

/* Blackfin bf5xx */
#define PORT_BFIN	75

/* Micrel KS8695 */
#define PORT_KS8695	76

/* Broadcom SB1250, etc. SOC */
#define PORT_SB1250_DUART	77

/* Freescale ColdFire */
#define PORT_MCF	78

/* Blackfin SPORT */
#define PORT_BFIN_SPORT		79

/* MN10300 on-chip UART numbers */
#define PORT_MN10300		80
#define PORT_MN10300_CTS	81

#define PORT_SC26XX	82

/* SH-SCI */
#define PORT_SCIFA	83

#define PORT_S3C6400	84

#ifdef __KERNEL__

#include <linux/compiler.h>
#include <linux/interrupt.h>
#include <linux/circ_buf.h>
#include <linux/spinlock.h>
#include <linux/sched.h>
#include <linux/tty.h>
#include <linux/mutex.h>
#include <linux/sysrq.h>

struct uart_port;
struct uart_info;
struct serial_struct;
struct device;

/*
 * This structure describes all the operations that can be
 * done on the physical hardware.
 */
struct uart_ops {
	unsigned int	(*tx_empty)(struct uart_port *);
	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
	unsigned int	(*get_mctrl)(struct uart_port *);
	void		(*stop_tx)(struct uart_port *);
	void		(*start_tx)(struct uart_port *);
	void		(*send_xchar)(struct uart_port *, char ch);
	void		(*stop_rx)(struct uart_port *);
	void		(*enable_ms)(struct uart_port *);
	void		(*break_ctl)(struct uart_port *, int ctl);
	int		(*startup)(struct uart_port *);
	void		(*shutdown)(struct uart_port *);
	void		(*flush_buffer)(struct uart_port *);
	void		(*set_termios)(struct uart_port *, struct ktermios *new,
				       struct ktermios *old);
	void		(*set_ldisc)(struct uart_port *);
	void		(*pm)(struct uart_port *, unsigned int state,
			      unsigned int oldstate);
	int		(*set_wake)(struct uart_port *, unsigned int state);

	/*
	 * Return a string describing the type of the port
	 */
	const char *(*type)(struct uart_port *);

	/*
	 * Release IO and memory resources used by the port.
	 * This includes iounmap if necessary.
	 */
	void		(*release_port)(struct uart_port *);

	/*
	 * Request IO and memory resources used by the port.
	 * This includes iomapping the port if necessary.
	 */
	int		(*request_port)(struct uart_port *);
	void		(*config_port)(struct uart_port *, int);
	int		(*verify_port)(struct uart_port *, struct serial_struct *);
	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
#ifdef CONFIG_CONSOLE_POLL
	void	(*poll_put_char)(struct uart_port *, unsigned char);
	int		(*poll_get_char)(struct uart_port *);
#endif
};

#define UART_CONFIG_TYPE	(1 << 0)
#define UART_CONFIG_IRQ		(1 << 1)

struct uart_icount {
	__u32	cts;
	__u32	dsr;
	__u32	rng;
	__u32	dcd;
	__u32	rx;
	__u32	tx;
	__u32	frame;
	__u32	overrun;
	__u32	parity;
	__u32	brk;
	__u32	buf_overrun;
};

typedef unsigned int __bitwise__ upf_t;

struct uart_port {
	spinlock_t		lock;			/* port lock */
	unsigned long		iobase;			/* in/out[bwl] */
	unsigned char __iomem	*membase;		/* read/write[bwl] */
	unsigned int		(*serial_in)(struct uart_port *, int);
	void			(*serial_out)(struct uart_port *, int, int);
	unsigned int		irq;			/* irq number */
	unsigned int		uartclk;		/* base uart clock */
	unsigned int		fifosize;		/* tx fifo size */
	unsigned char		x_char;			/* xon/xoff char */
	unsigned char		regshift;		/* reg offset shift */
	unsigned char		iotype;			/* io access style */
	unsigned char		unused1;

#define UPIO_PORT		(0)
#define UPIO_HUB6		(1)
#define UPIO_MEM		(2)
#define UPIO_MEM32		(3)
#define UPIO_AU			(4)			/* Au1x00 type IO */
#define UPIO_TSI		(5)			/* Tsi108/109 type IO */
#define UPIO_DWAPB		(6)			/* DesignWare APB UART */
#define UPIO_RM9000		(7)			/* RM9000 type IO */

	unsigned int		read_status_mask;	/* driver specific */
	unsigned int		ignore_status_mask;	/* driver specific */
	struct uart_info	*info;			/* pointer to parent info */
	struct uart_icount	icount;			/* statistics */

	struct console		*cons;			/* struct console, if any */
#ifdef CONFIG_SERIAL_CORE_CONSOLE
	unsigned long		sysrq;			/* sysrq timeout */
#endif

	upf_t			flags;

#define UPF_FOURPORT		((__force upf_t) (1 << 1))
#define UPF_SAK			((__force upf_t) (1 << 2))
#define UPF_SPD_MASK		((__force upf_t) (0x1030))
#define UPF_SPD_HI		((__force upf_t) (0x0010))
#define UPF_SPD_VHI		((__force upf_t) (0x0020))
#define UPF_SPD_CUST		((__force upf_t) (0x0030))
#define UPF_SPD_SHI		((__force upf_t) (0x1000))
#define UPF_SPD_WARP		((__force upf_t) (0x1010))
#define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
#define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
#define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
#define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
#define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
#define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
#define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
#define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
/* The exact UART type is known and should not be probed.  */
#define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
#define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
#define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
#define UPF_DEAD		((__force upf_t) (1 << 30))
#define UPF_IOREMAP		((__force upf_t) (1 << 31))

#define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
#define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))

	unsigned int		mctrl;			/* current modem ctrl settings */
	unsigned int		timeout;		/* character-based timeout */
	unsigned int		type;			/* port type */
	const struct uart_ops	*ops;
	unsigned int		custom_divisor;
	unsigned int		line;			/* port index */
	resource_size_t		mapbase;		/* for ioremap */
	struct device		*dev;			/* parent device */
	unsigned char		hub6;			/* this should be in the 8250 driver */
	unsigned char		suspended;
	unsigned char		unused[2];
	void			*private_data;		/* generic platform data pointer */
};

/*
 * This is the state information which is only valid when the port
 * is open; it may be cleared the core driver once the device has
 * been closed.  Either the low level driver or the core can modify
 * stuff here.
 */
typedef unsigned int __bitwise__ uif_t;

struct uart_info {
	struct tty_port		port;
	struct circ_buf		xmit;
	uif_t			flags;

/*
 * Definitions for info->flags.  These are _private_ to serial_core, and
 * are specific to this structure.  They may be queried by low level drivers.
 *
 * FIXME: use the ASY_ definitions
 */
#define UIF_CHECK_CD		((__force uif_t) (1 << 25))
#define UIF_CTS_FLOW		((__force uif_t) (1 << 26))
#define UIF_NORMAL_ACTIVE	((__force uif_t) (1 << 29))
#define UIF_INITIALIZED		((__force uif_t) (1 << 31))
#define UIF_SUSPENDED		((__force uif_t) (1 << 30))

	struct tasklet_struct	tlet;
	wait_queue_head_t	delta_msr_wait;
};

/*
 * This is the state information which is persistent across opens.
 * The low level driver must not to touch any elements contained
 * within.
 */
struct uart_state {
	unsigned int		close_delay;		/* msec */
	unsigned int		closing_wait;		/* msec */

#define USF_CLOSING_WAIT_INF	(0)
#define USF_CLOSING_WAIT_NONE	(~0U)

	int			count;
	int			pm_state;
	struct uart_info	info;
	struct uart_port	*port;

	struct mutex		mutex;
};

#define UART_XMIT_SIZE	PAGE_SIZE


/* number of characters left in xmit buffer before we ask for more */
#define WAKEUP_CHARS		256

struct module;
struct tty_driver;

struct uart_driver {
	struct module		*owner;
	const char		*driver_name;
	const char		*dev_name;
	int			 major;
	int			 minor;
	int			 nr;
	struct console		*cons;

	/*
	 * these are private; the low level driver should not
	 * touch these; they should be initialised to NULL
	 */
	struct uart_state	*state;
	struct tty_driver	*tty_driver;
};

void uart_write_wakeup(struct uart_port *port);

/*
 * Baud rate helpers.
 */
void uart_update_timeout(struct uart_port *port, unsigned int cflag,
			 unsigned int baud);
unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
				struct ktermios *old, unsigned int min,
				unsigned int max);
unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);

/*
 * Console helpers.
 */
struct uart_port *uart_get_console(struct uart_port *ports, int nr,
				   struct console *c);
void uart_parse_options(char *options, int *baud, int *parity, int *bits,
			int *flow);
int uart_set_options(struct uart_port *port, struct console *co, int baud,
		     int parity, int bits, int flow);
struct tty_driver *uart_console_device(struct console *co, int *index);
void uart_console_write(struct uart_port *port, const char *s,
			unsigned int count,
			void (*putchar)(struct uart_port *, int));

/*
 * Port/driver registration/removal
 */
int uart_register_driver(struct uart_driver *uart);
void uart_unregister_driver(struct uart_driver *uart);
int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
int uart_match_port(struct uart_port *port1, struct uart_port *port2);

/*
 * Power Management
 */
int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
int uart_resume_port(struct uart_driver *reg, struct uart_port *port);

#define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
#define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)

#define uart_circ_chars_pending(circ)	\
	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))

#define uart_circ_chars_free(circ)	\
	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))

static inline int uart_tx_stopped(struct uart_port *port)
{
	struct tty_struct *tty = port->info->port.tty;
	if(tty->stopped || tty->hw_stopped)
		return 1;
	return 0;
}

/*
 * The following are helper functions for the low level drivers.
 */
static inline int
uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
{
#ifdef SUPPORT_SYSRQ
	if (port->sysrq) {
		if (ch && time_before(jiffies, port->sysrq)) {
			handle_sysrq(ch, port->info->port.tty);
			port->sysrq = 0;
			return 1;
		}
		port->sysrq = 0;
	}
#endif
	return 0;
}
#ifndef SUPPORT_SYSRQ
#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
#endif

/*
 * We do the SysRQ and SAK checking like this...
 */
static inline int uart_handle_break(struct uart_port *port)
{
	struct uart_info *info = port->info;
#ifdef SUPPORT_SYSRQ
	if (port->cons && port->cons->index == port->line) {
		if (!port->sysrq) {
			port->sysrq = jiffies + HZ*5;
			return 1;
		}
		port->sysrq = 0;
	}
#endif
	if (port->flags & UPF_SAK)
		do_SAK(info->port.tty);
	return 0;
}

/**
 *	uart_handle_dcd_change - handle a change of carrier detect state
 *	@port: uart_port structure for the open port
 *	@status: new carrier detect status, nonzero if active
 */
static inline void
uart_handle_dcd_change(struct uart_port *port, unsigned int status)
{
	struct uart_info *info = port->info;

	port->icount.dcd++;

#ifdef CONFIG_HARD_PPS
	if ((port->flags & UPF_HARDPPS_CD) && status)
		hardpps();
#endif

	if (info->flags & UIF_CHECK_CD) {
		if (status)
			wake_up_interruptible(&info->port.open_wait);
		else if (info->port.tty)
			tty_hangup(info->port.tty);
	}
}

/**
 *	uart_handle_cts_change - handle a change of clear-to-send state
 *	@port: uart_port structure for the open port
 *	@status: new clear to send status, nonzero if active
 */
static inline void
uart_handle_cts_change(struct uart_port *port, unsigned int status)
{
	struct uart_info *info = port->info;
	struct tty_struct *tty = info->port.tty;

	port->icount.cts++;

	if (info->flags & UIF_CTS_FLOW) {
		if (tty->hw_stopped) {
			if (status) {
				tty->hw_stopped = 0;
				port->ops->start_tx(port);
				uart_write_wakeup(port);
			}
		} else {
			if (!status) {
				tty->hw_stopped = 1;
				port->ops->stop_tx(port);
			}
		}
	}
}

#include <linux/tty_flip.h>

static inline void
uart_insert_char(struct uart_port *port, unsigned int status,
		 unsigned int overrun, unsigned int ch, unsigned int flag)
{
	struct tty_struct *tty = port->info->port.tty;

	if ((status & port->ignore_status_mask & ~overrun) == 0)
		tty_insert_flip_char(tty, ch, flag);

	/*
	 * Overrun is special.  Since it's reported immediately,
	 * it doesn't affect the current character.
	 */
	if (status & ~port->ignore_status_mask & overrun)
		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
}

/*
 *	UART_ENABLE_MS - determine if port should enable modem status irqs
 */
#define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
					 (cflag) & CRTSCTS || \
					 !((cflag) & CLOCAL))

#endif

#endif /* LINUX_SERIAL_CORE_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/char/serial_core.h
	3	*
	4	* Copyright (C) 2000 Deep Blue Solutions Ltd.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20	#ifndef LINUX_SERIAL_CORE_H
	21	#define LINUX_SERIAL_CORE_H
	22
	23	/*
	24	* The type definitions. These are from Ted Ts'o's serial.h
	25	*/
	26	#define PORT_UNKNOWN 0
	27	#define PORT_8250 1
	28	#define PORT_16450 2
	29	#define PORT_16550 3
	30	#define PORT_16550A 4
	31	#define PORT_CIRRUS 5
	32	#define PORT_16650 6
	33	#define PORT_16650V2 7
	34	#define PORT_16750 8
	35	#define PORT_STARTECH 9
	36	#define PORT_16C950 10
	37	#define PORT_16654 11
	38	#define PORT_16850 12
	39	#define PORT_RSA 13
	40	#define PORT_NS16550A 14
	41	#define PORT_XSCALE 15
bd71c182	42	#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
6b06f191 DD	43	#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
6b06f191 DD	44	#define PORT_MAX_8250 17 /* max port ID */
1da177e4 LT	45
	46	/*
	47	* ARM specific type numbers. These are not currently guaranteed
	48	* to be implemented, and will change in the future. These are
	49	* separate so any additions to the old serial.c that occur before
	50	* we are merged can be easily merged here.
	51	*/
	52	#define PORT_PXA 31
	53	#define PORT_AMBA 32
	54	#define PORT_CLPS711X 33
	55	#define PORT_SA1100 34
	56	#define PORT_UART00 35
	57	#define PORT_21285 37
	58
	59	/* Sparc type numbers. */
	60	#define PORT_SUNZILOG 38
	61	#define PORT_SUNSAB 39
	62
8b4a4080 MR	63	/* DEC */
	64	#define PORT_DZ 46
	65	#define PORT_ZS 47
1da177e4 LT	66
	67	/* Parisc type numbers. */
	68	#define PORT_MUX 48
	69
9ab4f88b HS	70	/* Atmel AT91 / AT32 SoC */
9ab4f88b HS	71	#define PORT_ATMEL 49
1e6c9c28	72
1da177e4 LT	73	/* Macintosh Zilog type numbers */
	74	#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
	75	#define PORT_PMAC_ZILOG 51
	76
	77	/* SH-SCI */
	78	#define PORT_SCI 52
	79	#define PORT_SCIF 53
	80	#define PORT_IRDA 54
	81
	82	/* Samsung S3C2410 SoC and derivatives thereof */
	83	#define PORT_S3C2410 55
	84
	85	/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
	86	#define PORT_IP22ZILOG 56
	87
	88	/* Sharp LH7a40x -- an ARM9 SoC series */
	89	#define PORT_LH7A40X 57
	90
	91	/* PPC CPM type number */
	92	#define PORT_CPM 58
	93
	94	/* MPC52xx type numbers */
	95	#define PORT_MPC52xx 59
	96
	97	/* IBM icom */
	98	#define PORT_ICOM 60
	99
	100	/* Samsung S3C2440 SoC */
	101	#define PORT_S3C2440 61
	102
	103	/* Motorola i.MX SoC */
	104	#define PORT_IMX 62
	105
	106	/* Marvell MPSC */
	107	#define PORT_MPSC 63
	108
	109	/* TXX9 type number */
e5c2d749	110	#define PORT_TXX9 64
1da177e4 LT	111
	112	/* NEC VR4100 series SIU/DSIU */
	113	#define PORT_VR41XX_SIU 65
	114	#define PORT_VR41XX_DSIU 66
	115
	116	/* Samsung S3C2400 SoC */
	117	#define PORT_S3C2400 67
	118
	119	/* M32R SIO */
	120	#define PORT_M32R_SIO 68
	121
	122	/Digi jsm /
913ade51 RK	123	#define PORT_JSM 69
913ade51 RK	124
e6fa0ba3	125	#define PORT_PNX8XXX 70
1da177e4	126
f5417612 SH	127	/* Hilscher netx */
	128	#define PORT_NETX 71
	129
02fd473b DM	130	/* SUN4V Hypervisor Console */
	131	#define PORT_SUNHV 72
	132
73e55cb3 BD	133	#define PORT_S3C2412 73
73e55cb3 BD	134
238b8721 PK	135	/* Xilinx uartlite */
238b8721 PK	136	#define PORT_UARTLITE 74
73e55cb3	137
194de561 BW	138	/* Blackfin bf5xx */
	139	#define PORT_BFIN 75
	140
2c7ee6ab AV	141	/* Micrel KS8695 */
	142	#define PORT_KS8695 76
	143
b45d5279 MR	144	/* Broadcom SB1250, etc. SOC */
	145	#define PORT_SB1250_DUART 77
	146
f0c15f48 GU	147	/* Freescale ColdFire */
	148	#define PORT_MCF 78
	149
2f351741 BW	150	/* Blackfin SPORT */
2f351741 BW	151	#define PORT_BFIN_SPORT 79
2c7ee6ab	152
ef3d5347 DH	153	/* MN10300 on-chip UART numbers */
	154	#define PORT_MN10300 80
	155	#define PORT_MN10300_CTS 81
	156
2f351741 BW	157	#define PORT_SC26XX 82
2f351741 BW	158
1a22f08d YS	159	/* SH-SCI */
	160	#define PORT_SCIFA 83
	161
b690ace5 BD	162	#define PORT_S3C6400 84
b690ace5 BD	163
1da177e4 LT	164	#ifdef __KERNEL__
1da177e4 LT	165
661f83a6	166	#include <linux/compiler.h>
1da177e4 LT	167	#include <linux/interrupt.h>
	168	#include <linux/circ_buf.h>
	169	#include <linux/spinlock.h>
	170	#include <linux/sched.h>
	171	#include <linux/tty.h>
e2862f6a	172	#include <linux/mutex.h>
b11115c1	173	#include <linux/sysrq.h>
1da177e4 LT	174
	175	struct uart_port;
	176	struct uart_info;
	177	struct serial_struct;
	178	struct device;
	179
	180	/*
	181	* This structure describes all the operations that can be
	182	* done on the physical hardware.
	183	*/
	184	struct uart_ops {
	185	unsigned int (tx_empty)(struct uart_port );
	186	void (set_mctrl)(struct uart_port , unsigned int mctrl);
	187	unsigned int (get_mctrl)(struct uart_port );
b129a8cc RK	188	void (stop_tx)(struct uart_port );
b129a8cc RK	189	void (start_tx)(struct uart_port );
1da177e4 LT	190	void (send_xchar)(struct uart_port , char ch);
	191	void (stop_rx)(struct uart_port );
	192	void (enable_ms)(struct uart_port );
	193	void (break_ctl)(struct uart_port , int ctl);
	194	int (startup)(struct uart_port );
	195	void (shutdown)(struct uart_port );
6bb0e3a5	196	void (flush_buffer)(struct uart_port );
606d099c AC	197	void (set_termios)(struct uart_port , struct ktermios *new,
606d099c AC	198	struct ktermios *old);
64e9159f	199	void (set_ldisc)(struct uart_port );
1da177e4 LT	200	void (pm)(struct uart_port , unsigned int state,
	201	unsigned int oldstate);
	202	int (set_wake)(struct uart_port , unsigned int state);
	203
	204	/*
	205	* Return a string describing the type of the port
	206	*/
	207	const char (type)(struct uart_port *);
	208
	209	/*
	210	* Release IO and memory resources used by the port.
	211	* This includes iounmap if necessary.
	212	*/
	213	void (release_port)(struct uart_port );
	214
	215	/*
	216	* Request IO and memory resources used by the port.
	217	* This includes iomapping the port if necessary.
	218	*/
	219	int (request_port)(struct uart_port );
	220	void (config_port)(struct uart_port , int);
	221	int (verify_port)(struct uart_port , struct serial_struct *);
	222	int (ioctl)(struct uart_port , unsigned int, unsigned long);
f2d937f3 JW	223	#ifdef CONFIG_CONSOLE_POLL
	224	void (poll_put_char)(struct uart_port , unsigned char);
	225	int (poll_get_char)(struct uart_port );
	226	#endif
1da177e4 LT	227	};
	228
	229	#define UART_CONFIG_TYPE (1 << 0)
	230	#define UART_CONFIG_IRQ (1 << 1)
	231
	232	struct uart_icount {
	233	__u32 cts;
	234	__u32 dsr;
	235	__u32 rng;
	236	__u32 dcd;
	237	__u32 rx;
	238	__u32 tx;
	239	__u32 frame;
	240	__u32 overrun;
	241	__u32 parity;
	242	__u32 brk;
	243	__u32 buf_overrun;
	244	};
	245
0077d45e RK	246	typedef unsigned int __bitwise__ upf_t;
0077d45e RK	247
1da177e4 LT	248	struct uart_port {
1da177e4 LT	249	spinlock_t lock; /* port lock */
0c8946d9	250	unsigned long iobase; /* in/out[bwl] */
1da177e4	251	unsigned char __iomem membase; / read/write[bwl] */
7d6a07d1 DD	252	unsigned int (serial_in)(struct uart_port , int);
7d6a07d1 DD	253	void (serial_out)(struct uart_port , int, int);
1da177e4 LT	254	unsigned int irq; /* irq number */
1da177e4 LT	255	unsigned int uartclk; /* base uart clock */
947deee8	256	unsigned int fifosize; /* tx fifo size */
1da177e4 LT	257	unsigned char x_char; /* xon/xoff char */
	258	unsigned char regshift; /* reg offset shift */
	259	unsigned char iotype; /* io access style */
947deee8	260	unsigned char unused1;
1da177e4 LT	261
	262	#define UPIO_PORT (0)
	263	#define UPIO_HUB6 (1)
	264	#define UPIO_MEM (2)
	265	#define UPIO_MEM32 (3)
21c614a7	266	#define UPIO_AU (4) /* Au1x00 type IO */
3be91ec7	267	#define UPIO_TSI (5) /* Tsi108/109 type IO */
beab697a	268	#define UPIO_DWAPB (6) /* DesignWare APB UART */
bd71c182	269	#define UPIO_RM9000 (7) /* RM9000 type IO */
1da177e4 LT	270
	271	unsigned int read_status_mask; /* driver specific */
	272	unsigned int ignore_status_mask; /* driver specific */
	273	struct uart_info info; / pointer to parent info */
	274	struct uart_icount icount; /* statistics */
	275
	276	struct console cons; / struct console, if any */
	277	#ifdef CONFIG_SERIAL_CORE_CONSOLE
	278	unsigned long sysrq; /* sysrq timeout */
	279	#endif
	280
0077d45e RK	281	upf_t flags;
	282
	283	#define UPF_FOURPORT ((__force upf_t) (1 << 1))
	284	#define UPF_SAK ((__force upf_t) (1 << 2))
	285	#define UPF_SPD_MASK ((__force upf_t) (0x1030))
	286	#define UPF_SPD_HI ((__force upf_t) (0x0010))
	287	#define UPF_SPD_VHI ((__force upf_t) (0x0020))
	288	#define UPF_SPD_CUST ((__force upf_t) (0x0030))
	289	#define UPF_SPD_SHI ((__force upf_t) (0x1000))
	290	#define UPF_SPD_WARP ((__force upf_t) (0x1010))
	291	#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
	292	#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
	293	#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
	294	#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
	295	#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
	296	#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
	297	#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
	298	#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
8e23fcc8 DD	299	/* The exact UART type is known and should not be probed. */
8e23fcc8 DD	300	#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
0077d45e	301	#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
abb4a239	302	#define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
68ac64cd	303	#define UPF_DEAD ((__force upf_t) (1 << 30))
0077d45e RK	304	#define UPF_IOREMAP ((__force upf_t) (1 << 31))
	305
	306	#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
	307	#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK\|UPF_LOW_LATENCY))
1da177e4 LT	308
	309	unsigned int mctrl; /* current modem ctrl settings */
	310	unsigned int timeout; /* character-based timeout */
	311	unsigned int type; /* port type */
ba899dbc	312	const struct uart_ops *ops;
1da177e4 LT	313	unsigned int custom_divisor;
1da177e4 LT	314	unsigned int line; /* port index */
4f640efb	315	resource_size_t mapbase; /* for ioremap */
1da177e4 LT	316	struct device dev; / parent device */
1da177e4 LT	317	unsigned char hub6; /* this should be in the 8250 driver */
b3b708fa GL	318	unsigned char suspended;
b3b708fa GL	319	unsigned char unused[2];
beab697a	320	void private_data; / generic platform data pointer */
1da177e4 LT	321	};
1da177e4 LT	322
1da177e4 LT	323	/*
1da177e4 LT	324	* This is the state information which is only valid when the port
f751928e	325	* is open; it may be cleared the core driver once the device has
1da177e4 LT	326	* been closed. Either the low level driver or the core can modify
	327	* stuff here.
	328	*/
f751928e AC	329	typedef unsigned int __bitwise__ uif_t;
f751928e AC	330
1da177e4	331	struct uart_info {
df4f4dd4	332	struct tty_port port;
1da177e4	333	struct circ_buf xmit;
747c8a55	334	uif_t flags;
1da177e4 LT	335
1da177e4 LT	336	/*
747c8a55 RK	337	* Definitions for info->flags. These are _private_ to serial_core, and
747c8a55 RK	338	* are specific to this structure. They may be queried by low level drivers.
df4f4dd4 AC	339	*
df4f4dd4 AC	340	* FIXME: use the ASY_ definitions
1da177e4	341	*/
747c8a55 RK	342	#define UIF_CHECK_CD ((__force uif_t) (1 << 25))
	343	#define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
	344	#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
	345	#define UIF_INITIALIZED ((__force uif_t) (1 << 31))
a6b93a90	346	#define UIF_SUSPENDED ((__force uif_t) (1 << 30))
1da177e4	347
1da177e4	348	struct tasklet_struct tlet;
1da177e4 LT	349	wait_queue_head_t delta_msr_wait;
	350	};
	351
f751928e AC	352	/*
	353	* This is the state information which is persistent across opens.
	354	* The low level driver must not to touch any elements contained
	355	* within.
	356	*/
	357	struct uart_state {
	358	unsigned int close_delay; /* msec */
	359	unsigned int closing_wait; /* msec */
	360
	361	#define USF_CLOSING_WAIT_INF (0)
	362	#define USF_CLOSING_WAIT_NONE (~0U)
	363
	364	int count;
	365	int pm_state;
	366	struct uart_info info;
	367	struct uart_port *port;
	368
	369	struct mutex mutex;
	370	};
	371
	372	#define UART_XMIT_SIZE PAGE_SIZE
	373
	374
1da177e4 LT	375	/* number of characters left in xmit buffer before we ask for more */
	376	#define WAKEUP_CHARS 256
	377
	378	struct module;
	379	struct tty_driver;
	380
	381	struct uart_driver {
	382	struct module *owner;
	383	const char *driver_name;
	384	const char *dev_name;
1da177e4 LT	385	int major;
	386	int minor;
	387	int nr;
	388	struct console *cons;
	389
	390	/*
	391	* these are private; the low level driver should not
	392	* touch these; they should be initialised to NULL
	393	*/
	394	struct uart_state *state;
	395	struct tty_driver *tty_driver;
	396	};
	397
	398	void uart_write_wakeup(struct uart_port *port);
	399
	400	/*
	401	* Baud rate helpers.
	402	*/
	403	void uart_update_timeout(struct uart_port *port, unsigned int cflag,
	404	unsigned int baud);
606d099c AC	405	unsigned int uart_get_baud_rate(struct uart_port port, struct ktermios termios,
606d099c AC	406	struct ktermios *old, unsigned int min,
1da177e4 LT	407	unsigned int max);
	408	unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
	409
	410	/*
	411	* Console helpers.
	412	*/
	413	struct uart_port uart_get_console(struct uart_port ports, int nr,
	414	struct console *c);
	415	void uart_parse_options(char options, int baud, int parity, int bits,
	416	int *flow);
	417	int uart_set_options(struct uart_port port, struct console co, int baud,
	418	int parity, int bits, int flow);
	419	struct tty_driver uart_console_device(struct console co, int *index);
d358788f RK	420	void uart_console_write(struct uart_port port, const char s,
	421	unsigned int count,
	422	void (putchar)(struct uart_port , int));
1da177e4 LT	423
	424	/*
	425	* Port/driver registration/removal
	426	*/
	427	int uart_register_driver(struct uart_driver *uart);
	428	void uart_unregister_driver(struct uart_driver *uart);
1da177e4 LT	429	int uart_add_one_port(struct uart_driver reg, struct uart_port port);
	430	int uart_remove_one_port(struct uart_driver reg, struct uart_port port);
	431	int uart_match_port(struct uart_port port1, struct uart_port port2);
	432
	433	/*
	434	* Power Management
	435	*/
	436	int uart_suspend_port(struct uart_driver reg, struct uart_port port);
	437	int uart_resume_port(struct uart_driver reg, struct uart_port port);
	438
	439	#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
	440	#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
	441
	442	#define uart_circ_chars_pending(circ) \
	443	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
	444
	445	#define uart_circ_chars_free(circ) \
	446	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
	447
f751928e AC	448	static inline int uart_tx_stopped(struct uart_port *port)
	449	{
	450	struct tty_struct *tty = port->info->port.tty;
	451	if(tty->stopped \|\| tty->hw_stopped)
	452	return 1;
	453	return 0;
	454	}
1da177e4 LT	455
	456	/*
	457	* The following are helper functions for the low level drivers.
	458	*/
1da177e4	459	static inline int
7d12e780	460	uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
1da177e4	461	{
93c37f29	462	#ifdef SUPPORT_SYSRQ
1da177e4 LT	463	if (port->sysrq) {
1da177e4 LT	464	if (ch && time_before(jiffies, port->sysrq)) {
f751928e	465	handle_sysrq(ch, port->info->port.tty);
1da177e4 LT	466	port->sysrq = 0;
	467	return 1;
	468	}
	469	port->sysrq = 0;
	470	}
93c37f29	471	#endif
1da177e4 LT	472	return 0;
1da177e4 LT	473	}
4e149184	474	#ifndef SUPPORT_SYSRQ
7d12e780	475	#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
4e149184	476	#endif
1da177e4 LT	477
	478	/*
	479	* We do the SysRQ and SAK checking like this...
	480	*/
	481	static inline int uart_handle_break(struct uart_port *port)
	482	{
	483	struct uart_info *info = port->info;
	484	#ifdef SUPPORT_SYSRQ
	485	if (port->cons && port->cons->index == port->line) {
	486	if (!port->sysrq) {
	487	port->sysrq = jiffies + HZ*5;
	488	return 1;
	489	}
	490	port->sysrq = 0;
	491	}
	492	#endif
27ae7a74	493	if (port->flags & UPF_SAK)
df4f4dd4	494	do_SAK(info->port.tty);
1da177e4 LT	495	return 0;
	496	}
	497
	498	/**
	499	* uart_handle_dcd_change - handle a change of carrier detect state
	500	* @port: uart_port structure for the open port
	501	* @status: new carrier detect status, nonzero if active
	502	*/
	503	static inline void
	504	uart_handle_dcd_change(struct uart_port *port, unsigned int status)
	505	{
	506	struct uart_info *info = port->info;
	507
	508	port->icount.dcd++;
	509
	510	#ifdef CONFIG_HARD_PPS
	511	if ((port->flags & UPF_HARDPPS_CD) && status)
	512	hardpps();
	513	#endif
	514
	515	if (info->flags & UIF_CHECK_CD) {
	516	if (status)
df4f4dd4 AC	517	wake_up_interruptible(&info->port.open_wait);
	518	else if (info->port.tty)
	519	tty_hangup(info->port.tty);
1da177e4 LT	520	}
	521	}
	522
	523	/**
	524	* uart_handle_cts_change - handle a change of clear-to-send state
	525	* @port: uart_port structure for the open port
	526	* @status: new clear to send status, nonzero if active
	527	*/
	528	static inline void
	529	uart_handle_cts_change(struct uart_port *port, unsigned int status)
	530	{
	531	struct uart_info *info = port->info;
df4f4dd4	532	struct tty_struct *tty = info->port.tty;
1da177e4 LT	533
	534	port->icount.cts++;
	535
	536	if (info->flags & UIF_CTS_FLOW) {
	537	if (tty->hw_stopped) {
	538	if (status) {
	539	tty->hw_stopped = 0;
b129a8cc	540	port->ops->start_tx(port);
1da177e4 LT	541	uart_write_wakeup(port);
	542	}
	543	} else {
	544	if (!status) {
	545	tty->hw_stopped = 1;
b129a8cc	546	port->ops->stop_tx(port);
1da177e4 LT	547	}
	548	}
	549	}
	550	}
	551
05ab3014 RK	552	#include <linux/tty_flip.h>
	553
	554	static inline void
	555	uart_insert_char(struct uart_port *port, unsigned int status,
	556	unsigned int overrun, unsigned int ch, unsigned int flag)
	557	{
df4f4dd4	558	struct tty_struct *tty = port->info->port.tty;
05ab3014 RK	559
	560	if ((status & port->ignore_status_mask & ~overrun) == 0)
	561	tty_insert_flip_char(tty, ch, flag);
	562
	563	/*
	564	* Overrun is special. Since it's reported immediately,
	565	* it doesn't affect the current character.
	566	*/
	567	if (status & ~port->ignore_status_mask & overrun)
	568	tty_insert_flip_char(tty, 0, TTY_OVERRUN);
	569	}
	570
1da177e4 LT	571	/*
	572	* UART_ENABLE_MS - determine if port should enable modem status irqs
	573	*/
	574	#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD \|\| \
	575	(cflag) & CRTSCTS \|\| \
	576	!((cflag) & CLOCAL))
	577
	578	#endif
	579
	580	#endif /* LINUX_SERIAL_CORE_H */