Merge tag 'for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power...
[deliverable/linux.git] / include / linux / serial_core.h
CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef LINUX_SERIAL_CORE_H
21#define LINUX_SERIAL_CORE_H
22
1da177e4 23
661f83a6 24#include <linux/compiler.h>
1da177e4
LT
25#include <linux/interrupt.h>
26#include <linux/circ_buf.h>
27#include <linux/spinlock.h>
28#include <linux/sched.h>
29#include <linux/tty.h>
e2862f6a 30#include <linux/mutex.h>
b11115c1 31#include <linux/sysrq.h>
607ca46e 32#include <uapi/linux/serial_core.h>
1da177e4 33
cf0ebee0
SP
34#ifdef CONFIG_SERIAL_CORE_CONSOLE
35#define uart_console(port) \
36 ((port)->cons && (port)->cons->index == (port)->line)
37#else
6b3cddcc 38#define uart_console(port) ({ (void)port; 0; })
cf0ebee0
SP
39#endif
40
1da177e4 41struct uart_port;
1da177e4
LT
42struct serial_struct;
43struct device;
44
45/*
e759d7c5
KC
46 * This structure describes all the operations that can be done on the
47 * physical hardware. See Documentation/serial/driver for details.
1da177e4
LT
48 */
49struct uart_ops {
50 unsigned int (*tx_empty)(struct uart_port *);
51 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
52 unsigned int (*get_mctrl)(struct uart_port *);
b129a8cc
RK
53 void (*stop_tx)(struct uart_port *);
54 void (*start_tx)(struct uart_port *);
9aba8d5b
RK
55 void (*throttle)(struct uart_port *);
56 void (*unthrottle)(struct uart_port *);
1da177e4
LT
57 void (*send_xchar)(struct uart_port *, char ch);
58 void (*stop_rx)(struct uart_port *);
59 void (*enable_ms)(struct uart_port *);
60 void (*break_ctl)(struct uart_port *, int ctl);
61 int (*startup)(struct uart_port *);
62 void (*shutdown)(struct uart_port *);
6bb0e3a5 63 void (*flush_buffer)(struct uart_port *);
606d099c
AC
64 void (*set_termios)(struct uart_port *, struct ktermios *new,
65 struct ktermios *old);
732a84a0 66 void (*set_ldisc)(struct uart_port *, struct ktermios *);
1da177e4
LT
67 void (*pm)(struct uart_port *, unsigned int state,
68 unsigned int oldstate);
1da177e4
LT
69
70 /*
71 * Return a string describing the type of the port
72 */
e759d7c5 73 const char *(*type)(struct uart_port *);
1da177e4
LT
74
75 /*
76 * Release IO and memory resources used by the port.
77 * This includes iounmap if necessary.
78 */
79 void (*release_port)(struct uart_port *);
80
81 /*
82 * Request IO and memory resources used by the port.
83 * This includes iomapping the port if necessary.
84 */
85 int (*request_port)(struct uart_port *);
86 void (*config_port)(struct uart_port *, int);
87 int (*verify_port)(struct uart_port *, struct serial_struct *);
88 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
f2d937f3 89#ifdef CONFIG_CONSOLE_POLL
c7f3e708 90 int (*poll_init)(struct uart_port *);
e759d7c5 91 void (*poll_put_char)(struct uart_port *, unsigned char);
f2d937f3
JW
92 int (*poll_get_char)(struct uart_port *);
93#endif
1da177e4
LT
94};
95
f5316b4a 96#define NO_POLL_CHAR 0x00ff0000
1da177e4
LT
97#define UART_CONFIG_TYPE (1 << 0)
98#define UART_CONFIG_IRQ (1 << 1)
99
100struct uart_icount {
101 __u32 cts;
102 __u32 dsr;
103 __u32 rng;
104 __u32 dcd;
105 __u32 rx;
106 __u32 tx;
107 __u32 frame;
108 __u32 overrun;
109 __u32 parity;
110 __u32 brk;
111 __u32 buf_overrun;
112};
113
0077d45e 114typedef unsigned int __bitwise__ upf_t;
299245a1 115typedef unsigned int __bitwise__ upstat_t;
0077d45e 116
1da177e4
LT
117struct uart_port {
118 spinlock_t lock; /* port lock */
0c8946d9 119 unsigned long iobase; /* in/out[bwl] */
1da177e4 120 unsigned char __iomem *membase; /* read/write[bwl] */
7d6a07d1
DD
121 unsigned int (*serial_in)(struct uart_port *, int);
122 void (*serial_out)(struct uart_port *, int, int);
235dae5d
PL
123 void (*set_termios)(struct uart_port *,
124 struct ktermios *new,
125 struct ktermios *old);
4bf4ea9d 126 void (*set_mctrl)(struct uart_port *, unsigned int);
b99b121b
SAS
127 int (*startup)(struct uart_port *port);
128 void (*shutdown)(struct uart_port *port);
234abab1
SAS
129 void (*throttle)(struct uart_port *port);
130 void (*unthrottle)(struct uart_port *port);
a74036f5 131 int (*handle_irq)(struct uart_port *);
c161afe9
ML
132 void (*pm)(struct uart_port *, unsigned int state,
133 unsigned int old);
bf03f65b 134 void (*handle_break)(struct uart_port *);
a5f276f1
RRD
135 int (*rs485_config)(struct uart_port *,
136 struct serial_rs485 *rs485);
1da177e4 137 unsigned int irq; /* irq number */
1c2f0493 138 unsigned long irqflags; /* irq flags */
1da177e4 139 unsigned int uartclk; /* base uart clock */
947deee8 140 unsigned int fifosize; /* tx fifo size */
1da177e4
LT
141 unsigned char x_char; /* xon/xoff char */
142 unsigned char regshift; /* reg offset shift */
143 unsigned char iotype; /* io access style */
947deee8 144 unsigned char unused1;
1da177e4 145
647f162b
PH
146#define UPIO_PORT (SERIAL_IO_PORT) /* 8b I/O port access */
147#define UPIO_HUB6 (SERIAL_IO_HUB6) /* Hub6 ISA card */
858965d9 148#define UPIO_MEM (SERIAL_IO_MEM) /* driver-specific */
647f162b
PH
149#define UPIO_MEM32 (SERIAL_IO_MEM32) /* 32b little endian */
150#define UPIO_AU (SERIAL_IO_AU) /* Au1x00 and RT288x type IO */
151#define UPIO_TSI (SERIAL_IO_TSI) /* Tsi108/109 type IO */
152#define UPIO_MEM32BE (SERIAL_IO_MEM32BE) /* 32b big endian */
bd94c407 153#define UPIO_MEM16 (SERIAL_IO_MEM16) /* 16b little endian */
1da177e4
LT
154
155 unsigned int read_status_mask; /* driver specific */
156 unsigned int ignore_status_mask; /* driver specific */
ebd2c8f6 157 struct uart_state *state; /* pointer to parent state */
1da177e4
LT
158 struct uart_icount icount; /* statistics */
159
160 struct console *cons; /* struct console, if any */
06e82df0 161#if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
1da177e4
LT
162 unsigned long sysrq; /* sysrq timeout */
163#endif
164
8a949b07 165 /* flags must be updated while holding port mutex */
0077d45e
RK
166 upf_t flags;
167
904326ec
PH
168 /*
169 * These flags must be equivalent to the flags defined in
170 * include/uapi/linux/tty_flags.h which are the userspace definitions
171 * assigned from the serial_struct flags in uart_set_info()
172 * [for bit definitions in the UPF_CHANGE_MASK]
173 *
174 * Bits [0..UPF_LAST_USER] are userspace defined/visible/changeable
175 * except bit 15 (UPF_NO_TXEN_TEST) which is masked off.
176 * The remaining bits are serial-core specific and not modifiable by
177 * userspace.
178 */
179#define UPF_FOURPORT ((__force upf_t) ASYNC_FOURPORT /* 1 */ )
180#define UPF_SAK ((__force upf_t) ASYNC_SAK /* 2 */ )
181#define UPF_SPD_HI ((__force upf_t) ASYNC_SPD_HI /* 4 */ )
182#define UPF_SPD_VHI ((__force upf_t) ASYNC_SPD_VHI /* 5 */ )
183#define UPF_SPD_CUST ((__force upf_t) ASYNC_SPD_CUST /* 0x0030 */ )
184#define UPF_SPD_WARP ((__force upf_t) ASYNC_SPD_WARP /* 0x1010 */ )
185#define UPF_SPD_MASK ((__force upf_t) ASYNC_SPD_MASK /* 0x1030 */ )
186#define UPF_SKIP_TEST ((__force upf_t) ASYNC_SKIP_TEST /* 6 */ )
187#define UPF_AUTO_IRQ ((__force upf_t) ASYNC_AUTO_IRQ /* 7 */ )
188#define UPF_HARDPPS_CD ((__force upf_t) ASYNC_HARDPPS_CD /* 11 */ )
189#define UPF_SPD_SHI ((__force upf_t) ASYNC_SPD_SHI /* 12 */ )
190#define UPF_LOW_LATENCY ((__force upf_t) ASYNC_LOW_LATENCY /* 13 */ )
191#define UPF_BUGGY_UART ((__force upf_t) ASYNC_BUGGY_UART /* 14 */ )
b6adea33 192#define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
904326ec
PH
193#define UPF_MAGIC_MULTIPLIER ((__force upf_t) ASYNC_MAGIC_MULTIPLIER /* 16 */ )
194
391f93f2
PH
195/* Port has hardware-assisted h/w flow control */
196#define UPF_AUTO_CTS ((__force upf_t) (1 << 20))
197#define UPF_AUTO_RTS ((__force upf_t) (1 << 21))
198#define UPF_HARD_FLOW ((__force upf_t) (UPF_AUTO_CTS | UPF_AUTO_RTS))
2cbacafd
RK
199/* Port has hardware-assisted s/w flow control */
200#define UPF_SOFT_FLOW ((__force upf_t) (1 << 22))
0077d45e
RK
201#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
202#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
06315348 203#define UPF_EXAR_EFR ((__force upf_t) (1 << 25))
bc02d15a 204#define UPF_BUG_THRE ((__force upf_t) (1 << 26))
8e23fcc8
DD
205/* The exact UART type is known and should not be probed. */
206#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
0077d45e 207#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
abb4a239 208#define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
68ac64cd 209#define UPF_DEAD ((__force upf_t) (1 << 30))
0077d45e
RK
210#define UPF_IOREMAP ((__force upf_t) (1 << 31))
211
904326ec
PH
212#define __UPF_CHANGE_MASK 0x17fff
213#define UPF_CHANGE_MASK ((__force upf_t) __UPF_CHANGE_MASK)
0077d45e 214#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
1da177e4 215
904326ec
PH
216#if __UPF_CHANGE_MASK > ASYNC_FLAGS
217#error Change mask not equivalent to userspace-visible bit defines
218#endif
219
391f93f2
PH
220 /*
221 * Must hold termios_rwsem, port mutex and port lock to change;
222 * can hold any one lock to read.
223 */
299245a1
PH
224 upstat_t status;
225
226#define UPSTAT_CTS_ENABLE ((__force upstat_t) (1 << 0))
227#define UPSTAT_DCD_ENABLE ((__force upstat_t) (1 << 1))
391f93f2
PH
228#define UPSTAT_AUTORTS ((__force upstat_t) (1 << 2))
229#define UPSTAT_AUTOCTS ((__force upstat_t) (1 << 3))
230#define UPSTAT_AUTOXOFF ((__force upstat_t) (1 << 4))
299245a1 231
d01f4d18 232 int hw_stopped; /* sw-assisted CTS flow state */
1da177e4
LT
233 unsigned int mctrl; /* current modem ctrl settings */
234 unsigned int timeout; /* character-based timeout */
235 unsigned int type; /* port type */
ba899dbc 236 const struct uart_ops *ops;
1da177e4
LT
237 unsigned int custom_divisor;
238 unsigned int line; /* port index */
959801fe 239 unsigned int minor;
4f640efb 240 resource_size_t mapbase; /* for ioremap */
ee97d0e3 241 resource_size_t mapsize;
1da177e4
LT
242 struct device *dev; /* parent device */
243 unsigned char hub6; /* this should be in the 8250 driver */
b3b708fa 244 unsigned char suspended;
3f960dbb 245 unsigned char irq_wake;
b3b708fa 246 unsigned char unused[2];
266dcff0
GKH
247 struct attribute_group *attr_group; /* port specific attributes */
248 const struct attribute_group **tty_groups; /* all attributes (serial core use only) */
a5f276f1 249 struct serial_rs485 rs485;
beab697a 250 void *private_data; /* generic platform data pointer */
1da177e4
LT
251};
252
927353a7
PG
253static inline int serial_port_in(struct uart_port *up, int offset)
254{
255 return up->serial_in(up, offset);
256}
257
258static inline void serial_port_out(struct uart_port *up, int offset, int value)
259{
260 up->serial_out(up, offset, value);
261}
262
6f538fe3
LW
263/**
264 * enum uart_pm_state - power states for UARTs
265 * @UART_PM_STATE_ON: UART is powered, up and operational
266 * @UART_PM_STATE_OFF: UART is powered off
267 * @UART_PM_STATE_UNDEFINED: sentinel
268 */
269enum uart_pm_state {
270 UART_PM_STATE_ON = 0,
271 UART_PM_STATE_OFF = 3, /* number taken from ACPI */
272 UART_PM_STATE_UNDEFINED,
273};
274
ebd2c8f6
AC
275/*
276 * This is the state information which is persistent across opens.
ebd2c8f6
AC
277 */
278struct uart_state {
df4f4dd4 279 struct tty_port port;
ebd2c8f6 280
6f538fe3 281 enum uart_pm_state pm_state;
1da177e4 282 struct circ_buf xmit;
1da177e4 283
ebd2c8f6 284 struct uart_port *uart_port;
f751928e
AC
285};
286
287#define UART_XMIT_SIZE PAGE_SIZE
288
289
1da177e4
LT
290/* number of characters left in xmit buffer before we ask for more */
291#define WAKEUP_CHARS 256
292
293struct module;
294struct tty_driver;
295
296struct uart_driver {
297 struct module *owner;
298 const char *driver_name;
299 const char *dev_name;
1da177e4
LT
300 int major;
301 int minor;
302 int nr;
303 struct console *cons;
304
305 /*
306 * these are private; the low level driver should not
307 * touch these; they should be initialised to NULL
308 */
309 struct uart_state *state;
310 struct tty_driver *tty_driver;
311};
312
313void uart_write_wakeup(struct uart_port *port);
314
315/*
316 * Baud rate helpers.
317 */
318void uart_update_timeout(struct uart_port *port, unsigned int cflag,
319 unsigned int baud);
606d099c
AC
320unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
321 struct ktermios *old, unsigned int min,
1da177e4
LT
322 unsigned int max);
323unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
324
54381067
AV
325/* Base timer interval for polling */
326static inline int uart_poll_timeout(struct uart_port *port)
327{
328 int timeout = port->timeout;
329
330 return timeout > 6 ? (timeout / 2 - 2) : 1;
331}
332
1da177e4
LT
333/*
334 * Console helpers.
335 */
9aac5887
RH
336struct earlycon_device {
337 struct console *con;
338 struct uart_port port;
339 char options[16]; /* e.g., 115200n8 */
340 unsigned int baud;
341};
9aac5887 342
470ca0de
PH
343struct earlycon_id {
344 char name[16];
345 int (*setup)(struct earlycon_device *, const char *options);
99492c39 346} __aligned(32);
470ca0de
PH
347
348extern int setup_earlycon(char *buf);
b0b6abd3
RH
349extern int of_setup_earlycon(unsigned long addr,
350 int (*setup)(struct earlycon_device *, const char *));
351
470ca0de
PH
352#define EARLYCON_DECLARE(_name, func) \
353 static const struct earlycon_id __earlycon_##_name \
354 __used __section(__earlycon_table) \
355 = { .name = __stringify(_name), \
356 .setup = func }
9aac5887 357
b0b6abd3
RH
358#define OF_EARLYCON_DECLARE(name, compat, fn) \
359 _OF_DECLARE(earlycon, name, compat, fn, void *)
360
1da177e4
LT
361struct uart_port *uart_get_console(struct uart_port *ports, int nr,
362 struct console *c);
73abaf87
PH
363int uart_parse_earlycon(char *p, unsigned char *iotype, unsigned long *addr,
364 char **options);
1da177e4
LT
365void uart_parse_options(char *options, int *baud, int *parity, int *bits,
366 int *flow);
367int uart_set_options(struct uart_port *port, struct console *co, int baud,
368 int parity, int bits, int flow);
369struct tty_driver *uart_console_device(struct console *co, int *index);
d358788f
RK
370void uart_console_write(struct uart_port *port, const char *s,
371 unsigned int count,
372 void (*putchar)(struct uart_port *, int));
1da177e4
LT
373
374/*
375 * Port/driver registration/removal
376 */
377int uart_register_driver(struct uart_driver *uart);
378void uart_unregister_driver(struct uart_driver *uart);
1da177e4
LT
379int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
380int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
381int uart_match_port(struct uart_port *port1, struct uart_port *port2);
382
383/*
384 * Power Management
385 */
386int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
387int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
388
389#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
390#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
391
392#define uart_circ_chars_pending(circ) \
393 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
394
395#define uart_circ_chars_free(circ) \
396 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
397
f751928e
AC
398static inline int uart_tx_stopped(struct uart_port *port)
399{
ebd2c8f6 400 struct tty_struct *tty = port->state->port.tty;
d01f4d18 401 if (tty->stopped || port->hw_stopped)
f751928e
AC
402 return 1;
403 return 0;
404}
1da177e4 405
299245a1
PH
406static inline bool uart_cts_enabled(struct uart_port *uport)
407{
d4260b51 408 return !!(uport->status & UPSTAT_CTS_ENABLE);
299245a1
PH
409}
410
391f93f2
PH
411static inline bool uart_softcts_mode(struct uart_port *uport)
412{
413 upstat_t mask = UPSTAT_CTS_ENABLE | UPSTAT_AUTOCTS;
414
415 return ((uport->status & mask) == UPSTAT_CTS_ENABLE);
416}
417
1da177e4
LT
418/*
419 * The following are helper functions for the low level drivers.
420 */
027d7dac
JS
421
422extern void uart_handle_dcd_change(struct uart_port *uport,
423 unsigned int status);
424extern void uart_handle_cts_change(struct uart_port *uport,
425 unsigned int status);
426
427extern void uart_insert_char(struct uart_port *port, unsigned int status,
428 unsigned int overrun, unsigned int ch, unsigned int flag);
429
430#ifdef SUPPORT_SYSRQ
1da177e4 431static inline int
7d12e780 432uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
1da177e4
LT
433{
434 if (port->sysrq) {
435 if (ch && time_before(jiffies, port->sysrq)) {
f335397d 436 handle_sysrq(ch);
1da177e4
LT
437 port->sysrq = 0;
438 return 1;
439 }
440 port->sysrq = 0;
441 }
442 return 0;
443}
027d7dac
JS
444#else
445#define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; })
4e149184 446#endif
1da177e4
LT
447
448/*
449 * We do the SysRQ and SAK checking like this...
450 */
451static inline int uart_handle_break(struct uart_port *port)
452{
ebd2c8f6 453 struct uart_state *state = port->state;
bf03f65b
DW
454
455 if (port->handle_break)
456 port->handle_break(port);
457
1da177e4
LT
458#ifdef SUPPORT_SYSRQ
459 if (port->cons && port->cons->index == port->line) {
460 if (!port->sysrq) {
461 port->sysrq = jiffies + HZ*5;
462 return 1;
463 }
464 port->sysrq = 0;
465 }
466#endif
27ae7a74 467 if (port->flags & UPF_SAK)
ebd2c8f6 468 do_SAK(state->port.tty);
1da177e4
LT
469 return 0;
470}
471
1da177e4
LT
472/*
473 * UART_ENABLE_MS - determine if port should enable modem status irqs
474 */
475#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
476 (cflag) & CRTSCTS || \
477 !((cflag) & CLOCAL))
478
1da177e4 479#endif /* LINUX_SERIAL_CORE_H */
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