Better documentation for ERESTARTSYS
[deliverable/linux.git] / include / linux / serial_core.h
CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef LINUX_SERIAL_CORE_H
21#define LINUX_SERIAL_CORE_H
22
23/*
24 * The type definitions. These are from Ted Ts'o's serial.h
25 */
26#define PORT_UNKNOWN 0
27#define PORT_8250 1
28#define PORT_16450 2
29#define PORT_16550 3
30#define PORT_16550A 4
31#define PORT_CIRRUS 5
32#define PORT_16650 6
33#define PORT_16650V2 7
34#define PORT_16750 8
35#define PORT_STARTECH 9
36#define PORT_16C950 10
37#define PORT_16654 11
38#define PORT_16850 12
39#define PORT_RSA 13
40#define PORT_NS16550A 14
41#define PORT_XSCALE 15
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42#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
43#define PORT_MAX_8250 16 /* max port ID */
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44
45/*
46 * ARM specific type numbers. These are not currently guaranteed
47 * to be implemented, and will change in the future. These are
48 * separate so any additions to the old serial.c that occur before
49 * we are merged can be easily merged here.
50 */
51#define PORT_PXA 31
52#define PORT_AMBA 32
53#define PORT_CLPS711X 33
54#define PORT_SA1100 34
55#define PORT_UART00 35
56#define PORT_21285 37
57
58/* Sparc type numbers. */
59#define PORT_SUNZILOG 38
60#define PORT_SUNSAB 39
61
62/* NEC v850. */
63#define PORT_V850E_UART 40
64
65/* DZ */
66#define PORT_DZ 47
67
68/* Parisc type numbers. */
69#define PORT_MUX 48
70
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71/* Atmel AT91 / AT32 SoC */
72#define PORT_ATMEL 49
1e6c9c28 73
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74/* Macintosh Zilog type numbers */
75#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
76#define PORT_PMAC_ZILOG 51
77
78/* SH-SCI */
79#define PORT_SCI 52
80#define PORT_SCIF 53
81#define PORT_IRDA 54
82
83/* Samsung S3C2410 SoC and derivatives thereof */
84#define PORT_S3C2410 55
85
86/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
87#define PORT_IP22ZILOG 56
88
89/* Sharp LH7a40x -- an ARM9 SoC series */
90#define PORT_LH7A40X 57
91
92/* PPC CPM type number */
93#define PORT_CPM 58
94
95/* MPC52xx type numbers */
96#define PORT_MPC52xx 59
97
98/* IBM icom */
99#define PORT_ICOM 60
100
101/* Samsung S3C2440 SoC */
102#define PORT_S3C2440 61
103
104/* Motorola i.MX SoC */
105#define PORT_IMX 62
106
107/* Marvell MPSC */
108#define PORT_MPSC 63
109
110/* TXX9 type number */
e5c2d749 111#define PORT_TXX9 64
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112
113/* NEC VR4100 series SIU/DSIU */
114#define PORT_VR41XX_SIU 65
115#define PORT_VR41XX_DSIU 66
116
117/* Samsung S3C2400 SoC */
118#define PORT_S3C2400 67
119
120/* M32R SIO */
121#define PORT_M32R_SIO 68
122
123/*Digi jsm */
913ade51
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124#define PORT_JSM 69
125
e6fa0ba3 126#define PORT_PNX8XXX 70
1da177e4 127
f5417612
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128/* Hilscher netx */
129#define PORT_NETX 71
130
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131/* SUN4V Hypervisor Console */
132#define PORT_SUNHV 72
133
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134#define PORT_S3C2412 73
135
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136/* Xilinx uartlite */
137#define PORT_UARTLITE 74
73e55cb3 138
194de561
BW
139/* Blackfin bf5xx */
140#define PORT_BFIN 75
141
2c7ee6ab
AV
142/* Micrel KS8695 */
143#define PORT_KS8695 76
144
145
1da177e4
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146#ifdef __KERNEL__
147
661f83a6 148#include <linux/compiler.h>
1da177e4
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149#include <linux/interrupt.h>
150#include <linux/circ_buf.h>
151#include <linux/spinlock.h>
152#include <linux/sched.h>
153#include <linux/tty.h>
e2862f6a 154#include <linux/mutex.h>
1da177e4
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155
156struct uart_port;
157struct uart_info;
158struct serial_struct;
159struct device;
160
161/*
162 * This structure describes all the operations that can be
163 * done on the physical hardware.
164 */
165struct uart_ops {
166 unsigned int (*tx_empty)(struct uart_port *);
167 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
168 unsigned int (*get_mctrl)(struct uart_port *);
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169 void (*stop_tx)(struct uart_port *);
170 void (*start_tx)(struct uart_port *);
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171 void (*send_xchar)(struct uart_port *, char ch);
172 void (*stop_rx)(struct uart_port *);
173 void (*enable_ms)(struct uart_port *);
174 void (*break_ctl)(struct uart_port *, int ctl);
175 int (*startup)(struct uart_port *);
176 void (*shutdown)(struct uart_port *);
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177 void (*set_termios)(struct uart_port *, struct ktermios *new,
178 struct ktermios *old);
1da177e4
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179 void (*pm)(struct uart_port *, unsigned int state,
180 unsigned int oldstate);
181 int (*set_wake)(struct uart_port *, unsigned int state);
182
183 /*
184 * Return a string describing the type of the port
185 */
186 const char *(*type)(struct uart_port *);
187
188 /*
189 * Release IO and memory resources used by the port.
190 * This includes iounmap if necessary.
191 */
192 void (*release_port)(struct uart_port *);
193
194 /*
195 * Request IO and memory resources used by the port.
196 * This includes iomapping the port if necessary.
197 */
198 int (*request_port)(struct uart_port *);
199 void (*config_port)(struct uart_port *, int);
200 int (*verify_port)(struct uart_port *, struct serial_struct *);
201 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
202};
203
204#define UART_CONFIG_TYPE (1 << 0)
205#define UART_CONFIG_IRQ (1 << 1)
206
207struct uart_icount {
208 __u32 cts;
209 __u32 dsr;
210 __u32 rng;
211 __u32 dcd;
212 __u32 rx;
213 __u32 tx;
214 __u32 frame;
215 __u32 overrun;
216 __u32 parity;
217 __u32 brk;
218 __u32 buf_overrun;
219};
220
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221typedef unsigned int __bitwise__ upf_t;
222
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223struct uart_port {
224 spinlock_t lock; /* port lock */
225 unsigned int iobase; /* in/out[bwl] */
226 unsigned char __iomem *membase; /* read/write[bwl] */
227 unsigned int irq; /* irq number */
228 unsigned int uartclk; /* base uart clock */
947deee8 229 unsigned int fifosize; /* tx fifo size */
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230 unsigned char x_char; /* xon/xoff char */
231 unsigned char regshift; /* reg offset shift */
232 unsigned char iotype; /* io access style */
947deee8 233 unsigned char unused1;
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234
235#define UPIO_PORT (0)
236#define UPIO_HUB6 (1)
237#define UPIO_MEM (2)
238#define UPIO_MEM32 (3)
21c614a7 239#define UPIO_AU (4) /* Au1x00 type IO */
3be91ec7 240#define UPIO_TSI (5) /* Tsi108/109 type IO */
beab697a 241#define UPIO_DWAPB (6) /* DesignWare APB UART */
bd71c182 242#define UPIO_RM9000 (7) /* RM9000 type IO */
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243
244 unsigned int read_status_mask; /* driver specific */
245 unsigned int ignore_status_mask; /* driver specific */
246 struct uart_info *info; /* pointer to parent info */
247 struct uart_icount icount; /* statistics */
248
249 struct console *cons; /* struct console, if any */
250#ifdef CONFIG_SERIAL_CORE_CONSOLE
251 unsigned long sysrq; /* sysrq timeout */
252#endif
253
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254 upf_t flags;
255
256#define UPF_FOURPORT ((__force upf_t) (1 << 1))
257#define UPF_SAK ((__force upf_t) (1 << 2))
258#define UPF_SPD_MASK ((__force upf_t) (0x1030))
259#define UPF_SPD_HI ((__force upf_t) (0x0010))
260#define UPF_SPD_VHI ((__force upf_t) (0x0020))
261#define UPF_SPD_CUST ((__force upf_t) (0x0030))
262#define UPF_SPD_SHI ((__force upf_t) (0x1000))
263#define UPF_SPD_WARP ((__force upf_t) (0x1010))
264#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
265#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
266#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
267#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
268#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
269#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
270#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
271#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
272#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
abb4a239 273#define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
68ac64cd 274#define UPF_DEAD ((__force upf_t) (1 << 30))
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275#define UPF_IOREMAP ((__force upf_t) (1 << 31))
276
277#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
278#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
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279
280 unsigned int mctrl; /* current modem ctrl settings */
281 unsigned int timeout; /* character-based timeout */
282 unsigned int type; /* port type */
ba899dbc 283 const struct uart_ops *ops;
1da177e4
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284 unsigned int custom_divisor;
285 unsigned int line; /* port index */
286 unsigned long mapbase; /* for ioremap */
287 struct device *dev; /* parent device */
288 unsigned char hub6; /* this should be in the 8250 driver */
289 unsigned char unused[3];
beab697a 290 void *private_data; /* generic platform data pointer */
1da177e4
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291};
292
293/*
294 * This is the state information which is persistent across opens.
295 * The low level driver must not to touch any elements contained
296 * within.
297 */
298struct uart_state {
299 unsigned int close_delay; /* msec */
300 unsigned int closing_wait; /* msec */
301
302#define USF_CLOSING_WAIT_INF (0)
303#define USF_CLOSING_WAIT_NONE (~0U)
304
305 int count;
306 int pm_state;
307 struct uart_info *info;
308 struct uart_port *port;
309
e2862f6a 310 struct mutex mutex;
1da177e4
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311};
312
313#define UART_XMIT_SIZE PAGE_SIZE
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RK
314
315typedef unsigned int __bitwise__ uif_t;
316
1da177e4
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317/*
318 * This is the state information which is only valid when the port
319 * is open; it may be freed by the core driver once the device has
320 * been closed. Either the low level driver or the core can modify
321 * stuff here.
322 */
323struct uart_info {
324 struct tty_struct *tty;
325 struct circ_buf xmit;
747c8a55 326 uif_t flags;
1da177e4
LT
327
328/*
747c8a55
RK
329 * Definitions for info->flags. These are _private_ to serial_core, and
330 * are specific to this structure. They may be queried by low level drivers.
1da177e4 331 */
747c8a55
RK
332#define UIF_CHECK_CD ((__force uif_t) (1 << 25))
333#define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
334#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
335#define UIF_INITIALIZED ((__force uif_t) (1 << 31))
a6b93a90 336#define UIF_SUSPENDED ((__force uif_t) (1 << 30))
1da177e4
LT
337
338 int blocked_open;
339
340 struct tasklet_struct tlet;
341
342 wait_queue_head_t open_wait;
343 wait_queue_head_t delta_msr_wait;
344};
345
346/* number of characters left in xmit buffer before we ask for more */
347#define WAKEUP_CHARS 256
348
349struct module;
350struct tty_driver;
351
352struct uart_driver {
353 struct module *owner;
354 const char *driver_name;
355 const char *dev_name;
1da177e4
LT
356 int major;
357 int minor;
358 int nr;
359 struct console *cons;
360
361 /*
362 * these are private; the low level driver should not
363 * touch these; they should be initialised to NULL
364 */
365 struct uart_state *state;
366 struct tty_driver *tty_driver;
367};
368
369void uart_write_wakeup(struct uart_port *port);
370
371/*
372 * Baud rate helpers.
373 */
374void uart_update_timeout(struct uart_port *port, unsigned int cflag,
375 unsigned int baud);
606d099c
AC
376unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
377 struct ktermios *old, unsigned int min,
1da177e4
LT
378 unsigned int max);
379unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
380
381/*
382 * Console helpers.
383 */
384struct uart_port *uart_get_console(struct uart_port *ports, int nr,
385 struct console *c);
386void uart_parse_options(char *options, int *baud, int *parity, int *bits,
387 int *flow);
388int uart_set_options(struct uart_port *port, struct console *co, int baud,
389 int parity, int bits, int flow);
390struct tty_driver *uart_console_device(struct console *co, int *index);
d358788f
RK
391void uart_console_write(struct uart_port *port, const char *s,
392 unsigned int count,
393 void (*putchar)(struct uart_port *, int));
1da177e4
LT
394
395/*
396 * Port/driver registration/removal
397 */
398int uart_register_driver(struct uart_driver *uart);
399void uart_unregister_driver(struct uart_driver *uart);
1da177e4
LT
400int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
401int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
402int uart_match_port(struct uart_port *port1, struct uart_port *port2);
403
404/*
405 * Power Management
406 */
407int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
408int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
409
410#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
411#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
412
413#define uart_circ_chars_pending(circ) \
414 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
415
416#define uart_circ_chars_free(circ) \
417 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
418
419#define uart_tx_stopped(port) \
420 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped)
421
422/*
423 * The following are helper functions for the low level drivers.
424 */
1da177e4 425static inline int
7d12e780 426uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
1da177e4 427{
93c37f29 428#ifdef SUPPORT_SYSRQ
1da177e4
LT
429 if (port->sysrq) {
430 if (ch && time_before(jiffies, port->sysrq)) {
7d12e780 431 handle_sysrq(ch, port->info->tty);
1da177e4
LT
432 port->sysrq = 0;
433 return 1;
434 }
435 port->sysrq = 0;
436 }
93c37f29 437#endif
1da177e4
LT
438 return 0;
439}
4e149184 440#ifndef SUPPORT_SYSRQ
7d12e780 441#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
4e149184 442#endif
1da177e4
LT
443
444/*
445 * We do the SysRQ and SAK checking like this...
446 */
447static inline int uart_handle_break(struct uart_port *port)
448{
449 struct uart_info *info = port->info;
450#ifdef SUPPORT_SYSRQ
451 if (port->cons && port->cons->index == port->line) {
452 if (!port->sysrq) {
453 port->sysrq = jiffies + HZ*5;
454 return 1;
455 }
456 port->sysrq = 0;
457 }
458#endif
27ae7a74 459 if (port->flags & UPF_SAK)
1da177e4
LT
460 do_SAK(info->tty);
461 return 0;
462}
463
464/**
465 * uart_handle_dcd_change - handle a change of carrier detect state
466 * @port: uart_port structure for the open port
467 * @status: new carrier detect status, nonzero if active
468 */
469static inline void
470uart_handle_dcd_change(struct uart_port *port, unsigned int status)
471{
472 struct uart_info *info = port->info;
473
474 port->icount.dcd++;
475
476#ifdef CONFIG_HARD_PPS
477 if ((port->flags & UPF_HARDPPS_CD) && status)
478 hardpps();
479#endif
480
481 if (info->flags & UIF_CHECK_CD) {
482 if (status)
483 wake_up_interruptible(&info->open_wait);
484 else if (info->tty)
485 tty_hangup(info->tty);
486 }
487}
488
489/**
490 * uart_handle_cts_change - handle a change of clear-to-send state
491 * @port: uart_port structure for the open port
492 * @status: new clear to send status, nonzero if active
493 */
494static inline void
495uart_handle_cts_change(struct uart_port *port, unsigned int status)
496{
497 struct uart_info *info = port->info;
498 struct tty_struct *tty = info->tty;
499
500 port->icount.cts++;
501
502 if (info->flags & UIF_CTS_FLOW) {
503 if (tty->hw_stopped) {
504 if (status) {
505 tty->hw_stopped = 0;
b129a8cc 506 port->ops->start_tx(port);
1da177e4
LT
507 uart_write_wakeup(port);
508 }
509 } else {
510 if (!status) {
511 tty->hw_stopped = 1;
b129a8cc 512 port->ops->stop_tx(port);
1da177e4
LT
513 }
514 }
515 }
516}
517
05ab3014
RK
518#include <linux/tty_flip.h>
519
520static inline void
521uart_insert_char(struct uart_port *port, unsigned int status,
522 unsigned int overrun, unsigned int ch, unsigned int flag)
523{
524 struct tty_struct *tty = port->info->tty;
525
526 if ((status & port->ignore_status_mask & ~overrun) == 0)
527 tty_insert_flip_char(tty, ch, flag);
528
529 /*
530 * Overrun is special. Since it's reported immediately,
531 * it doesn't affect the current character.
532 */
533 if (status & ~port->ignore_status_mask & overrun)
534 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
535}
536
1da177e4
LT
537/*
538 * UART_ENABLE_MS - determine if port should enable modem status irqs
539 */
540#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
541 (cflag) & CRTSCTS || \
542 !((cflag) & CLOCAL))
543
544#endif
545
546#endif /* LINUX_SERIAL_CORE_H */
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