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[deliverable/linux.git] / include / linux / serial_core.h
CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef LINUX_SERIAL_CORE_H
21#define LINUX_SERIAL_CORE_H
22
23/*
24 * The type definitions. These are from Ted Ts'o's serial.h
25 */
26#define PORT_UNKNOWN 0
27#define PORT_8250 1
28#define PORT_16450 2
29#define PORT_16550 3
30#define PORT_16550A 4
31#define PORT_CIRRUS 5
32#define PORT_16650 6
33#define PORT_16650V2 7
34#define PORT_16750 8
35#define PORT_STARTECH 9
36#define PORT_16C950 10
37#define PORT_16654 11
38#define PORT_16850 12
39#define PORT_RSA 13
40#define PORT_NS16550A 14
41#define PORT_XSCALE 15
bd71c182
TK
42#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
43#define PORT_MAX_8250 16 /* max port ID */
1da177e4
LT
44
45/*
46 * ARM specific type numbers. These are not currently guaranteed
47 * to be implemented, and will change in the future. These are
48 * separate so any additions to the old serial.c that occur before
49 * we are merged can be easily merged here.
50 */
51#define PORT_PXA 31
52#define PORT_AMBA 32
53#define PORT_CLPS711X 33
54#define PORT_SA1100 34
55#define PORT_UART00 35
56#define PORT_21285 37
57
58/* Sparc type numbers. */
59#define PORT_SUNZILOG 38
60#define PORT_SUNSAB 39
61
62/* NEC v850. */
63#define PORT_V850E_UART 40
64
8b4a4080
MR
65/* DEC */
66#define PORT_DZ 46
67#define PORT_ZS 47
1da177e4
LT
68
69/* Parisc type numbers. */
70#define PORT_MUX 48
71
9ab4f88b
HS
72/* Atmel AT91 / AT32 SoC */
73#define PORT_ATMEL 49
1e6c9c28 74
1da177e4
LT
75/* Macintosh Zilog type numbers */
76#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
77#define PORT_PMAC_ZILOG 51
78
79/* SH-SCI */
80#define PORT_SCI 52
81#define PORT_SCIF 53
82#define PORT_IRDA 54
83
84/* Samsung S3C2410 SoC and derivatives thereof */
85#define PORT_S3C2410 55
86
87/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
88#define PORT_IP22ZILOG 56
89
90/* Sharp LH7a40x -- an ARM9 SoC series */
91#define PORT_LH7A40X 57
92
93/* PPC CPM type number */
94#define PORT_CPM 58
95
96/* MPC52xx type numbers */
97#define PORT_MPC52xx 59
98
99/* IBM icom */
100#define PORT_ICOM 60
101
102/* Samsung S3C2440 SoC */
103#define PORT_S3C2440 61
104
105/* Motorola i.MX SoC */
106#define PORT_IMX 62
107
108/* Marvell MPSC */
109#define PORT_MPSC 63
110
111/* TXX9 type number */
e5c2d749 112#define PORT_TXX9 64
1da177e4
LT
113
114/* NEC VR4100 series SIU/DSIU */
115#define PORT_VR41XX_SIU 65
116#define PORT_VR41XX_DSIU 66
117
118/* Samsung S3C2400 SoC */
119#define PORT_S3C2400 67
120
121/* M32R SIO */
122#define PORT_M32R_SIO 68
123
124/*Digi jsm */
913ade51
RK
125#define PORT_JSM 69
126
e6fa0ba3 127#define PORT_PNX8XXX 70
1da177e4 128
f5417612
SH
129/* Hilscher netx */
130#define PORT_NETX 71
131
02fd473b
DM
132/* SUN4V Hypervisor Console */
133#define PORT_SUNHV 72
134
73e55cb3
BD
135#define PORT_S3C2412 73
136
238b8721
PK
137/* Xilinx uartlite */
138#define PORT_UARTLITE 74
73e55cb3 139
194de561
BW
140/* Blackfin bf5xx */
141#define PORT_BFIN 75
142
2c7ee6ab
AV
143/* Micrel KS8695 */
144#define PORT_KS8695 76
145
b45d5279
MR
146/* Broadcom SB1250, etc. SOC */
147#define PORT_SB1250_DUART 77
148
f0c15f48
GU
149/* Freescale ColdFire */
150#define PORT_MCF 78
151
2695a14d
TB
152#define PORT_SC26XX 79
153
2c7ee6ab 154
ef3d5347
DH
155/* MN10300 on-chip UART numbers */
156#define PORT_MN10300 80
157#define PORT_MN10300_CTS 81
158
1da177e4
LT
159#ifdef __KERNEL__
160
661f83a6 161#include <linux/compiler.h>
1da177e4
LT
162#include <linux/interrupt.h>
163#include <linux/circ_buf.h>
164#include <linux/spinlock.h>
165#include <linux/sched.h>
166#include <linux/tty.h>
e2862f6a 167#include <linux/mutex.h>
b11115c1 168#include <linux/sysrq.h>
1da177e4
LT
169
170struct uart_port;
171struct uart_info;
172struct serial_struct;
173struct device;
174
175/*
176 * This structure describes all the operations that can be
177 * done on the physical hardware.
178 */
179struct uart_ops {
180 unsigned int (*tx_empty)(struct uart_port *);
181 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
182 unsigned int (*get_mctrl)(struct uart_port *);
b129a8cc
RK
183 void (*stop_tx)(struct uart_port *);
184 void (*start_tx)(struct uart_port *);
1da177e4
LT
185 void (*send_xchar)(struct uart_port *, char ch);
186 void (*stop_rx)(struct uart_port *);
187 void (*enable_ms)(struct uart_port *);
188 void (*break_ctl)(struct uart_port *, int ctl);
189 int (*startup)(struct uart_port *);
190 void (*shutdown)(struct uart_port *);
606d099c
AC
191 void (*set_termios)(struct uart_port *, struct ktermios *new,
192 struct ktermios *old);
1da177e4
LT
193 void (*pm)(struct uart_port *, unsigned int state,
194 unsigned int oldstate);
195 int (*set_wake)(struct uart_port *, unsigned int state);
196
197 /*
198 * Return a string describing the type of the port
199 */
200 const char *(*type)(struct uart_port *);
201
202 /*
203 * Release IO and memory resources used by the port.
204 * This includes iounmap if necessary.
205 */
206 void (*release_port)(struct uart_port *);
207
208 /*
209 * Request IO and memory resources used by the port.
210 * This includes iomapping the port if necessary.
211 */
212 int (*request_port)(struct uart_port *);
213 void (*config_port)(struct uart_port *, int);
214 int (*verify_port)(struct uart_port *, struct serial_struct *);
215 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
f2d937f3
JW
216#ifdef CONFIG_CONSOLE_POLL
217 void (*poll_put_char)(struct uart_port *, unsigned char);
218 int (*poll_get_char)(struct uart_port *);
219#endif
1da177e4
LT
220};
221
222#define UART_CONFIG_TYPE (1 << 0)
223#define UART_CONFIG_IRQ (1 << 1)
224
225struct uart_icount {
226 __u32 cts;
227 __u32 dsr;
228 __u32 rng;
229 __u32 dcd;
230 __u32 rx;
231 __u32 tx;
232 __u32 frame;
233 __u32 overrun;
234 __u32 parity;
235 __u32 brk;
236 __u32 buf_overrun;
237};
238
0077d45e
RK
239typedef unsigned int __bitwise__ upf_t;
240
1da177e4
LT
241struct uart_port {
242 spinlock_t lock; /* port lock */
243 unsigned int iobase; /* in/out[bwl] */
244 unsigned char __iomem *membase; /* read/write[bwl] */
245 unsigned int irq; /* irq number */
246 unsigned int uartclk; /* base uart clock */
947deee8 247 unsigned int fifosize; /* tx fifo size */
1da177e4
LT
248 unsigned char x_char; /* xon/xoff char */
249 unsigned char regshift; /* reg offset shift */
250 unsigned char iotype; /* io access style */
947deee8 251 unsigned char unused1;
1da177e4
LT
252
253#define UPIO_PORT (0)
254#define UPIO_HUB6 (1)
255#define UPIO_MEM (2)
256#define UPIO_MEM32 (3)
21c614a7 257#define UPIO_AU (4) /* Au1x00 type IO */
3be91ec7 258#define UPIO_TSI (5) /* Tsi108/109 type IO */
beab697a 259#define UPIO_DWAPB (6) /* DesignWare APB UART */
bd71c182 260#define UPIO_RM9000 (7) /* RM9000 type IO */
1da177e4
LT
261
262 unsigned int read_status_mask; /* driver specific */
263 unsigned int ignore_status_mask; /* driver specific */
264 struct uart_info *info; /* pointer to parent info */
265 struct uart_icount icount; /* statistics */
266
267 struct console *cons; /* struct console, if any */
268#ifdef CONFIG_SERIAL_CORE_CONSOLE
269 unsigned long sysrq; /* sysrq timeout */
270#endif
271
0077d45e
RK
272 upf_t flags;
273
274#define UPF_FOURPORT ((__force upf_t) (1 << 1))
275#define UPF_SAK ((__force upf_t) (1 << 2))
276#define UPF_SPD_MASK ((__force upf_t) (0x1030))
277#define UPF_SPD_HI ((__force upf_t) (0x0010))
278#define UPF_SPD_VHI ((__force upf_t) (0x0020))
279#define UPF_SPD_CUST ((__force upf_t) (0x0030))
280#define UPF_SPD_SHI ((__force upf_t) (0x1000))
281#define UPF_SPD_WARP ((__force upf_t) (0x1010))
282#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
283#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
284#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
285#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
286#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
287#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
288#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
289#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
290#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
abb4a239 291#define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
68ac64cd 292#define UPF_DEAD ((__force upf_t) (1 << 30))
0077d45e
RK
293#define UPF_IOREMAP ((__force upf_t) (1 << 31))
294
295#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
296#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
1da177e4
LT
297
298 unsigned int mctrl; /* current modem ctrl settings */
299 unsigned int timeout; /* character-based timeout */
300 unsigned int type; /* port type */
ba899dbc 301 const struct uart_ops *ops;
1da177e4
LT
302 unsigned int custom_divisor;
303 unsigned int line; /* port index */
4f640efb 304 resource_size_t mapbase; /* for ioremap */
1da177e4
LT
305 struct device *dev; /* parent device */
306 unsigned char hub6; /* this should be in the 8250 driver */
b3b708fa
GL
307 unsigned char suspended;
308 unsigned char unused[2];
beab697a 309 void *private_data; /* generic platform data pointer */
1da177e4
LT
310};
311
312/*
313 * This is the state information which is persistent across opens.
314 * The low level driver must not to touch any elements contained
315 * within.
316 */
317struct uart_state {
318 unsigned int close_delay; /* msec */
319 unsigned int closing_wait; /* msec */
320
321#define USF_CLOSING_WAIT_INF (0)
322#define USF_CLOSING_WAIT_NONE (~0U)
323
324 int count;
325 int pm_state;
326 struct uart_info *info;
327 struct uart_port *port;
328
e2862f6a 329 struct mutex mutex;
1da177e4
LT
330};
331
332#define UART_XMIT_SIZE PAGE_SIZE
747c8a55
RK
333
334typedef unsigned int __bitwise__ uif_t;
335
1da177e4
LT
336/*
337 * This is the state information which is only valid when the port
338 * is open; it may be freed by the core driver once the device has
339 * been closed. Either the low level driver or the core can modify
340 * stuff here.
341 */
342struct uart_info {
343 struct tty_struct *tty;
344 struct circ_buf xmit;
747c8a55 345 uif_t flags;
1da177e4
LT
346
347/*
747c8a55
RK
348 * Definitions for info->flags. These are _private_ to serial_core, and
349 * are specific to this structure. They may be queried by low level drivers.
1da177e4 350 */
747c8a55
RK
351#define UIF_CHECK_CD ((__force uif_t) (1 << 25))
352#define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
353#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
354#define UIF_INITIALIZED ((__force uif_t) (1 << 31))
a6b93a90 355#define UIF_SUSPENDED ((__force uif_t) (1 << 30))
1da177e4
LT
356
357 int blocked_open;
358
359 struct tasklet_struct tlet;
360
361 wait_queue_head_t open_wait;
362 wait_queue_head_t delta_msr_wait;
363};
364
365/* number of characters left in xmit buffer before we ask for more */
366#define WAKEUP_CHARS 256
367
368struct module;
369struct tty_driver;
370
371struct uart_driver {
372 struct module *owner;
373 const char *driver_name;
374 const char *dev_name;
1da177e4
LT
375 int major;
376 int minor;
377 int nr;
378 struct console *cons;
379
380 /*
381 * these are private; the low level driver should not
382 * touch these; they should be initialised to NULL
383 */
384 struct uart_state *state;
385 struct tty_driver *tty_driver;
386};
387
388void uart_write_wakeup(struct uart_port *port);
389
390/*
391 * Baud rate helpers.
392 */
393void uart_update_timeout(struct uart_port *port, unsigned int cflag,
394 unsigned int baud);
606d099c
AC
395unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
396 struct ktermios *old, unsigned int min,
1da177e4
LT
397 unsigned int max);
398unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
399
400/*
401 * Console helpers.
402 */
403struct uart_port *uart_get_console(struct uart_port *ports, int nr,
404 struct console *c);
405void uart_parse_options(char *options, int *baud, int *parity, int *bits,
406 int *flow);
407int uart_set_options(struct uart_port *port, struct console *co, int baud,
408 int parity, int bits, int flow);
409struct tty_driver *uart_console_device(struct console *co, int *index);
d358788f
RK
410void uart_console_write(struct uart_port *port, const char *s,
411 unsigned int count,
412 void (*putchar)(struct uart_port *, int));
1da177e4
LT
413
414/*
415 * Port/driver registration/removal
416 */
417int uart_register_driver(struct uart_driver *uart);
418void uart_unregister_driver(struct uart_driver *uart);
1da177e4
LT
419int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
420int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
421int uart_match_port(struct uart_port *port1, struct uart_port *port2);
422
423/*
424 * Power Management
425 */
426int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
427int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
428
429#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
430#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
431
432#define uart_circ_chars_pending(circ) \
433 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
434
435#define uart_circ_chars_free(circ) \
436 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
437
438#define uart_tx_stopped(port) \
439 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped)
440
441/*
442 * The following are helper functions for the low level drivers.
443 */
1da177e4 444static inline int
7d12e780 445uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
1da177e4 446{
93c37f29 447#ifdef SUPPORT_SYSRQ
1da177e4
LT
448 if (port->sysrq) {
449 if (ch && time_before(jiffies, port->sysrq)) {
68576cf1 450 handle_sysrq(ch, port->info ? port->info->tty : NULL);
1da177e4
LT
451 port->sysrq = 0;
452 return 1;
453 }
454 port->sysrq = 0;
455 }
93c37f29 456#endif
1da177e4
LT
457 return 0;
458}
4e149184 459#ifndef SUPPORT_SYSRQ
7d12e780 460#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
4e149184 461#endif
1da177e4
LT
462
463/*
464 * We do the SysRQ and SAK checking like this...
465 */
466static inline int uart_handle_break(struct uart_port *port)
467{
468 struct uart_info *info = port->info;
469#ifdef SUPPORT_SYSRQ
470 if (port->cons && port->cons->index == port->line) {
471 if (!port->sysrq) {
472 port->sysrq = jiffies + HZ*5;
473 return 1;
474 }
475 port->sysrq = 0;
476 }
477#endif
27ae7a74 478 if (port->flags & UPF_SAK)
1da177e4
LT
479 do_SAK(info->tty);
480 return 0;
481}
482
483/**
484 * uart_handle_dcd_change - handle a change of carrier detect state
485 * @port: uart_port structure for the open port
486 * @status: new carrier detect status, nonzero if active
487 */
488static inline void
489uart_handle_dcd_change(struct uart_port *port, unsigned int status)
490{
491 struct uart_info *info = port->info;
492
493 port->icount.dcd++;
494
495#ifdef CONFIG_HARD_PPS
496 if ((port->flags & UPF_HARDPPS_CD) && status)
497 hardpps();
498#endif
499
500 if (info->flags & UIF_CHECK_CD) {
501 if (status)
502 wake_up_interruptible(&info->open_wait);
503 else if (info->tty)
504 tty_hangup(info->tty);
505 }
506}
507
508/**
509 * uart_handle_cts_change - handle a change of clear-to-send state
510 * @port: uart_port structure for the open port
511 * @status: new clear to send status, nonzero if active
512 */
513static inline void
514uart_handle_cts_change(struct uart_port *port, unsigned int status)
515{
516 struct uart_info *info = port->info;
517 struct tty_struct *tty = info->tty;
518
519 port->icount.cts++;
520
521 if (info->flags & UIF_CTS_FLOW) {
522 if (tty->hw_stopped) {
523 if (status) {
524 tty->hw_stopped = 0;
b129a8cc 525 port->ops->start_tx(port);
1da177e4
LT
526 uart_write_wakeup(port);
527 }
528 } else {
529 if (!status) {
530 tty->hw_stopped = 1;
b129a8cc 531 port->ops->stop_tx(port);
1da177e4
LT
532 }
533 }
534 }
535}
536
05ab3014
RK
537#include <linux/tty_flip.h>
538
539static inline void
540uart_insert_char(struct uart_port *port, unsigned int status,
541 unsigned int overrun, unsigned int ch, unsigned int flag)
542{
543 struct tty_struct *tty = port->info->tty;
544
545 if ((status & port->ignore_status_mask & ~overrun) == 0)
546 tty_insert_flip_char(tty, ch, flag);
547
548 /*
549 * Overrun is special. Since it's reported immediately,
550 * it doesn't affect the current character.
551 */
552 if (status & ~port->ignore_status_mask & overrun)
553 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
554}
555
1da177e4
LT
556/*
557 * UART_ENABLE_MS - determine if port should enable modem status irqs
558 */
559#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
560 (cflag) & CRTSCTS || \
561 !((cflag) & CLOCAL))
562
563#endif
564
565#endif /* LINUX_SERIAL_CORE_H */
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