[deliverable/linux.git] / include / linux / sh_intc.h

#ifndef __SH_INTC_H
#define __SH_INTC_H

#include <linux/ioport.h>

typedef unsigned char intc_enum;

struct intc_vect {
	intc_enum enum_id;
	unsigned short vect;
};

#define INTC_VECT(enum_id, vect) { enum_id, vect }
#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))

struct intc_group {
	intc_enum enum_id;
	intc_enum enum_ids[32];
};

#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }

struct intc_mask_reg {
	unsigned long set_reg, clr_reg, reg_width;
	intc_enum enum_ids[32];
#ifdef CONFIG_SMP
	unsigned long smp;
#endif
};

struct intc_prio_reg {
	unsigned long set_reg, clr_reg, reg_width, field_width;
	intc_enum enum_ids[16];
#ifdef CONFIG_SMP
	unsigned long smp;
#endif
};

struct intc_sense_reg {
	unsigned long reg, reg_width, field_width;
	intc_enum enum_ids[16];
};

#ifdef CONFIG_SMP
#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
#else
#define INTC_SMP(stride, nr)
#endif

struct intc_hw_desc {
	struct intc_vect *vectors;
	unsigned int nr_vectors;
	struct intc_group *groups;
	unsigned int nr_groups;
	struct intc_mask_reg *mask_regs;
	unsigned int nr_mask_regs;
	struct intc_prio_reg *prio_regs;
	unsigned int nr_prio_regs;
	struct intc_sense_reg *sense_regs;
	unsigned int nr_sense_regs;
	struct intc_mask_reg *ack_regs;
	unsigned int nr_ack_regs;
};

#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
#define INTC_HW_DESC(vectors, groups, mask_regs,	\
		     prio_regs,	sense_regs, ack_regs)	\
{							\
	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),	\
	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),	\
	_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs),	\
}

struct intc_desc {
	char *name;
	struct resource *resource;
	unsigned int num_resources;
	intc_enum force_enable;
	intc_enum force_disable;
	struct intc_hw_desc hw;
};

#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups,		\
	mask_regs, prio_regs, sense_regs)				\
struct intc_desc symbol __initdata = {					\
	.name = chipname,						\
	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
			   prio_regs, sense_regs, NULL),		\
}

#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups,	\
	mask_regs, prio_regs, sense_regs, ack_regs)			\
struct intc_desc symbol __initdata = {					\
	.name = chipname,						\
	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
			   prio_regs, sense_regs, ack_regs),		\
}

int __init register_intc_controller(struct intc_desc *desc);
int intc_set_priority(unsigned int irq, unsigned int prio);

int reserve_irq_vector(unsigned int irq);
void reserve_irq_legacy(void);

#endif /* __SH_INTC_H */
Commit	Line	Data
bbfbd8b1 PM	1	#ifndef __SH_INTC_H
	2	#define __SH_INTC_H
	3
dec710b7 MD	4	#include <linux/ioport.h>
dec710b7 MD	5
bbfbd8b1 PM	6	typedef unsigned char intc_enum;
	7
	8	struct intc_vect {
	9	intc_enum enum_id;
	10	unsigned short vect;
	11	};
	12
	13	#define INTC_VECT(enum_id, vect) { enum_id, vect }
	14	#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
	15
	16	struct intc_group {
	17	intc_enum enum_id;
	18	intc_enum enum_ids[32];
	19	};
	20
	21	#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
	22
	23	struct intc_mask_reg {
	24	unsigned long set_reg, clr_reg, reg_width;
	25	intc_enum enum_ids[32];
	26	#ifdef CONFIG_SMP
	27	unsigned long smp;
	28	#endif
	29	};
	30
	31	struct intc_prio_reg {
	32	unsigned long set_reg, clr_reg, reg_width, field_width;
	33	intc_enum enum_ids[16];
	34	#ifdef CONFIG_SMP
	35	unsigned long smp;
	36	#endif
	37	};
	38
	39	struct intc_sense_reg {
	40	unsigned long reg, reg_width, field_width;
	41	intc_enum enum_ids[16];
	42	};
	43
	44	#ifdef CONFIG_SMP
	45	#define INTC_SMP(stride, nr) .smp = (stride) \| ((nr) << 8)
	46	#else
	47	#define INTC_SMP(stride, nr)
	48	#endif
	49
577cd758	50	struct intc_hw_desc {
bbfbd8b1 PM	51	struct intc_vect *vectors;
	52	unsigned int nr_vectors;
	53	struct intc_group *groups;
	54	unsigned int nr_groups;
	55	struct intc_mask_reg *mask_regs;
	56	unsigned int nr_mask_regs;
	57	struct intc_prio_reg *prio_regs;
	58	unsigned int nr_prio_regs;
	59	struct intc_sense_reg *sense_regs;
	60	unsigned int nr_sense_regs;
bbfbd8b1 PM	61	struct intc_mask_reg *ack_regs;
bbfbd8b1 PM	62	unsigned int nr_ack_regs;
bbfbd8b1 PM	63	};
	64
	65	#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
577cd758 MD	66	#define INTC_HW_DESC(vectors, groups, mask_regs, \
	67	prio_regs, sense_regs, ack_regs) \
	68	{ \
	69	_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
	70	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
	71	_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
	72	}
	73
	74	struct intc_desc {
	75	char *name;
dec710b7 MD	76	struct resource *resource;
dec710b7 MD	77	unsigned int num_resources;
d5190953	78	intc_enum force_enable;
d85429a3	79	intc_enum force_disable;
577cd758 MD	80	struct intc_hw_desc hw;
	81	};
	82
bbfbd8b1 PM	83	#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
	84	mask_regs, prio_regs, sense_regs) \
	85	struct intc_desc symbol __initdata = { \
577cd758 MD	86	.name = chipname, \
	87	.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
	88	prio_regs, sense_regs, NULL), \
bbfbd8b1 PM	89	}
bbfbd8b1 PM	90
bbfbd8b1 PM	91	#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
	92	mask_regs, prio_regs, sense_regs, ack_regs) \
	93	struct intc_desc symbol __initdata = { \
577cd758 MD	94	.name = chipname, \
	95	.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
	96	prio_regs, sense_regs, ack_regs), \
bbfbd8b1	97	}
bbfbd8b1	98
01e9651a	99	int __init register_intc_controller(struct intc_desc *desc);
bbfbd8b1 PM	100	int intc_set_priority(unsigned int irq, unsigned int prio);
bbfbd8b1 PM	101
45b9deaf PM	102	int reserve_irq_vector(unsigned int irq);
	103	void reserve_irq_legacy(void);
	104
bbfbd8b1	105	#endif /* __SH_INTC_H */