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thp: remove assumptions on pgtable_t type
[deliverable/linux.git] / include / linux / ssb / ssb.h
CommitLineData
61e115a5
MB		 1#ifndef LINUX_SSB_H_
2#define LINUX_SSB_H_
3
4#include <linux/device.h>
5#include <linux/list.h>
6#include <linux/types.h>
7#include <linux/spinlock.h>
8#include <linux/pci.h>
9#include <linux/mod_devicetable.h>
9c0c7a42 10#include <linux/dma-mapping.h>
61e115a5
MB		 11
12#include <linux/ssb/ssb_regs.h>
13
14
15struct pcmcia_device;
16struct ssb_bus;
17struct ssb_driver;
18
b0f70292
RM		 19struct ssb_sprom_core_pwr_info {
20 u8 itssi_2g, itssi_5g;
21 u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
3b64e6f9 22 u16 pa_2g[4], pa_5gl[4], pa_5g[4], pa_5gh[4];
b0f70292
RM		 23};
24
61e115a5
MB		 25struct ssb_sprom {
26 u8 revision;
ac82fab4
LF		 27 u8 il0mac[6]; /* MAC address for 802.11b/g */
28 u8 et0mac[6]; /* MAC address for Ethernet */
29 u8 et1mac[6]; /* MAC address for 802.11a */
30 u8 et0phyaddr; /* MII address for enet0 */
31 u8 et1phyaddr; /* MII address for enet1 */
e861b98d
MB		 32 u8 et0mdcport; /* MDIO for enet0 */
33 u8 et1mdcport; /* MDIO for enet1 */
e2d646ce 34 u16 board_rev; /* Board revision number from SPROM. */
52aa63f5
HM		 35 u16 board_num; /* Board number from SPROM. */
36 u16 board_type; /* Board type from SPROM. */
ac82fab4 37 u8 country_code; /* Country Code */
03a5642b 38 char alpha2[2]; /* Country Code as two chars like EU or US */
edd8d90b
HM		 39 u8 leddc_on_time; /* LED Powersave Duty Cycle On Count */
40 u8 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
f679056b
GS		 41 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
42 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
ac82fab4
LF		 43 u16 pa0b0;
44 u16 pa0b1;
45 u16 pa0b2;
46 u16 pa1b0;
47 u16 pa1b1;
48 u16 pa1b2;
f679056b
GS		 49 u16 pa1lob0;
50 u16 pa1lob1;
51 u16 pa1lob2;
52 u16 pa1hib0;
53 u16 pa1hib1;
54 u16 pa1hib2;
ac82fab4
LF		 55 u8 gpio0; /* GPIO pin 0 */
56 u8 gpio1; /* GPIO pin 1 */
57 u8 gpio2; /* GPIO pin 2 */
58 u8 gpio3; /* GPIO pin 3 */
edd8d90b
HM		 59 u8 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
60 u8 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
61 u8 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
62 u8 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
ac82fab4
LF		 63 u8 itssi_a; /* Idle TSSI Target for A-PHY */
64 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
f679056b
GS		 65 u8 tri2g; /* 2.4GHz TX isolation */
66 u8 tri5gl; /* 5.2GHz TX isolation */
67 u8 tri5g; /* 5.3GHz TX isolation */
68 u8 tri5gh; /* 5.8GHz TX isolation */
172c69a4
RM		 69 u8 txpid2g[4]; /* 2GHz TX power index */
70 u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
71 u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
72 u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
edd8d90b
HM		 73 s8 rxpo2g; /* 2GHz RX power offset */
74 s8 rxpo5g; /* 5GHz RX power offset */
f679056b
GS		 75 u8 rssisav2g; /* 2GHz RSSI params */
76 u8 rssismc2g;
77 u8 rssismf2g;
78 u8 bxa2g; /* 2GHz BX arch */
79 u8 rssisav5g; /* 5GHz RSSI params */
80 u8 rssismc5g;
81 u8 rssismf5g;
82 u8 bxa5g; /* 5GHz BX arch */
83 u16 cck2gpo; /* CCK power offset */
84 u32 ofdm2gpo; /* 2.4GHz OFDM power offset */
85 u32 ofdm5glpo; /* 5.2GHz OFDM power offset */
86 u32 ofdm5gpo; /* 5.3GHz OFDM power offset */
87 u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */
88 u16 boardflags_lo; /* Board flags (bits 0-15) */
89 u16 boardflags_hi; /* Board flags (bits 16-31) */
90 u16 boardflags2_lo; /* Board flags (bits 32-47) */
91 u16 boardflags2_hi; /* Board flags (bits 48-63) */
92 /* TODO store board flags in a single u64 */
e861b98d 93
b0f70292
RM		 94 struct ssb_sprom_core_pwr_info core_pwr_info[4];
95
e861b98d
MB		 96 /* Antenna gain values for up to 4 antennas
97 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
98 * loss in the connectors is bigger than the gain. */
99 struct {
f8f8a660 100 s8 a0, a1, a2, a3;
e861b98d 101 } antenna_gain;
ac82fab4 102
8a5ac6ec
RM		 103 struct {
104 struct {
105 u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
106 } ghz2;
107 struct {
108 u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
109 } ghz5;
110 } fem;
111
52aa63f5
HM		 112 u16 mcs2gpo[8];
113 u16 mcs5gpo[8];
114 u16 mcs5glpo[8];
115 u16 mcs5ghpo[8];
116 u8 opo;
117
118 u8 rxgainerr2ga[3];
119 u8 rxgainerr5gla[3];
120 u8 rxgainerr5gma[3];
121 u8 rxgainerr5gha[3];
122 u8 rxgainerr5gua[3];
123
124 u8 noiselvl2ga[3];
125 u8 noiselvl5gla[3];
126 u8 noiselvl5gma[3];
127 u8 noiselvl5gha[3];
128 u8 noiselvl5gua[3];
129
130 u8 regrev;
131 u8 txchain;
132 u8 rxchain;
133 u8 antswitch;
134 u16 cddpo;
135 u16 stbcpo;
136 u16 bw40po;
137 u16 bwduppo;
138
139 u8 tempthresh;
140 u8 tempoffset;
141 u16 rawtempsense;
142 u8 measpower;
143 u8 tempsense_slope;
144 u8 tempcorrx;
145 u8 tempsense_option;
146 u8 freqoffset_corr;
147 u8 iqcal_swp_dis;
148 u8 hw_iqcal_en;
149 u8 elna2g;
150 u8 elna5g;
151 u8 phycal_tempdelta;
152 u8 temps_period;
153 u8 temps_hysteresis;
154 u8 measpower1;
155 u8 measpower2;
156 u8 pcieingress_war;
157
158 /* power per rate from sromrev 9 */
159 u16 cckbw202gpo;
160 u16 cckbw20ul2gpo;
161 u32 legofdmbw202gpo;
162 u32 legofdmbw20ul2gpo;
163 u32 legofdmbw205glpo;
164 u32 legofdmbw20ul5glpo;
165 u32 legofdmbw205gmpo;
166 u32 legofdmbw20ul5gmpo;
167 u32 legofdmbw205ghpo;
168 u32 legofdmbw20ul5ghpo;
169 u32 mcsbw202gpo;
170 u32 mcsbw20ul2gpo;
171 u32 mcsbw402gpo;
172 u32 mcsbw205glpo;
173 u32 mcsbw20ul5glpo;
174 u32 mcsbw405glpo;
175 u32 mcsbw205gmpo;
176 u32 mcsbw20ul5gmpo;
177 u32 mcsbw405gmpo;
178 u32 mcsbw205ghpo;
179 u32 mcsbw20ul5ghpo;
180 u32 mcsbw405ghpo;
181 u16 mcs32po;
182 u16 legofdm40duppo;
183 u8 sar2g;
184 u8 sar5g;
61e115a5
MB		 185};
186
187/* Information about the PCB the circuitry is soldered on. */
188struct ssb_boardinfo {
189 u16 vendor;
190 u16 type;
61e115a5
MB		 191};
192
193
194struct ssb_device;
195/* Lowlevel read/write operations on the device MMIO.
196 * Internal, don't use that outside of ssb. */
197struct ssb_bus_ops {
ffc7689d 198 u8 (*read8)(struct ssb_device *dev, u16 offset);
61e115a5
MB		 199 u16 (*read16)(struct ssb_device *dev, u16 offset);
200 u32 (*read32)(struct ssb_device *dev, u16 offset);
ffc7689d 201 void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
61e115a5
MB		 202 void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
203 void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
d625a29b
MB		 204#ifdef CONFIG_SSB_BLOCKIO
205 void (*block_read)(struct ssb_device *dev, void *buffer,
206 size_t count, u16 offset, u8 reg_width);
207 void (*block_write)(struct ssb_device *dev, const void *buffer,
208 size_t count, u16 offset, u8 reg_width);
209#endif
61e115a5
MB		 210};
211
212
213/* Core-ID values. */
214#define SSB_DEV_CHIPCOMMON 0x800
215#define SSB_DEV_ILINE20 0x801
216#define SSB_DEV_SDRAM 0x803
217#define SSB_DEV_PCI 0x804
218#define SSB_DEV_MIPS 0x805
219#define SSB_DEV_ETHERNET 0x806
220#define SSB_DEV_V90 0x807
221#define SSB_DEV_USB11_HOSTDEV 0x808
222#define SSB_DEV_ADSL 0x809
223#define SSB_DEV_ILINE100 0x80A
224#define SSB_DEV_IPSEC 0x80B
225#define SSB_DEV_PCMCIA 0x80D
226#define SSB_DEV_INTERNAL_MEM 0x80E
227#define SSB_DEV_MEMC_SDRAM 0x80F
228#define SSB_DEV_EXTIF 0x811
229#define SSB_DEV_80211 0x812
230#define SSB_DEV_MIPS_3302 0x816
231#define SSB_DEV_USB11_HOST 0x817
232#define SSB_DEV_USB11_DEV 0x818
233#define SSB_DEV_USB20_HOST 0x819
234#define SSB_DEV_USB20_DEV 0x81A
235#define SSB_DEV_SDIO_HOST 0x81B
236#define SSB_DEV_ROBOSWITCH 0x81C
237#define SSB_DEV_PARA_ATA 0x81D
238#define SSB_DEV_SATA_XORDMA 0x81E
239#define SSB_DEV_ETHERNET_GBIT 0x81F
240#define SSB_DEV_PCIE 0x820
241#define SSB_DEV_MIMO_PHY 0x821
242#define SSB_DEV_SRAM_CTRLR 0x822
243#define SSB_DEV_MINI_MACPHY 0x823
244#define SSB_DEV_ARM_1176 0x824
245#define SSB_DEV_ARM_7TDMI 0x825
ccaf8c32 246#define SSB_DEV_ARM_CM3 0x82A
61e115a5
MB		 247
248/* Vendor-ID values */
249#define SSB_VENDOR_BROADCOM 0x4243
250
251/* Some kernel subsystems poke with dev->drvdata, so we must use the
252 * following ugly workaround to get from struct device to struct ssb_device */
253struct __ssb_dev_wrapper {
254 struct device dev;
255 struct ssb_device *sdev;
256};
257
258struct ssb_device {
259 /* Having a copy of the ops pointer in each dev struct
260 * is an optimization. */
261 const struct ssb_bus_ops *ops;
262
14f92952 263 struct device *dev, *dma_dev;
4ac58469 264
61e115a5
MB		 265 struct ssb_bus *bus;
266 struct ssb_device_id id;
267
268 u8 core_index;
269 unsigned int irq;
270
271 /* Internal-only stuff follows. */
272 void *drvdata; /* Per-device data */
273 void *devtypedata; /* Per-devicetype (eg 802.11) data */
274};
275
276/* Go from struct device to struct ssb_device. */
277static inline
278struct ssb_device * dev_to_ssb_dev(struct device *dev)
279{
280 struct __ssb_dev_wrapper *wrap;
281 wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
282 return wrap->sdev;
283}
284
285/* Device specific user data */
286static inline
287void ssb_set_drvdata(struct ssb_device *dev, void *data)
288{
289 dev->drvdata = data;
290}
291static inline
292void * ssb_get_drvdata(struct ssb_device *dev)
293{
294 return dev->drvdata;
295}
296
297/* Devicetype specific user data. This is per device-type (not per device) */
298void ssb_set_devtypedata(struct ssb_device *dev, void *data);
299static inline
300void * ssb_get_devtypedata(struct ssb_device *dev)
301{
302 return dev->devtypedata;
303}
304
305
306struct ssb_driver {
307 const char *name;
308 const struct ssb_device_id *id_table;
309
310 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
311 void (*remove)(struct ssb_device *dev);
312 int (*suspend)(struct ssb_device *dev, pm_message_t state);
313 int (*resume)(struct ssb_device *dev);
314 void (*shutdown)(struct ssb_device *dev);
315
316 struct device_driver drv;
317};
318#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
319
320extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
eb5589a8
PG		 321#define ssb_driver_register(drv) \
322 __ssb_driver_register(drv, THIS_MODULE)
323
61e115a5
MB		 324extern void ssb_driver_unregister(struct ssb_driver *drv);
325
326
327
328
329enum ssb_bustype {
330 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
331 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
332 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
24ea602e 333 SSB_BUSTYPE_SDIO, /* SSB is connected to SDIO bus */
61e115a5
MB		 334};
335
336/* board_vendor */
337#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
338#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
339#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
340/* board_type */
341#define SSB_BOARD_BCM94306MP 0x0418
342#define SSB_BOARD_BCM4309G 0x0421
343#define SSB_BOARD_BCM4306CB 0x0417
344#define SSB_BOARD_BCM4309MP 0x040C
345#define SSB_BOARD_MP4318 0x044A
346#define SSB_BOARD_BU4306 0x0416
347#define SSB_BOARD_BU4309 0x040A
348/* chip_package */
349#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
350#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
351#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
352
353#include <linux/ssb/ssb_driver_chipcommon.h>
354#include <linux/ssb/ssb_driver_mips.h>
355#include <linux/ssb/ssb_driver_extif.h>
356#include <linux/ssb/ssb_driver_pci.h>
357
358struct ssb_bus {
359 /* The MMIO area. */
360 void __iomem *mmio;
361
362 const struct ssb_bus_ops *ops;
363
8b45499c
MB		 364 /* The core currently mapped into the MMIO window.
365 * Not valid on all host-buses. So don't use outside of SSB. */
61e115a5 366 struct ssb_device *mapped_device;
24ea602e
AH		 367 union {
368 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
369 u8 mapped_pcmcia_seg;
370 /* Current SSB base address window for SDIO. */
371 u32 sdio_sbaddr;
372 };
993e1c78
MB		 373 /* Lock for core and segment switching.
374 * On PCMCIA-host busses this is used to protect the whole MMIO access. */
61e115a5
MB		 375 spinlock_t bar_lock;
376
8b45499c 377 /* The host-bus this backplane is running on. */
61e115a5 378 enum ssb_bustype bustype;
8b45499c
MB		 379 /* Pointers to the host-bus. Check bustype before using any of these pointers. */
380 union {
381 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
382 struct pci_dev *host_pci;
383 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
384 struct pcmcia_device *host_pcmcia;
385 /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
386 struct sdio_func *host_sdio;
387 };
24ea602e
AH		 388
389 /* See enum ssb_quirks */
390 unsigned int quirks;
61e115a5 391
e7ec2e32 392#ifdef CONFIG_SSB_SPROM
61e115a5 393 /* Mutex to protect the SPROM writing. */
e7ec2e32 394 struct mutex sprom_mutex;
61e115a5
MB		 395#endif
396
397 /* ID information about the Chip. */
398 u16 chip_id;
ce57d9e6 399 u8 chip_rev;
ea2db495 400 u16 sprom_offset;
c272ef44 401 u16 sprom_size; /* number of words in sprom */
61e115a5
MB		 402 u8 chip_package;
403
404 /* List of devices (cores) on the backplane. */
405 struct ssb_device devices[SSB_MAX_NR_CORES];
406 u8 nr_devices;
407
61e115a5
MB		 408 /* Software ID number for this bus. */
409 unsigned int busnumber;
410
411 /* The ChipCommon device (if available). */
412 struct ssb_chipcommon chipco;
413 /* The PCI-core device (if available). */
414 struct ssb_pcicore pcicore;
415 /* The MIPS-core device (if available). */
416 struct ssb_mipscore mipscore;
417 /* The EXTif-core device (if available). */
418 struct ssb_extif extif;
419
420 /* The following structure elements are not available in early
421 * SSB initialization. Though, they are available for regular
422 * registered drivers at any stage. So be careful when
423 * using them in the ssb core code. */
424
425 /* ID information about the PCB. */
426 struct ssb_boardinfo boardinfo;
427 /* Contents of the SPROM. */
428 struct ssb_sprom sprom;
7cb44615
MB		 429 /* If the board has a cardbus slot, this is set to true. */
430 bool has_cardbus_slot;
61e115a5 431
53521d8c
MB		 432#ifdef CONFIG_SSB_EMBEDDED
433 /* Lock for GPIO register access. */
434 spinlock_t gpio_lock;
435#endif /* EMBEDDED */
436
61e115a5
MB		 437 /* Internal-only stuff follows. Do not touch. */
438 struct list_head list;
439#ifdef CONFIG_SSB_DEBUG
440 /* Is the bus already powered up? */
441 bool powered_up;
442 int power_warn_count;
443#endif /* DEBUG */
444};
445
24ea602e
AH		 446enum ssb_quirks {
447 /* SDIO connected card requires performing a read after writing a 32-bit value */
448 SSB_QUIRK_SDIO_READ_AFTER_WRITE32 = (1 << 0),
449};
450
61e115a5
MB		 451/* The initialization-invariants. */
452struct ssb_init_invariants {
7cb44615 453 /* Versioning information about the PCB. */
61e115a5 454 struct ssb_boardinfo boardinfo;
7cb44615
MB		 455 /* The SPROM information. That's either stored in an
456 * EEPROM or NVRAM on the board. */
61e115a5 457 struct ssb_sprom sprom;
7cb44615
MB		 458 /* If the board has a cardbus slot, this is set to true. */
459 bool has_cardbus_slot;
61e115a5
MB		 460};
461/* Type of function to fetch the invariants. */
462typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
463 struct ssb_init_invariants *iv);
464
465/* Register a SSB system bus. get_invariants() is called after the
466 * basic system devices are initialized.
467 * The invariants are usually fetched from some NVRAM.
468 * Put the invariants into the struct pointed to by iv. */
469extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
470 unsigned long baseaddr,
471 ssb_invariants_func_t get_invariants);
472#ifdef CONFIG_SSB_PCIHOST
473extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
474 struct pci_dev *host_pci);
475#endif /* CONFIG_SSB_PCIHOST */
476#ifdef CONFIG_SSB_PCMCIAHOST
477extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
478 struct pcmcia_device *pcmcia_dev,
479 unsigned long baseaddr);
480#endif /* CONFIG_SSB_PCMCIAHOST */
24ea602e
AH		 481#ifdef CONFIG_SSB_SDIOHOST
482extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
483 struct sdio_func *sdio_func,
484 unsigned int quirks);
485#endif /* CONFIG_SSB_SDIOHOST */
486
61e115a5
MB		 487
488extern void ssb_bus_unregister(struct ssb_bus *bus);
489
d53cdbb9
JL		 490/* Does the device have an SPROM? */
491extern bool ssb_is_sprom_available(struct ssb_bus *bus);
492
e79c1ba8
MB		 493/* Set a fallback SPROM.
494 * See kdoc at the function definition for complete documentation. */
b3ae52b6
HM		 495extern int ssb_arch_register_fallback_sprom(
496 int (*sprom_callback)(struct ssb_bus *bus,
497 struct ssb_sprom *out));
e79c1ba8 498
8fe2b65a
MB		 499/* Suspend a SSB bus.
500 * Call this from the parent bus suspend routine. */
501extern int ssb_bus_suspend(struct ssb_bus *bus);
502/* Resume a SSB bus.
503 * Call this from the parent bus resume routine. */
504extern int ssb_bus_resume(struct ssb_bus *bus);
505
61e115a5
MB		 506extern u32 ssb_clockspeed(struct ssb_bus *bus);
507
508/* Is the device enabled in hardware? */
509int ssb_device_is_enabled(struct ssb_device *dev);
510/* Enable a device and pass device-specific SSB_TMSLOW flags.
511 * If no device-specific flags are available, use 0. */
512void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
513/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
514void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
515
516
517/* Device MMIO register read/write functions. */
ffc7689d
MB		 518static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
519{
520 return dev->ops->read8(dev, offset);
521}
61e115a5
MB		 522static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
523{
524 return dev->ops->read16(dev, offset);
525}
526static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
527{
528 return dev->ops->read32(dev, offset);
529}
ffc7689d
MB		 530static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
531{
532 dev->ops->write8(dev, offset, value);
533}
61e115a5
MB		 534static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
535{
536 dev->ops->write16(dev, offset, value);
537}
538static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
539{
540 dev->ops->write32(dev, offset, value);
541}
d625a29b
MB		 542#ifdef CONFIG_SSB_BLOCKIO
543static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
544 size_t count, u16 offset, u8 reg_width)
545{
546 dev->ops->block_read(dev, buffer, count, offset, reg_width);
547}
548
549static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
550 size_t count, u16 offset, u8 reg_width)
551{
552 dev->ops->block_write(dev, buffer, count, offset, reg_width);
553}
554#endif /* CONFIG_SSB_BLOCKIO */
61e115a5
MB		 555
556
f225763a
MB		 557/* The SSB DMA API. Use this API for any DMA operation on the device.
558 * This API basically is a wrapper that calls the correct DMA API for
559 * the host device type the SSB device is attached to. */
560
61e115a5
MB		 561/* Translation (routing) bits that need to be ORed to DMA
562 * addresses before they are given to a device. */
563extern u32 ssb_dma_translation(struct ssb_device *dev);
564#define SSB_DMA_TRANSLATION_MASK 0xC0000000
565#define SSB_DMA_TRANSLATION_SHIFT 30
566
f225763a
MB		 567static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
568{
569#ifdef CONFIG_SSB_DEBUG
570 printk(KERN_ERR "SSB: BUG! Calling DMA API for "
571 "unsupported bustype %d\n", dev->bus->bustype);
572#endif /* DEBUG */
573}
574
61e115a5
MB		 575#ifdef CONFIG_SSB_PCIHOST
576/* PCI-host wrapper driver */
577extern int ssb_pcihost_register(struct pci_driver *driver);
578static inline void ssb_pcihost_unregister(struct pci_driver *driver)
579{
580 pci_unregister_driver(driver);
581}
961d57c8
MB		 582
583static inline
584void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
585{
586 if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
587 pci_set_power_state(sdev->bus->host_pci, state);
588}
532031d7
AM		 589#else
590static inline void ssb_pcihost_unregister(struct pci_driver *driver)
591{
592}
593
594static inline
595void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
596{
597}
61e115a5
MB		 598#endif /* CONFIG_SSB_PCIHOST */
599
600
601/* If a driver is shutdown or suspended, call this to signal
602 * that the bus may be completely powered down. SSB will decide,
603 * if it's really time to power down the bus, based on if there
604 * are other devices that want to run. */
605extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
606/* Before initializing and enabling a device, call this to power-up the bus.
607 * If you want to allow use of dynamic-power-control, pass the flag.
608 * Otherwise static always-on powercontrol will be used. */
609extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
610
8576f815 611extern void ssb_commit_settings(struct ssb_bus *bus);
61e115a5
MB		 612
613/* Various helper functions */
614extern u32 ssb_admatch_base(u32 adm);
615extern u32 ssb_admatch_size(u32 adm);
616
aab547ce
MB		 617/* PCI device mapping and fixup routines.
618 * Called from the architecture pcibios init code.
619 * These are only available on SSB_EMBEDDED configurations. */
620#ifdef CONFIG_SSB_EMBEDDED
621int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
622int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
623#endif /* CONFIG_SSB_EMBEDDED */
61e115a5
MB		 624
625#endif /* LINUX_SSB_H_ */
Linux kernel - Deliverables
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