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ssb: Implement the remaining rev.8 SPROM vars needed for LP-PHY
[deliverable/linux.git] / include / linux / ssb / ssb.h
CommitLineData
61e115a5
MB		 1#ifndef LINUX_SSB_H_
2#define LINUX_SSB_H_
3
4#include <linux/device.h>
5#include <linux/list.h>
6#include <linux/types.h>
7#include <linux/spinlock.h>
8#include <linux/pci.h>
9#include <linux/mod_devicetable.h>
9c0c7a42 10#include <linux/dma-mapping.h>
61e115a5
MB		 11
12#include <linux/ssb/ssb_regs.h>
13
14
15struct pcmcia_device;
16struct ssb_bus;
17struct ssb_driver;
18
61e115a5
MB		 19struct ssb_sprom {
20 u8 revision;
ac82fab4
LF		 21 u8 il0mac[6]; /* MAC address for 802.11b/g */
22 u8 et0mac[6]; /* MAC address for Ethernet */
23 u8 et1mac[6]; /* MAC address for 802.11a */
24 u8 et0phyaddr; /* MII address for enet0 */
25 u8 et1phyaddr; /* MII address for enet1 */
e861b98d
MB		 26 u8 et0mdcport; /* MDIO for enet0 */
27 u8 et1mdcport; /* MDIO for enet1 */
28 u8 board_rev; /* Board revision number from SPROM. */
ac82fab4 29 u8 country_code; /* Country Code */
f679056b
GS		 30 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
31 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
ac82fab4
LF		 32 u16 pa0b0;
33 u16 pa0b1;
34 u16 pa0b2;
35 u16 pa1b0;
36 u16 pa1b1;
37 u16 pa1b2;
f679056b
GS		 38 u16 pa1lob0;
39 u16 pa1lob1;
40 u16 pa1lob2;
41 u16 pa1hib0;
42 u16 pa1hib1;
43 u16 pa1hib2;
ac82fab4
LF		 44 u8 gpio0; /* GPIO pin 0 */
45 u8 gpio1; /* GPIO pin 1 */
46 u8 gpio2; /* GPIO pin 2 */
47 u8 gpio3; /* GPIO pin 3 */
f679056b
GS		 48 u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
49 u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
50 u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
51 u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
ac82fab4
LF		 52 u8 itssi_a; /* Idle TSSI Target for A-PHY */
53 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
f679056b
GS		 54 u8 tri2g; /* 2.4GHz TX isolation */
55 u8 tri5gl; /* 5.2GHz TX isolation */
56 u8 tri5g; /* 5.3GHz TX isolation */
57 u8 tri5gh; /* 5.8GHz TX isolation */
58 u8 rxpo2g; /* 2GHz RX power offset */
59 u8 rxpo5g; /* 5GHz RX power offset */
60 u8 rssisav2g; /* 2GHz RSSI params */
61 u8 rssismc2g;
62 u8 rssismf2g;
63 u8 bxa2g; /* 2GHz BX arch */
64 u8 rssisav5g; /* 5GHz RSSI params */
65 u8 rssismc5g;
66 u8 rssismf5g;
67 u8 bxa5g; /* 5GHz BX arch */
68 u16 cck2gpo; /* CCK power offset */
69 u32 ofdm2gpo; /* 2.4GHz OFDM power offset */
70 u32 ofdm5glpo; /* 5.2GHz OFDM power offset */
71 u32 ofdm5gpo; /* 5.3GHz OFDM power offset */
72 u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */
73 u16 boardflags_lo; /* Board flags (bits 0-15) */
74 u16 boardflags_hi; /* Board flags (bits 16-31) */
75 u16 boardflags2_lo; /* Board flags (bits 32-47) */
76 u16 boardflags2_hi; /* Board flags (bits 48-63) */
77 /* TODO store board flags in a single u64 */
e861b98d
MB		 78
79 /* Antenna gain values for up to 4 antennas
80 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
81 * loss in the connectors is bigger than the gain. */
82 struct {
83 struct {
84 s8 a0, a1, a2, a3;
85 } ghz24; /* 2.4GHz band */
86 struct {
87 s8 a0, a1, a2, a3;
88 } ghz5; /* 5GHz band */
89 } antenna_gain;
ac82fab4 90
f679056b 91 /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
61e115a5
MB		 92};
93
94/* Information about the PCB the circuitry is soldered on. */
95struct ssb_boardinfo {
96 u16 vendor;
97 u16 type;
98 u16 rev;
99};
100
101
102struct ssb_device;
103/* Lowlevel read/write operations on the device MMIO.
104 * Internal, don't use that outside of ssb. */
105struct ssb_bus_ops {
ffc7689d 106 u8 (*read8)(struct ssb_device *dev, u16 offset);
61e115a5
MB		 107 u16 (*read16)(struct ssb_device *dev, u16 offset);
108 u32 (*read32)(struct ssb_device *dev, u16 offset);
ffc7689d 109 void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
61e115a5
MB		 110 void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
111 void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
d625a29b
MB		 112#ifdef CONFIG_SSB_BLOCKIO
113 void (*block_read)(struct ssb_device *dev, void *buffer,
114 size_t count, u16 offset, u8 reg_width);
115 void (*block_write)(struct ssb_device *dev, const void *buffer,
116 size_t count, u16 offset, u8 reg_width);
117#endif
61e115a5
MB		 118};
119
120
121/* Core-ID values. */
122#define SSB_DEV_CHIPCOMMON 0x800
123#define SSB_DEV_ILINE20 0x801
124#define SSB_DEV_SDRAM 0x803
125#define SSB_DEV_PCI 0x804
126#define SSB_DEV_MIPS 0x805
127#define SSB_DEV_ETHERNET 0x806
128#define SSB_DEV_V90 0x807
129#define SSB_DEV_USB11_HOSTDEV 0x808
130#define SSB_DEV_ADSL 0x809
131#define SSB_DEV_ILINE100 0x80A
132#define SSB_DEV_IPSEC 0x80B
133#define SSB_DEV_PCMCIA 0x80D
134#define SSB_DEV_INTERNAL_MEM 0x80E
135#define SSB_DEV_MEMC_SDRAM 0x80F
136#define SSB_DEV_EXTIF 0x811
137#define SSB_DEV_80211 0x812
138#define SSB_DEV_MIPS_3302 0x816
139#define SSB_DEV_USB11_HOST 0x817
140#define SSB_DEV_USB11_DEV 0x818
141#define SSB_DEV_USB20_HOST 0x819
142#define SSB_DEV_USB20_DEV 0x81A
143#define SSB_DEV_SDIO_HOST 0x81B
144#define SSB_DEV_ROBOSWITCH 0x81C
145#define SSB_DEV_PARA_ATA 0x81D
146#define SSB_DEV_SATA_XORDMA 0x81E
147#define SSB_DEV_ETHERNET_GBIT 0x81F
148#define SSB_DEV_PCIE 0x820
149#define SSB_DEV_MIMO_PHY 0x821
150#define SSB_DEV_SRAM_CTRLR 0x822
151#define SSB_DEV_MINI_MACPHY 0x823
152#define SSB_DEV_ARM_1176 0x824
153#define SSB_DEV_ARM_7TDMI 0x825
154
155/* Vendor-ID values */
156#define SSB_VENDOR_BROADCOM 0x4243
157
158/* Some kernel subsystems poke with dev->drvdata, so we must use the
159 * following ugly workaround to get from struct device to struct ssb_device */
160struct __ssb_dev_wrapper {
161 struct device dev;
162 struct ssb_device *sdev;
163};
164
165struct ssb_device {
166 /* Having a copy of the ops pointer in each dev struct
167 * is an optimization. */
168 const struct ssb_bus_ops *ops;
169
170 struct device *dev;
4ac58469 171
61e115a5
MB		 172 struct ssb_bus *bus;
173 struct ssb_device_id id;
174
175 u8 core_index;
176 unsigned int irq;
177
178 /* Internal-only stuff follows. */
179 void *drvdata; /* Per-device data */
180 void *devtypedata; /* Per-devicetype (eg 802.11) data */
181};
182
183/* Go from struct device to struct ssb_device. */
184static inline
185struct ssb_device * dev_to_ssb_dev(struct device *dev)
186{
187 struct __ssb_dev_wrapper *wrap;
188 wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
189 return wrap->sdev;
190}
191
192/* Device specific user data */
193static inline
194void ssb_set_drvdata(struct ssb_device *dev, void *data)
195{
196 dev->drvdata = data;
197}
198static inline
199void * ssb_get_drvdata(struct ssb_device *dev)
200{
201 return dev->drvdata;
202}
203
204/* Devicetype specific user data. This is per device-type (not per device) */
205void ssb_set_devtypedata(struct ssb_device *dev, void *data);
206static inline
207void * ssb_get_devtypedata(struct ssb_device *dev)
208{
209 return dev->devtypedata;
210}
211
212
213struct ssb_driver {
214 const char *name;
215 const struct ssb_device_id *id_table;
216
217 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
218 void (*remove)(struct ssb_device *dev);
219 int (*suspend)(struct ssb_device *dev, pm_message_t state);
220 int (*resume)(struct ssb_device *dev);
221 void (*shutdown)(struct ssb_device *dev);
222
223 struct device_driver drv;
224};
225#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
226
227extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
228static inline int ssb_driver_register(struct ssb_driver *drv)
229{
230 return __ssb_driver_register(drv, THIS_MODULE);
231}
232extern void ssb_driver_unregister(struct ssb_driver *drv);
233
234
235
236
237enum ssb_bustype {
238 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
239 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
240 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
241};
242
243/* board_vendor */
244#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
245#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
246#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
247/* board_type */
248#define SSB_BOARD_BCM94306MP 0x0418
249#define SSB_BOARD_BCM4309G 0x0421
250#define SSB_BOARD_BCM4306CB 0x0417
251#define SSB_BOARD_BCM4309MP 0x040C
252#define SSB_BOARD_MP4318 0x044A
253#define SSB_BOARD_BU4306 0x0416
254#define SSB_BOARD_BU4309 0x040A
255/* chip_package */
256#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
257#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
258#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
259
260#include <linux/ssb/ssb_driver_chipcommon.h>
261#include <linux/ssb/ssb_driver_mips.h>
262#include <linux/ssb/ssb_driver_extif.h>
263#include <linux/ssb/ssb_driver_pci.h>
264
265struct ssb_bus {
266 /* The MMIO area. */
267 void __iomem *mmio;
268
269 const struct ssb_bus_ops *ops;
270
271 /* The core in the basic address register window. (PCI bus only) */
272 struct ssb_device *mapped_device;
273 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
274 u8 mapped_pcmcia_seg;
993e1c78
MB		 275 /* Lock for core and segment switching.
276 * On PCMCIA-host busses this is used to protect the whole MMIO access. */
61e115a5
MB		 277 spinlock_t bar_lock;
278
279 /* The bus this backplane is running on. */
280 enum ssb_bustype bustype;
281 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
282 struct pci_dev *host_pci;
283 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
284 struct pcmcia_device *host_pcmcia;
285
e7ec2e32 286#ifdef CONFIG_SSB_SPROM
61e115a5 287 /* Mutex to protect the SPROM writing. */
e7ec2e32 288 struct mutex sprom_mutex;
61e115a5
MB		 289#endif
290
291 /* ID information about the Chip. */
292 u16 chip_id;
293 u16 chip_rev;
c272ef44 294 u16 sprom_size; /* number of words in sprom */
61e115a5
MB		 295 u8 chip_package;
296
297 /* List of devices (cores) on the backplane. */
298 struct ssb_device devices[SSB_MAX_NR_CORES];
299 u8 nr_devices;
300
61e115a5
MB		 301 /* Software ID number for this bus. */
302 unsigned int busnumber;
303
304 /* The ChipCommon device (if available). */
305 struct ssb_chipcommon chipco;
306 /* The PCI-core device (if available). */
307 struct ssb_pcicore pcicore;
308 /* The MIPS-core device (if available). */
309 struct ssb_mipscore mipscore;
310 /* The EXTif-core device (if available). */
311 struct ssb_extif extif;
312
313 /* The following structure elements are not available in early
314 * SSB initialization. Though, they are available for regular
315 * registered drivers at any stage. So be careful when
316 * using them in the ssb core code. */
317
318 /* ID information about the PCB. */
319 struct ssb_boardinfo boardinfo;
320 /* Contents of the SPROM. */
321 struct ssb_sprom sprom;
7cb44615
MB		 322 /* If the board has a cardbus slot, this is set to true. */
323 bool has_cardbus_slot;
61e115a5 324
53521d8c
MB		 325#ifdef CONFIG_SSB_EMBEDDED
326 /* Lock for GPIO register access. */
327 spinlock_t gpio_lock;
328#endif /* EMBEDDED */
329
61e115a5
MB		 330 /* Internal-only stuff follows. Do not touch. */
331 struct list_head list;
332#ifdef CONFIG_SSB_DEBUG
333 /* Is the bus already powered up? */
334 bool powered_up;
335 int power_warn_count;
336#endif /* DEBUG */
337};
338
339/* The initialization-invariants. */
340struct ssb_init_invariants {
7cb44615 341 /* Versioning information about the PCB. */
61e115a5 342 struct ssb_boardinfo boardinfo;
7cb44615
MB		 343 /* The SPROM information. That's either stored in an
344 * EEPROM or NVRAM on the board. */
61e115a5 345 struct ssb_sprom sprom;
7cb44615
MB		 346 /* If the board has a cardbus slot, this is set to true. */
347 bool has_cardbus_slot;
61e115a5
MB		 348};
349/* Type of function to fetch the invariants. */
350typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
351 struct ssb_init_invariants *iv);
352
353/* Register a SSB system bus. get_invariants() is called after the
354 * basic system devices are initialized.
355 * The invariants are usually fetched from some NVRAM.
356 * Put the invariants into the struct pointed to by iv. */
357extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
358 unsigned long baseaddr,
359 ssb_invariants_func_t get_invariants);
360#ifdef CONFIG_SSB_PCIHOST
361extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
362 struct pci_dev *host_pci);
363#endif /* CONFIG_SSB_PCIHOST */
364#ifdef CONFIG_SSB_PCMCIAHOST
365extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
366 struct pcmcia_device *pcmcia_dev,
367 unsigned long baseaddr);
368#endif /* CONFIG_SSB_PCMCIAHOST */
369
370extern void ssb_bus_unregister(struct ssb_bus *bus);
371
e79c1ba8
MB		 372/* Set a fallback SPROM.
373 * See kdoc at the function definition for complete documentation. */
374extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
375
8fe2b65a
MB		 376/* Suspend a SSB bus.
377 * Call this from the parent bus suspend routine. */
378extern int ssb_bus_suspend(struct ssb_bus *bus);
379/* Resume a SSB bus.
380 * Call this from the parent bus resume routine. */
381extern int ssb_bus_resume(struct ssb_bus *bus);
382
61e115a5
MB		 383extern u32 ssb_clockspeed(struct ssb_bus *bus);
384
385/* Is the device enabled in hardware? */
386int ssb_device_is_enabled(struct ssb_device *dev);
387/* Enable a device and pass device-specific SSB_TMSLOW flags.
388 * If no device-specific flags are available, use 0. */
389void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
390/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
391void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
392
393
394/* Device MMIO register read/write functions. */
ffc7689d
MB		 395static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
396{
397 return dev->ops->read8(dev, offset);
398}
61e115a5
MB		 399static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
400{
401 return dev->ops->read16(dev, offset);
402}
403static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
404{
405 return dev->ops->read32(dev, offset);
406}
ffc7689d
MB		 407static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
408{
409 dev->ops->write8(dev, offset, value);
410}
61e115a5
MB		 411static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
412{
413 dev->ops->write16(dev, offset, value);
414}
415static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
416{
417 dev->ops->write32(dev, offset, value);
418}
d625a29b
MB		 419#ifdef CONFIG_SSB_BLOCKIO
420static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
421 size_t count, u16 offset, u8 reg_width)
422{
423 dev->ops->block_read(dev, buffer, count, offset, reg_width);
424}
425
426static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
427 size_t count, u16 offset, u8 reg_width)
428{
429 dev->ops->block_write(dev, buffer, count, offset, reg_width);
430}
431#endif /* CONFIG_SSB_BLOCKIO */
61e115a5
MB		 432
433
f225763a
MB		 434/* The SSB DMA API. Use this API for any DMA operation on the device.
435 * This API basically is a wrapper that calls the correct DMA API for
436 * the host device type the SSB device is attached to. */
437
61e115a5
MB		 438/* Translation (routing) bits that need to be ORed to DMA
439 * addresses before they are given to a device. */
440extern u32 ssb_dma_translation(struct ssb_device *dev);
441#define SSB_DMA_TRANSLATION_MASK 0xC0000000
442#define SSB_DMA_TRANSLATION_SHIFT 30
443
f225763a
MB		 444extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
445
446extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
447 dma_addr_t *dma_handle, gfp_t gfp_flags);
448extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
449 void *vaddr, dma_addr_t dma_handle,
450 gfp_t gfp_flags);
451
452static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
453{
454#ifdef CONFIG_SSB_DEBUG
455 printk(KERN_ERR "SSB: BUG! Calling DMA API for "
456 "unsupported bustype %d\n", dev->bus->bustype);
457#endif /* DEBUG */
458}
459
460static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
461{
462 switch (dev->bus->bustype) {
463 case SSB_BUSTYPE_PCI:
fd0fcf5c 464#ifdef CONFIG_SSB_PCIHOST
8d8bb39b 465 return pci_dma_mapping_error(dev->bus->host_pci, addr);
fd0fcf5c
MB		 466#endif
467 break;
f225763a 468 case SSB_BUSTYPE_SSB:
8d8bb39b 469 return dma_mapping_error(dev->dev, addr);
f225763a 470 default:
fd0fcf5c 471 break;
f225763a 472 }
fd0fcf5c 473 __ssb_dma_not_implemented(dev);
f225763a
MB		 474 return -ENOSYS;
475}
476
477static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
478 size_t size, enum dma_data_direction dir)
479{
480 switch (dev->bus->bustype) {
481 case SSB_BUSTYPE_PCI:
fd0fcf5c 482#ifdef CONFIG_SSB_PCIHOST
f225763a 483 return pci_map_single(dev->bus->host_pci, p, size, dir);
fd0fcf5c
MB		 484#endif
485 break;
f225763a
MB		 486 case SSB_BUSTYPE_SSB:
487 return dma_map_single(dev->dev, p, size, dir);
488 default:
fd0fcf5c 489 break;
f225763a 490 }
fd0fcf5c 491 __ssb_dma_not_implemented(dev);
f225763a
MB		 492 return 0;
493}
494
495static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
496 size_t size, enum dma_data_direction dir)
497{
498 switch (dev->bus->bustype) {
499 case SSB_BUSTYPE_PCI:
fd0fcf5c 500#ifdef CONFIG_SSB_PCIHOST
f225763a
MB		 501 pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
502 return;
fd0fcf5c
MB		 503#endif
504 break;
f225763a
MB		 505 case SSB_BUSTYPE_SSB:
506 dma_unmap_single(dev->dev, dma_addr, size, dir);
507 return;
508 default:
fd0fcf5c 509 break;
f225763a 510 }
fd0fcf5c 511 __ssb_dma_not_implemented(dev);
f225763a
MB		 512}
513
514static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
515 dma_addr_t dma_addr,
516 size_t size,
517 enum dma_data_direction dir)
518{
519 switch (dev->bus->bustype) {
520 case SSB_BUSTYPE_PCI:
fd0fcf5c 521#ifdef CONFIG_SSB_PCIHOST
f225763a
MB		 522 pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
523 size, dir);
524 return;
fd0fcf5c
MB		 525#endif
526 break;
f225763a
MB		 527 case SSB_BUSTYPE_SSB:
528 dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
529 return;
530 default:
fd0fcf5c 531 break;
f225763a 532 }
fd0fcf5c 533 __ssb_dma_not_implemented(dev);
f225763a
MB		 534}
535
536static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
537 dma_addr_t dma_addr,
538 size_t size,
539 enum dma_data_direction dir)
540{
541 switch (dev->bus->bustype) {
542 case SSB_BUSTYPE_PCI:
fd0fcf5c 543#ifdef CONFIG_SSB_PCIHOST
f225763a
MB		 544 pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
545 size, dir);
546 return;
fd0fcf5c
MB		 547#endif
548 break;
f225763a
MB		 549 case SSB_BUSTYPE_SSB:
550 dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
551 return;
552 default:
fd0fcf5c 553 break;
f225763a 554 }
fd0fcf5c 555 __ssb_dma_not_implemented(dev);
f225763a
MB		 556}
557
558static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
559 dma_addr_t dma_addr,
560 unsigned long offset,
561 size_t size,
562 enum dma_data_direction dir)
563{
564 switch (dev->bus->bustype) {
565 case SSB_BUSTYPE_PCI:
fd0fcf5c 566#ifdef CONFIG_SSB_PCIHOST
f225763a
MB		 567 /* Just sync everything. That's all the PCI API can do. */
568 pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
569 offset + size, dir);
570 return;
fd0fcf5c
MB		 571#endif
572 break;
f225763a
MB		 573 case SSB_BUSTYPE_SSB:
574 dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
575 size, dir);
576 return;
577 default:
fd0fcf5c 578 break;
f225763a 579 }
fd0fcf5c 580 __ssb_dma_not_implemented(dev);
f225763a
MB		 581}
582
583static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
584 dma_addr_t dma_addr,
585 unsigned long offset,
586 size_t size,
587 enum dma_data_direction dir)
588{
589 switch (dev->bus->bustype) {
590 case SSB_BUSTYPE_PCI:
fd0fcf5c 591#ifdef CONFIG_SSB_PCIHOST
f225763a
MB		 592 /* Just sync everything. That's all the PCI API can do. */
593 pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
594 offset + size, dir);
595 return;
fd0fcf5c
MB		 596#endif
597 break;
f225763a
MB		 598 case SSB_BUSTYPE_SSB:
599 dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
600 size, dir);
601 return;
602 default:
fd0fcf5c 603 break;
f225763a 604 }
fd0fcf5c 605 __ssb_dma_not_implemented(dev);
f225763a 606}
61e115a5
MB		 607
608
609#ifdef CONFIG_SSB_PCIHOST
610/* PCI-host wrapper driver */
611extern int ssb_pcihost_register(struct pci_driver *driver);
612static inline void ssb_pcihost_unregister(struct pci_driver *driver)
613{
614 pci_unregister_driver(driver);
615}
961d57c8
MB		 616
617static inline
618void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
619{
620 if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
621 pci_set_power_state(sdev->bus->host_pci, state);
622}
532031d7
AM		 623#else
624static inline void ssb_pcihost_unregister(struct pci_driver *driver)
625{
626}
627
628static inline
629void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
630{
631}
61e115a5
MB		 632#endif /* CONFIG_SSB_PCIHOST */
633
634
635/* If a driver is shutdown or suspended, call this to signal
636 * that the bus may be completely powered down. SSB will decide,
637 * if it's really time to power down the bus, based on if there
638 * are other devices that want to run. */
639extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
640/* Before initializing and enabling a device, call this to power-up the bus.
641 * If you want to allow use of dynamic-power-control, pass the flag.
642 * Otherwise static always-on powercontrol will be used. */
643extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
644
645
646/* Various helper functions */
647extern u32 ssb_admatch_base(u32 adm);
648extern u32 ssb_admatch_size(u32 adm);
649
aab547ce
MB		 650/* PCI device mapping and fixup routines.
651 * Called from the architecture pcibios init code.
652 * These are only available on SSB_EMBEDDED configurations. */
653#ifdef CONFIG_SSB_EMBEDDED
654int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
655int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
656#endif /* CONFIG_SSB_EMBEDDED */
61e115a5
MB		 657
658#endif /* LINUX_SSB_H_ */
Linux kernel - Deliverables
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