projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 01658f0f KVA |
1 | /* |
| 2 | * omap_control_usb.h - Header file for the USB part of control module. | |
| 3 | * | |
| 4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com | |
| 5 | * This program is free software; you can redistribute it and/or modify | |
| 6 | * it under the terms of the GNU General Public License as published by | |
| 7 | * the Free Software Foundation; either version 2 of the License, or | |
| 8 | * (at your option) any later version. | |
| 9 | * | |
| 10 | * Author: Kishon Vijay Abraham I <kishon@ti.com> | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| 16 | * | |
| 17 | */ | |
| 18 | ||
| 19 | #ifndef __OMAP_CONTROL_USB_H__ | |
| 20 | #define __OMAP_CONTROL_USB_H__ | |
| 21 | ||
| 22 | struct omap_control_usb { | |
| 23 | struct device *dev; | |
| 24 | ||
| 25 | u32 __iomem *dev_conf; | |
| 26 | u32 __iomem *otghs_control; | |
| 27 | u32 __iomem *phy_power; | |
| 28 | ||
| 29 | struct clk *sys_clk; | |
| 30 | ||
| 31 | u32 type; | |
| 32 | }; | |
| 33 | ||
| 34 | struct omap_control_usb_platform_data { | |
| 35 | u8 type; | |
| 36 | }; | |
| 37 | ||
| 38 | enum omap_control_usb_mode { | |
| 39 | USB_MODE_UNDEFINED = 0, | |
| 40 | USB_MODE_HOST, | |
| 41 | USB_MODE_DEVICE, | |
| 42 | USB_MODE_DISCONNECT, | |
| 43 | }; | |
| 44 | ||
| 45 | /* To differentiate ctrl module IP having either mailbox or USB3 PHY power */ | |
| 46 | #define OMAP_CTRL_DEV_TYPE1 0x1 | |
| 47 | #define OMAP_CTRL_DEV_TYPE2 0x2 | |
| 48 | ||
| 49 | #define OMAP_CTRL_DEV_PHY_PD BIT(0) | |
| 50 | ||
| 51 | #define OMAP_CTRL_DEV_AVALID BIT(0) | |
| 52 | #define OMAP_CTRL_DEV_BVALID BIT(1) | |
| 53 | #define OMAP_CTRL_DEV_VBUSVALID BIT(2) | |
| 54 | #define OMAP_CTRL_DEV_SESSEND BIT(3) | |
| 55 | #define OMAP_CTRL_DEV_IDDIG BIT(4) | |
| 56 | ||
| 57 | #define OMAP_CTRL_USB_PWRCTL_CLK_CMD_MASK 0x003FC000 | |
| 58 | #define OMAP_CTRL_USB_PWRCTL_CLK_CMD_SHIFT 0xE | |
| 59 | ||
| 60 | #define OMAP_CTRL_USB_PWRCTL_CLK_FREQ_MASK 0xFFC00000 | |
| 61 | #define OMAP_CTRL_USB_PWRCTL_CLK_FREQ_SHIFT 0x16 | |
| 62 | ||
| 63 | #define OMAP_CTRL_USB3_PHY_TX_RX_POWERON 0x3 | |
| 64 | #define OMAP_CTRL_USB3_PHY_TX_RX_POWEROFF 0x0 | |
| 65 | ||
| 66 | #if IS_ENABLED(CONFIG_OMAP_CONTROL_USB) | |
| 67 | extern struct device *omap_get_control_dev(void); | |
| 68 | extern void omap_control_usb_phy_power(struct device *dev, int on); | |
| 69 | extern void omap_control_usb3_phy_power(struct device *dev, bool on); | |
| 70 | extern void omap_control_usb_set_mode(struct device *dev, | |
| 71 | enum omap_control_usb_mode mode); | |
| 72 | #else | |
| 73 | static inline struct device *omap_get_control_dev() | |
| 74 | { | |
| 75 | return ERR_PTR(-ENODEV); | |
| 76 | } | |
| 77 | ||
| 78 | static inline void omap_control_usb_phy_power(struct device *dev, int on) | |
| 79 | { | |
| 80 | } | |
| 81 | ||
| 82 | static inline void omap_control_usb3_phy_power(struct device *dev, int on) | |
| 83 | { | |
| 84 | } | |
| 85 | ||
| 86 | static inline void omap_control_usb_set_mode(struct device *dev, | |
| 87 | enum omap_control_usb_mode mode) | |
| 88 | { | |
| 89 | } | |
| 90 | #endif | |
| 91 | ||
| 92 | #endif /* __OMAP_CONTROL_USB_H__ */ |