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59f0ad80 SA |
1 | #ifndef ARCH_ARM_PLAT_OMAP4_ISS_H |
2 | #define ARCH_ARM_PLAT_OMAP4_ISS_H | |
3 | ||
4 | #include <linux/i2c.h> | |
5 | ||
6 | struct iss_device; | |
7 | ||
8 | enum iss_interface_type { | |
9 | ISS_INTERFACE_CSI2A_PHY1, | |
10 | ISS_INTERFACE_CSI2B_PHY2, | |
11 | }; | |
12 | ||
13 | /** | |
14 | * struct iss_csiphy_lane: CSI2 lane position and polarity | |
15 | * @pos: position of the lane | |
16 | * @pol: polarity of the lane | |
17 | */ | |
18 | struct iss_csiphy_lane { | |
19 | u8 pos; | |
20 | u8 pol; | |
21 | }; | |
22 | ||
23 | #define ISS_CSIPHY1_NUM_DATA_LANES 4 | |
24 | #define ISS_CSIPHY2_NUM_DATA_LANES 1 | |
25 | ||
26 | /** | |
27 | * struct iss_csiphy_lanes_cfg - CSI2 lane configuration | |
28 | * @data: Configuration of one or two data lanes | |
29 | * @clk: Clock lane configuration | |
30 | */ | |
31 | struct iss_csiphy_lanes_cfg { | |
32 | struct iss_csiphy_lane data[ISS_CSIPHY1_NUM_DATA_LANES]; | |
33 | struct iss_csiphy_lane clk; | |
34 | }; | |
35 | ||
36 | /** | |
37 | * struct iss_csi2_platform_data - CSI2 interface platform data | |
38 | * @crc: Enable the cyclic redundancy check | |
39 | * @vpclk_div: Video port output clock control | |
40 | */ | |
41 | struct iss_csi2_platform_data { | |
42 | unsigned crc:1; | |
43 | unsigned vpclk_div:2; | |
44 | struct iss_csiphy_lanes_cfg lanecfg; | |
45 | }; | |
46 | ||
47 | struct iss_subdev_i2c_board_info { | |
48 | struct i2c_board_info *board_info; | |
49 | int i2c_adapter_id; | |
50 | }; | |
51 | ||
52 | struct iss_v4l2_subdevs_group { | |
53 | struct iss_subdev_i2c_board_info *subdevs; | |
54 | enum iss_interface_type interface; | |
55 | union { | |
56 | struct iss_csi2_platform_data csi2; | |
57 | } bus; /* gcc < 4.6.0 chokes on anonymous union initializers */ | |
58 | }; | |
59 | ||
60 | struct iss_platform_data { | |
61 | struct iss_v4l2_subdevs_group *subdevs; | |
62 | void (*set_constraints)(struct iss_device *iss, bool enable); | |
63 | }; | |
64 | ||
65 | #endif |