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* hppa.h (pa_opcodes): Add load and store cache control to
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
eca04c6a
JL		 1Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
2
3 * hppa.h (pa_opcodes): Add load and store cache control to
4 instructions. Add ordered access load and store.
5
6 * hppa.h (pa_opcode): Add new entries for addb and addib.
7
8 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
9
10 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
11
c43185de
DN		 12Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
13
14 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
15
ec3533da
JL		 16Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
17
390f858d
JL		 18 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
19 and "be" using completer prefixes.
20
8c47ebd9
JL		 21 * hppa.h (pa_opcodes): Add initializers to silence compiler.
22
ec3533da
JL		 23 * hppa.h: Update comments about character usage.
24
18369bea
JL		 25Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
26
27 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
28 up the new fstw & bve instructions.
29
c36efdd2
JL		 30Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
31
d3ffb032
JL		 32 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
33 instructions.
34
c49ec3da
JL		 35 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
36
5d2e7ecc
JL		 37 * hppa.h (pa_opcodes): Add long offset double word load/store
38 instructions.
39
6397d1a2
JL		 40 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
41 stores.
42
142f0fe0
JL		 43 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
44
f5a68b45
JL		 45 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
46
8235801e
JL		 47 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
48
35184366
JL		 49 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
50
f0bfde5e
JL		 51 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
52
27bbbb58
JL		 53 * hppa.h (pa_opcodes): Add support for "b,l".
54
c36efdd2
JL		 55 * hppa.h (pa_opcodes): Add support for "b,gate".
56
f2727d04
JL		 57Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
58
9392fb11
JL		 59 * hppa.h (pa_opcodes): Use 'fX' for first register operand
60 in xmpyu.
61
e0c52e99
JL		 62 * hppa.h (pa_opcodes): Fix mask for probe and probei.
63
f2727d04
JL		 64 * hppa.h (pa_opcodes): Fix mask for depwi.
65
52d836e2
JL		 66Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
67
68 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
69 an explicit output argument.
70
90765e3a
JL		 71Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
72
73 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
74 Add a few PA2.0 loads and store variants.
75
8340b17f
ILT		 761999-09-04 Steve Chamberlain <sac@pobox.com>
77
78 * pj.h: New file.
79
5f47d35b
AM		 801999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
81
82 * i386.h (i386_regtab): Move %st to top of table, and split off
83 other fp reg entries.
84 (i386_float_regtab): To here.
85
1c143202
JL		 86Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
87
7d8fdb64
JL		 88 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
89 by 'f'.
90
90927b9c
JL		 91 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
92 Add supporting args.
93
1d16bf9c
JL		 94 * hppa.h: Document new completers and args.
95 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
96 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
97 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
98 pmenb and pmdis.
99
96226a68
JL		 100 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
101 hshr, hsub, mixh, mixw, permh.
102
5d4ba527
JL		 103 * hppa.h (pa_opcodes): Change completers in instructions to
104 use 'c' prefix.
105
e9fc28c6
JL		 106 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
107 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
108
1c143202
JL		 109 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
110 fnegabs to use 'I' instead of 'F'.
111
9e525108
AM		 1121999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
113
114 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
115 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
116 Alphabetically sort PIII insns.
117
e8da1bf1
DE		 118Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
119
120 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
121
7d627258
JL		 122Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
123
5696871a
JL		 124 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
125 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
126
7d627258
JL		 127 * hppa.h: Document 64 bit condition completers.
128
c5e52916
JL		 129Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
130
131 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
132
eecb386c
AM		 1331999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
134
135 * i386.h (i386_optab): Add DefaultSize modifier to all insns
136 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
137 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
138
88a380f3
JL		 139Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
140 Jeff Law <law@cygnus.com>
141
142 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
143
144 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 145
146 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
147 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
148
145cf1f0
AM		 1491999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
150
151 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
152
73826640
JL		 153Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
154
155 * hppa.h (struct pa_opcode): Add new field "flags".
156 (FLAGS_STRICT): Define.
157
b65db252
JL		 158Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
159 Jeff Law <law@cygnus.com>
160
f7fc668b
JL		 161 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
162
163 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 164
10084519
AM		 1651999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
166
167 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
168 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
169 flag to fcomi and friends.
170
cd8a80ba
JL		 171Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
172
173 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
174 integer logical instructions.
175
1fca749b
ILT		 1761999-05-28 Linus Nordberg <linus.nordberg@canit.se>
177
178 * m68k.h: Document new formats `E', `G', `H' and new places `N',
179 `n', `o'.
180
181 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
182 and new places `m', `M', `h'.
183
aa008907
JL		 184Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
185
186 * hppa.h (pa_opcodes): Add several processor specific system
187 instructions.
188
e26b85f0
JL		 189Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
190
191 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
192 "addb", and "addib" to be used by the disassembler.
193
c608c12e
AM		 1941999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
195
196 * i386.h (ReverseModrm): Remove all occurences.
197 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
198 movmskps, pextrw, pmovmskb, maskmovq.
199 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
200 ignore the data size prefix.
201
202 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
203 Mostly stolen from Doug Ledford <dledford@redhat.com>
204
45c18104
RH		 205Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
206
207 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
208
252b5132
RH		 2091999-04-14 Doug Evans <devans@casey.cygnus.com>
210
211 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
212 (CGEN_ATTR_TYPE): Update.
213 (CGEN_ATTR_MASK): Number booleans starting at 0.
214 (CGEN_ATTR_VALUE): Update.
215 (CGEN_INSN_ATTR): Update.
216
217Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
218
219 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
220 instructions.
221
222Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
223
224 * hppa.h (bb, bvb): Tweak opcode/mask.
225
226
2271999-03-22 Doug Evans <devans@casey.cygnus.com>
228
229 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
230 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
231 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
232 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
233 Delete member max_insn_size.
234 (enum cgen_cpu_open_arg): New enum.
235 (cpu_open): Update prototype.
236 (cpu_open_1): Declare.
237 (cgen_set_cpu): Delete.
238
2391999-03-11 Doug Evans <devans@casey.cygnus.com>
240
241 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
242 (CGEN_OPERAND_NIL): New macro.
243 (CGEN_OPERAND): New member `type'.
244 (@arch@_cgen_operand_table): Delete decl.
245 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
246 (CGEN_OPERAND_TABLE): New struct.
247 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
248 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
249 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
250 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
251 {get,set}_{int,vma}_operand.
252 (@arch@_cgen_cpu_open): New arg `isa'.
253 (cgen_set_cpu): Ditto.
254
255Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
256
257 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
258
2591999-02-25 Doug Evans <devans@casey.cygnus.com>
260
261 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
262 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
263 enum cgen_hw_type.
264 (CGEN_HW_TABLE): New struct.
265 (hw_table): Delete declaration.
266 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
267 to table entry to enum.
268 (CGEN_OPINST): Ditto.
269 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
270
271Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
272
273 * alpha.h (AXP_OPCODE_EV6): New.
274 (AXP_OPCODE_NOPAL): Include it.
275
2761999-02-09 Doug Evans <devans@casey.cygnus.com>
277
278 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
279 All uses updated. New members int_insn_p, max_insn_size,
280 parse_operand,insert_operand,extract_operand,print_operand,
281 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
282 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
283 extract_handlers,print_handlers.
284 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
285 (CGEN_ATTR_BOOL_OFFSET): New macro.
286 (CGEN_ATTR_MASK): Subtract it to compute bit number.
287 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
288 (cgen_opcode_handler): Renamed from cgen_base.
289 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
290 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
291 all uses updated.
292 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
293 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
294 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
295 (CGEN_OPCODE,CGEN_IBASE): New types.
296 (CGEN_INSN): Rewrite.
297 (CGEN_{ASM,DIS}_HASH*): Delete.
298 (init_opcode_table,init_ibld_table): Declare.
299 (CGEN_INSN_ATTR): New type.
300
301Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
302
303 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
304 (x_FP, d_FP, dls_FP, sldx_FP): Define.
305 Change *Suf definitions to include x and d suffixes.
306 (movsx): Use w_Suf and b_Suf.
307 (movzx): Likewise.
308 (movs): Use bwld_Suf.
309 (fld): Change ordering. Use sld_FP.
310 (fild): Add Intel Syntax equivalent of fildq.
311 (fst): Use sld_FP.
312 (fist): Use sld_FP.
313 (fstp): Use sld_FP. Add x_FP version.
314 (fistp): LLongMem version for Intel Syntax.
315 (fcom, fcomp): Use sld_FP.
316 (fadd, fiadd, fsub): Use sld_FP.
317 (fsubr): Use sld_FP.
318 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
319
3201999-01-27 Doug Evans <devans@casey.cygnus.com>
321
322 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
323 CGEN_MODE_UINT.
324
325Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
326
327 * hppa.h (bv): Fix mask.
328
3291999-01-05 Doug Evans <devans@casey.cygnus.com>
330
331 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
332 (CGEN_ATTR): Use it.
333 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
334 (CGEN_ATTR_TABLE): New member dfault.
335
3361998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
337
338 * mips.h (MIPS16_INSN_BRANCH): New.
339
340Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
341
342 The following is part of a change made by Edith Epstein
343 <eepstein@sophia.cygnus.com> as part of a project to merge in
344 changes by HP; HP did not create ChangeLog entries.
345
346 * hppa.h (completer_chars): list of chars to not put a space
347 after.
348
349Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
350
351 * i386.h (i386_optab): Permit w suffix on processor control and
352 status word instructions.
353
3541998-11-30 Doug Evans <devans@casey.cygnus.com>
355
356 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
357 (struct cgen_keyword_entry): Ditto.
358 (struct cgen_operand): Ditto.
359 (CGEN_IFLD): New typedef, with associated access macros.
360 (CGEN_IFMT): New typedef, with associated access macros.
361 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
362 (CGEN_IVALUE): New typedef.
363 (struct cgen_insn): Delete const on syntax,attrs members.
364 `format' now points to format data. Type of `value' is now
365 CGEN_IVALUE.
366 (struct cgen_opcode_table): New member ifld_table.
367
3681998-11-18 Doug Evans <devans@casey.cygnus.com>
369
370 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
371 (CGEN_OPERAND_INSTANCE): New member `attrs'.
372 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
373 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
374 (cgen_opcode_table): Update type of dis_hash fn.
375 (extract_operand): Update type of `insn_value' arg.
376
377Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
378
379 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
380
381Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
382
383 * mips.h (INSN_MULT): Added.
384
385Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
386
387 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
388
389Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
390
391 * cgen.h (CGEN_INSN_INT): New typedef.
392 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
393 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
394 (CGEN_INSN_BYTES_PTR): New typedef.
395 (CGEN_EXTRACT_INFO): New typedef.
396 (cgen_insert_fn,cgen_extract_fn): Update.
397 (cgen_opcode_table): New member `insn_endian'.
398 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
399 (insert_operand,extract_operand): Update.
400 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
401
402Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
403
404 * cgen.h (CGEN_ATTR_BOOLS): New macro.
405 (struct CGEN_HW_ENTRY): New member `attrs'.
406 (CGEN_HW_ATTR): New macro.
407 (struct CGEN_OPERAND_INSTANCE): New member `name'.
408 (CGEN_INSN_INVALID_P): New macro.
409
410Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
411
412 * hppa.h: Add "fid".
413
414Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
415
416 From Robert Andrew Dale <rob@nb.net>
417 * i386.h (i386_optab): Add AMD 3DNow! instructions.
418 (AMD_3DNOW_OPCODE): Define.
419
420Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
421
422 * d30v.h (EITHER_BUT_PREFER_MU): Define.
423
424Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
425
426 * cgen.h (cgen_insn): #if 0 out element `cdx'.
427
428Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
429
430 Move all global state data into opcode table struct, and treat
431 opcode table as something that is "opened/closed".
432 * cgen.h (CGEN_OPCODE_DESC): New type.
433 (all fns): New first arg of opcode table descriptor.
434 (cgen_set_parse_operand_fn): Add prototype.
435 (cgen_current_machine,cgen_current_endian): Delete.
436 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
437 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
438 dis_hash_table,dis_hash_table_entries.
439 (opcode_open,opcode_close): Add prototypes.
440
441 * cgen.h (cgen_insn): New element `cdx'.
442
443Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
444
445 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
446
447Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
448
449 * mn10300.h: Add "no_match_operands" field for instructions.
450 (MN10300_MAX_OPERANDS): Define.
451
452Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
453
454 * cgen.h (cgen_macro_insn_count): Declare.
455
456Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
457
458 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
459 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
460 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
461 set_{int,vma}_operand.
462
463Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
464
465 * mn10300.h: Add "machine" field for instructions.
466 (MN103, AM30): Define machine types.
467
468Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
469
470 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
471
4721998-06-18 Ulrich Drepper <drepper@cygnus.com>
473
474 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
475
476Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
477
478 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
479 and ud2b.
480 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
481 those that happen to be implemented on pentiums.
482
483Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
484
485 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
486 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
487 with Size16|IgnoreSize or Size32|IgnoreSize.
488
489Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
490
491 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
492 (REPE): Rename to REPE_PREFIX_OPCODE.
493 (i386_regtab_end): Remove.
494 (i386_prefixtab, i386_prefixtab_end): Remove.
495 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
496 of md_begin.
497 (MAX_OPCODE_SIZE): Define.
498 (i386_optab_end): Remove.
499 (sl_Suf): Define.
500 (sl_FP): Use sl_Suf.
501
502 * i386.h (i386_optab): Allow 16 bit displacement for `mov
503 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
504 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
505 data32, dword, and adword prefixes.
506 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
507 regs.
508
509Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
510
511 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
512
513 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
514 register operands, because this is a common idiom. Flag them with
515 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
516 fdivrp because gcc erroneously generates them. Also flag with a
517 warning.
518
519 * i386.h: Add suffix modifiers to most insns, and tighter operand
520 checks in some cases. Fix a number of UnixWare compatibility
521 issues with float insns. Merge some floating point opcodes, using
522 new FloatMF modifier.
523 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
524 consistency.
525
526 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
527 IgnoreDataSize where appropriate.
528
529Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
530
531 * i386.h: (one_byte_segment_defaults): Remove.
532 (two_byte_segment_defaults): Remove.
533 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
534
535Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
536
537 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
538 (cgen_hw_lookup_by_num): Declare.
539
540Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
541
542 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
543 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
544
545Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
546
547 * cgen.h (cgen_asm_init_parse): Delete.
548 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
549 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
550
551Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
552
553 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
554 (cgen_asm_finish_insn): Update prototype.
555 (cgen_insn): New members num, data.
556 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
557 dis_hash, dis_hash_table_size moved to ...
558 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
559 All uses updated. New members asm_hash_p, dis_hash_p.
560 (CGEN_MINSN_EXPANSION): New struct.
561 (cgen_expand_macro_insn): Declare.
562 (cgen_macro_insn_count): Declare.
563 (get_insn_operands): Update prototype.
564 (lookup_get_insn_operands): Declare.
565
566Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
567
568 * i386.h (i386_optab): Change iclrKludge and imulKludge to
569 regKludge. Add operands types for string instructions.
570
571Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
572
573 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
574 table.
575
576Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
577
578 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
579 for `gettext'.
580
581Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
582
583 * i386.h: Remove NoModrm flag from all insns: it's never checked.
584 Add IsString flag to string instructions.
585 (IS_STRING): Don't define.
586 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
587 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
588 (SS_PREFIX_OPCODE): Define.
589
590Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
591
592 * i386.h: Revert March 24 patch; no more LinearAddress.
593
594Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
595
596 * i386.h (i386_optab): Remove fwait (9b) from all floating point
597 instructions, and instead add FWait opcode modifier. Add short
598 form of fldenv and fstenv.
599 (FWAIT_OPCODE): Define.
600
601 * i386.h (i386_optab): Change second operand constraint of `mov
602 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
603 allow legal instructions such as `movl %gs,%esi'
604
605Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
606
607 * h8300.h: Various changes to fully bracket initializers.
608
609Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
610
611 * i386.h: Set LinearAddress for lidt and lgdt.
612
613Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
614
615 * cgen.h (CGEN_BOOL_ATTR): New macro.
616
617Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
618
619 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
620
621Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
622
623 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
624 (cgen_insn): Record syntax and format entries here, rather than
625 separately.
626
627Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
628
629 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
630
631Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
632
633 * cgen.h (cgen_insert_fn): Change type of result to const char *.
634 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
635 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
636
637Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
638
639 * cgen.h (lookup_insn): New argument alias_p.
640
641Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
642
643Fix rac to accept only a0:
644 * d10v.h (OPERAND_ACC): Split into:
645 (OPERAND_ACC0, OPERAND_ACC1) .
646 (OPERAND_GPR): Define.
647
648Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
649
650 * cgen.h (CGEN_FIELDS): Define here.
651 (CGEN_HW_ENTRY): New member `type'.
652 (hw_list): Delete decl.
653 (enum cgen_mode): Declare.
654 (CGEN_OPERAND): New member `hw'.
655 (enum cgen_operand_instance_type): Declare.
656 (CGEN_OPERAND_INSTANCE): New type.
657 (CGEN_INSN): New member `operands'.
658 (CGEN_OPCODE_DATA): Make hw_list const.
659 (get_insn_operands,lookup_insn): Add prototypes for.
660
661Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
662
663 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
664 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
665 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
666 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
667
668Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
669
670 * cgen.h: Correct typo in comment end marker.
671
672Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
673
674 * tic30.h: New file.
675
676Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
677
678 * cgen.h: Add prototypes for cgen_save_fixups(),
679 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
680 of cgen_asm_finish_insn() to return a char *.
681
682Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
683
684 * cgen.h: Formatting changes to improve readability.
685
686Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
687
688 * cgen.h (*): Clean up pass over `struct foo' usage.
689 (CGEN_ATTR): Make unsigned char.
690 (CGEN_ATTR_TYPE): Update.
691 (CGEN_ATTR_{ENTRY,TABLE}): New types.
692 (cgen_base): Move member `attrs' to cgen_insn.
693 (CGEN_KEYWORD): New member `null_entry'.
694 (CGEN_{SYNTAX,FORMAT}): New types.
695 (cgen_insn): Format and syntax separated from each other.
696
697Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
698
699 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
700 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
701 flags_{used,set} long.
702 (d30v_operand): Make flags field long.
703
704Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
705
706 * m68k.h: Fix comment describing operand types.
707
708Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
709
710 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
711 everything else after down.
712
713Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
714
715 * d10v.h (OPERAND_FLAG): Split into:
716 (OPERAND_FFLAG, OPERAND_CFLAG) .
717
718Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
719
720 * mips.h (struct mips_opcode): Changed comments to reflect new
721 field usage.
722
723Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
724
725 * mips.h: Added to comments a quick-ref list of all assigned
726 operand type characters.
727 (OP_{MASK,SH}_PERFREG): New macros.
728
729Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
730
731 * sparc.h: Add '_' and '/' for v9a asr's.
732 Patch from David Miller <davem@vger.rutgers.edu>
733
734Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
735
736 * h8300.h: Bit ops with absolute addresses not in the 8 bit
737 area are not available in the base model (H8/300).
738
739Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
740
741 * m68k.h: Remove documentation of ` operand specifier.
742
743Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
744
745 * m68k.h: Document q and v operand specifiers.
746
747Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
748
749 * v850.h (struct v850_opcode): Add processors field.
750 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
751 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
752 (PROCESSOR_V850EA): New bit constants.
753
754Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
755
756 Merge changes from Martin Hunt:
757
758 * d30v.h: Allow up to 64 control registers. Add
759 SHORT_A5S format.
760
761 * d30v.h (LONG_Db): New form for delayed branches.
762
763 * d30v.h: (LONG_Db): New form for repeati.
764
765 * d30v.h (SHORT_D2B): New form.
766
767 * d30v.h (SHORT_A2): New form.
768
769 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
770 registers are used. Needed for VLIW optimization.
771
772Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
773
774 * cgen.h: Move assembler interface section
775 up so cgen_parse_operand_result is defined for cgen_parse_address.
776 (cgen_parse_address): Update prototype.
777
778Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
779
780 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
781
782Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
783
784 * i386.h (two_byte_segment_defaults): Correct base register 5 in
785 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
786 <paubert@iram.es>.
787
788 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
789 <paubert@iram.es>.
790
791 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
792 <paubert@iram.es>.
793
794 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
795 (JUMP_ON_ECX_ZERO): Remove commented out macro.
796
797Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
798
799 * v850.h (V850_NOT_R0): New flag.
800
801Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
802
803 * v850.h (struct v850_opcode): Remove flags field.
804
805Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
806
807 * v850.h (struct v850_opcode): Add flags field.
808 (struct v850_operand): Extend meaning of 'bits' and 'shift'
809 fields.
810 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
811 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
812
813Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
814
815 * arc.h: New file.
816
817Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
818
819 * sparc.h (sparc_opcodes): Declare as const.
820
821Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
822
823 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
824 uses single or double precision floating point resources.
825 (INSN_NO_ISA, INSN_ISA1): Define.
826 (cpu specific INSN macros): Tweak into bitmasks outside the range
827 of INSN_ISA field.
828
829Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
830
831 * i386.h: Fix pand opcode.
832
833Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
834
835 * mips.h: Widen INSN_ISA and move it to a more convenient
836 bit position. Add INSN_3900.
837
838Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
839
840 * mips.h (struct mips_opcode): added new field membership.
841
842Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
843
844 * i386.h (movd): only Reg32 is allowed.
845
846 * i386.h: add fcomp and ud2. From Wayne Scott
847 <wscott@ichips.intel.com>.
848
849Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
850
851 * i386.h: Add MMX instructions.
852
853Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
854
855 * i386.h: Remove W modifier from conditional move instructions.
856
857Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
858
859 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
860 with no arguments to match that generated by the UnixWare
861 assembler.
862
863Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
864
865 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
866 (cgen_parse_operand_fn): Declare.
867 (cgen_init_parse_operand): Declare.
868 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
869 new argument `want'.
870 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
871 (enum cgen_parse_operand_type): New enum.
872
873Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
874
875 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
876
877Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
878
879 * cgen.h: New file.
880
881Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
882
883 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
884 fdivrp.
885
886Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
887
888 * v850.h (extract): Make unsigned.
889
890Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
891
892 * i386.h: Add iclr.
893
894Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
895
896 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
897 take a direction bit.
898
899Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
900
901 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
902
903Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
904
905 * sparc.h: Include <ansidecl.h>. Update function declarations to
906 use prototypes, and to use const when appropriate.
907
908Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
909
910 * mn10300.h (MN10300_OPERAND_RELAX): Define.
911
912Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
913
914 * d10v.h: Change pre_defined_registers to
915 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
916
917Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
918
919 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
920 Change mips_opcodes from const array to a pointer,
921 and change bfd_mips_num_opcodes from const int to int,
922 so that we can increase the size of the mips opcodes table
923 dynamically.
924
925Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
926
927 * d30v.h (FLAG_X): Remove unused flag.
928
929Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
930
931 * d30v.h: New file.
932
933Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
934
935 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
936 (PDS_VALUE): Macro to access value field of predefined symbols.
937 (tic80_next_predefined_symbol): Add prototype.
938
939Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
940
941 * tic80.h (tic80_symbol_to_value): Change prototype to match
942 change in function, added class parameter.
943
944Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
945
946 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
947 endmask fields, which are somewhat weird in that 0 and 32 are
948 treated exactly the same.
949
950Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
951
952 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
953 rather than a constant that is 2**X. Reorder them to put bits for
954 operands that have symbolic names in the upper bits, so they can
955 be packed into an int where the lower bits contain the value that
956 corresponds to that symbolic name.
957 (predefined_symbo): Add struct.
958 (tic80_predefined_symbols): Declare array of translations.
959 (tic80_num_predefined_symbols): Declare size of that array.
960 (tic80_value_to_symbol): Declare function.
961 (tic80_symbol_to_value): Declare function.
962
963Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
964
965 * mn10200.h (MN10200_OPERAND_RELAX): Define.
966
967Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
968
969 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
970 be the destination register.
971
972Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
973
974 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
975 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
976 (TIC80_VECTOR): Define a flag bit for the flags. This one means
977 that the opcode can have two vector instructions in a single
978 32 bit word and we have to encode/decode both.
979
980Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
981
982 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
983 TIC80_OPERAND_RELATIVE for PC relative.
984 (TIC80_OPERAND_BASEREL): New flag bit for register
985 base relative.
986
987Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
988
989 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
990
991Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
992
993 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
994 ":s" modifier for scaling.
995
996Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
997
998 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
999 (TIC80_OPERAND_M_LI): Ditto
1000
1001Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1002
1003 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1004 (TIC80_OPERAND_CC): New define for condition code operand.
1005 (TIC80_OPERAND_CR): New define for control register operand.
1006
1007Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1008
1009 * tic80.h (struct tic80_opcode): Name changed.
1010 (struct tic80_opcode): Remove format field.
1011 (struct tic80_operand): Add insertion and extraction functions.
1012 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1013 correct ones.
1014 (FMT_*): Ditto.
1015
1016Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1017
1018 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1019 type IV instruction offsets.
1020
1021Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1022
1023 * tic80.h: New file.
1024
1025Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1026
1027 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1028
1029Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1030
1031 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1032 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1033 * v850.h: Fix comment, v850_operand not powerpc_operand.
1034
1035Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1036
1037 * mn10200.h: Flesh out structures and definitions needed by
1038 the mn10200 assembler & disassembler.
1039
1040Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1041
1042 * mips.h: Add mips16 definitions.
1043
1044Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1045
1046 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1047
1048Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1049
1050 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1051 (MN10300_OPERAND_MEMADDR): Define.
1052
1053Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1054
1055 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1056
1057Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1058
1059 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1060
1061Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1062
1063 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1064
1065Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1066
1067 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1068
1069Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1070
1071 * alpha.h: Don't include "bfd.h"; private relocation types are now
1072 negative to minimize problems with shared libraries. Organize
1073 instruction subsets by AMASK extensions and PALcode
1074 implementation.
1075 (struct alpha_operand): Move flags slot for better packing.
1076
1077Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1078
1079 * v850.h (V850_OPERAND_RELAX): New operand flag.
1080
1081Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1082
1083 * mn10300.h (FMT_*): Move operand format definitions
1084 here.
1085
1086Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1087
1088 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1089
1090Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1091
1092 * mn10300.h (mn10300_opcode): Add "format" field.
1093 (MN10300_OPERAND_*): Define.
1094
1095Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1096
1097 * mn10x00.h: Delete.
1098 * mn10200.h, mn10300.h: New files.
1099
1100Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1101
1102 * mn10x00.h: New file.
1103
1104Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1105
1106 * v850.h: Add new flag to indicate this instruction uses a PC
1107 displacement.
1108
1109Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1110
1111 * h8300.h (stmac): Add missing instruction.
1112
1113Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1114
1115 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1116 field.
1117
1118Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1119
1120 * v850.h (V850_OPERAND_EP): Define.
1121
1122 * v850.h (v850_opcode): Add size field.
1123
1124Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1125
1126 * v850.h (v850_operands): Add insert and extract fields, pointers
1127 to functions used to handle unusual operand encoding.
1128 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1129 V850_OPERAND_SIGNED): Defined.
1130
1131Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1132
1133 * v850.h (v850_operands): Add flags field.
1134 (OPERAND_REG, OPERAND_NUM): Defined.
1135
1136Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1137
1138 * v850.h: New file.
1139
1140Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1141
1142 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1143 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1144 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1145 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1146 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1147 Defined.
1148
1149Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1150
1151 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1152 a 3 bit space id instead of a 2 bit space id.
1153
1154Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1155
1156 * d10v.h: Add some additional defines to support the
1157 assembler in determining which operations can be done in parallel.
1158
1159Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1160
1161 * h8300.h (SN): Define.
1162 (eepmov.b): Renamed from "eepmov"
1163 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1164 with them.
1165
1166Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1167
1168 * d10v.h (OPERAND_SHIFT): New operand flag.
1169
1170Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1171
1172 * d10v.h: Changes for divs, parallel-only instructions, and
1173 signed numbers.
1174
1175Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1176
1177 * d10v.h (pd_reg): Define. Putting the definition here allows
1178 the assembler and disassembler to share the same struct.
1179
1180Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1181
1182 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1183 Williams <steve@icarus.com>.
1184
1185Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1186
1187 * d10v.h: New file.
1188
1189Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1190
1191 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1192
1193Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1194
1195 * m68k.h (mcf5200): New macro.
1196 Document names of coldfire control registers.
1197
1198Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1199
1200 * h8300.h (SRC_IN_DST): Define.
1201
1202 * h8300.h (UNOP3): Mark the register operand in this insn
1203 as a source operand, not a destination operand.
1204 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1205 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1206 register operand with SRC_IN_DST.
1207
1208Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1209
1210 * alpha.h: New file.
1211
1212Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1213
1214 * rs6k.h: Remove obsolete file.
1215
1216Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1217
1218 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1219 fdivp, and fdivrp. Add ffreep.
1220
1221Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1222
1223 * h8300.h: Reorder various #defines for readability.
1224 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1225 (BITOP): Accept additional (unused) argument. All callers changed.
1226 (EBITOP): Likewise.
1227 (O_LAST): Bump.
1228 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1229
1230 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1231 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1232 (BITOP, EBITOP): Handle new H8/S addressing modes for
1233 bit insns.
1234 (UNOP3): Handle new shift/rotate insns on the H8/S.
1235 (insns using exr): New instructions.
1236 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1237
1238Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1239
1240 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1241 was incorrect.
1242
1243Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1244
1245 * h8300.h (START): Remove.
1246 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1247 and mov.l insns that can be relaxed.
1248
1249Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1250
1251 * i386.h: Remove Abs32 from lcall.
1252
1253Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1254
1255 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1256 (SLCPOP): New macro.
1257 Mark X,Y opcode letters as in use.
1258
1259Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1260
1261 * sparc.h (F_FLOAT, F_FBR): Define.
1262
1263Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1264
1265 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1266 from all insns.
1267 (ABS8SRC,ABS8DST): Add ABS8MEM.
1268 (add.l): Fix reg+reg variant.
1269 (eepmov.w): Renamed from eepmovw.
1270 (ldc,stc): Fix many cases.
1271
1272Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1273
1274 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1275
1276Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1277
1278 * sparc.h (O): Mark operand letter as in use.
1279
1280Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1281
1282 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1283 Mark operand letters uU as in use.
1284
1285Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1286
1287 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1288 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1289 (SPARC_OPCODE_SUPPORTED): New macro.
1290 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1291 (F_NOTV9): Delete.
1292
1293Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1294
1295 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1296 declaration consistent with return type in definition.
1297
1298Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1299
1300 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1301
1302Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1303
1304 * i386.h (i386_regtab): Add 80486 test registers.
1305
1306Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1307
1308 * i960.h (I_HX): Define.
1309 (i960_opcodes): Add HX instruction.
1310
1311Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1312
1313 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1314 and fclex.
1315
1316Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1317
1318 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1319 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1320 (bfd_* defines): Delete.
1321 (sparc_opcode_archs): Replaces architecture_pname.
1322 (sparc_opcode_lookup_arch): Declare.
1323 (NUMOPCODES): Delete.
1324
1325Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1326
1327 * sparc.h (enum sparc_architecture): Add v9a.
1328 (ARCHITECTURES_CONFLICT_P): Update.
1329
1330Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1331
1332 * i386.h: Added Pentium Pro instructions.
1333
1334Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1335
1336 * m68k.h: Document new 'W' operand place.
1337
1338Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1339
1340 * hppa.h: Add lci and syncdma instructions.
1341
1342Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1343
1344 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1345 instructions.
1346
1347Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1348
1349 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1350 assembler's -mcom and -many switches.
1351
1352Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1353
1354 * i386.h: Fix cmpxchg8b extension opcode description.
1355
1356Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1357
1358 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1359 and register cr4.
1360
1361Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1362
1363 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1364
1365Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1366
1367 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1368
1369Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1370
1371 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1372
1373Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1374
1375 * m68kmri.h: Remove.
1376
1377 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1378 declarations. Remove F_ALIAS and flag field of struct
1379 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1380 int. Make name and args fields of struct m68k_opcode const.
1381
1382Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1383
1384 * sparc.h (F_NOTV9): Define.
1385
1386Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1387
1388 * mips.h (INSN_4010): Define.
1389
1390Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1391
1392 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1393
1394 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1395 * m68k.h: Fix argument descriptions of coprocessor
1396 instructions to allow only alterable operands where appropriate.
1397 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1398 (m68k_opcode_aliases): Add more aliases.
1399
1400Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1401
1402 * m68k.h: Added explcitly short-sized conditional branches, and a
1403 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1404 svr4-based configurations.
1405
1406Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1407
1408 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1409 * i386.h: added missing Data16/Data32 flags to a few instructions.
1410
1411Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1412
1413 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1414 (OP_MASK_BCC, OP_SH_BCC): Define.
1415 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1416 (OP_MASK_CCC, OP_SH_CCC): Define.
1417 (INSN_READ_FPR_R): Define.
1418 (INSN_RFE): Delete.
1419
1420Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1421
1422 * m68k.h (enum m68k_architecture): Deleted.
1423 (struct m68k_opcode_alias): New type.
1424 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1425 matching constraints, values and flags. As a side effect of this,
1426 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1427 as I know were never used, now may need re-examining.
1428 (numopcodes): Now const.
1429 (m68k_opcode_aliases, numaliases): New variables.
1430 (endop): Deleted.
1431 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1432 m68k_opcode_aliases; update declaration of m68k_opcodes.
1433
1434Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1435
1436 * hppa.h (delay_type): Delete unused enumeration.
1437 (pa_opcode): Replace unused delayed field with an architecture
1438 field.
1439 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1440
1441Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1442
1443 * mips.h (INSN_ISA4): Define.
1444
1445Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1446
1447 * mips.h (M_DLA_AB, M_DLI): Define.
1448
1449Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1450
1451 * hppa.h (fstwx): Fix single-bit error.
1452
1453Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1454
1455 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1456
1457Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1458
1459 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1460 debug registers. From Charles Hannum (mycroft@netbsd.org).
1461
1462Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1463
1464 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1465 i386 support:
1466 * i386.h (MOV_AX_DISP32): New macro.
1467 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1468 of several call/return instructions.
1469 (ADDR_PREFIX_OPCODE): New macro.
1470
1471Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1472
1473 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1474
1475 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1476 it pointer to const char;
1477 (struct vot, field `name'): ditto.
1478
1479Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1480
1481 * vax.h: Supply and properly group all values in end sentinel.
1482
1483Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1484
1485 * mips.h (INSN_ISA, INSN_4650): Define.
1486
1487Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1488
1489 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1490 systems with a separate instruction and data cache, such as the
1491 29040, these instructions take an optional argument.
1492
1493Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1494
1495 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1496 INSN_TRAP.
1497
1498Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1499
1500 * mips.h (INSN_STORE_MEMORY): Define.
1501
1502Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1503
1504 * sparc.h: Document new operand type 'x'.
1505
1506Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1507
1508 * i960.h (I_CX2): New instruction category. It includes
1509 instructions available on Cx and Jx processors.
1510 (I_JX): New instruction category, for JX-only instructions.
1511 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1512 Jx-only instructions, in I_JX category.
1513
1514Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1515
1516 * ns32k.h (endop): Made pointer const too.
1517
1518Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1519
1520 * ns32k.h: Drop Q operand type as there is no correct use
1521 for it. Add I and Z operand types which allow better checking.
1522
1523Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1524
1525 * h8300.h (xor.l) :fix bit pattern.
1526 (L_2): New size of operand.
1527 (trapa): Use it.
1528
1529Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1530
1531 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1532
1533Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1534
1535 * sparc.h: Include v9 definitions.
1536
1537Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1538
1539 * m68k.h (m68060): Defined.
1540 (m68040up, mfloat, mmmu): Include it.
1541 (struct m68k_opcode): Widen `arch' field.
1542 (m68k_opcodes): Updated for M68060. Removed comments that were
1543 instructions commented out by "JF" years ago.
1544
1545Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1546
1547 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1548 add a one-bit `flags' field.
1549 (F_ALIAS): New macro.
1550
1551Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1552
1553 * h8300.h (dec, inc): Get encoding right.
1554
1555Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1556
1557 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1558 a flag instead.
1559 (PPC_OPERAND_SIGNED): Define.
1560 (PPC_OPERAND_SIGNOPT): Define.
1561
1562Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1563
1564 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1565 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1566
1567Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1568
1569 * i386.h: Reverse last change. It'll be handled in gas instead.
1570
1571Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1572
1573 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1574 slower on the 486 and used the implicit shift count despite the
1575 explicit operand. The one-operand form is still available to get
1576 the shorter form with the implicit shift count.
1577
1578Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1579
1580 * hppa.h: Fix typo in fstws arg string.
1581
1582Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1583
1584 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1585
1586Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1587
1588 * ppc.h (PPC_OPCODE_601): Define.
1589
1590Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1591
1592 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1593 (so we can determine valid completers for both addb and addb[tf].)
1594
1595 * hppa.h (xmpyu): No floating point format specifier for the
1596 xmpyu instruction.
1597
1598Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1599
1600 * ppc.h (PPC_OPERAND_NEXT): Define.
1601 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1602 (struct powerpc_macro): Define.
1603 (powerpc_macros, powerpc_num_macros): Declare.
1604
1605Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1606
1607 * ppc.h: New file. Header file for PowerPC opcode table.
1608
1609Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1610
1611 * hppa.h: More minor template fixes for sfu and copr (to allow
1612 for easier disassembly).
1613
1614 * hppa.h: Fix templates for all the sfu and copr instructions.
1615
1616Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1617
1618 * i386.h (push): Permit Imm16 operand too.
1619
1620Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1621
1622 * h8300.h (andc): Exists in base arch.
1623
1624Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1625
1626 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1627 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1628
1629Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1630
1631 * hppa.h: Add FP quadword store instructions.
1632
1633Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1634
1635 * mips.h: (M_J_A): Added.
1636 (M_LA): Removed.
1637
1638Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1639
1640 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1641 <mellon@pepper.ncd.com>.
1642
1643Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1644
1645 * hppa.h: Immediate field in probei instructions is unsigned,
1646 not low-sign extended.
1647
1648Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1649
1650 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1651
1652Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1653
1654 * i386.h: Add "fxch" without operand.
1655
1656Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1657
1658 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1659
1660Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1661
1662 * hppa.h: Add gfw and gfr to the opcode table.
1663
1664Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1665
1666 * m88k.h: extended to handle m88110.
1667
1668Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1669
1670 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1671 addresses.
1672
1673Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1674
1675 * i960.h (i960_opcodes): Properly bracket initializers.
1676
1677Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1678
1679 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1680
1681Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1682
1683 * m68k.h (two): Protect second argument with parentheses.
1684
1685Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1686
1687 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1688 Deleted old in/out instructions in "#if 0" section.
1689
1690Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1691
1692 * i386.h (i386_optab): Properly bracket initializers.
1693
1694Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1695
1696 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1697 Jeff Law, law@cs.utah.edu).
1698
1699Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1700
1701 * i386.h (lcall): Accept Imm32 operand also.
1702
1703Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1704
1705 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1706 (M_DABS): Added.
1707
1708Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1709
1710 * mips.h (INSN_*): Changed values. Removed unused definitions.
1711 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1712 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1713 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1714 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1715 (M_*): Added new values for r6000 and r4000 macros.
1716 (ANY_DELAY): Removed.
1717
1718Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1719
1720 * mips.h: Added M_LI_S and M_LI_SS.
1721
1722Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1723
1724 * h8300.h: Get some rare mov.bs correct.
1725
1726Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1727
1728 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1729 been included.
1730
1731Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1732
1733 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1734 jump instructions, for use in disassemblers.
1735
1736Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1737
1738 * m88k.h: Make bitfields just unsigned, not unsigned long or
1739 unsigned short.
1740
1741Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1742
1743 * hppa.h: New argument type 'y'. Use in various float instructions.
1744
1745Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1746
1747 * hppa.h (break): First immediate field is unsigned.
1748
1749 * hppa.h: Add rfir instruction.
1750
1751Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1752
1753 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1754
1755Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1756
1757 * mips.h: Reworked the hazard information somewhat, and fixed some
1758 bugs in the instruction hazard descriptions.
1759
1760Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1761
1762 * m88k.h: Corrected a couple of opcodes.
1763
1764Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1765
1766 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1767 new version includes instruction hazard information, but is
1768 otherwise reasonably similar.
1769
1770Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1771
1772 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1773
1774Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1775
1776 Patches from Jeff Law, law@cs.utah.edu:
1777 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1778 Make the tables be the same for the following instructions:
1779 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1780 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1781 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1782 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1783 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1784 "fcmp", and "ftest".
1785
1786 * hppa.h: Make new and old tables the same for "break", "mtctl",
1787 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1788 Fix typo in last patch. Collapse several #ifdefs into a
1789 single #ifdef.
1790
1791 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1792 of the comments up-to-date.
1793
1794 * hppa.h: Update "free list" of letters and update
1795 comments describing each letter's function.
1796
1797Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1798
1799 * h8300.h: checkpoint, includes H8/300-H opcodes.
1800
1801Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1802
1803 * Patches from Jeffrey Law <law@cs.utah.edu>.
1804 * hppa.h: Rework single precision FP
1805 instructions so that they correctly disassemble code
1806 PA1.1 code.
1807
1808Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1809
1810 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1811 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1812
1813Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1814
1815 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1816 gdb will define it for now.
1817
1818Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1819
1820 * sparc.h: Don't end enumerator list with comma.
1821
1822Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1823
1824 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1825 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1826 ("bc2t"): Correct typo.
1827 ("[ls]wc[023]"): Use T rather than t.
1828 ("c[0123]"): Define general coprocessor instructions.
1829
1830Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1831
1832 * m68k.h: Move split point for gcc compilation more towards
1833 middle.
1834
1835Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1836
1837 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1838 simply wrong, ics, rfi, & rfsvc were missing).
1839 Add "a" to opr_ext for "bb". Doc fix.
1840
1841Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1842
1843 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1844 * mips.h: Add casts, to suppress warnings about shifting too much.
1845 * m68k.h: Document the placement code '9'.
1846
1847Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1848
1849 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1850 allows callers to break up the large initialized struct full of
1851 opcodes into two half-sized ones. This permits GCC to compile
1852 this module, since it takes exponential space for initializers.
1853 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1854
1855Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1856
1857 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1858 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1859 initialized structs in it.
1860
1861Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1862
1863 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1864 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1865 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1866
1867Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1868
1869 * mips.h: document "i" and "j" operands correctly.
1870
1871Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1872
1873 * mips.h: Removed endianness dependency.
1874
1875Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1876
1877 * h8300.h: include info on number of cycles per instruction.
1878
1879Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1880
1881 * hppa.h: Move handy aliases to the front. Fix masks for extract
1882 and deposit instructions.
1883
1884Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1885
1886 * i386.h: accept shld and shrd both with and without the shift
1887 count argument, which is always %cl.
1888
1889Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1890
1891 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1892 (one_byte_segment_defaults, two_byte_segment_defaults,
1893 i386_prefixtab_end): Ditto.
1894
1895Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1896
1897 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1898 for operand 2; from John Carr, jfc@dsg.dec.com.
1899
1900Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1901
1902 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1903 always use 16-bit offsets. Makes calculated-size jump tables
1904 feasible.
1905
1906Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1907
1908 * i386.h: Fix one-operand forms of in* and out* patterns.
1909
1910Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1911
1912 * m68k.h: Added CPU32 support.
1913
1914Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1915
1916 * mips.h (break): Disassemble the argument. Patch from
1917 jonathan@cs.stanford.edu (Jonathan Stone).
1918
1919Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1920
1921 * m68k.h: merged Motorola and MIT syntax.
1922
1923Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1924
1925 * m68k.h (pmove): make the tests less strict, the 68k book is
1926 wrong.
1927
1928Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1929
1930 * m68k.h (m68ec030): Defined as alias for 68030.
1931 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1932 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1933 them. Tightened description of "fmovex" to distinguish it from
1934 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1935 up descriptions that claimed versions were available for chips not
1936 supporting them. Added "pmovefd".
1937
1938Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1939
1940 * m68k.h: fix where the . goes in divull
1941
1942Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1943
1944 * m68k.h: the cas2 instruction is supposed to be written with
1945 indirection on the last two operands, which can be either data or
1946 address registers. Added a new operand type 'r' which accepts
1947 either register type. Added new cases for cas2l and cas2w which
1948 use them. Corrected masks for cas2 which failed to recognize use
1949 of address register.
1950
1951Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1952
1953 * m68k.h: Merged in patches (mostly m68040-specific) from
1954 Colin Smith <colin@wrs.com>.
1955
1956 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1957 base). Also cleaned up duplicates, re-ordered instructions for
1958 the sake of dis-assembling (so aliases come after standard names).
1959 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1960
1961Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1962
1963 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1964 all missing .s
1965
1966Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1967
1968 * sparc.h: Moved tables to BFD library.
1969
1970 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1971
1972Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1973
1974 * h8300.h: Finish filling in all the holes in the opcode table,
1975 so that the Lucid C compiler can digest this as well...
1976
1977Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1978
1979 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1980 Fix opcodes on various sizes of fild/fist instructions
1981 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1982 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1983
1984Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1985
1986 * h8300.h: Fill in all the holes in the opcode table so that the
1987 losing HPUX C compiler can digest this...
1988
1989Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1990
1991 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1992 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1993
1994Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1995
1996 * sparc.h: Add new architecture variant sparclite; add its scan
1997 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1998
1999Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2000
2001 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2002 fy@lucid.com).
2003
2004Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2005
2006 * rs6k.h: New version from IBM (Metin).
2007
2008Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2009
2010 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2011 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2012
2013Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2014
2015 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2016
2017Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2018
2019 * m68k.h (one, two): Cast macro args to unsigned to suppress
2020 complaints from compiler and lint about integer overflow during
2021 shift.
2022
2023Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2024
2025 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2026
2027Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2028
2029 * mips.h: Make bitfield layout depend on the HOST compiler,
2030 not on the TARGET system.
2031
2032Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2033
2034 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2035 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2036 <TRANLE@INTELLICORP.COM>.
2037
2038Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2039
2040 * h8300.h: turned op_type enum into #define list
2041
2042Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2043
2044 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2045 similar instructions -- they've been renamed to "fitoq", etc.
2046 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2047 number of arguments.
2048 * h8300.h: Remove extra ; which produces compiler warning.
2049
2050Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2051
2052 * sparc.h: fix opcode for tsubcctv.
2053
2054Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2055
2056 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2057
2058Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2059
2060 * sparc.h (nop): Made the 'lose' field be even tighter,
2061 so only a standard 'nop' is disassembled as a nop.
2062
2063Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2064
2065 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2066 disassembled as a nop.
2067
2068Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2069
2070 * sparc.h: fix a typo.
2071
2072Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2073
2074 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2075 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2076 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2077
2078\f
2079Local Variables:
2080version-control: never
2081End:
GDB Binutils - Deliverables
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