* hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
c36efdd2
JL
1Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
2
c49ec3da
JL
3 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
4
5d2e7ecc
JL
5 * hppa.h (pa_opcodes): Add long offset double word load/store
6 instructions.
7
6397d1a2
JL
8 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
9 stores.
10
142f0fe0
JL
11 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
12
f5a68b45
JL
13 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
14
8235801e
JL
15 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
16
35184366
JL
17 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
18
f0bfde5e
JL
19 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
20
27bbbb58
JL
21 * hppa.h (pa_opcodes): Add support for "b,l".
22
c36efdd2
JL
23 * hppa.h (pa_opcodes): Add support for "b,gate".
24
f2727d04
JL
25Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
26
9392fb11
JL
27 * hppa.h (pa_opcodes): Use 'fX' for first register operand
28 in xmpyu.
29
e0c52e99
JL
30 * hppa.h (pa_opcodes): Fix mask for probe and probei.
31
f2727d04
JL
32 * hppa.h (pa_opcodes): Fix mask for depwi.
33
52d836e2
JL
34Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
35
36 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
37 an explicit output argument.
38
90765e3a
JL
39Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
40
41 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
42 Add a few PA2.0 loads and store variants.
43
8340b17f
ILT
441999-09-04 Steve Chamberlain <sac@pobox.com>
45
46 * pj.h: New file.
47
5f47d35b
AM
481999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
49
50 * i386.h (i386_regtab): Move %st to top of table, and split off
51 other fp reg entries.
52 (i386_float_regtab): To here.
53
1c143202
JL
54Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
55
7d8fdb64
JL
56 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
57 by 'f'.
58
90927b9c
JL
59 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
60 Add supporting args.
61
1d16bf9c
JL
62 * hppa.h: Document new completers and args.
63 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
64 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
65 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
66 pmenb and pmdis.
67
96226a68
JL
68 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
69 hshr, hsub, mixh, mixw, permh.
70
5d4ba527
JL
71 * hppa.h (pa_opcodes): Change completers in instructions to
72 use 'c' prefix.
73
e9fc28c6
JL
74 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
75 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
76
1c143202
JL
77 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
78 fnegabs to use 'I' instead of 'F'.
79
9e525108
AM
801999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
81
82 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
83 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
84 Alphabetically sort PIII insns.
85
e8da1bf1
DE
86Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
87
88 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
89
7d627258
JL
90Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
91
5696871a
JL
92 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
93 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
94
7d627258
JL
95 * hppa.h: Document 64 bit condition completers.
96
c5e52916
JL
97Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
98
99 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
100
eecb386c
AM
1011999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
102
103 * i386.h (i386_optab): Add DefaultSize modifier to all insns
104 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
105 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
106
88a380f3
JL
107Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
108 Jeff Law <law@cygnus.com>
109
110 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
111
112 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
113
114 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
115 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
116
145cf1f0
AM
1171999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
118
119 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
120
73826640
JL
121Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
122
123 * hppa.h (struct pa_opcode): Add new field "flags".
124 (FLAGS_STRICT): Define.
125
b65db252
JL
126Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
127 Jeff Law <law@cygnus.com>
128
f7fc668b
JL
129 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
130
131 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 132
10084519
AM
1331999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
134
135 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
136 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
137 flag to fcomi and friends.
138
cd8a80ba
JL
139Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
140
141 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
142 integer logical instructions.
143
1fca749b
ILT
1441999-05-28 Linus Nordberg <linus.nordberg@canit.se>
145
146 * m68k.h: Document new formats `E', `G', `H' and new places `N',
147 `n', `o'.
148
149 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
150 and new places `m', `M', `h'.
151
aa008907
JL
152Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
153
154 * hppa.h (pa_opcodes): Add several processor specific system
155 instructions.
156
e26b85f0
JL
157Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
158
159 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
160 "addb", and "addib" to be used by the disassembler.
161
c608c12e
AM
1621999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
163
164 * i386.h (ReverseModrm): Remove all occurences.
165 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
166 movmskps, pextrw, pmovmskb, maskmovq.
167 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
168 ignore the data size prefix.
169
170 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
171 Mostly stolen from Doug Ledford <dledford@redhat.com>
172
45c18104
RH
173Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
174
175 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
176
252b5132
RH
1771999-04-14 Doug Evans <devans@casey.cygnus.com>
178
179 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
180 (CGEN_ATTR_TYPE): Update.
181 (CGEN_ATTR_MASK): Number booleans starting at 0.
182 (CGEN_ATTR_VALUE): Update.
183 (CGEN_INSN_ATTR): Update.
184
185Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
186
187 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
188 instructions.
189
190Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
191
192 * hppa.h (bb, bvb): Tweak opcode/mask.
193
194
1951999-03-22 Doug Evans <devans@casey.cygnus.com>
196
197 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
198 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
199 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
200 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
201 Delete member max_insn_size.
202 (enum cgen_cpu_open_arg): New enum.
203 (cpu_open): Update prototype.
204 (cpu_open_1): Declare.
205 (cgen_set_cpu): Delete.
206
2071999-03-11 Doug Evans <devans@casey.cygnus.com>
208
209 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
210 (CGEN_OPERAND_NIL): New macro.
211 (CGEN_OPERAND): New member `type'.
212 (@arch@_cgen_operand_table): Delete decl.
213 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
214 (CGEN_OPERAND_TABLE): New struct.
215 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
216 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
217 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
218 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
219 {get,set}_{int,vma}_operand.
220 (@arch@_cgen_cpu_open): New arg `isa'.
221 (cgen_set_cpu): Ditto.
222
223Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
224
225 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
226
2271999-02-25 Doug Evans <devans@casey.cygnus.com>
228
229 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
230 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
231 enum cgen_hw_type.
232 (CGEN_HW_TABLE): New struct.
233 (hw_table): Delete declaration.
234 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
235 to table entry to enum.
236 (CGEN_OPINST): Ditto.
237 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
238
239Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
240
241 * alpha.h (AXP_OPCODE_EV6): New.
242 (AXP_OPCODE_NOPAL): Include it.
243
2441999-02-09 Doug Evans <devans@casey.cygnus.com>
245
246 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
247 All uses updated. New members int_insn_p, max_insn_size,
248 parse_operand,insert_operand,extract_operand,print_operand,
249 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
250 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
251 extract_handlers,print_handlers.
252 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
253 (CGEN_ATTR_BOOL_OFFSET): New macro.
254 (CGEN_ATTR_MASK): Subtract it to compute bit number.
255 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
256 (cgen_opcode_handler): Renamed from cgen_base.
257 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
258 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
259 all uses updated.
260 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
261 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
262 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
263 (CGEN_OPCODE,CGEN_IBASE): New types.
264 (CGEN_INSN): Rewrite.
265 (CGEN_{ASM,DIS}_HASH*): Delete.
266 (init_opcode_table,init_ibld_table): Declare.
267 (CGEN_INSN_ATTR): New type.
268
269Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
270
271 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
272 (x_FP, d_FP, dls_FP, sldx_FP): Define.
273 Change *Suf definitions to include x and d suffixes.
274 (movsx): Use w_Suf and b_Suf.
275 (movzx): Likewise.
276 (movs): Use bwld_Suf.
277 (fld): Change ordering. Use sld_FP.
278 (fild): Add Intel Syntax equivalent of fildq.
279 (fst): Use sld_FP.
280 (fist): Use sld_FP.
281 (fstp): Use sld_FP. Add x_FP version.
282 (fistp): LLongMem version for Intel Syntax.
283 (fcom, fcomp): Use sld_FP.
284 (fadd, fiadd, fsub): Use sld_FP.
285 (fsubr): Use sld_FP.
286 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
287
2881999-01-27 Doug Evans <devans@casey.cygnus.com>
289
290 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
291 CGEN_MODE_UINT.
292
293Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
294
295 * hppa.h (bv): Fix mask.
296
2971999-01-05 Doug Evans <devans@casey.cygnus.com>
298
299 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
300 (CGEN_ATTR): Use it.
301 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
302 (CGEN_ATTR_TABLE): New member dfault.
303
3041998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
305
306 * mips.h (MIPS16_INSN_BRANCH): New.
307
308Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
309
310 The following is part of a change made by Edith Epstein
311 <eepstein@sophia.cygnus.com> as part of a project to merge in
312 changes by HP; HP did not create ChangeLog entries.
313
314 * hppa.h (completer_chars): list of chars to not put a space
315 after.
316
317Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
318
319 * i386.h (i386_optab): Permit w suffix on processor control and
320 status word instructions.
321
3221998-11-30 Doug Evans <devans@casey.cygnus.com>
323
324 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
325 (struct cgen_keyword_entry): Ditto.
326 (struct cgen_operand): Ditto.
327 (CGEN_IFLD): New typedef, with associated access macros.
328 (CGEN_IFMT): New typedef, with associated access macros.
329 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
330 (CGEN_IVALUE): New typedef.
331 (struct cgen_insn): Delete const on syntax,attrs members.
332 `format' now points to format data. Type of `value' is now
333 CGEN_IVALUE.
334 (struct cgen_opcode_table): New member ifld_table.
335
3361998-11-18 Doug Evans <devans@casey.cygnus.com>
337
338 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
339 (CGEN_OPERAND_INSTANCE): New member `attrs'.
340 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
341 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
342 (cgen_opcode_table): Update type of dis_hash fn.
343 (extract_operand): Update type of `insn_value' arg.
344
345Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
346
347 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
348
349Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
350
351 * mips.h (INSN_MULT): Added.
352
353Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
354
355 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
356
357Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
358
359 * cgen.h (CGEN_INSN_INT): New typedef.
360 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
361 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
362 (CGEN_INSN_BYTES_PTR): New typedef.
363 (CGEN_EXTRACT_INFO): New typedef.
364 (cgen_insert_fn,cgen_extract_fn): Update.
365 (cgen_opcode_table): New member `insn_endian'.
366 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
367 (insert_operand,extract_operand): Update.
368 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
369
370Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
371
372 * cgen.h (CGEN_ATTR_BOOLS): New macro.
373 (struct CGEN_HW_ENTRY): New member `attrs'.
374 (CGEN_HW_ATTR): New macro.
375 (struct CGEN_OPERAND_INSTANCE): New member `name'.
376 (CGEN_INSN_INVALID_P): New macro.
377
378Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
379
380 * hppa.h: Add "fid".
381
382Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
383
384 From Robert Andrew Dale <rob@nb.net>
385 * i386.h (i386_optab): Add AMD 3DNow! instructions.
386 (AMD_3DNOW_OPCODE): Define.
387
388Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
389
390 * d30v.h (EITHER_BUT_PREFER_MU): Define.
391
392Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
393
394 * cgen.h (cgen_insn): #if 0 out element `cdx'.
395
396Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
397
398 Move all global state data into opcode table struct, and treat
399 opcode table as something that is "opened/closed".
400 * cgen.h (CGEN_OPCODE_DESC): New type.
401 (all fns): New first arg of opcode table descriptor.
402 (cgen_set_parse_operand_fn): Add prototype.
403 (cgen_current_machine,cgen_current_endian): Delete.
404 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
405 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
406 dis_hash_table,dis_hash_table_entries.
407 (opcode_open,opcode_close): Add prototypes.
408
409 * cgen.h (cgen_insn): New element `cdx'.
410
411Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
412
413 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
414
415Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
416
417 * mn10300.h: Add "no_match_operands" field for instructions.
418 (MN10300_MAX_OPERANDS): Define.
419
420Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
421
422 * cgen.h (cgen_macro_insn_count): Declare.
423
424Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
425
426 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
427 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
428 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
429 set_{int,vma}_operand.
430
431Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
432
433 * mn10300.h: Add "machine" field for instructions.
434 (MN103, AM30): Define machine types.
435
436Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
437
438 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
439
4401998-06-18 Ulrich Drepper <drepper@cygnus.com>
441
442 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
443
444Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
445
446 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
447 and ud2b.
448 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
449 those that happen to be implemented on pentiums.
450
451Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
452
453 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
454 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
455 with Size16|IgnoreSize or Size32|IgnoreSize.
456
457Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
458
459 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
460 (REPE): Rename to REPE_PREFIX_OPCODE.
461 (i386_regtab_end): Remove.
462 (i386_prefixtab, i386_prefixtab_end): Remove.
463 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
464 of md_begin.
465 (MAX_OPCODE_SIZE): Define.
466 (i386_optab_end): Remove.
467 (sl_Suf): Define.
468 (sl_FP): Use sl_Suf.
469
470 * i386.h (i386_optab): Allow 16 bit displacement for `mov
471 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
472 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
473 data32, dword, and adword prefixes.
474 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
475 regs.
476
477Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
478
479 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
480
481 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
482 register operands, because this is a common idiom. Flag them with
483 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
484 fdivrp because gcc erroneously generates them. Also flag with a
485 warning.
486
487 * i386.h: Add suffix modifiers to most insns, and tighter operand
488 checks in some cases. Fix a number of UnixWare compatibility
489 issues with float insns. Merge some floating point opcodes, using
490 new FloatMF modifier.
491 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
492 consistency.
493
494 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
495 IgnoreDataSize where appropriate.
496
497Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
498
499 * i386.h: (one_byte_segment_defaults): Remove.
500 (two_byte_segment_defaults): Remove.
501 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
502
503Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
504
505 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
506 (cgen_hw_lookup_by_num): Declare.
507
508Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
509
510 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
511 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
512
513Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
514
515 * cgen.h (cgen_asm_init_parse): Delete.
516 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
517 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
518
519Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
520
521 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
522 (cgen_asm_finish_insn): Update prototype.
523 (cgen_insn): New members num, data.
524 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
525 dis_hash, dis_hash_table_size moved to ...
526 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
527 All uses updated. New members asm_hash_p, dis_hash_p.
528 (CGEN_MINSN_EXPANSION): New struct.
529 (cgen_expand_macro_insn): Declare.
530 (cgen_macro_insn_count): Declare.
531 (get_insn_operands): Update prototype.
532 (lookup_get_insn_operands): Declare.
533
534Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
535
536 * i386.h (i386_optab): Change iclrKludge and imulKludge to
537 regKludge. Add operands types for string instructions.
538
539Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
540
541 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
542 table.
543
544Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
545
546 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
547 for `gettext'.
548
549Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
550
551 * i386.h: Remove NoModrm flag from all insns: it's never checked.
552 Add IsString flag to string instructions.
553 (IS_STRING): Don't define.
554 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
555 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
556 (SS_PREFIX_OPCODE): Define.
557
558Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
559
560 * i386.h: Revert March 24 patch; no more LinearAddress.
561
562Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
563
564 * i386.h (i386_optab): Remove fwait (9b) from all floating point
565 instructions, and instead add FWait opcode modifier. Add short
566 form of fldenv and fstenv.
567 (FWAIT_OPCODE): Define.
568
569 * i386.h (i386_optab): Change second operand constraint of `mov
570 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
571 allow legal instructions such as `movl %gs,%esi'
572
573Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
574
575 * h8300.h: Various changes to fully bracket initializers.
576
577Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
578
579 * i386.h: Set LinearAddress for lidt and lgdt.
580
581Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
582
583 * cgen.h (CGEN_BOOL_ATTR): New macro.
584
585Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
586
587 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
588
589Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
590
591 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
592 (cgen_insn): Record syntax and format entries here, rather than
593 separately.
594
595Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
596
597 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
598
599Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
600
601 * cgen.h (cgen_insert_fn): Change type of result to const char *.
602 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
603 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
604
605Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
606
607 * cgen.h (lookup_insn): New argument alias_p.
608
609Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
610
611Fix rac to accept only a0:
612 * d10v.h (OPERAND_ACC): Split into:
613 (OPERAND_ACC0, OPERAND_ACC1) .
614 (OPERAND_GPR): Define.
615
616Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
617
618 * cgen.h (CGEN_FIELDS): Define here.
619 (CGEN_HW_ENTRY): New member `type'.
620 (hw_list): Delete decl.
621 (enum cgen_mode): Declare.
622 (CGEN_OPERAND): New member `hw'.
623 (enum cgen_operand_instance_type): Declare.
624 (CGEN_OPERAND_INSTANCE): New type.
625 (CGEN_INSN): New member `operands'.
626 (CGEN_OPCODE_DATA): Make hw_list const.
627 (get_insn_operands,lookup_insn): Add prototypes for.
628
629Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
630
631 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
632 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
633 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
634 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
635
636Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
637
638 * cgen.h: Correct typo in comment end marker.
639
640Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
641
642 * tic30.h: New file.
643
644Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
645
646 * cgen.h: Add prototypes for cgen_save_fixups(),
647 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
648 of cgen_asm_finish_insn() to return a char *.
649
650Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
651
652 * cgen.h: Formatting changes to improve readability.
653
654Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
655
656 * cgen.h (*): Clean up pass over `struct foo' usage.
657 (CGEN_ATTR): Make unsigned char.
658 (CGEN_ATTR_TYPE): Update.
659 (CGEN_ATTR_{ENTRY,TABLE}): New types.
660 (cgen_base): Move member `attrs' to cgen_insn.
661 (CGEN_KEYWORD): New member `null_entry'.
662 (CGEN_{SYNTAX,FORMAT}): New types.
663 (cgen_insn): Format and syntax separated from each other.
664
665Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
666
667 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
668 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
669 flags_{used,set} long.
670 (d30v_operand): Make flags field long.
671
672Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
673
674 * m68k.h: Fix comment describing operand types.
675
676Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
677
678 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
679 everything else after down.
680
681Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
682
683 * d10v.h (OPERAND_FLAG): Split into:
684 (OPERAND_FFLAG, OPERAND_CFLAG) .
685
686Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
687
688 * mips.h (struct mips_opcode): Changed comments to reflect new
689 field usage.
690
691Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
692
693 * mips.h: Added to comments a quick-ref list of all assigned
694 operand type characters.
695 (OP_{MASK,SH}_PERFREG): New macros.
696
697Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
698
699 * sparc.h: Add '_' and '/' for v9a asr's.
700 Patch from David Miller <davem@vger.rutgers.edu>
701
702Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
703
704 * h8300.h: Bit ops with absolute addresses not in the 8 bit
705 area are not available in the base model (H8/300).
706
707Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
708
709 * m68k.h: Remove documentation of ` operand specifier.
710
711Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
712
713 * m68k.h: Document q and v operand specifiers.
714
715Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
716
717 * v850.h (struct v850_opcode): Add processors field.
718 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
719 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
720 (PROCESSOR_V850EA): New bit constants.
721
722Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
723
724 Merge changes from Martin Hunt:
725
726 * d30v.h: Allow up to 64 control registers. Add
727 SHORT_A5S format.
728
729 * d30v.h (LONG_Db): New form for delayed branches.
730
731 * d30v.h: (LONG_Db): New form for repeati.
732
733 * d30v.h (SHORT_D2B): New form.
734
735 * d30v.h (SHORT_A2): New form.
736
737 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
738 registers are used. Needed for VLIW optimization.
739
740Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
741
742 * cgen.h: Move assembler interface section
743 up so cgen_parse_operand_result is defined for cgen_parse_address.
744 (cgen_parse_address): Update prototype.
745
746Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
747
748 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
749
750Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
751
752 * i386.h (two_byte_segment_defaults): Correct base register 5 in
753 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
754 <paubert@iram.es>.
755
756 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
757 <paubert@iram.es>.
758
759 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
760 <paubert@iram.es>.
761
762 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
763 (JUMP_ON_ECX_ZERO): Remove commented out macro.
764
765Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
766
767 * v850.h (V850_NOT_R0): New flag.
768
769Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
770
771 * v850.h (struct v850_opcode): Remove flags field.
772
773Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
774
775 * v850.h (struct v850_opcode): Add flags field.
776 (struct v850_operand): Extend meaning of 'bits' and 'shift'
777 fields.
778 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
779 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
780
781Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
782
783 * arc.h: New file.
784
785Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
786
787 * sparc.h (sparc_opcodes): Declare as const.
788
789Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
790
791 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
792 uses single or double precision floating point resources.
793 (INSN_NO_ISA, INSN_ISA1): Define.
794 (cpu specific INSN macros): Tweak into bitmasks outside the range
795 of INSN_ISA field.
796
797Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
798
799 * i386.h: Fix pand opcode.
800
801Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
802
803 * mips.h: Widen INSN_ISA and move it to a more convenient
804 bit position. Add INSN_3900.
805
806Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
807
808 * mips.h (struct mips_opcode): added new field membership.
809
810Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
811
812 * i386.h (movd): only Reg32 is allowed.
813
814 * i386.h: add fcomp and ud2. From Wayne Scott
815 <wscott@ichips.intel.com>.
816
817Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
818
819 * i386.h: Add MMX instructions.
820
821Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
822
823 * i386.h: Remove W modifier from conditional move instructions.
824
825Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
826
827 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
828 with no arguments to match that generated by the UnixWare
829 assembler.
830
831Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
832
833 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
834 (cgen_parse_operand_fn): Declare.
835 (cgen_init_parse_operand): Declare.
836 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
837 new argument `want'.
838 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
839 (enum cgen_parse_operand_type): New enum.
840
841Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
842
843 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
844
845Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
846
847 * cgen.h: New file.
848
849Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
850
851 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
852 fdivrp.
853
854Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
855
856 * v850.h (extract): Make unsigned.
857
858Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
859
860 * i386.h: Add iclr.
861
862Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
863
864 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
865 take a direction bit.
866
867Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
868
869 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
870
871Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
872
873 * sparc.h: Include <ansidecl.h>. Update function declarations to
874 use prototypes, and to use const when appropriate.
875
876Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
877
878 * mn10300.h (MN10300_OPERAND_RELAX): Define.
879
880Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
881
882 * d10v.h: Change pre_defined_registers to
883 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
884
885Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
886
887 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
888 Change mips_opcodes from const array to a pointer,
889 and change bfd_mips_num_opcodes from const int to int,
890 so that we can increase the size of the mips opcodes table
891 dynamically.
892
893Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
894
895 * d30v.h (FLAG_X): Remove unused flag.
896
897Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
898
899 * d30v.h: New file.
900
901Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
902
903 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
904 (PDS_VALUE): Macro to access value field of predefined symbols.
905 (tic80_next_predefined_symbol): Add prototype.
906
907Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
908
909 * tic80.h (tic80_symbol_to_value): Change prototype to match
910 change in function, added class parameter.
911
912Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
913
914 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
915 endmask fields, which are somewhat weird in that 0 and 32 are
916 treated exactly the same.
917
918Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
919
920 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
921 rather than a constant that is 2**X. Reorder them to put bits for
922 operands that have symbolic names in the upper bits, so they can
923 be packed into an int where the lower bits contain the value that
924 corresponds to that symbolic name.
925 (predefined_symbo): Add struct.
926 (tic80_predefined_symbols): Declare array of translations.
927 (tic80_num_predefined_symbols): Declare size of that array.
928 (tic80_value_to_symbol): Declare function.
929 (tic80_symbol_to_value): Declare function.
930
931Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
932
933 * mn10200.h (MN10200_OPERAND_RELAX): Define.
934
935Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
936
937 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
938 be the destination register.
939
940Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
941
942 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
943 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
944 (TIC80_VECTOR): Define a flag bit for the flags. This one means
945 that the opcode can have two vector instructions in a single
946 32 bit word and we have to encode/decode both.
947
948Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
949
950 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
951 TIC80_OPERAND_RELATIVE for PC relative.
952 (TIC80_OPERAND_BASEREL): New flag bit for register
953 base relative.
954
955Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
956
957 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
958
959Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
960
961 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
962 ":s" modifier for scaling.
963
964Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
965
966 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
967 (TIC80_OPERAND_M_LI): Ditto
968
969Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
970
971 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
972 (TIC80_OPERAND_CC): New define for condition code operand.
973 (TIC80_OPERAND_CR): New define for control register operand.
974
975Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
976
977 * tic80.h (struct tic80_opcode): Name changed.
978 (struct tic80_opcode): Remove format field.
979 (struct tic80_operand): Add insertion and extraction functions.
980 (TIC80_OPERAND_*): Remove old bogus values, start adding new
981 correct ones.
982 (FMT_*): Ditto.
983
984Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
985
986 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
987 type IV instruction offsets.
988
989Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
990
991 * tic80.h: New file.
992
993Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
994
995 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
996
997Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
998
999 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1000 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1001 * v850.h: Fix comment, v850_operand not powerpc_operand.
1002
1003Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1004
1005 * mn10200.h: Flesh out structures and definitions needed by
1006 the mn10200 assembler & disassembler.
1007
1008Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1009
1010 * mips.h: Add mips16 definitions.
1011
1012Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1013
1014 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1015
1016Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1017
1018 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1019 (MN10300_OPERAND_MEMADDR): Define.
1020
1021Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1022
1023 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1024
1025Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1026
1027 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1028
1029Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1030
1031 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1032
1033Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1034
1035 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1036
1037Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1038
1039 * alpha.h: Don't include "bfd.h"; private relocation types are now
1040 negative to minimize problems with shared libraries. Organize
1041 instruction subsets by AMASK extensions and PALcode
1042 implementation.
1043 (struct alpha_operand): Move flags slot for better packing.
1044
1045Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1046
1047 * v850.h (V850_OPERAND_RELAX): New operand flag.
1048
1049Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1050
1051 * mn10300.h (FMT_*): Move operand format definitions
1052 here.
1053
1054Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1055
1056 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1057
1058Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1059
1060 * mn10300.h (mn10300_opcode): Add "format" field.
1061 (MN10300_OPERAND_*): Define.
1062
1063Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1064
1065 * mn10x00.h: Delete.
1066 * mn10200.h, mn10300.h: New files.
1067
1068Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1069
1070 * mn10x00.h: New file.
1071
1072Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1073
1074 * v850.h: Add new flag to indicate this instruction uses a PC
1075 displacement.
1076
1077Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1078
1079 * h8300.h (stmac): Add missing instruction.
1080
1081Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1082
1083 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1084 field.
1085
1086Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1087
1088 * v850.h (V850_OPERAND_EP): Define.
1089
1090 * v850.h (v850_opcode): Add size field.
1091
1092Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1093
1094 * v850.h (v850_operands): Add insert and extract fields, pointers
1095 to functions used to handle unusual operand encoding.
1096 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1097 V850_OPERAND_SIGNED): Defined.
1098
1099Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1100
1101 * v850.h (v850_operands): Add flags field.
1102 (OPERAND_REG, OPERAND_NUM): Defined.
1103
1104Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1105
1106 * v850.h: New file.
1107
1108Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1109
1110 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1111 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1112 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1113 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1114 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1115 Defined.
1116
1117Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1118
1119 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1120 a 3 bit space id instead of a 2 bit space id.
1121
1122Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1123
1124 * d10v.h: Add some additional defines to support the
1125 assembler in determining which operations can be done in parallel.
1126
1127Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1128
1129 * h8300.h (SN): Define.
1130 (eepmov.b): Renamed from "eepmov"
1131 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1132 with them.
1133
1134Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1135
1136 * d10v.h (OPERAND_SHIFT): New operand flag.
1137
1138Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1139
1140 * d10v.h: Changes for divs, parallel-only instructions, and
1141 signed numbers.
1142
1143Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1144
1145 * d10v.h (pd_reg): Define. Putting the definition here allows
1146 the assembler and disassembler to share the same struct.
1147
1148Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1149
1150 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1151 Williams <steve@icarus.com>.
1152
1153Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1154
1155 * d10v.h: New file.
1156
1157Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1158
1159 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1160
1161Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1162
1163 * m68k.h (mcf5200): New macro.
1164 Document names of coldfire control registers.
1165
1166Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1167
1168 * h8300.h (SRC_IN_DST): Define.
1169
1170 * h8300.h (UNOP3): Mark the register operand in this insn
1171 as a source operand, not a destination operand.
1172 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1173 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1174 register operand with SRC_IN_DST.
1175
1176Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1177
1178 * alpha.h: New file.
1179
1180Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1181
1182 * rs6k.h: Remove obsolete file.
1183
1184Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1185
1186 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1187 fdivp, and fdivrp. Add ffreep.
1188
1189Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1190
1191 * h8300.h: Reorder various #defines for readability.
1192 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1193 (BITOP): Accept additional (unused) argument. All callers changed.
1194 (EBITOP): Likewise.
1195 (O_LAST): Bump.
1196 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1197
1198 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1199 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1200 (BITOP, EBITOP): Handle new H8/S addressing modes for
1201 bit insns.
1202 (UNOP3): Handle new shift/rotate insns on the H8/S.
1203 (insns using exr): New instructions.
1204 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1205
1206Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1207
1208 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1209 was incorrect.
1210
1211Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1212
1213 * h8300.h (START): Remove.
1214 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1215 and mov.l insns that can be relaxed.
1216
1217Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1218
1219 * i386.h: Remove Abs32 from lcall.
1220
1221Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1222
1223 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1224 (SLCPOP): New macro.
1225 Mark X,Y opcode letters as in use.
1226
1227Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1228
1229 * sparc.h (F_FLOAT, F_FBR): Define.
1230
1231Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1232
1233 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1234 from all insns.
1235 (ABS8SRC,ABS8DST): Add ABS8MEM.
1236 (add.l): Fix reg+reg variant.
1237 (eepmov.w): Renamed from eepmovw.
1238 (ldc,stc): Fix many cases.
1239
1240Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1241
1242 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1243
1244Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1245
1246 * sparc.h (O): Mark operand letter as in use.
1247
1248Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1249
1250 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1251 Mark operand letters uU as in use.
1252
1253Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1254
1255 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1256 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1257 (SPARC_OPCODE_SUPPORTED): New macro.
1258 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1259 (F_NOTV9): Delete.
1260
1261Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1262
1263 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1264 declaration consistent with return type in definition.
1265
1266Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1267
1268 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1269
1270Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1271
1272 * i386.h (i386_regtab): Add 80486 test registers.
1273
1274Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1275
1276 * i960.h (I_HX): Define.
1277 (i960_opcodes): Add HX instruction.
1278
1279Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1280
1281 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1282 and fclex.
1283
1284Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1285
1286 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1287 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1288 (bfd_* defines): Delete.
1289 (sparc_opcode_archs): Replaces architecture_pname.
1290 (sparc_opcode_lookup_arch): Declare.
1291 (NUMOPCODES): Delete.
1292
1293Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1294
1295 * sparc.h (enum sparc_architecture): Add v9a.
1296 (ARCHITECTURES_CONFLICT_P): Update.
1297
1298Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1299
1300 * i386.h: Added Pentium Pro instructions.
1301
1302Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1303
1304 * m68k.h: Document new 'W' operand place.
1305
1306Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1307
1308 * hppa.h: Add lci and syncdma instructions.
1309
1310Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1311
1312 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1313 instructions.
1314
1315Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1316
1317 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1318 assembler's -mcom and -many switches.
1319
1320Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1321
1322 * i386.h: Fix cmpxchg8b extension opcode description.
1323
1324Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1325
1326 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1327 and register cr4.
1328
1329Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1330
1331 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1332
1333Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1334
1335 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1336
1337Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1338
1339 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1340
1341Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1342
1343 * m68kmri.h: Remove.
1344
1345 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1346 declarations. Remove F_ALIAS and flag field of struct
1347 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1348 int. Make name and args fields of struct m68k_opcode const.
1349
1350Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1351
1352 * sparc.h (F_NOTV9): Define.
1353
1354Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1355
1356 * mips.h (INSN_4010): Define.
1357
1358Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1359
1360 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1361
1362 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1363 * m68k.h: Fix argument descriptions of coprocessor
1364 instructions to allow only alterable operands where appropriate.
1365 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1366 (m68k_opcode_aliases): Add more aliases.
1367
1368Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1369
1370 * m68k.h: Added explcitly short-sized conditional branches, and a
1371 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1372 svr4-based configurations.
1373
1374Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1375
1376 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1377 * i386.h: added missing Data16/Data32 flags to a few instructions.
1378
1379Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1380
1381 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1382 (OP_MASK_BCC, OP_SH_BCC): Define.
1383 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1384 (OP_MASK_CCC, OP_SH_CCC): Define.
1385 (INSN_READ_FPR_R): Define.
1386 (INSN_RFE): Delete.
1387
1388Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1389
1390 * m68k.h (enum m68k_architecture): Deleted.
1391 (struct m68k_opcode_alias): New type.
1392 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1393 matching constraints, values and flags. As a side effect of this,
1394 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1395 as I know were never used, now may need re-examining.
1396 (numopcodes): Now const.
1397 (m68k_opcode_aliases, numaliases): New variables.
1398 (endop): Deleted.
1399 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1400 m68k_opcode_aliases; update declaration of m68k_opcodes.
1401
1402Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1403
1404 * hppa.h (delay_type): Delete unused enumeration.
1405 (pa_opcode): Replace unused delayed field with an architecture
1406 field.
1407 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1408
1409Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1410
1411 * mips.h (INSN_ISA4): Define.
1412
1413Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1414
1415 * mips.h (M_DLA_AB, M_DLI): Define.
1416
1417Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1418
1419 * hppa.h (fstwx): Fix single-bit error.
1420
1421Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1422
1423 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1424
1425Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1426
1427 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1428 debug registers. From Charles Hannum (mycroft@netbsd.org).
1429
1430Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1431
1432 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1433 i386 support:
1434 * i386.h (MOV_AX_DISP32): New macro.
1435 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1436 of several call/return instructions.
1437 (ADDR_PREFIX_OPCODE): New macro.
1438
1439Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1440
1441 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1442
1443 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1444 it pointer to const char;
1445 (struct vot, field `name'): ditto.
1446
1447Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1448
1449 * vax.h: Supply and properly group all values in end sentinel.
1450
1451Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1452
1453 * mips.h (INSN_ISA, INSN_4650): Define.
1454
1455Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1456
1457 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1458 systems with a separate instruction and data cache, such as the
1459 29040, these instructions take an optional argument.
1460
1461Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1462
1463 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1464 INSN_TRAP.
1465
1466Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1467
1468 * mips.h (INSN_STORE_MEMORY): Define.
1469
1470Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1471
1472 * sparc.h: Document new operand type 'x'.
1473
1474Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1475
1476 * i960.h (I_CX2): New instruction category. It includes
1477 instructions available on Cx and Jx processors.
1478 (I_JX): New instruction category, for JX-only instructions.
1479 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1480 Jx-only instructions, in I_JX category.
1481
1482Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1483
1484 * ns32k.h (endop): Made pointer const too.
1485
1486Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1487
1488 * ns32k.h: Drop Q operand type as there is no correct use
1489 for it. Add I and Z operand types which allow better checking.
1490
1491Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1492
1493 * h8300.h (xor.l) :fix bit pattern.
1494 (L_2): New size of operand.
1495 (trapa): Use it.
1496
1497Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1498
1499 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1500
1501Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1502
1503 * sparc.h: Include v9 definitions.
1504
1505Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1506
1507 * m68k.h (m68060): Defined.
1508 (m68040up, mfloat, mmmu): Include it.
1509 (struct m68k_opcode): Widen `arch' field.
1510 (m68k_opcodes): Updated for M68060. Removed comments that were
1511 instructions commented out by "JF" years ago.
1512
1513Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1514
1515 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1516 add a one-bit `flags' field.
1517 (F_ALIAS): New macro.
1518
1519Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1520
1521 * h8300.h (dec, inc): Get encoding right.
1522
1523Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1524
1525 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1526 a flag instead.
1527 (PPC_OPERAND_SIGNED): Define.
1528 (PPC_OPERAND_SIGNOPT): Define.
1529
1530Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1531
1532 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1533 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1534
1535Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1536
1537 * i386.h: Reverse last change. It'll be handled in gas instead.
1538
1539Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1540
1541 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1542 slower on the 486 and used the implicit shift count despite the
1543 explicit operand. The one-operand form is still available to get
1544 the shorter form with the implicit shift count.
1545
1546Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1547
1548 * hppa.h: Fix typo in fstws arg string.
1549
1550Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1551
1552 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1553
1554Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1555
1556 * ppc.h (PPC_OPCODE_601): Define.
1557
1558Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1559
1560 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1561 (so we can determine valid completers for both addb and addb[tf].)
1562
1563 * hppa.h (xmpyu): No floating point format specifier for the
1564 xmpyu instruction.
1565
1566Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1567
1568 * ppc.h (PPC_OPERAND_NEXT): Define.
1569 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1570 (struct powerpc_macro): Define.
1571 (powerpc_macros, powerpc_num_macros): Declare.
1572
1573Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1574
1575 * ppc.h: New file. Header file for PowerPC opcode table.
1576
1577Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1578
1579 * hppa.h: More minor template fixes for sfu and copr (to allow
1580 for easier disassembly).
1581
1582 * hppa.h: Fix templates for all the sfu and copr instructions.
1583
1584Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1585
1586 * i386.h (push): Permit Imm16 operand too.
1587
1588Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1589
1590 * h8300.h (andc): Exists in base arch.
1591
1592Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1593
1594 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1595 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1596
1597Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1598
1599 * hppa.h: Add FP quadword store instructions.
1600
1601Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1602
1603 * mips.h: (M_J_A): Added.
1604 (M_LA): Removed.
1605
1606Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1607
1608 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1609 <mellon@pepper.ncd.com>.
1610
1611Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1612
1613 * hppa.h: Immediate field in probei instructions is unsigned,
1614 not low-sign extended.
1615
1616Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1617
1618 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1619
1620Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1621
1622 * i386.h: Add "fxch" without operand.
1623
1624Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1625
1626 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1627
1628Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1629
1630 * hppa.h: Add gfw and gfr to the opcode table.
1631
1632Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1633
1634 * m88k.h: extended to handle m88110.
1635
1636Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1637
1638 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1639 addresses.
1640
1641Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1642
1643 * i960.h (i960_opcodes): Properly bracket initializers.
1644
1645Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1646
1647 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1648
1649Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1650
1651 * m68k.h (two): Protect second argument with parentheses.
1652
1653Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1654
1655 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1656 Deleted old in/out instructions in "#if 0" section.
1657
1658Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1659
1660 * i386.h (i386_optab): Properly bracket initializers.
1661
1662Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1663
1664 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1665 Jeff Law, law@cs.utah.edu).
1666
1667Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1668
1669 * i386.h (lcall): Accept Imm32 operand also.
1670
1671Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1672
1673 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1674 (M_DABS): Added.
1675
1676Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1677
1678 * mips.h (INSN_*): Changed values. Removed unused definitions.
1679 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1680 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1681 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1682 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1683 (M_*): Added new values for r6000 and r4000 macros.
1684 (ANY_DELAY): Removed.
1685
1686Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1687
1688 * mips.h: Added M_LI_S and M_LI_SS.
1689
1690Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1691
1692 * h8300.h: Get some rare mov.bs correct.
1693
1694Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1695
1696 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1697 been included.
1698
1699Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1700
1701 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1702 jump instructions, for use in disassemblers.
1703
1704Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1705
1706 * m88k.h: Make bitfields just unsigned, not unsigned long or
1707 unsigned short.
1708
1709Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1710
1711 * hppa.h: New argument type 'y'. Use in various float instructions.
1712
1713Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1714
1715 * hppa.h (break): First immediate field is unsigned.
1716
1717 * hppa.h: Add rfir instruction.
1718
1719Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1720
1721 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1722
1723Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1724
1725 * mips.h: Reworked the hazard information somewhat, and fixed some
1726 bugs in the instruction hazard descriptions.
1727
1728Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1729
1730 * m88k.h: Corrected a couple of opcodes.
1731
1732Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1733
1734 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1735 new version includes instruction hazard information, but is
1736 otherwise reasonably similar.
1737
1738Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1739
1740 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1741
1742Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1743
1744 Patches from Jeff Law, law@cs.utah.edu:
1745 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1746 Make the tables be the same for the following instructions:
1747 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1748 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1749 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1750 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1751 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1752 "fcmp", and "ftest".
1753
1754 * hppa.h: Make new and old tables the same for "break", "mtctl",
1755 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1756 Fix typo in last patch. Collapse several #ifdefs into a
1757 single #ifdef.
1758
1759 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1760 of the comments up-to-date.
1761
1762 * hppa.h: Update "free list" of letters and update
1763 comments describing each letter's function.
1764
1765Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1766
1767 * h8300.h: checkpoint, includes H8/300-H opcodes.
1768
1769Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1770
1771 * Patches from Jeffrey Law <law@cs.utah.edu>.
1772 * hppa.h: Rework single precision FP
1773 instructions so that they correctly disassemble code
1774 PA1.1 code.
1775
1776Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1777
1778 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1779 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1780
1781Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1782
1783 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1784 gdb will define it for now.
1785
1786Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1787
1788 * sparc.h: Don't end enumerator list with comma.
1789
1790Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1791
1792 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1793 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1794 ("bc2t"): Correct typo.
1795 ("[ls]wc[023]"): Use T rather than t.
1796 ("c[0123]"): Define general coprocessor instructions.
1797
1798Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1799
1800 * m68k.h: Move split point for gcc compilation more towards
1801 middle.
1802
1803Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1804
1805 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1806 simply wrong, ics, rfi, & rfsvc were missing).
1807 Add "a" to opr_ext for "bb". Doc fix.
1808
1809Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1810
1811 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1812 * mips.h: Add casts, to suppress warnings about shifting too much.
1813 * m68k.h: Document the placement code '9'.
1814
1815Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1816
1817 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1818 allows callers to break up the large initialized struct full of
1819 opcodes into two half-sized ones. This permits GCC to compile
1820 this module, since it takes exponential space for initializers.
1821 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1822
1823Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1824
1825 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1826 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1827 initialized structs in it.
1828
1829Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1830
1831 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1832 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1833 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1834
1835Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1836
1837 * mips.h: document "i" and "j" operands correctly.
1838
1839Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1840
1841 * mips.h: Removed endianness dependency.
1842
1843Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1844
1845 * h8300.h: include info on number of cycles per instruction.
1846
1847Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1848
1849 * hppa.h: Move handy aliases to the front. Fix masks for extract
1850 and deposit instructions.
1851
1852Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1853
1854 * i386.h: accept shld and shrd both with and without the shift
1855 count argument, which is always %cl.
1856
1857Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1858
1859 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1860 (one_byte_segment_defaults, two_byte_segment_defaults,
1861 i386_prefixtab_end): Ditto.
1862
1863Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1864
1865 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1866 for operand 2; from John Carr, jfc@dsg.dec.com.
1867
1868Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1869
1870 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1871 always use 16-bit offsets. Makes calculated-size jump tables
1872 feasible.
1873
1874Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1875
1876 * i386.h: Fix one-operand forms of in* and out* patterns.
1877
1878Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1879
1880 * m68k.h: Added CPU32 support.
1881
1882Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1883
1884 * mips.h (break): Disassemble the argument. Patch from
1885 jonathan@cs.stanford.edu (Jonathan Stone).
1886
1887Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1888
1889 * m68k.h: merged Motorola and MIT syntax.
1890
1891Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1892
1893 * m68k.h (pmove): make the tests less strict, the 68k book is
1894 wrong.
1895
1896Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1897
1898 * m68k.h (m68ec030): Defined as alias for 68030.
1899 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1900 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1901 them. Tightened description of "fmovex" to distinguish it from
1902 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1903 up descriptions that claimed versions were available for chips not
1904 supporting them. Added "pmovefd".
1905
1906Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1907
1908 * m68k.h: fix where the . goes in divull
1909
1910Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1911
1912 * m68k.h: the cas2 instruction is supposed to be written with
1913 indirection on the last two operands, which can be either data or
1914 address registers. Added a new operand type 'r' which accepts
1915 either register type. Added new cases for cas2l and cas2w which
1916 use them. Corrected masks for cas2 which failed to recognize use
1917 of address register.
1918
1919Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1920
1921 * m68k.h: Merged in patches (mostly m68040-specific) from
1922 Colin Smith <colin@wrs.com>.
1923
1924 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1925 base). Also cleaned up duplicates, re-ordered instructions for
1926 the sake of dis-assembling (so aliases come after standard names).
1927 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1928
1929Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1930
1931 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1932 all missing .s
1933
1934Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1935
1936 * sparc.h: Moved tables to BFD library.
1937
1938 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1939
1940Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1941
1942 * h8300.h: Finish filling in all the holes in the opcode table,
1943 so that the Lucid C compiler can digest this as well...
1944
1945Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1946
1947 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1948 Fix opcodes on various sizes of fild/fist instructions
1949 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1950 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1951
1952Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1953
1954 * h8300.h: Fill in all the holes in the opcode table so that the
1955 losing HPUX C compiler can digest this...
1956
1957Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1958
1959 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1960 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1961
1962Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1963
1964 * sparc.h: Add new architecture variant sparclite; add its scan
1965 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1966
1967Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1968
1969 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1970 fy@lucid.com).
1971
1972Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1973
1974 * rs6k.h: New version from IBM (Metin).
1975
1976Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1977
1978 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1979 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1980
1981Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1982
1983 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1984
1985Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1986
1987 * m68k.h (one, two): Cast macro args to unsigned to suppress
1988 complaints from compiler and lint about integer overflow during
1989 shift.
1990
1991Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1992
1993 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1994
1995Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1996
1997 * mips.h: Make bitfield layout depend on the HOST compiler,
1998 not on the TARGET system.
1999
2000Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2001
2002 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2003 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2004 <TRANLE@INTELLICORP.COM>.
2005
2006Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2007
2008 * h8300.h: turned op_type enum into #define list
2009
2010Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2011
2012 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2013 similar instructions -- they've been renamed to "fitoq", etc.
2014 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2015 number of arguments.
2016 * h8300.h: Remove extra ; which produces compiler warning.
2017
2018Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2019
2020 * sparc.h: fix opcode for tsubcctv.
2021
2022Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2023
2024 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2025
2026Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2027
2028 * sparc.h (nop): Made the 'lose' field be even tighter,
2029 so only a standard 'nop' is disassembled as a nop.
2030
2031Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2032
2033 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2034 disassembled as a nop.
2035
2036Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2037
2038 * sparc.h: fix a typo.
2039
2040Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2041
2042 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2043 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2044 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2045
2046\f
2047Local Variables:
2048version-control: never
2049End:
This page took 0.107112 seconds and 4 git commands to generate.