2002-11-09 Klee Dienes <kdienes@apple.com>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
ea6a213a
AM
12002-10-14 Alan Modra <amodra@bigpond.net.au>
2
3 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
4
701b80cd 52002-09-30 Gavin Romig-Koch <gavin@redhat.com>
9752cf1b
RS
6 Ken Raeburn <raeburn@cygnus.com>
7 Aldy Hernandez <aldyh@redhat.com>
8 Eric Christopher <echristo@redhat.com>
9 Richard Sandiford <rsandifo@redhat.com>
10
11 * mips.h: Update comment for new opcodes.
12 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
13 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
14 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
15 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
16 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
17 Don't match CPU_R4111 with INSN_4100.
18
0449635d
EZ
192002-08-19 Elena Zannoni <ezannoni@redhat.com>
20
21 From matthew green <mrg@redhat.com>
22
23 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
24 instructions.
25 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
26 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
27 e500x2 Integer select, branch locking, performance monitor,
28 cache locking and machine check APUs, respectively.
29 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
30 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
31
030ad53b
SC
322002-08-13 Stephane Carrez <stcarrez@nerim.fr>
33
34 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
35 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
36 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
37 memory banks.
38 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
39
aec421e0
TS
402002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
41
42 * mips.h (INSN_MIPS16): New define.
43
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442002-07-08 Alan Modra <amodra@bigpond.net.au>
45
46 * i386.h: Remove IgnoreSize from movsx and movzx.
47
92007e40
AM
482002-06-08 Alan Modra <amodra@bigpond.net.au>
49
50 * a29k.h: Replace CONST with const.
51 (CONST): Don't define.
52 * convex.h: Replace CONST with const.
53 (CONST): Don't define.
54 * dlx.h: Replace CONST with const.
55 * or32.h (CONST): Don't define.
56
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CD
572002-05-30 Chris G. Demetriou <cgd@broadcom.com>
58
59 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
60 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
61 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
62 (INSN_MDMX): New constants, for MDMX support.
63 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
64
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652002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
66
67 * dlx.h: New file.
68
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692002-05-25 Alan Modra <amodra@bigpond.net.au>
70
71 * ia64.h: Use #include "" instead of <> for local header files.
72 * sparc.h: Likewise.
73
771c7ce4
TS
742002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
75
76 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
77
b9c9142c
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782002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
79
80 * h8300.h: Corrected defs of all control regs
81 and eepmov instr.
82
cd47f4f1
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832002-04-11 Alan Modra <amodra@bigpond.net.au>
84
85 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 86 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 87
1f25f5d3
CD
882002-03-15 Chris G. Demetriou <cgd@broadcom.com>
89
90 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
91 instructions.
92 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
93 may be passed along with the ISA bitmask.
94
e4b29ec6
AM
952002-03-05 Paul Koning <pkoning@equallogic.com>
96
97 * pdp11.h: Add format codes for float instruction formats.
98
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992002-02-25 Alan Modra <amodra@bigpond.net.au>
100
101 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
102
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103Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
104
105 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
106
85a33fe2
JH
107Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
108
109 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
110 (xchg): Fix.
111 (in, out): Disable 64bit operands.
112 (call, jmp): Avoid REX prefixes.
113 (jcxz): Prohibit in 64bit mode
114 (jrcxz, loop): Add 64bit variants.
115 (movq): Fix patterns.
116 (movmskps, pextrw, pinstrw): Add 64bit variants.
117
3b16e843
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1182002-01-31 Ivan Guzvinec <ivang@opencores.org>
119
120 * or32.h: New file.
121
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1222002-01-22 Graydon Hoare <graydon@redhat.com>
123
124 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
125 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
126
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1272002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
128
129 * h8300.h: Comment typo fix.
130
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MG
1312002-01-03 matthew green <mrg@redhat.com>
132
133 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
134 (PPC_OPCODE_BOOKE64): Likewise.
135
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JL
136Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
137
138 * hppa.h (call, ret): Move to end of table.
139 (addb, addib): PA2.0 variants should have been PA2.0W.
140 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
141 happy.
142 (fldw, fldd, fstw, fstd, bb): Likewise.
143 (short loads/stores): Tweak format specifier slightly to keep
144 disassembler happy.
145 (indexed loads/stores): Likewise.
146 (absolute loads/stores): Likewise.
147
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AO
1482001-12-04 Alexandre Oliva <aoliva@redhat.com>
149
150 * d10v.h (OPERAND_NOSP): New macro.
151
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AO
1522001-11-29 Alexandre Oliva <aoliva@redhat.com>
153
154 * d10v.h (OPERAND_SP): New macro.
155
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1562001-11-15 Alan Modra <amodra@bigpond.net.au>
157
158 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
159
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TW
1602001-11-11 Timothy Wall <twall@alum.mit.edu>
161
162 * tic54x.h: Revise opcode layout; don't really need a separate
163 structure for parallel opcodes.
164
e5470cdc
AM
1652001-11-13 Zack Weinberg <zack@codesourcery.com>
166 Alan Modra <amodra@bigpond.net.au>
167
168 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
169 accept WordReg.
170
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CD
1712001-11-04 Chris Demetriou <cgd@broadcom.com>
172
173 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
174
3c3bdf30
NC
1752001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
176
177 * mmix.h: New file.
178
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CD
1792001-10-18 Chris Demetriou <cgd@broadcom.com>
180
181 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
182 of the expression, to make source code merging easier.
183
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CD
1842001-10-17 Chris Demetriou <cgd@broadcom.com>
185
186 * mips.h: Sort coprocessor instruction argument characters
187 in comment, add a few more words of description for "H".
188
2228315b
CD
1892001-10-17 Chris Demetriou <cgd@broadcom.com>
190
191 * mips.h (INSN_SB1): New cpu-specific instruction bit.
192 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
193 if cpu is CPU_SB1.
194
f5c120c5
MG
1952001-10-17 matthew green <mrg@redhat.com>
196
197 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
198
418c1742
MG
1992001-10-12 matthew green <mrg@redhat.com>
200
0716ce0d
MG
201 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
202 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
203 instructions, respectively.
418c1742 204
6ff2f2ba
NC
2052001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
206
207 * v850.h: Remove spurious comment.
208
015cf428
NC
2092001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
210
211 * h8300.h: Fix compile time warning messages
212
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RH
2132001-09-04 Richard Henderson <rth@redhat.com>
214
215 * alpha.h (struct alpha_operand): Pack elements into bitfields.
216
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EC
2172001-08-31 Eric Christopher <echristo@redhat.com>
218
219 * mips.h: Remove CPU_MIPS32_4K.
220
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2212001-08-27 Torbjorn Granlund <tege@swox.com>
222
223 * ppc.h (PPC_OPERAND_DS): Define.
224
d83c6548
AJ
2252001-08-25 Andreas Jaeger <aj@suse.de>
226
227 * d30v.h: Fix declaration of reg_name_cnt.
228
229 * d10v.h: Fix declaration of d10v_reg_name_cnt.
230
231 * arc.h: Add prototypes from opcodes/arc-opc.c.
232
99c14723
TS
2332001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
234
235 * mips.h (INSN_10000): Define.
236 (OPCODE_IS_MEMBER): Check for INSN_10000.
237
11b37b7b
AM
2382001-08-10 Alan Modra <amodra@one.net.au>
239
240 * ppc.h: Revert 2001-08-08.
241
3b16e843
NC
2422001-08-10 Richard Sandiford <rsandifo@redhat.com>
243
244 * mips.h (INSN_GP32): Remove.
245 (OPCODE_IS_MEMBER): Remove gp32 parameter.
246 (M_MOVE): New macro identifier.
247
0f1bac05
AM
2482001-08-08 Alan Modra <amodra@one.net.au>
249
250 1999-10-25 Torbjorn Granlund <tege@swox.com>
251 * ppc.h (struct powerpc_operand): New field `reloc'.
252
3b16e843
NC
2532001-08-01 Aldy Hernandez <aldyh@redhat.com>
254
255 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
256
2572001-07-12 Jeff Johnston <jjohnstn@redhat.com>
258
259 * cgen.h (CGEN_INSN): Add regex support.
260 (build_insn_regex): Declare.
261
81f6038f
FCE
2622001-07-11 Frank Ch. Eigler <fche@redhat.com>
263
264 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
265 (cgen_cpu_desc): Ditto.
266
32cfffe3
BE
2672001-07-07 Ben Elliston <bje@redhat.com>
268
269 * m88k.h: Clean up and reformat. Remove unused code.
270
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GK
2712001-06-14 Geoffrey Keating <geoffk@redhat.com>
272
273 * cgen.h (cgen_keyword): Add nonalpha_chars field.
274
d1cf510e
NC
2752001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
276
277 * mips.h (CPU_R12000): Define.
278
e281c457
JH
2792001-05-23 John Healy <jhealy@redhat.com>
280
281 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 282
aa5f19f2
NC
2832001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
284
285 * mips.h (INSN_ISA_MASK): Define.
286
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AM
2872001-05-12 Alan Modra <amodra@one.net.au>
288
289 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
290 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
291 and use InvMem as these insns must have register operands.
292
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AM
2932001-05-04 Alan Modra <amodra@one.net.au>
294
295 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
296 and pextrw to swap reg/rm assignments.
297
4ef7f0bf
HPN
2982001-04-05 Hans-Peter Nilsson <hp@axis.com>
299
300 * cris.h (enum cris_insn_version_usage): Correct comment for
301 cris_ver_v3p.
302
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AM
3032001-03-24 Alan Modra <alan@linuxcare.com.au>
304
305 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
306 Add InvMem to first operand of "maskmovdqu".
307
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HPN
3082001-03-22 Hans-Peter Nilsson <hp@axis.com>
309
310 * cris.h (ADD_PC_INCR_OPCODE): New macro.
311
361bfa20
KH
3122001-03-21 Kazu Hirata <kazu@hxi.com>
313
314 * h8300.h: Fix formatting.
315
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3162001-03-22 Alan Modra <alan@linuxcare.com.au>
317
318 * i386.h (i386_optab): Add paddq, psubq.
319
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3202001-03-19 Alan Modra <alan@linuxcare.com.au>
321
322 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
323
80a523c2
NC
3242001-02-28 Igor Shevlyakov <igor@windriver.com>
325
326 * m68k.h: new defines for Coldfire V4. Update mcf to know
327 about mcf5407.
328
e135f41b
NC
3292001-02-18 lars brinkhoff <lars@nocrew.org>
330
331 * pdp11.h: New file.
332
3332001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
334
335 * i386.h (i386_optab): SSE integer converison instructions have
336 64bit versions on x86-64.
337
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NC
3382001-02-10 Nick Clifton <nickc@redhat.com>
339
340 * mips.h: Remove extraneous whitespace. Formating change to allow
341 for future contribution.
342
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NC
3432001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
344
345 * s390.h: New file.
346
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PM
3472001-02-02 Patrick Macdonald <patrickm@redhat.com>
348
349 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
350 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
351 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
352
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3532001-01-24 Karsten Keil <kkeil@suse.de>
354
355 * i386.h (i386_optab): Fix swapgs
356
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3572001-01-14 Alan Modra <alan@linuxcare.com.au>
358
359 * hppa.h: Describe new '<' and '>' operand types, and tidy
360 existing comments.
361 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
362 Remove duplicate "ldw j(s,b),x". Sort some entries.
363
e135f41b 3642001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
365
366 * i386.h (i386_optab): Fix pusha and ret templates.
367
0d2bcfaf
NC
3682001-01-11 Peter Targett <peter.targett@arccores.com>
369
370 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
371 definitions for masking cpu type.
372 (arc_ext_operand_value) New structure for storing extended
373 operands.
374 (ARC_OPERAND_*) Flags for operand values.
375
3762001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
377
378 * i386.h (pinsrw): Add.
379 (pshufw): Remove.
380 (cvttpd2dq): Fix operands.
381 (cvttps2dq): Likewise.
382 (movq2q): Rename to movdq2q.
383
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AM
3842001-01-10 Richard Schaal <richard.schaal@intel.com>
385
386 * i386.h: Correct movnti instruction.
387
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JJ
3882001-01-09 Jeff Johnston <jjohnstn@redhat.com>
389
390 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
391 of operands (unsigned char or unsigned short).
392 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
393 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
394
0d2bcfaf 3952001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
396
397 * i386.h (i386_optab): Make [sml]fence template to use immext field.
398
0d2bcfaf 3992001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
400
401 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
402 introduced by Pentium4
403
0d2bcfaf 4042000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
405
406 * i386.h (i386_optab): Add "rex*" instructions;
407 add swapgs; disable jmp/call far direct instructions for
408 64bit mode; add syscall and sysret; disable registers for 0xc6
409 template. Add 'q' suffixes to extendable instructions, disable
079966a8 410 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
411 (i386_regtab): Add extended registers.
412 (*Suf): Add No_qSuf.
413 (q_Suf, wlq_Suf, bwlq_Suf): New.
414
0d2bcfaf 4152000-12-20 Jan Hubicka <jh@suse.cz>
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JH
416
417 * i386.h (i386_optab): Replace "Imm" with "EncImm".
418 (i386_regtab): Add flags field.
d83c6548 419
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NC
4202000-12-12 Nick Clifton <nickc@redhat.com>
421
422 * mips.h: Fix formatting.
423
4372b673
NC
4242000-12-01 Chris Demetriou <cgd@sibyte.com>
425
426 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
427 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
428 OP_*_SYSCALL definitions.
429 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
430 19 bit wait codes.
431 (MIPS operand specifier comments): Remove 'm', add 'U' and
432 'J', and update the meaning of 'B' so that it's more general.
433
e7af610e
NC
434 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
435 INSN_ISA5): Renumber, redefine to mean the ISA at which the
436 instruction was added.
437 (INSN_ISA32): New constant.
438 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
439 Renumber to avoid new and/or renumbered INSN_* constants.
440 (INSN_MIPS32): Delete.
441 (ISA_UNKNOWN): New constant to indicate unknown ISA.
442 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
443 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 444 constants available at that ISA level.
e7af610e
NC
445 (CPU_UNKNOWN): New constant to indicate unknown CPU.
446 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
447 define it with a unique value.
448 (OPCODE_IS_MEMBER): Update for new ISA membership-related
449 constant meanings.
450
84ea6cf2 451 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 452 definitions.
84ea6cf2 453
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NC
454 * mips.h (CPU_SB1): New constant.
455
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JJ
4562000-10-20 Jakub Jelinek <jakub@redhat.com>
457
458 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
459 Note that '3' is used for siam operand.
460
139368c9
JW
4612000-09-22 Jim Wilson <wilson@cygnus.com>
462
463 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
464
156c2f8b 4652000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 466
156c2f8b
NC
467 * mips.h: Use defines instead of hard-coded processor numbers.
468 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 469 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
470 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
471 CPU_4KC, CPU_4KM, CPU_4KP): Define..
472 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 473 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 474 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
475 Add 'P' to used characters.
476 Use 'H' for coprocessor select field.
156c2f8b 477 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
478 Document new arg characters and add to used characters.
479 (INSN_MIPS32): New define for MIPS32 extensions.
480 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 481
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4822000-09-05 Alan Modra <alan@linuxcare.com.au>
483
484 * hppa.h: Mention cz completer.
485
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JW
4862000-08-16 Jim Wilson <wilson@cygnus.com>
487
488 * ia64.h (IA64_OPCODE_POSTINC): New.
489
fc29466d
L
4902000-08-15 H.J. Lu <hjl@gnu.org>
491
492 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
493 IgnoreSize change.
494
4f1d9bd8
NC
4952000-08-08 Jason Eckhardt <jle@cygnus.com>
496
497 * i860.h: Small formatting adjustments.
498
45ee1401
DC
4992000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
500
501 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
502 Move related opcodes closer to each other.
503 Minor changes in comments, list undefined opcodes.
504
9d551405
DB
5052000-07-26 Dave Brolley <brolley@redhat.com>
506
507 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
508
4f1d9bd8
NC
5092000-07-22 Jason Eckhardt <jle@cygnus.com>
510
511 * i860.h (btne, bte, bla): Changed these opcodes
512 to use sbroff ('r') instead of split16 ('s').
513 (J, K, L, M): New operand types for 16-bit aligned fields.
514 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
515 use I, J, K, L, M instead of just I.
516 (T, U): New operand types for split 16-bit aligned fields.
517 (st.x): Changed these opcodes to use S, T, U instead of just S.
518 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
519 exist on the i860.
520 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
521 (pfeq.ss, pfeq.dd): New opcodes.
522 (st.s): Fixed incorrect mask bits.
523 (fmlow): Fixed incorrect mask bits.
524 (fzchkl, pfzchkl): Fixed incorrect mask bits.
525 (faddz, pfaddz): Fixed incorrect mask bits.
526 (form, pform): Fixed incorrect mask bits.
527 (pfld.l): Fixed incorrect mask bits.
528 (fst.q): Fixed incorrect mask bits.
529 (all floating point opcodes): Fixed incorrect mask bits for
530 handling of dual bit.
531
c8488617
HPN
5322000-07-20 Hans-Peter Nilsson <hp@axis.com>
533
534 cris.h: New file.
535
65aa24b6
NC
5362000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
537
538 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
539 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
540 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
541 (AVR_ISA_M83): Define for ATmega83, ATmega85.
542 (espm): Remove, because ESPM removed in databook update.
543 (eicall, eijmp): Move to the end of opcode table.
544
60bcf0fa
NC
5452000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
546
547 * m68hc11.h: New file for support of Motorola 68hc11.
548
60a2978a
DC
549Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
550
551 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
552
68ab2dd9
DC
553Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
554
555 * avr.h: New file with AVR opcodes.
556
f0662e27
DL
557Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
558
559 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
560
b722f2be
AM
5612000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
562
563 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
564
f9e0cf0b
AM
5652000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
566
567 * i386.h: Use sl_FP, not sl_Suf for fild.
568
f660ee8b
FCE
5692000-05-16 Frank Ch. Eigler <fche@redhat.com>
570
571 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
572 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
573 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
574 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
575
558b0a60
AM
5762000-05-13 Alan Modra <alan@linuxcare.com.au>,
577
578 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
579
e413e4e9
AM
5802000-05-13 Alan Modra <alan@linuxcare.com.au>,
581 Alexander Sokolov <robocop@netlink.ru>
582
583 * i386.h (i386_optab): Add cpu_flags for all instructions.
584
5852000-05-13 Alan Modra <alan@linuxcare.com.au>
586
587 From Gavin Romig-Koch <gavin@cygnus.com>
588 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
589
5c84d377
TW
5902000-05-04 Timothy Wall <twall@cygnus.com>
591
592 * tic54x.h: New.
593
966f959b
C
5942000-05-03 J.T. Conklin <jtc@redback.com>
595
596 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
597 (PPC_OPERAND_VR): New operand flag for vector registers.
598
c5d05dbb
JL
5992000-05-01 Kazu Hirata <kazu@hxi.com>
600
601 * h8300.h (EOP): Add missing initializer.
602
a7fba0e0
JL
603Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
604
605 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
606 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
607 New operand types l,y,&,fe,fE,fx added to support above forms.
608 (pa_opcodes): Replaced usage of 'x' as source/target for
609 floating point double-word loads/stores with 'fx'.
610
800eeca4
JW
611Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
612 David Mosberger <davidm@hpl.hp.com>
613 Timothy Wall <twall@cygnus.com>
614 Jim Wilson <wilson@cygnus.com>
615
616 * ia64.h: New file.
617
ba23e138
NC
6182000-03-27 Nick Clifton <nickc@cygnus.com>
619
620 * d30v.h (SHORT_A1): Fix value.
621 (SHORT_AR): Renumber so that it is at the end of the list of short
622 instructions, not the end of the list of long instructions.
623
d0b47220
AM
6242000-03-26 Alan Modra <alan@linuxcare.com>
625
626 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
627 problem isn't really specific to Unixware.
628 (OLDGCC_COMPAT): Define.
629 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
630 destination %st(0).
631 Fix lots of comments.
632
866afedc
NC
6332000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
634
635 * d30v.h:
636 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
637 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
638 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
639 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
640 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
641 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
642 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
643
cc5ca5ce
AM
6442000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
645
646 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
647 fistpd without suffix.
648
68e324a2
NC
6492000-02-24 Nick Clifton <nickc@cygnus.com>
650
651 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
652 'signed_overflow_ok_p'.
653 Delete prototypes for cgen_set_flags() and cgen_get_flags().
654
60f036a2
AH
6552000-02-24 Andrew Haley <aph@cygnus.com>
656
657 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
658 (CGEN_CPU_TABLE): flags: new field.
659 Add prototypes for new functions.
d83c6548 660
9b9b5cd4
AM
6612000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
662
663 * i386.h: Add some more UNIXWARE_COMPAT comments.
664
5b93d8bb
AM
6652000-02-23 Linas Vepstas <linas@linas.org>
666
667 * i370.h: New file.
668
4f1d9bd8
NC
6692000-02-22 Chandra Chavva <cchavva@cygnus.com>
670
671 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
672 cannot be combined in parallel with ADD/SUBppp.
673
87f398dd
AH
6742000-02-22 Andrew Haley <aph@cygnus.com>
675
676 * mips.h: (OPCODE_IS_MEMBER): Add comment.
677
367c01af
AH
6781999-12-30 Andrew Haley <aph@cygnus.com>
679
9a1e79ca
AH
680 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
681 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
682 insns.
367c01af 683
add0c677
AM
6842000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
685
686 * i386.h: Qualify intel mode far call and jmp with x_Suf.
687
3138f287
AM
6881999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
689
690 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
691 indirect jumps and calls. Add FF/3 call for intel mode.
692
ccecd07b
JL
693Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
694
695 * mn10300.h: Add new operand types. Add new instruction formats.
696
b37e19e9
JL
697Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
698
699 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
700 instruction.
701
5fce5ddf
GRK
7021999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
703
704 * mips.h (INSN_ISA5): New.
705
2bd7f1f3
GRK
7061999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
707
708 * mips.h (OPCODE_IS_MEMBER): New.
709
4df2b5c5
NC
7101999-10-29 Nick Clifton <nickc@cygnus.com>
711
712 * d30v.h (SHORT_AR): Define.
713
446a06c9
MM
7141999-10-18 Michael Meissner <meissner@cygnus.com>
715
716 * alpha.h (alpha_num_opcodes): Convert to unsigned.
717 (alpha_num_operands): Ditto.
718
eca04c6a
JL
719Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
720
721 * hppa.h (pa_opcodes): Add load and store cache control to
722 instructions. Add ordered access load and store.
723
724 * hppa.h (pa_opcode): Add new entries for addb and addib.
725
726 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
727
728 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
729
c43185de
DN
730Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
731
732 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
733
ec3533da
JL
734Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
735
390f858d
JL
736 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
737 and "be" using completer prefixes.
738
8c47ebd9
JL
739 * hppa.h (pa_opcodes): Add initializers to silence compiler.
740
ec3533da
JL
741 * hppa.h: Update comments about character usage.
742
18369bea
JL
743Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
744
745 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
746 up the new fstw & bve instructions.
747
c36efdd2
JL
748Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
749
d3ffb032
JL
750 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
751 instructions.
752
c49ec3da
JL
753 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
754
5d2e7ecc
JL
755 * hppa.h (pa_opcodes): Add long offset double word load/store
756 instructions.
757
6397d1a2
JL
758 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
759 stores.
760
142f0fe0
JL
761 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
762
f5a68b45
JL
763 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
764
8235801e
JL
765 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
766
35184366
JL
767 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
768
f0bfde5e
JL
769 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
770
27bbbb58
JL
771 * hppa.h (pa_opcodes): Add support for "b,l".
772
c36efdd2
JL
773 * hppa.h (pa_opcodes): Add support for "b,gate".
774
f2727d04
JL
775Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
776
9392fb11 777 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 778 in xmpyu.
9392fb11 779
e0c52e99
JL
780 * hppa.h (pa_opcodes): Fix mask for probe and probei.
781
f2727d04
JL
782 * hppa.h (pa_opcodes): Fix mask for depwi.
783
52d836e2
JL
784Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
785
786 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
787 an explicit output argument.
788
90765e3a
JL
789Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
790
791 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
792 Add a few PA2.0 loads and store variants.
793
8340b17f
ILT
7941999-09-04 Steve Chamberlain <sac@pobox.com>
795
796 * pj.h: New file.
797
5f47d35b
AM
7981999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
799
800 * i386.h (i386_regtab): Move %st to top of table, and split off
801 other fp reg entries.
802 (i386_float_regtab): To here.
803
1c143202
JL
804Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
805
7d8fdb64
JL
806 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
807 by 'f'.
808
90927b9c
JL
809 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
810 Add supporting args.
811
1d16bf9c
JL
812 * hppa.h: Document new completers and args.
813 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
814 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
815 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
816 pmenb and pmdis.
817
96226a68
JL
818 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
819 hshr, hsub, mixh, mixw, permh.
820
5d4ba527
JL
821 * hppa.h (pa_opcodes): Change completers in instructions to
822 use 'c' prefix.
823
e9fc28c6
JL
824 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
825 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
826
1c143202
JL
827 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
828 fnegabs to use 'I' instead of 'F'.
829
9e525108
AM
8301999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
831
832 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
833 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
834 Alphabetically sort PIII insns.
835
e8da1bf1
DE
836Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
837
838 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
839
7d627258
JL
840Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
841
5696871a
JL
842 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
843 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
844
7d627258
JL
845 * hppa.h: Document 64 bit condition completers.
846
c5e52916
JL
847Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
848
849 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
850
eecb386c
AM
8511999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
852
853 * i386.h (i386_optab): Add DefaultSize modifier to all insns
854 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
855 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
856
88a380f3
JL
857Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
858 Jeff Law <law@cygnus.com>
859
860 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
861
862 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 863
d83c6548 864 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
865 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
866
145cf1f0
AM
8671999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
868
869 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
870
73826640
JL
871Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
872
873 * hppa.h (struct pa_opcode): Add new field "flags".
874 (FLAGS_STRICT): Define.
875
b65db252
JL
876Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
877 Jeff Law <law@cygnus.com>
878
f7fc668b
JL
879 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
880
881 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 882
10084519
AM
8831999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
884
885 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
886 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
887 flag to fcomi and friends.
888
cd8a80ba
JL
889Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
890
891 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 892 integer logical instructions.
cd8a80ba 893
1fca749b
ILT
8941999-05-28 Linus Nordberg <linus.nordberg@canit.se>
895
896 * m68k.h: Document new formats `E', `G', `H' and new places `N',
897 `n', `o'.
898
899 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
900 and new places `m', `M', `h'.
901
aa008907
JL
902Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
903
904 * hppa.h (pa_opcodes): Add several processor specific system
905 instructions.
906
e26b85f0
JL
907Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
908
d83c6548 909 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
910 "addb", and "addib" to be used by the disassembler.
911
c608c12e
AM
9121999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
913
914 * i386.h (ReverseModrm): Remove all occurences.
915 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
916 movmskps, pextrw, pmovmskb, maskmovq.
917 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
918 ignore the data size prefix.
919
920 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
921 Mostly stolen from Doug Ledford <dledford@redhat.com>
922
45c18104
RH
923Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
924
925 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
926
252b5132
RH
9271999-04-14 Doug Evans <devans@casey.cygnus.com>
928
929 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
930 (CGEN_ATTR_TYPE): Update.
931 (CGEN_ATTR_MASK): Number booleans starting at 0.
932 (CGEN_ATTR_VALUE): Update.
933 (CGEN_INSN_ATTR): Update.
934
935Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
936
937 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
938 instructions.
939
940Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
941
942 * hppa.h (bb, bvb): Tweak opcode/mask.
943
944
9451999-03-22 Doug Evans <devans@casey.cygnus.com>
946
947 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
948 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
949 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
950 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
951 Delete member max_insn_size.
952 (enum cgen_cpu_open_arg): New enum.
953 (cpu_open): Update prototype.
954 (cpu_open_1): Declare.
955 (cgen_set_cpu): Delete.
956
9571999-03-11 Doug Evans <devans@casey.cygnus.com>
958
959 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
960 (CGEN_OPERAND_NIL): New macro.
961 (CGEN_OPERAND): New member `type'.
962 (@arch@_cgen_operand_table): Delete decl.
963 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
964 (CGEN_OPERAND_TABLE): New struct.
965 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
966 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
967 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
968 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
969 {get,set}_{int,vma}_operand.
970 (@arch@_cgen_cpu_open): New arg `isa'.
971 (cgen_set_cpu): Ditto.
972
973Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
974
975 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
976
9771999-02-25 Doug Evans <devans@casey.cygnus.com>
978
979 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
980 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
981 enum cgen_hw_type.
982 (CGEN_HW_TABLE): New struct.
983 (hw_table): Delete declaration.
984 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
985 to table entry to enum.
986 (CGEN_OPINST): Ditto.
987 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
988
989Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
990
991 * alpha.h (AXP_OPCODE_EV6): New.
992 (AXP_OPCODE_NOPAL): Include it.
993
9941999-02-09 Doug Evans <devans@casey.cygnus.com>
995
996 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
997 All uses updated. New members int_insn_p, max_insn_size,
998 parse_operand,insert_operand,extract_operand,print_operand,
999 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1000 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1001 extract_handlers,print_handlers.
1002 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1003 (CGEN_ATTR_BOOL_OFFSET): New macro.
1004 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1005 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1006 (cgen_opcode_handler): Renamed from cgen_base.
1007 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1008 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1009 all uses updated.
1010 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1011 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1012 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1013 (CGEN_OPCODE,CGEN_IBASE): New types.
1014 (CGEN_INSN): Rewrite.
1015 (CGEN_{ASM,DIS}_HASH*): Delete.
1016 (init_opcode_table,init_ibld_table): Declare.
1017 (CGEN_INSN_ATTR): New type.
1018
1019Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1020
252b5132
RH
1021 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1022 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1023 Change *Suf definitions to include x and d suffixes.
1024 (movsx): Use w_Suf and b_Suf.
1025 (movzx): Likewise.
1026 (movs): Use bwld_Suf.
1027 (fld): Change ordering. Use sld_FP.
1028 (fild): Add Intel Syntax equivalent of fildq.
1029 (fst): Use sld_FP.
1030 (fist): Use sld_FP.
1031 (fstp): Use sld_FP. Add x_FP version.
1032 (fistp): LLongMem version for Intel Syntax.
1033 (fcom, fcomp): Use sld_FP.
1034 (fadd, fiadd, fsub): Use sld_FP.
1035 (fsubr): Use sld_FP.
1036 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1037
10381999-01-27 Doug Evans <devans@casey.cygnus.com>
1039
1040 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1041 CGEN_MODE_UINT.
1042
e135f41b 10431999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1044
1045 * hppa.h (bv): Fix mask.
1046
10471999-01-05 Doug Evans <devans@casey.cygnus.com>
1048
1049 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1050 (CGEN_ATTR): Use it.
1051 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1052 (CGEN_ATTR_TABLE): New member dfault.
1053
10541998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1055
1056 * mips.h (MIPS16_INSN_BRANCH): New.
1057
1058Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1059
1060 The following is part of a change made by Edith Epstein
d83c6548
AJ
1061 <eepstein@sophia.cygnus.com> as part of a project to merge in
1062 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1063
1064 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1065 after.
252b5132
RH
1066
1067Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1068
1069 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1070 status word instructions.
252b5132
RH
1071
10721998-11-30 Doug Evans <devans@casey.cygnus.com>
1073
1074 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1075 (struct cgen_keyword_entry): Ditto.
1076 (struct cgen_operand): Ditto.
1077 (CGEN_IFLD): New typedef, with associated access macros.
1078 (CGEN_IFMT): New typedef, with associated access macros.
1079 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1080 (CGEN_IVALUE): New typedef.
1081 (struct cgen_insn): Delete const on syntax,attrs members.
1082 `format' now points to format data. Type of `value' is now
1083 CGEN_IVALUE.
1084 (struct cgen_opcode_table): New member ifld_table.
1085
10861998-11-18 Doug Evans <devans@casey.cygnus.com>
1087
1088 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1089 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1090 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1091 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1092 (cgen_opcode_table): Update type of dis_hash fn.
1093 (extract_operand): Update type of `insn_value' arg.
1094
1095Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1096
1097 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1098
1099Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1100
1101 * mips.h (INSN_MULT): Added.
1102
1103Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1104
1105 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1106
1107Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1108
1109 * cgen.h (CGEN_INSN_INT): New typedef.
1110 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1111 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1112 (CGEN_INSN_BYTES_PTR): New typedef.
1113 (CGEN_EXTRACT_INFO): New typedef.
1114 (cgen_insert_fn,cgen_extract_fn): Update.
1115 (cgen_opcode_table): New member `insn_endian'.
1116 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1117 (insert_operand,extract_operand): Update.
1118 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1119
1120Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1121
1122 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1123 (struct CGEN_HW_ENTRY): New member `attrs'.
1124 (CGEN_HW_ATTR): New macro.
1125 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1126 (CGEN_INSN_INVALID_P): New macro.
1127
1128Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1129
1130 * hppa.h: Add "fid".
d83c6548 1131
252b5132
RH
1132Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1133
1134 From Robert Andrew Dale <rob@nb.net>
1135 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1136 (AMD_3DNOW_OPCODE): Define.
1137
1138Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1139
1140 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1141
1142Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1143
1144 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1145
1146Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1147
1148 Move all global state data into opcode table struct, and treat
1149 opcode table as something that is "opened/closed".
1150 * cgen.h (CGEN_OPCODE_DESC): New type.
1151 (all fns): New first arg of opcode table descriptor.
1152 (cgen_set_parse_operand_fn): Add prototype.
1153 (cgen_current_machine,cgen_current_endian): Delete.
1154 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1155 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1156 dis_hash_table,dis_hash_table_entries.
1157 (opcode_open,opcode_close): Add prototypes.
1158
1159 * cgen.h (cgen_insn): New element `cdx'.
1160
1161Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1162
1163 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1164
1165Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1166
1167 * mn10300.h: Add "no_match_operands" field for instructions.
1168 (MN10300_MAX_OPERANDS): Define.
1169
1170Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1171
1172 * cgen.h (cgen_macro_insn_count): Declare.
1173
1174Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1175
1176 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1177 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1178 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1179 set_{int,vma}_operand.
1180
1181Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1182
1183 * mn10300.h: Add "machine" field for instructions.
1184 (MN103, AM30): Define machine types.
d83c6548 1185
252b5132
RH
1186Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1187
1188 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1189
11901998-06-18 Ulrich Drepper <drepper@cygnus.com>
1191
1192 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1193
1194Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1195
1196 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1197 and ud2b.
1198 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1199 those that happen to be implemented on pentiums.
1200
1201Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1202
1203 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1204 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1205 with Size16|IgnoreSize or Size32|IgnoreSize.
1206
1207Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1208
1209 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1210 (REPE): Rename to REPE_PREFIX_OPCODE.
1211 (i386_regtab_end): Remove.
1212 (i386_prefixtab, i386_prefixtab_end): Remove.
1213 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1214 of md_begin.
1215 (MAX_OPCODE_SIZE): Define.
1216 (i386_optab_end): Remove.
1217 (sl_Suf): Define.
1218 (sl_FP): Use sl_Suf.
1219
1220 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1221 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1222 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1223 data32, dword, and adword prefixes.
1224 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1225 regs.
1226
1227Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1228
1229 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1230
1231 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1232 register operands, because this is a common idiom. Flag them with
1233 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1234 fdivrp because gcc erroneously generates them. Also flag with a
1235 warning.
1236
1237 * i386.h: Add suffix modifiers to most insns, and tighter operand
1238 checks in some cases. Fix a number of UnixWare compatibility
1239 issues with float insns. Merge some floating point opcodes, using
1240 new FloatMF modifier.
1241 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1242 consistency.
1243
1244 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1245 IgnoreDataSize where appropriate.
1246
1247Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1248
1249 * i386.h: (one_byte_segment_defaults): Remove.
1250 (two_byte_segment_defaults): Remove.
1251 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1252
1253Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1254
1255 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1256 (cgen_hw_lookup_by_num): Declare.
1257
1258Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1259
1260 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1261 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1262
1263Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1264
1265 * cgen.h (cgen_asm_init_parse): Delete.
1266 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1267 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1268
1269Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1270
1271 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1272 (cgen_asm_finish_insn): Update prototype.
1273 (cgen_insn): New members num, data.
1274 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1275 dis_hash, dis_hash_table_size moved to ...
1276 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1277 All uses updated. New members asm_hash_p, dis_hash_p.
1278 (CGEN_MINSN_EXPANSION): New struct.
1279 (cgen_expand_macro_insn): Declare.
1280 (cgen_macro_insn_count): Declare.
1281 (get_insn_operands): Update prototype.
1282 (lookup_get_insn_operands): Declare.
1283
1284Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1285
1286 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1287 regKludge. Add operands types for string instructions.
1288
1289Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1290
1291 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1292 table.
1293
1294Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1295
1296 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1297 for `gettext'.
1298
1299Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1300
1301 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1302 Add IsString flag to string instructions.
1303 (IS_STRING): Don't define.
1304 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1305 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1306 (SS_PREFIX_OPCODE): Define.
1307
1308Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1309
1310 * i386.h: Revert March 24 patch; no more LinearAddress.
1311
1312Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1313
1314 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1315 instructions, and instead add FWait opcode modifier. Add short
1316 form of fldenv and fstenv.
1317 (FWAIT_OPCODE): Define.
1318
1319 * i386.h (i386_optab): Change second operand constraint of `mov
1320 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1321 allow legal instructions such as `movl %gs,%esi'
1322
1323Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1324
1325 * h8300.h: Various changes to fully bracket initializers.
1326
1327Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1328
1329 * i386.h: Set LinearAddress for lidt and lgdt.
1330
1331Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1332
1333 * cgen.h (CGEN_BOOL_ATTR): New macro.
1334
1335Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1336
1337 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1338
1339Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1340
1341 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1342 (cgen_insn): Record syntax and format entries here, rather than
1343 separately.
1344
1345Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1346
1347 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1348
1349Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1350
1351 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1352 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1353 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1354
1355Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1356
1357 * cgen.h (lookup_insn): New argument alias_p.
1358
1359Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1360
1361Fix rac to accept only a0:
1362 * d10v.h (OPERAND_ACC): Split into:
1363 (OPERAND_ACC0, OPERAND_ACC1) .
1364 (OPERAND_GPR): Define.
1365
1366Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1367
1368 * cgen.h (CGEN_FIELDS): Define here.
1369 (CGEN_HW_ENTRY): New member `type'.
1370 (hw_list): Delete decl.
1371 (enum cgen_mode): Declare.
1372 (CGEN_OPERAND): New member `hw'.
1373 (enum cgen_operand_instance_type): Declare.
1374 (CGEN_OPERAND_INSTANCE): New type.
1375 (CGEN_INSN): New member `operands'.
1376 (CGEN_OPCODE_DATA): Make hw_list const.
1377 (get_insn_operands,lookup_insn): Add prototypes for.
1378
1379Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1380
1381 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1382 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1383 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1384 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1385
1386Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1387
1388 * cgen.h: Correct typo in comment end marker.
1389
1390Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1391
1392 * tic30.h: New file.
1393
5a109b67 1394Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1395
1396 * cgen.h: Add prototypes for cgen_save_fixups(),
1397 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1398 of cgen_asm_finish_insn() to return a char *.
1399
1400Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1401
1402 * cgen.h: Formatting changes to improve readability.
1403
1404Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1405
1406 * cgen.h (*): Clean up pass over `struct foo' usage.
1407 (CGEN_ATTR): Make unsigned char.
1408 (CGEN_ATTR_TYPE): Update.
1409 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1410 (cgen_base): Move member `attrs' to cgen_insn.
1411 (CGEN_KEYWORD): New member `null_entry'.
1412 (CGEN_{SYNTAX,FORMAT}): New types.
1413 (cgen_insn): Format and syntax separated from each other.
1414
1415Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1416
1417 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1418 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1419 flags_{used,set} long.
1420 (d30v_operand): Make flags field long.
1421
1422Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1423
1424 * m68k.h: Fix comment describing operand types.
1425
1426Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1427
1428 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1429 everything else after down.
1430
1431Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1432
1433 * d10v.h (OPERAND_FLAG): Split into:
1434 (OPERAND_FFLAG, OPERAND_CFLAG) .
1435
1436Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1437
1438 * mips.h (struct mips_opcode): Changed comments to reflect new
1439 field usage.
1440
1441Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1442
1443 * mips.h: Added to comments a quick-ref list of all assigned
1444 operand type characters.
1445 (OP_{MASK,SH}_PERFREG): New macros.
1446
1447Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1448
1449 * sparc.h: Add '_' and '/' for v9a asr's.
1450 Patch from David Miller <davem@vger.rutgers.edu>
1451
1452Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1453
1454 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1455 area are not available in the base model (H8/300).
1456
1457Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1458
1459 * m68k.h: Remove documentation of ` operand specifier.
1460
1461Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1462
1463 * m68k.h: Document q and v operand specifiers.
1464
1465Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1466
1467 * v850.h (struct v850_opcode): Add processors field.
1468 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1469 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1470 (PROCESSOR_V850EA): New bit constants.
1471
1472Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1473
1474 Merge changes from Martin Hunt:
1475
1476 * d30v.h: Allow up to 64 control registers. Add
1477 SHORT_A5S format.
1478
1479 * d30v.h (LONG_Db): New form for delayed branches.
1480
1481 * d30v.h: (LONG_Db): New form for repeati.
1482
1483 * d30v.h (SHORT_D2B): New form.
1484
1485 * d30v.h (SHORT_A2): New form.
1486
1487 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1488 registers are used. Needed for VLIW optimization.
1489
1490Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1491
1492 * cgen.h: Move assembler interface section
1493 up so cgen_parse_operand_result is defined for cgen_parse_address.
1494 (cgen_parse_address): Update prototype.
1495
1496Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1497
1498 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1499
1500Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1501
1502 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1503 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1504 <paubert@iram.es>.
1505
1506 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1507 <paubert@iram.es>.
1508
1509 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1510 <paubert@iram.es>.
1511
1512 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1513 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1514
1515Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1516
1517 * v850.h (V850_NOT_R0): New flag.
1518
1519Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1520
1521 * v850.h (struct v850_opcode): Remove flags field.
1522
1523Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1524
1525 * v850.h (struct v850_opcode): Add flags field.
1526 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1527 fields.
1528 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1529 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1530
1531Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1532
1533 * arc.h: New file.
1534
1535Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1536
1537 * sparc.h (sparc_opcodes): Declare as const.
1538
1539Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1540
1541 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1542 uses single or double precision floating point resources.
1543 (INSN_NO_ISA, INSN_ISA1): Define.
1544 (cpu specific INSN macros): Tweak into bitmasks outside the range
1545 of INSN_ISA field.
1546
1547Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1548
1549 * i386.h: Fix pand opcode.
1550
1551Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1552
1553 * mips.h: Widen INSN_ISA and move it to a more convenient
1554 bit position. Add INSN_3900.
1555
1556Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1557
1558 * mips.h (struct mips_opcode): added new field membership.
1559
1560Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1561
1562 * i386.h (movd): only Reg32 is allowed.
1563
1564 * i386.h: add fcomp and ud2. From Wayne Scott
1565 <wscott@ichips.intel.com>.
1566
1567Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1568
1569 * i386.h: Add MMX instructions.
1570
1571Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1572
1573 * i386.h: Remove W modifier from conditional move instructions.
1574
1575Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1576
1577 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1578 with no arguments to match that generated by the UnixWare
1579 assembler.
1580
1581Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1582
1583 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1584 (cgen_parse_operand_fn): Declare.
1585 (cgen_init_parse_operand): Declare.
1586 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1587 new argument `want'.
1588 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1589 (enum cgen_parse_operand_type): New enum.
1590
1591Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1592
1593 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1594
1595Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1596
1597 * cgen.h: New file.
1598
1599Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1600
1601 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1602 fdivrp.
1603
1604Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1605
1606 * v850.h (extract): Make unsigned.
1607
1608Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1609
1610 * i386.h: Add iclr.
1611
1612Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1613
1614 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1615 take a direction bit.
1616
1617Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1618
1619 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1620
1621Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1622
1623 * sparc.h: Include <ansidecl.h>. Update function declarations to
1624 use prototypes, and to use const when appropriate.
1625
1626Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1627
1628 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1629
1630Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1631
1632 * d10v.h: Change pre_defined_registers to
1633 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1634
1635Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1636
1637 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1638 Change mips_opcodes from const array to a pointer,
1639 and change bfd_mips_num_opcodes from const int to int,
1640 so that we can increase the size of the mips opcodes table
1641 dynamically.
1642
1643Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1644
1645 * d30v.h (FLAG_X): Remove unused flag.
1646
1647Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1648
1649 * d30v.h: New file.
1650
1651Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1652
1653 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1654 (PDS_VALUE): Macro to access value field of predefined symbols.
1655 (tic80_next_predefined_symbol): Add prototype.
1656
1657Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1658
1659 * tic80.h (tic80_symbol_to_value): Change prototype to match
1660 change in function, added class parameter.
1661
1662Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1663
1664 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1665 endmask fields, which are somewhat weird in that 0 and 32 are
1666 treated exactly the same.
1667
1668Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1669
1670 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1671 rather than a constant that is 2**X. Reorder them to put bits for
1672 operands that have symbolic names in the upper bits, so they can
1673 be packed into an int where the lower bits contain the value that
1674 corresponds to that symbolic name.
1675 (predefined_symbo): Add struct.
1676 (tic80_predefined_symbols): Declare array of translations.
1677 (tic80_num_predefined_symbols): Declare size of that array.
1678 (tic80_value_to_symbol): Declare function.
1679 (tic80_symbol_to_value): Declare function.
1680
1681Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1682
1683 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1684
1685Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1686
1687 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1688 be the destination register.
1689
1690Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1691
1692 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1693 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1694 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1695 that the opcode can have two vector instructions in a single
1696 32 bit word and we have to encode/decode both.
1697
1698Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1699
1700 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1701 TIC80_OPERAND_RELATIVE for PC relative.
1702 (TIC80_OPERAND_BASEREL): New flag bit for register
1703 base relative.
1704
1705Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1706
1707 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1708
1709Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1710
1711 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1712 ":s" modifier for scaling.
1713
1714Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1715
1716 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1717 (TIC80_OPERAND_M_LI): Ditto
1718
1719Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1720
1721 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1722 (TIC80_OPERAND_CC): New define for condition code operand.
1723 (TIC80_OPERAND_CR): New define for control register operand.
1724
1725Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1726
1727 * tic80.h (struct tic80_opcode): Name changed.
1728 (struct tic80_opcode): Remove format field.
1729 (struct tic80_operand): Add insertion and extraction functions.
1730 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1731 correct ones.
1732 (FMT_*): Ditto.
1733
1734Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1735
1736 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1737 type IV instruction offsets.
1738
1739Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1740
1741 * tic80.h: New file.
1742
1743Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1744
1745 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1746
1747Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1748
1749 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1750 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1751 * v850.h: Fix comment, v850_operand not powerpc_operand.
1752
1753Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1754
1755 * mn10200.h: Flesh out structures and definitions needed by
1756 the mn10200 assembler & disassembler.
1757
1758Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1759
1760 * mips.h: Add mips16 definitions.
1761
1762Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1763
1764 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1765
1766Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1767
1768 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1769 (MN10300_OPERAND_MEMADDR): Define.
1770
1771Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1772
1773 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1774
1775Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1776
1777 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1778
1779Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1780
1781 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1782
1783Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1784
1785 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1786
1787Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1788
1789 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1790 negative to minimize problems with shared libraries. Organize
1791 instruction subsets by AMASK extensions and PALcode
1792 implementation.
252b5132
RH
1793 (struct alpha_operand): Move flags slot for better packing.
1794
1795Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1796
1797 * v850.h (V850_OPERAND_RELAX): New operand flag.
1798
1799Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1800
1801 * mn10300.h (FMT_*): Move operand format definitions
1802 here.
1803
1804Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1805
1806 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1807
1808Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1809
1810 * mn10300.h (mn10300_opcode): Add "format" field.
1811 (MN10300_OPERAND_*): Define.
1812
1813Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1814
1815 * mn10x00.h: Delete.
1816 * mn10200.h, mn10300.h: New files.
1817
1818Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1819
1820 * mn10x00.h: New file.
1821
1822Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1823
1824 * v850.h: Add new flag to indicate this instruction uses a PC
1825 displacement.
1826
1827Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1828
1829 * h8300.h (stmac): Add missing instruction.
1830
1831Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1832
1833 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1834 field.
1835
1836Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1837
1838 * v850.h (V850_OPERAND_EP): Define.
1839
1840 * v850.h (v850_opcode): Add size field.
1841
1842Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1843
1844 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1845 to functions used to handle unusual operand encoding.
252b5132 1846 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1847 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1848
1849Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1850
1851 * v850.h (v850_operands): Add flags field.
1852 (OPERAND_REG, OPERAND_NUM): Defined.
1853
1854Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1855
1856 * v850.h: New file.
1857
1858Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1859
1860 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1861 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1862 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1863 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1864 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1865 Defined.
252b5132
RH
1866
1867Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1868
1869 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1870 a 3 bit space id instead of a 2 bit space id.
1871
1872Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1873
1874 * d10v.h: Add some additional defines to support the
d83c6548 1875 assembler in determining which operations can be done in parallel.
252b5132
RH
1876
1877Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1878
1879 * h8300.h (SN): Define.
1880 (eepmov.b): Renamed from "eepmov"
1881 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1882 with them.
1883
1884Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1885
1886 * d10v.h (OPERAND_SHIFT): New operand flag.
1887
1888Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1889
1890 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1891 signed numbers.
252b5132
RH
1892
1893Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1894
1895 * d10v.h (pd_reg): Define. Putting the definition here allows
1896 the assembler and disassembler to share the same struct.
1897
1898Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1899
1900 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1901 Williams <steve@icarus.com>.
1902
1903Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1904
1905 * d10v.h: New file.
1906
1907Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1908
1909 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1910
1911Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1912
d83c6548 1913 * m68k.h (mcf5200): New macro.
252b5132
RH
1914 Document names of coldfire control registers.
1915
1916Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1917
1918 * h8300.h (SRC_IN_DST): Define.
1919
1920 * h8300.h (UNOP3): Mark the register operand in this insn
1921 as a source operand, not a destination operand.
1922 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1923 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1924 register operand with SRC_IN_DST.
1925
1926Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1927
1928 * alpha.h: New file.
1929
1930Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1931
1932 * rs6k.h: Remove obsolete file.
1933
1934Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1935
1936 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1937 fdivp, and fdivrp. Add ffreep.
1938
1939Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1940
1941 * h8300.h: Reorder various #defines for readability.
1942 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1943 (BITOP): Accept additional (unused) argument. All callers changed.
1944 (EBITOP): Likewise.
1945 (O_LAST): Bump.
1946 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1947
1948 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1949 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1950 (BITOP, EBITOP): Handle new H8/S addressing modes for
1951 bit insns.
1952 (UNOP3): Handle new shift/rotate insns on the H8/S.
1953 (insns using exr): New instructions.
1954 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1955
1956Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1957
1958 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1959 was incorrect.
1960
1961Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1962
1963 * h8300.h (START): Remove.
1964 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1965 and mov.l insns that can be relaxed.
1966
1967Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1968
1969 * i386.h: Remove Abs32 from lcall.
1970
1971Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1972
1973 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1974 (SLCPOP): New macro.
1975 Mark X,Y opcode letters as in use.
1976
1977Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1978
1979 * sparc.h (F_FLOAT, F_FBR): Define.
1980
1981Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1982
1983 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1984 from all insns.
1985 (ABS8SRC,ABS8DST): Add ABS8MEM.
1986 (add.l): Fix reg+reg variant.
1987 (eepmov.w): Renamed from eepmovw.
1988 (ldc,stc): Fix many cases.
1989
1990Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1991
1992 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1993
1994Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1995
1996 * sparc.h (O): Mark operand letter as in use.
1997
1998Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1999
2000 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2001 Mark operand letters uU as in use.
2002
2003Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2004
2005 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2006 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2007 (SPARC_OPCODE_SUPPORTED): New macro.
2008 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2009 (F_NOTV9): Delete.
2010
2011Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2012
2013 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2014 declaration consistent with return type in definition.
2015
2016Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2017
2018 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2019
2020Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2021
2022 * i386.h (i386_regtab): Add 80486 test registers.
2023
2024Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2025
2026 * i960.h (I_HX): Define.
2027 (i960_opcodes): Add HX instruction.
2028
2029Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2030
2031 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2032 and fclex.
2033
2034Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2035
2036 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2037 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2038 (bfd_* defines): Delete.
2039 (sparc_opcode_archs): Replaces architecture_pname.
2040 (sparc_opcode_lookup_arch): Declare.
2041 (NUMOPCODES): Delete.
2042
2043Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2044
2045 * sparc.h (enum sparc_architecture): Add v9a.
2046 (ARCHITECTURES_CONFLICT_P): Update.
2047
2048Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2049
2050 * i386.h: Added Pentium Pro instructions.
2051
2052Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2053
2054 * m68k.h: Document new 'W' operand place.
2055
2056Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2057
2058 * hppa.h: Add lci and syncdma instructions.
2059
2060Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2061
2062 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2063 instructions.
252b5132
RH
2064
2065Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2066
2067 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2068 assembler's -mcom and -many switches.
2069
2070Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2071
2072 * i386.h: Fix cmpxchg8b extension opcode description.
2073
2074Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2075
2076 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2077 and register cr4.
2078
2079Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2080
2081 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2082
2083Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2084
2085 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2086
2087Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2088
2089 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2090
2091Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2092
2093 * m68kmri.h: Remove.
2094
2095 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2096 declarations. Remove F_ALIAS and flag field of struct
2097 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2098 int. Make name and args fields of struct m68k_opcode const.
2099
2100Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2101
2102 * sparc.h (F_NOTV9): Define.
2103
2104Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2105
2106 * mips.h (INSN_4010): Define.
2107
2108Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2109
2110 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2111
2112 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2113 * m68k.h: Fix argument descriptions of coprocessor
2114 instructions to allow only alterable operands where appropriate.
2115 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2116 (m68k_opcode_aliases): Add more aliases.
2117
2118Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2119
2120 * m68k.h: Added explcitly short-sized conditional branches, and a
2121 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2122 svr4-based configurations.
2123
2124Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2125
2126 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2127 * i386.h: added missing Data16/Data32 flags to a few instructions.
2128
2129Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2130
2131 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2132 (OP_MASK_BCC, OP_SH_BCC): Define.
2133 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2134 (OP_MASK_CCC, OP_SH_CCC): Define.
2135 (INSN_READ_FPR_R): Define.
2136 (INSN_RFE): Delete.
2137
2138Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2139
2140 * m68k.h (enum m68k_architecture): Deleted.
2141 (struct m68k_opcode_alias): New type.
2142 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2143 matching constraints, values and flags. As a side effect of this,
2144 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2145 as I know were never used, now may need re-examining.
2146 (numopcodes): Now const.
2147 (m68k_opcode_aliases, numaliases): New variables.
2148 (endop): Deleted.
2149 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2150 m68k_opcode_aliases; update declaration of m68k_opcodes.
2151
2152Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2153
2154 * hppa.h (delay_type): Delete unused enumeration.
2155 (pa_opcode): Replace unused delayed field with an architecture
2156 field.
2157 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2158
2159Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2160
2161 * mips.h (INSN_ISA4): Define.
2162
2163Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2164
2165 * mips.h (M_DLA_AB, M_DLI): Define.
2166
2167Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2168
2169 * hppa.h (fstwx): Fix single-bit error.
2170
2171Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2172
2173 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2174
2175Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2176
2177 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2178 debug registers. From Charles Hannum (mycroft@netbsd.org).
2179
2180Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2181
2182 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2183 i386 support:
2184 * i386.h (MOV_AX_DISP32): New macro.
2185 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2186 of several call/return instructions.
2187 (ADDR_PREFIX_OPCODE): New macro.
2188
2189Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2190
2191 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2192
4f1d9bd8
NC
2193 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2194 char.
252b5132
RH
2195 (struct vot, field `name'): ditto.
2196
2197Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2198
2199 * vax.h: Supply and properly group all values in end sentinel.
2200
2201Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2202
2203 * mips.h (INSN_ISA, INSN_4650): Define.
2204
2205Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2206
2207 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2208 systems with a separate instruction and data cache, such as the
2209 29040, these instructions take an optional argument.
2210
2211Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2212
2213 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2214 INSN_TRAP.
2215
2216Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2217
2218 * mips.h (INSN_STORE_MEMORY): Define.
2219
2220Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2221
2222 * sparc.h: Document new operand type 'x'.
2223
2224Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2225
2226 * i960.h (I_CX2): New instruction category. It includes
2227 instructions available on Cx and Jx processors.
2228 (I_JX): New instruction category, for JX-only instructions.
2229 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2230 Jx-only instructions, in I_JX category.
2231
2232Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2233
2234 * ns32k.h (endop): Made pointer const too.
2235
2236Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2237
2238 * ns32k.h: Drop Q operand type as there is no correct use
2239 for it. Add I and Z operand types which allow better checking.
2240
2241Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2242
2243 * h8300.h (xor.l) :fix bit pattern.
2244 (L_2): New size of operand.
2245 (trapa): Use it.
2246
2247Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2248
2249 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2250
2251Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2252
2253 * sparc.h: Include v9 definitions.
2254
2255Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2256
2257 * m68k.h (m68060): Defined.
2258 (m68040up, mfloat, mmmu): Include it.
2259 (struct m68k_opcode): Widen `arch' field.
2260 (m68k_opcodes): Updated for M68060. Removed comments that were
2261 instructions commented out by "JF" years ago.
2262
2263Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2264
2265 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2266 add a one-bit `flags' field.
2267 (F_ALIAS): New macro.
2268
2269Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2270
2271 * h8300.h (dec, inc): Get encoding right.
2272
2273Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2274
2275 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2276 a flag instead.
2277 (PPC_OPERAND_SIGNED): Define.
2278 (PPC_OPERAND_SIGNOPT): Define.
2279
2280Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2281
2282 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2283 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2284
2285Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2286
2287 * i386.h: Reverse last change. It'll be handled in gas instead.
2288
2289Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2290
2291 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2292 slower on the 486 and used the implicit shift count despite the
2293 explicit operand. The one-operand form is still available to get
2294 the shorter form with the implicit shift count.
2295
2296Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2297
2298 * hppa.h: Fix typo in fstws arg string.
2299
2300Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2301
2302 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2303
2304Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2305
2306 * ppc.h (PPC_OPCODE_601): Define.
2307
2308Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2309
2310 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2311 (so we can determine valid completers for both addb and addb[tf].)
2312
2313 * hppa.h (xmpyu): No floating point format specifier for the
2314 xmpyu instruction.
2315
2316Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2317
2318 * ppc.h (PPC_OPERAND_NEXT): Define.
2319 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2320 (struct powerpc_macro): Define.
2321 (powerpc_macros, powerpc_num_macros): Declare.
2322
2323Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2324
2325 * ppc.h: New file. Header file for PowerPC opcode table.
2326
2327Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2328
2329 * hppa.h: More minor template fixes for sfu and copr (to allow
2330 for easier disassembly).
2331
2332 * hppa.h: Fix templates for all the sfu and copr instructions.
2333
2334Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2335
2336 * i386.h (push): Permit Imm16 operand too.
2337
2338Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2339
2340 * h8300.h (andc): Exists in base arch.
2341
2342Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2343
2344 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2345 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2346
2347Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2348
2349 * hppa.h: Add FP quadword store instructions.
2350
2351Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2352
2353 * mips.h: (M_J_A): Added.
2354 (M_LA): Removed.
2355
2356Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2357
2358 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2359 <mellon@pepper.ncd.com>.
2360
2361Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2362
2363 * hppa.h: Immediate field in probei instructions is unsigned,
2364 not low-sign extended.
2365
2366Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2367
2368 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2369
2370Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2371
2372 * i386.h: Add "fxch" without operand.
2373
2374Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2375
2376 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2377
2378Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2379
2380 * hppa.h: Add gfw and gfr to the opcode table.
2381
2382Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2383
2384 * m88k.h: extended to handle m88110.
2385
2386Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2387
2388 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2389 addresses.
2390
2391Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2392
2393 * i960.h (i960_opcodes): Properly bracket initializers.
2394
2395Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2396
2397 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2398
2399Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2400
2401 * m68k.h (two): Protect second argument with parentheses.
2402
2403Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2404
2405 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2406 Deleted old in/out instructions in "#if 0" section.
2407
2408Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2409
2410 * i386.h (i386_optab): Properly bracket initializers.
2411
2412Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2413
2414 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2415 Jeff Law, law@cs.utah.edu).
2416
2417Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2418
2419 * i386.h (lcall): Accept Imm32 operand also.
2420
2421Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2422
2423 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2424 (M_DABS): Added.
2425
2426Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2427
2428 * mips.h (INSN_*): Changed values. Removed unused definitions.
2429 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2430 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2431 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2432 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2433 (M_*): Added new values for r6000 and r4000 macros.
2434 (ANY_DELAY): Removed.
2435
2436Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2437
2438 * mips.h: Added M_LI_S and M_LI_SS.
2439
2440Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2441
2442 * h8300.h: Get some rare mov.bs correct.
2443
2444Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2445
2446 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2447 been included.
2448
2449Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2450
2451 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2452 jump instructions, for use in disassemblers.
2453
2454Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2455
2456 * m88k.h: Make bitfields just unsigned, not unsigned long or
2457 unsigned short.
2458
2459Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2460
2461 * hppa.h: New argument type 'y'. Use in various float instructions.
2462
2463Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2464
2465 * hppa.h (break): First immediate field is unsigned.
2466
2467 * hppa.h: Add rfir instruction.
2468
2469Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2470
2471 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2472
2473Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2474
2475 * mips.h: Reworked the hazard information somewhat, and fixed some
2476 bugs in the instruction hazard descriptions.
2477
2478Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2479
2480 * m88k.h: Corrected a couple of opcodes.
2481
2482Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2483
2484 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2485 new version includes instruction hazard information, but is
2486 otherwise reasonably similar.
2487
2488Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2489
2490 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2491
2492Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2493
2494 Patches from Jeff Law, law@cs.utah.edu:
2495 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2496 Make the tables be the same for the following instructions:
2497 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2498 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2499 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2500 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2501 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2502 "fcmp", and "ftest".
2503
2504 * hppa.h: Make new and old tables the same for "break", "mtctl",
2505 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2506 Fix typo in last patch. Collapse several #ifdefs into a
2507 single #ifdef.
2508
2509 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2510 of the comments up-to-date.
2511
2512 * hppa.h: Update "free list" of letters and update
2513 comments describing each letter's function.
2514
4f1d9bd8
NC
2515Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2516
2517 * h8300.h: Lots of little fixes for the h8/300h.
2518
2519Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2520
2521 Support for H8/300-H
2522 * h8300.h: Lots of new opcodes.
2523
252b5132
RH
2524Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2525
2526 * h8300.h: checkpoint, includes H8/300-H opcodes.
2527
2528Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2529
2530 * Patches from Jeffrey Law <law@cs.utah.edu>.
2531 * hppa.h: Rework single precision FP
2532 instructions so that they correctly disassemble code
2533 PA1.1 code.
2534
2535Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2536
2537 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2538 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2539
2540Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2541
2542 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2543 gdb will define it for now.
2544
2545Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2546
2547 * sparc.h: Don't end enumerator list with comma.
2548
2549Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2550
2551 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2552 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2553 ("bc2t"): Correct typo.
2554 ("[ls]wc[023]"): Use T rather than t.
2555 ("c[0123]"): Define general coprocessor instructions.
2556
2557Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2558
2559 * m68k.h: Move split point for gcc compilation more towards
2560 middle.
2561
2562Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2563
2564 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2565 simply wrong, ics, rfi, & rfsvc were missing).
2566 Add "a" to opr_ext for "bb". Doc fix.
2567
2568Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2569
2570 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2571 * mips.h: Add casts, to suppress warnings about shifting too much.
2572 * m68k.h: Document the placement code '9'.
2573
2574Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2575
2576 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2577 allows callers to break up the large initialized struct full of
2578 opcodes into two half-sized ones. This permits GCC to compile
2579 this module, since it takes exponential space for initializers.
2580 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2581
2582Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2583
2584 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2585 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2586 initialized structs in it.
2587
2588Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2589
2590 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2591 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2592 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2593
2594Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2595
2596 * mips.h: document "i" and "j" operands correctly.
2597
2598Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2599
2600 * mips.h: Removed endianness dependency.
2601
2602Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2603
2604 * h8300.h: include info on number of cycles per instruction.
2605
2606Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2607
2608 * hppa.h: Move handy aliases to the front. Fix masks for extract
2609 and deposit instructions.
2610
2611Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2612
2613 * i386.h: accept shld and shrd both with and without the shift
2614 count argument, which is always %cl.
2615
2616Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2617
2618 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2619 (one_byte_segment_defaults, two_byte_segment_defaults,
2620 i386_prefixtab_end): Ditto.
2621
2622Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2623
2624 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2625 for operand 2; from John Carr, jfc@dsg.dec.com.
2626
2627Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2628
2629 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2630 always use 16-bit offsets. Makes calculated-size jump tables
2631 feasible.
2632
2633Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2634
2635 * i386.h: Fix one-operand forms of in* and out* patterns.
2636
2637Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2638
2639 * m68k.h: Added CPU32 support.
2640
2641Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2642
2643 * mips.h (break): Disassemble the argument. Patch from
2644 jonathan@cs.stanford.edu (Jonathan Stone).
2645
2646Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2647
2648 * m68k.h: merged Motorola and MIT syntax.
2649
2650Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2651
2652 * m68k.h (pmove): make the tests less strict, the 68k book is
2653 wrong.
2654
2655Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2656
2657 * m68k.h (m68ec030): Defined as alias for 68030.
2658 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2659 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2660 them. Tightened description of "fmovex" to distinguish it from
2661 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2662 up descriptions that claimed versions were available for chips not
2663 supporting them. Added "pmovefd".
2664
2665Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2666
2667 * m68k.h: fix where the . goes in divull
2668
2669Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2670
2671 * m68k.h: the cas2 instruction is supposed to be written with
2672 indirection on the last two operands, which can be either data or
2673 address registers. Added a new operand type 'r' which accepts
2674 either register type. Added new cases for cas2l and cas2w which
2675 use them. Corrected masks for cas2 which failed to recognize use
2676 of address register.
2677
2678Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2679
2680 * m68k.h: Merged in patches (mostly m68040-specific) from
2681 Colin Smith <colin@wrs.com>.
2682
2683 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2684 base). Also cleaned up duplicates, re-ordered instructions for
2685 the sake of dis-assembling (so aliases come after standard names).
2686 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2687
2688Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2689
2690 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2691 all missing .s
2692
2693Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2694
2695 * sparc.h: Moved tables to BFD library.
2696
2697 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2698
2699Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2700
2701 * h8300.h: Finish filling in all the holes in the opcode table,
2702 so that the Lucid C compiler can digest this as well...
2703
2704Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2705
2706 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2707 Fix opcodes on various sizes of fild/fist instructions
2708 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2709 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2710
2711Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2712
2713 * h8300.h: Fill in all the holes in the opcode table so that the
2714 losing HPUX C compiler can digest this...
2715
2716Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2717
2718 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2719 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2720
2721Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2722
2723 * sparc.h: Add new architecture variant sparclite; add its scan
2724 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2725
2726Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2727
2728 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2729 fy@lucid.com).
2730
2731Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2732
2733 * rs6k.h: New version from IBM (Metin).
2734
2735Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2736
2737 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2738 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2739
2740Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2741
2742 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2743
2744Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2745
2746 * m68k.h (one, two): Cast macro args to unsigned to suppress
2747 complaints from compiler and lint about integer overflow during
2748 shift.
2749
2750Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2751
2752 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2753
2754Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2755
2756 * mips.h: Make bitfield layout depend on the HOST compiler,
2757 not on the TARGET system.
2758
2759Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2760
2761 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2762 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2763 <TRANLE@INTELLICORP.COM>.
2764
2765Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2766
2767 * h8300.h: turned op_type enum into #define list
2768
2769Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2770
2771 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2772 similar instructions -- they've been renamed to "fitoq", etc.
2773 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2774 number of arguments.
2775 * h8300.h: Remove extra ; which produces compiler warning.
2776
2777Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2778
2779 * sparc.h: fix opcode for tsubcctv.
2780
2781Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2782
2783 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2784
2785Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2786
2787 * sparc.h (nop): Made the 'lose' field be even tighter,
2788 so only a standard 'nop' is disassembled as a nop.
2789
2790Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2791
2792 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2793 disassembled as a nop.
2794
4f1d9bd8
NC
2795Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2796
2797 * m68k.h, sparc.h: ANSIfy enums.
2798
252b5132
RH
2799Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2800
2801 * sparc.h: fix a typo.
2802
2803Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2804
2805 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2806 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2807 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2808
2809\f
2810Local Variables:
2811version-control: never
2812End:
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