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IA-64 ELF support.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
800eeca4
JW		 1Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
2 David Mosberger <davidm@hpl.hp.com>
3 Timothy Wall <twall@cygnus.com>
4 Jim Wilson <wilson@cygnus.com>
5
6 * ia64.h: New file.
7
ba23e138
NC		 82000-03-27 Nick Clifton <nickc@cygnus.com>
9
10 * d30v.h (SHORT_A1): Fix value.
11 (SHORT_AR): Renumber so that it is at the end of the list of short
12 instructions, not the end of the list of long instructions.
13
d0b47220
AM		 142000-03-26 Alan Modra <alan@linuxcare.com>
15
16 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
17 problem isn't really specific to Unixware.
18 (OLDGCC_COMPAT): Define.
19 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
20 destination %st(0).
21 Fix lots of comments.
22
866afedc
NC		 232000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
24
25 * d30v.h:
26 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
27 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
28 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
29 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
30 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
31 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
32 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
33
cc5ca5ce
AM		 342000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
35
36 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
37 fistpd without suffix.
38
68e324a2
NC		 392000-02-24 Nick Clifton <nickc@cygnus.com>
40
41 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
42 'signed_overflow_ok_p'.
43 Delete prototypes for cgen_set_flags() and cgen_get_flags().
44
60f036a2
AH		 452000-02-24 Andrew Haley <aph@cygnus.com>
46
47 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
48 (CGEN_CPU_TABLE): flags: new field.
49 Add prototypes for new functions.
50
9b9b5cd4
AM		 512000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
52
53 * i386.h: Add some more UNIXWARE_COMPAT comments.
54
5b93d8bb
AM		 552000-02-23 Linas Vepstas <linas@linas.org>
56
57 * i370.h: New file.
58
87f398dd
AH		 592000-02-22 Andrew Haley <aph@cygnus.com>
60
61 * mips.h: (OPCODE_IS_MEMBER): Add comment.
62
367c01af
AH		 631999-12-30 Andrew Haley <aph@cygnus.com>
64
9a1e79ca
AH		 65 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
66 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
67 insns.
367c01af 68
add0c677
AM		 692000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
70
71 * i386.h: Qualify intel mode far call and jmp with x_Suf.
72
3138f287
AM		 731999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
74
75 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
76 indirect jumps and calls. Add FF/3 call for intel mode.
77
ccecd07b
JL		 78Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
79
80 * mn10300.h: Add new operand types. Add new instruction formats.
81
b37e19e9
JL		 82Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
83
84 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
85 instruction.
86
5fce5ddf
GRK		 871999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
88
89 * mips.h (INSN_ISA5): New.
90
2bd7f1f3
GRK		 911999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
92
93 * mips.h (OPCODE_IS_MEMBER): New.
94
4df2b5c5
NC		 951999-10-29 Nick Clifton <nickc@cygnus.com>
96
97 * d30v.h (SHORT_AR): Define.
98
446a06c9
MM		 991999-10-18 Michael Meissner <meissner@cygnus.com>
100
101 * alpha.h (alpha_num_opcodes): Convert to unsigned.
102 (alpha_num_operands): Ditto.
103
eca04c6a
JL		 104Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
105
106 * hppa.h (pa_opcodes): Add load and store cache control to
107 instructions. Add ordered access load and store.
108
109 * hppa.h (pa_opcode): Add new entries for addb and addib.
110
111 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
112
113 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
114
c43185de
DN		 115Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
116
117 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
118
ec3533da
JL		 119Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
120
390f858d
JL		 121 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
122 and "be" using completer prefixes.
123
8c47ebd9
JL		 124 * hppa.h (pa_opcodes): Add initializers to silence compiler.
125
ec3533da
JL		 126 * hppa.h: Update comments about character usage.
127
18369bea
JL		 128Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
129
130 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
131 up the new fstw & bve instructions.
132
c36efdd2
JL		 133Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
134
d3ffb032
JL		 135 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
136 instructions.
137
c49ec3da
JL		 138 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
139
5d2e7ecc
JL		 140 * hppa.h (pa_opcodes): Add long offset double word load/store
141 instructions.
142
6397d1a2
JL		 143 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
144 stores.
145
142f0fe0
JL		 146 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
147
f5a68b45
JL		 148 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
149
8235801e
JL		 150 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
151
35184366
JL		 152 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
153
f0bfde5e
JL		 154 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
155
27bbbb58
JL		 156 * hppa.h (pa_opcodes): Add support for "b,l".
157
c36efdd2
JL		 158 * hppa.h (pa_opcodes): Add support for "b,gate".
159
f2727d04
JL		 160Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
161
9392fb11
JL		 162 * hppa.h (pa_opcodes): Use 'fX' for first register operand
163 in xmpyu.
164
e0c52e99
JL		 165 * hppa.h (pa_opcodes): Fix mask for probe and probei.
166
f2727d04
JL		 167 * hppa.h (pa_opcodes): Fix mask for depwi.
168
52d836e2
JL		 169Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
170
171 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
172 an explicit output argument.
173
90765e3a
JL		 174Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
175
176 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
177 Add a few PA2.0 loads and store variants.
178
8340b17f
ILT		 1791999-09-04 Steve Chamberlain <sac@pobox.com>
180
181 * pj.h: New file.
182
5f47d35b
AM		 1831999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
184
185 * i386.h (i386_regtab): Move %st to top of table, and split off
186 other fp reg entries.
187 (i386_float_regtab): To here.
188
1c143202
JL		 189Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
190
7d8fdb64
JL		 191 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
192 by 'f'.
193
90927b9c
JL		 194 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
195 Add supporting args.
196
1d16bf9c
JL		 197 * hppa.h: Document new completers and args.
198 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
199 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
200 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
201 pmenb and pmdis.
202
96226a68
JL		 203 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
204 hshr, hsub, mixh, mixw, permh.
205
5d4ba527
JL		 206 * hppa.h (pa_opcodes): Change completers in instructions to
207 use 'c' prefix.
208
e9fc28c6
JL		 209 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
210 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
211
1c143202
JL		 212 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
213 fnegabs to use 'I' instead of 'F'.
214
9e525108
AM		 2151999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
216
217 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
218 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
219 Alphabetically sort PIII insns.
220
e8da1bf1
DE		 221Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
222
223 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
224
7d627258
JL		 225Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
226
5696871a
JL		 227 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
228 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
229
7d627258
JL		 230 * hppa.h: Document 64 bit condition completers.
231
c5e52916
JL		 232Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
233
234 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
235
eecb386c
AM		 2361999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
237
238 * i386.h (i386_optab): Add DefaultSize modifier to all insns
239 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
240 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
241
88a380f3
JL		 242Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
243 Jeff Law <law@cygnus.com>
244
245 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
246
247 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 248
249 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
250 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
251
145cf1f0
AM		 2521999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
253
254 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
255
73826640
JL		 256Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
257
258 * hppa.h (struct pa_opcode): Add new field "flags".
259 (FLAGS_STRICT): Define.
260
b65db252
JL		 261Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
262 Jeff Law <law@cygnus.com>
263
f7fc668b
JL		 264 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
265
266 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 267
10084519
AM		 2681999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
269
270 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
271 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
272 flag to fcomi and friends.
273
cd8a80ba
JL		 274Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
275
276 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
277 integer logical instructions.
278
1fca749b
ILT		 2791999-05-28 Linus Nordberg <linus.nordberg@canit.se>
280
281 * m68k.h: Document new formats `E', `G', `H' and new places `N',
282 `n', `o'.
283
284 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
285 and new places `m', `M', `h'.
286
aa008907
JL		 287Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
288
289 * hppa.h (pa_opcodes): Add several processor specific system
290 instructions.
291
e26b85f0
JL		 292Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
293
294 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
295 "addb", and "addib" to be used by the disassembler.
296
c608c12e
AM		 2971999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
298
299 * i386.h (ReverseModrm): Remove all occurences.
300 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
301 movmskps, pextrw, pmovmskb, maskmovq.
302 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
303 ignore the data size prefix.
304
305 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
306 Mostly stolen from Doug Ledford <dledford@redhat.com>
307
45c18104
RH		 308Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
309
310 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
311
252b5132
RH		 3121999-04-14 Doug Evans <devans@casey.cygnus.com>
313
314 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
315 (CGEN_ATTR_TYPE): Update.
316 (CGEN_ATTR_MASK): Number booleans starting at 0.
317 (CGEN_ATTR_VALUE): Update.
318 (CGEN_INSN_ATTR): Update.
319
320Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
321
322 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
323 instructions.
324
325Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
326
327 * hppa.h (bb, bvb): Tweak opcode/mask.
328
329
3301999-03-22 Doug Evans <devans@casey.cygnus.com>
331
332 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
333 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
334 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
335 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
336 Delete member max_insn_size.
337 (enum cgen_cpu_open_arg): New enum.
338 (cpu_open): Update prototype.
339 (cpu_open_1): Declare.
340 (cgen_set_cpu): Delete.
341
3421999-03-11 Doug Evans <devans@casey.cygnus.com>
343
344 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
345 (CGEN_OPERAND_NIL): New macro.
346 (CGEN_OPERAND): New member `type'.
347 (@arch@_cgen_operand_table): Delete decl.
348 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
349 (CGEN_OPERAND_TABLE): New struct.
350 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
351 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
352 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
353 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
354 {get,set}_{int,vma}_operand.
355 (@arch@_cgen_cpu_open): New arg `isa'.
356 (cgen_set_cpu): Ditto.
357
358Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
359
360 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
361
3621999-02-25 Doug Evans <devans@casey.cygnus.com>
363
364 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
365 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
366 enum cgen_hw_type.
367 (CGEN_HW_TABLE): New struct.
368 (hw_table): Delete declaration.
369 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
370 to table entry to enum.
371 (CGEN_OPINST): Ditto.
372 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
373
374Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
375
376 * alpha.h (AXP_OPCODE_EV6): New.
377 (AXP_OPCODE_NOPAL): Include it.
378
3791999-02-09 Doug Evans <devans@casey.cygnus.com>
380
381 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
382 All uses updated. New members int_insn_p, max_insn_size,
383 parse_operand,insert_operand,extract_operand,print_operand,
384 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
385 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
386 extract_handlers,print_handlers.
387 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
388 (CGEN_ATTR_BOOL_OFFSET): New macro.
389 (CGEN_ATTR_MASK): Subtract it to compute bit number.
390 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
391 (cgen_opcode_handler): Renamed from cgen_base.
392 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
393 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
394 all uses updated.
395 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
396 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
397 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
398 (CGEN_OPCODE,CGEN_IBASE): New types.
399 (CGEN_INSN): Rewrite.
400 (CGEN_{ASM,DIS}_HASH*): Delete.
401 (init_opcode_table,init_ibld_table): Declare.
402 (CGEN_INSN_ATTR): New type.
403
404Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
405
406 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
407 (x_FP, d_FP, dls_FP, sldx_FP): Define.
408 Change *Suf definitions to include x and d suffixes.
409 (movsx): Use w_Suf and b_Suf.
410 (movzx): Likewise.
411 (movs): Use bwld_Suf.
412 (fld): Change ordering. Use sld_FP.
413 (fild): Add Intel Syntax equivalent of fildq.
414 (fst): Use sld_FP.
415 (fist): Use sld_FP.
416 (fstp): Use sld_FP. Add x_FP version.
417 (fistp): LLongMem version for Intel Syntax.
418 (fcom, fcomp): Use sld_FP.
419 (fadd, fiadd, fsub): Use sld_FP.
420 (fsubr): Use sld_FP.
421 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
422
4231999-01-27 Doug Evans <devans@casey.cygnus.com>
424
425 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
426 CGEN_MODE_UINT.
427
428Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
429
430 * hppa.h (bv): Fix mask.
431
4321999-01-05 Doug Evans <devans@casey.cygnus.com>
433
434 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
435 (CGEN_ATTR): Use it.
436 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
437 (CGEN_ATTR_TABLE): New member dfault.
438
4391998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
440
441 * mips.h (MIPS16_INSN_BRANCH): New.
442
443Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
444
445 The following is part of a change made by Edith Epstein
446 <eepstein@sophia.cygnus.com> as part of a project to merge in
447 changes by HP; HP did not create ChangeLog entries.
448
449 * hppa.h (completer_chars): list of chars to not put a space
450 after.
451
452Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
453
454 * i386.h (i386_optab): Permit w suffix on processor control and
455 status word instructions.
456
4571998-11-30 Doug Evans <devans@casey.cygnus.com>
458
459 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
460 (struct cgen_keyword_entry): Ditto.
461 (struct cgen_operand): Ditto.
462 (CGEN_IFLD): New typedef, with associated access macros.
463 (CGEN_IFMT): New typedef, with associated access macros.
464 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
465 (CGEN_IVALUE): New typedef.
466 (struct cgen_insn): Delete const on syntax,attrs members.
467 `format' now points to format data. Type of `value' is now
468 CGEN_IVALUE.
469 (struct cgen_opcode_table): New member ifld_table.
470
4711998-11-18 Doug Evans <devans@casey.cygnus.com>
472
473 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
474 (CGEN_OPERAND_INSTANCE): New member `attrs'.
475 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
476 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
477 (cgen_opcode_table): Update type of dis_hash fn.
478 (extract_operand): Update type of `insn_value' arg.
479
480Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
481
482 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
483
484Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
485
486 * mips.h (INSN_MULT): Added.
487
488Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
489
490 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
491
492Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
493
494 * cgen.h (CGEN_INSN_INT): New typedef.
495 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
496 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
497 (CGEN_INSN_BYTES_PTR): New typedef.
498 (CGEN_EXTRACT_INFO): New typedef.
499 (cgen_insert_fn,cgen_extract_fn): Update.
500 (cgen_opcode_table): New member `insn_endian'.
501 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
502 (insert_operand,extract_operand): Update.
503 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
504
505Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
506
507 * cgen.h (CGEN_ATTR_BOOLS): New macro.
508 (struct CGEN_HW_ENTRY): New member `attrs'.
509 (CGEN_HW_ATTR): New macro.
510 (struct CGEN_OPERAND_INSTANCE): New member `name'.
511 (CGEN_INSN_INVALID_P): New macro.
512
513Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
514
515 * hppa.h: Add "fid".
516
517Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
518
519 From Robert Andrew Dale <rob@nb.net>
520 * i386.h (i386_optab): Add AMD 3DNow! instructions.
521 (AMD_3DNOW_OPCODE): Define.
522
523Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
524
525 * d30v.h (EITHER_BUT_PREFER_MU): Define.
526
527Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
528
529 * cgen.h (cgen_insn): #if 0 out element `cdx'.
530
531Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
532
533 Move all global state data into opcode table struct, and treat
534 opcode table as something that is "opened/closed".
535 * cgen.h (CGEN_OPCODE_DESC): New type.
536 (all fns): New first arg of opcode table descriptor.
537 (cgen_set_parse_operand_fn): Add prototype.
538 (cgen_current_machine,cgen_current_endian): Delete.
539 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
540 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
541 dis_hash_table,dis_hash_table_entries.
542 (opcode_open,opcode_close): Add prototypes.
543
544 * cgen.h (cgen_insn): New element `cdx'.
545
546Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
547
548 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
549
550Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
551
552 * mn10300.h: Add "no_match_operands" field for instructions.
553 (MN10300_MAX_OPERANDS): Define.
554
555Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
556
557 * cgen.h (cgen_macro_insn_count): Declare.
558
559Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
560
561 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
562 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
563 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
564 set_{int,vma}_operand.
565
566Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
567
568 * mn10300.h: Add "machine" field for instructions.
569 (MN103, AM30): Define machine types.
570
571Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
572
573 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
574
5751998-06-18 Ulrich Drepper <drepper@cygnus.com>
576
577 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
578
579Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
580
581 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
582 and ud2b.
583 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
584 those that happen to be implemented on pentiums.
585
586Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
587
588 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
589 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
590 with Size16|IgnoreSize or Size32|IgnoreSize.
591
592Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
593
594 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
595 (REPE): Rename to REPE_PREFIX_OPCODE.
596 (i386_regtab_end): Remove.
597 (i386_prefixtab, i386_prefixtab_end): Remove.
598 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
599 of md_begin.
600 (MAX_OPCODE_SIZE): Define.
601 (i386_optab_end): Remove.
602 (sl_Suf): Define.
603 (sl_FP): Use sl_Suf.
604
605 * i386.h (i386_optab): Allow 16 bit displacement for `mov
606 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
607 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
608 data32, dword, and adword prefixes.
609 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
610 regs.
611
612Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
613
614 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
615
616 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
617 register operands, because this is a common idiom. Flag them with
618 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
619 fdivrp because gcc erroneously generates them. Also flag with a
620 warning.
621
622 * i386.h: Add suffix modifiers to most insns, and tighter operand
623 checks in some cases. Fix a number of UnixWare compatibility
624 issues with float insns. Merge some floating point opcodes, using
625 new FloatMF modifier.
626 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
627 consistency.
628
629 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
630 IgnoreDataSize where appropriate.
631
632Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
633
634 * i386.h: (one_byte_segment_defaults): Remove.
635 (two_byte_segment_defaults): Remove.
636 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
637
638Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
639
640 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
641 (cgen_hw_lookup_by_num): Declare.
642
643Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
644
645 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
646 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
647
648Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
649
650 * cgen.h (cgen_asm_init_parse): Delete.
651 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
652 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
653
654Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
655
656 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
657 (cgen_asm_finish_insn): Update prototype.
658 (cgen_insn): New members num, data.
659 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
660 dis_hash, dis_hash_table_size moved to ...
661 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
662 All uses updated. New members asm_hash_p, dis_hash_p.
663 (CGEN_MINSN_EXPANSION): New struct.
664 (cgen_expand_macro_insn): Declare.
665 (cgen_macro_insn_count): Declare.
666 (get_insn_operands): Update prototype.
667 (lookup_get_insn_operands): Declare.
668
669Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
670
671 * i386.h (i386_optab): Change iclrKludge and imulKludge to
672 regKludge. Add operands types for string instructions.
673
674Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
675
676 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
677 table.
678
679Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
680
681 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
682 for `gettext'.
683
684Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
685
686 * i386.h: Remove NoModrm flag from all insns: it's never checked.
687 Add IsString flag to string instructions.
688 (IS_STRING): Don't define.
689 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
690 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
691 (SS_PREFIX_OPCODE): Define.
692
693Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
694
695 * i386.h: Revert March 24 patch; no more LinearAddress.
696
697Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
698
699 * i386.h (i386_optab): Remove fwait (9b) from all floating point
700 instructions, and instead add FWait opcode modifier. Add short
701 form of fldenv and fstenv.
702 (FWAIT_OPCODE): Define.
703
704 * i386.h (i386_optab): Change second operand constraint of `mov
705 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
706 allow legal instructions such as `movl %gs,%esi'
707
708Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
709
710 * h8300.h: Various changes to fully bracket initializers.
711
712Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
713
714 * i386.h: Set LinearAddress for lidt and lgdt.
715
716Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
717
718 * cgen.h (CGEN_BOOL_ATTR): New macro.
719
720Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
721
722 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
723
724Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
725
726 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
727 (cgen_insn): Record syntax and format entries here, rather than
728 separately.
729
730Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
731
732 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
733
734Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
735
736 * cgen.h (cgen_insert_fn): Change type of result to const char *.
737 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
738 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
739
740Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
741
742 * cgen.h (lookup_insn): New argument alias_p.
743
744Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
745
746Fix rac to accept only a0:
747 * d10v.h (OPERAND_ACC): Split into:
748 (OPERAND_ACC0, OPERAND_ACC1) .
749 (OPERAND_GPR): Define.
750
751Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
752
753 * cgen.h (CGEN_FIELDS): Define here.
754 (CGEN_HW_ENTRY): New member `type'.
755 (hw_list): Delete decl.
756 (enum cgen_mode): Declare.
757 (CGEN_OPERAND): New member `hw'.
758 (enum cgen_operand_instance_type): Declare.
759 (CGEN_OPERAND_INSTANCE): New type.
760 (CGEN_INSN): New member `operands'.
761 (CGEN_OPCODE_DATA): Make hw_list const.
762 (get_insn_operands,lookup_insn): Add prototypes for.
763
764Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
765
766 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
767 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
768 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
769 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
770
771Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
772
773 * cgen.h: Correct typo in comment end marker.
774
775Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
776
777 * tic30.h: New file.
778
779Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
780
781 * cgen.h: Add prototypes for cgen_save_fixups(),
782 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
783 of cgen_asm_finish_insn() to return a char *.
784
785Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
786
787 * cgen.h: Formatting changes to improve readability.
788
789Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
790
791 * cgen.h (*): Clean up pass over `struct foo' usage.
792 (CGEN_ATTR): Make unsigned char.
793 (CGEN_ATTR_TYPE): Update.
794 (CGEN_ATTR_{ENTRY,TABLE}): New types.
795 (cgen_base): Move member `attrs' to cgen_insn.
796 (CGEN_KEYWORD): New member `null_entry'.
797 (CGEN_{SYNTAX,FORMAT}): New types.
798 (cgen_insn): Format and syntax separated from each other.
799
800Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
801
802 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
803 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
804 flags_{used,set} long.
805 (d30v_operand): Make flags field long.
806
807Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
808
809 * m68k.h: Fix comment describing operand types.
810
811Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
812
813 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
814 everything else after down.
815
816Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
817
818 * d10v.h (OPERAND_FLAG): Split into:
819 (OPERAND_FFLAG, OPERAND_CFLAG) .
820
821Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
822
823 * mips.h (struct mips_opcode): Changed comments to reflect new
824 field usage.
825
826Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
827
828 * mips.h: Added to comments a quick-ref list of all assigned
829 operand type characters.
830 (OP_{MASK,SH}_PERFREG): New macros.
831
832Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
833
834 * sparc.h: Add '_' and '/' for v9a asr's.
835 Patch from David Miller <davem@vger.rutgers.edu>
836
837Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
838
839 * h8300.h: Bit ops with absolute addresses not in the 8 bit
840 area are not available in the base model (H8/300).
841
842Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
843
844 * m68k.h: Remove documentation of ` operand specifier.
845
846Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
847
848 * m68k.h: Document q and v operand specifiers.
849
850Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
851
852 * v850.h (struct v850_opcode): Add processors field.
853 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
854 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
855 (PROCESSOR_V850EA): New bit constants.
856
857Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
858
859 Merge changes from Martin Hunt:
860
861 * d30v.h: Allow up to 64 control registers. Add
862 SHORT_A5S format.
863
864 * d30v.h (LONG_Db): New form for delayed branches.
865
866 * d30v.h: (LONG_Db): New form for repeati.
867
868 * d30v.h (SHORT_D2B): New form.
869
870 * d30v.h (SHORT_A2): New form.
871
872 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
873 registers are used. Needed for VLIW optimization.
874
875Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
876
877 * cgen.h: Move assembler interface section
878 up so cgen_parse_operand_result is defined for cgen_parse_address.
879 (cgen_parse_address): Update prototype.
880
881Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
882
883 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
884
885Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
886
887 * i386.h (two_byte_segment_defaults): Correct base register 5 in
888 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
889 <paubert@iram.es>.
890
891 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
892 <paubert@iram.es>.
893
894 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
895 <paubert@iram.es>.
896
897 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
898 (JUMP_ON_ECX_ZERO): Remove commented out macro.
899
900Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
901
902 * v850.h (V850_NOT_R0): New flag.
903
904Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
905
906 * v850.h (struct v850_opcode): Remove flags field.
907
908Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
909
910 * v850.h (struct v850_opcode): Add flags field.
911 (struct v850_operand): Extend meaning of 'bits' and 'shift'
912 fields.
913 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
914 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
915
916Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
917
918 * arc.h: New file.
919
920Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
921
922 * sparc.h (sparc_opcodes): Declare as const.
923
924Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
925
926 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
927 uses single or double precision floating point resources.
928 (INSN_NO_ISA, INSN_ISA1): Define.
929 (cpu specific INSN macros): Tweak into bitmasks outside the range
930 of INSN_ISA field.
931
932Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
933
934 * i386.h: Fix pand opcode.
935
936Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
937
938 * mips.h: Widen INSN_ISA and move it to a more convenient
939 bit position. Add INSN_3900.
940
941Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
942
943 * mips.h (struct mips_opcode): added new field membership.
944
945Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
946
947 * i386.h (movd): only Reg32 is allowed.
948
949 * i386.h: add fcomp and ud2. From Wayne Scott
950 <wscott@ichips.intel.com>.
951
952Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
953
954 * i386.h: Add MMX instructions.
955
956Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
957
958 * i386.h: Remove W modifier from conditional move instructions.
959
960Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
961
962 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
963 with no arguments to match that generated by the UnixWare
964 assembler.
965
966Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
967
968 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
969 (cgen_parse_operand_fn): Declare.
970 (cgen_init_parse_operand): Declare.
971 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
972 new argument `want'.
973 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
974 (enum cgen_parse_operand_type): New enum.
975
976Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
977
978 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
979
980Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
981
982 * cgen.h: New file.
983
984Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
985
986 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
987 fdivrp.
988
989Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
990
991 * v850.h (extract): Make unsigned.
992
993Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
994
995 * i386.h: Add iclr.
996
997Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
998
999 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1000 take a direction bit.
1001
1002Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1003
1004 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1005
1006Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1007
1008 * sparc.h: Include <ansidecl.h>. Update function declarations to
1009 use prototypes, and to use const when appropriate.
1010
1011Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1012
1013 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1014
1015Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1016
1017 * d10v.h: Change pre_defined_registers to
1018 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1019
1020Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1021
1022 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1023 Change mips_opcodes from const array to a pointer,
1024 and change bfd_mips_num_opcodes from const int to int,
1025 so that we can increase the size of the mips opcodes table
1026 dynamically.
1027
1028Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1029
1030 * d30v.h (FLAG_X): Remove unused flag.
1031
1032Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1033
1034 * d30v.h: New file.
1035
1036Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1037
1038 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1039 (PDS_VALUE): Macro to access value field of predefined symbols.
1040 (tic80_next_predefined_symbol): Add prototype.
1041
1042Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1043
1044 * tic80.h (tic80_symbol_to_value): Change prototype to match
1045 change in function, added class parameter.
1046
1047Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1048
1049 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1050 endmask fields, which are somewhat weird in that 0 and 32 are
1051 treated exactly the same.
1052
1053Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1054
1055 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1056 rather than a constant that is 2**X. Reorder them to put bits for
1057 operands that have symbolic names in the upper bits, so they can
1058 be packed into an int where the lower bits contain the value that
1059 corresponds to that symbolic name.
1060 (predefined_symbo): Add struct.
1061 (tic80_predefined_symbols): Declare array of translations.
1062 (tic80_num_predefined_symbols): Declare size of that array.
1063 (tic80_value_to_symbol): Declare function.
1064 (tic80_symbol_to_value): Declare function.
1065
1066Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1067
1068 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1069
1070Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1071
1072 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1073 be the destination register.
1074
1075Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1076
1077 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1078 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1079 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1080 that the opcode can have two vector instructions in a single
1081 32 bit word and we have to encode/decode both.
1082
1083Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1084
1085 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1086 TIC80_OPERAND_RELATIVE for PC relative.
1087 (TIC80_OPERAND_BASEREL): New flag bit for register
1088 base relative.
1089
1090Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1091
1092 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1093
1094Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1095
1096 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1097 ":s" modifier for scaling.
1098
1099Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1100
1101 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1102 (TIC80_OPERAND_M_LI): Ditto
1103
1104Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1105
1106 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1107 (TIC80_OPERAND_CC): New define for condition code operand.
1108 (TIC80_OPERAND_CR): New define for control register operand.
1109
1110Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1111
1112 * tic80.h (struct tic80_opcode): Name changed.
1113 (struct tic80_opcode): Remove format field.
1114 (struct tic80_operand): Add insertion and extraction functions.
1115 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1116 correct ones.
1117 (FMT_*): Ditto.
1118
1119Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1120
1121 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1122 type IV instruction offsets.
1123
1124Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1125
1126 * tic80.h: New file.
1127
1128Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1129
1130 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1131
1132Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1133
1134 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1135 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1136 * v850.h: Fix comment, v850_operand not powerpc_operand.
1137
1138Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1139
1140 * mn10200.h: Flesh out structures and definitions needed by
1141 the mn10200 assembler & disassembler.
1142
1143Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1144
1145 * mips.h: Add mips16 definitions.
1146
1147Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1148
1149 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1150
1151Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1152
1153 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1154 (MN10300_OPERAND_MEMADDR): Define.
1155
1156Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1157
1158 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1159
1160Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1161
1162 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1163
1164Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1165
1166 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1167
1168Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1169
1170 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1171
1172Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1173
1174 * alpha.h: Don't include "bfd.h"; private relocation types are now
1175 negative to minimize problems with shared libraries. Organize
1176 instruction subsets by AMASK extensions and PALcode
1177 implementation.
1178 (struct alpha_operand): Move flags slot for better packing.
1179
1180Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1181
1182 * v850.h (V850_OPERAND_RELAX): New operand flag.
1183
1184Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1185
1186 * mn10300.h (FMT_*): Move operand format definitions
1187 here.
1188
1189Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1190
1191 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1192
1193Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1194
1195 * mn10300.h (mn10300_opcode): Add "format" field.
1196 (MN10300_OPERAND_*): Define.
1197
1198Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1199
1200 * mn10x00.h: Delete.
1201 * mn10200.h, mn10300.h: New files.
1202
1203Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1204
1205 * mn10x00.h: New file.
1206
1207Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1208
1209 * v850.h: Add new flag to indicate this instruction uses a PC
1210 displacement.
1211
1212Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1213
1214 * h8300.h (stmac): Add missing instruction.
1215
1216Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1217
1218 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1219 field.
1220
1221Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1222
1223 * v850.h (V850_OPERAND_EP): Define.
1224
1225 * v850.h (v850_opcode): Add size field.
1226
1227Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1228
1229 * v850.h (v850_operands): Add insert and extract fields, pointers
1230 to functions used to handle unusual operand encoding.
1231 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1232 V850_OPERAND_SIGNED): Defined.
1233
1234Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1235
1236 * v850.h (v850_operands): Add flags field.
1237 (OPERAND_REG, OPERAND_NUM): Defined.
1238
1239Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1240
1241 * v850.h: New file.
1242
1243Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1244
1245 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1246 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1247 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1248 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1249 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1250 Defined.
1251
1252Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1253
1254 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1255 a 3 bit space id instead of a 2 bit space id.
1256
1257Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1258
1259 * d10v.h: Add some additional defines to support the
1260 assembler in determining which operations can be done in parallel.
1261
1262Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1263
1264 * h8300.h (SN): Define.
1265 (eepmov.b): Renamed from "eepmov"
1266 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1267 with them.
1268
1269Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1270
1271 * d10v.h (OPERAND_SHIFT): New operand flag.
1272
1273Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1274
1275 * d10v.h: Changes for divs, parallel-only instructions, and
1276 signed numbers.
1277
1278Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1279
1280 * d10v.h (pd_reg): Define. Putting the definition here allows
1281 the assembler and disassembler to share the same struct.
1282
1283Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1284
1285 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1286 Williams <steve@icarus.com>.
1287
1288Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1289
1290 * d10v.h: New file.
1291
1292Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1293
1294 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1295
1296Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1297
1298 * m68k.h (mcf5200): New macro.
1299 Document names of coldfire control registers.
1300
1301Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1302
1303 * h8300.h (SRC_IN_DST): Define.
1304
1305 * h8300.h (UNOP3): Mark the register operand in this insn
1306 as a source operand, not a destination operand.
1307 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1308 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1309 register operand with SRC_IN_DST.
1310
1311Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1312
1313 * alpha.h: New file.
1314
1315Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1316
1317 * rs6k.h: Remove obsolete file.
1318
1319Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1320
1321 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1322 fdivp, and fdivrp. Add ffreep.
1323
1324Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1325
1326 * h8300.h: Reorder various #defines for readability.
1327 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1328 (BITOP): Accept additional (unused) argument. All callers changed.
1329 (EBITOP): Likewise.
1330 (O_LAST): Bump.
1331 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1332
1333 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1334 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1335 (BITOP, EBITOP): Handle new H8/S addressing modes for
1336 bit insns.
1337 (UNOP3): Handle new shift/rotate insns on the H8/S.
1338 (insns using exr): New instructions.
1339 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1340
1341Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1342
1343 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1344 was incorrect.
1345
1346Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1347
1348 * h8300.h (START): Remove.
1349 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1350 and mov.l insns that can be relaxed.
1351
1352Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1353
1354 * i386.h: Remove Abs32 from lcall.
1355
1356Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1357
1358 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1359 (SLCPOP): New macro.
1360 Mark X,Y opcode letters as in use.
1361
1362Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1363
1364 * sparc.h (F_FLOAT, F_FBR): Define.
1365
1366Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1367
1368 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1369 from all insns.
1370 (ABS8SRC,ABS8DST): Add ABS8MEM.
1371 (add.l): Fix reg+reg variant.
1372 (eepmov.w): Renamed from eepmovw.
1373 (ldc,stc): Fix many cases.
1374
1375Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1376
1377 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1378
1379Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1380
1381 * sparc.h (O): Mark operand letter as in use.
1382
1383Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1384
1385 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1386 Mark operand letters uU as in use.
1387
1388Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1389
1390 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1391 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1392 (SPARC_OPCODE_SUPPORTED): New macro.
1393 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1394 (F_NOTV9): Delete.
1395
1396Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1397
1398 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1399 declaration consistent with return type in definition.
1400
1401Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1402
1403 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1404
1405Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1406
1407 * i386.h (i386_regtab): Add 80486 test registers.
1408
1409Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1410
1411 * i960.h (I_HX): Define.
1412 (i960_opcodes): Add HX instruction.
1413
1414Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1415
1416 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1417 and fclex.
1418
1419Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1420
1421 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1422 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1423 (bfd_* defines): Delete.
1424 (sparc_opcode_archs): Replaces architecture_pname.
1425 (sparc_opcode_lookup_arch): Declare.
1426 (NUMOPCODES): Delete.
1427
1428Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1429
1430 * sparc.h (enum sparc_architecture): Add v9a.
1431 (ARCHITECTURES_CONFLICT_P): Update.
1432
1433Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1434
1435 * i386.h: Added Pentium Pro instructions.
1436
1437Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1438
1439 * m68k.h: Document new 'W' operand place.
1440
1441Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1442
1443 * hppa.h: Add lci and syncdma instructions.
1444
1445Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1446
1447 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1448 instructions.
1449
1450Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1451
1452 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1453 assembler's -mcom and -many switches.
1454
1455Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1456
1457 * i386.h: Fix cmpxchg8b extension opcode description.
1458
1459Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1460
1461 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1462 and register cr4.
1463
1464Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1465
1466 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1467
1468Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1469
1470 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1471
1472Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1473
1474 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1475
1476Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1477
1478 * m68kmri.h: Remove.
1479
1480 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1481 declarations. Remove F_ALIAS and flag field of struct
1482 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1483 int. Make name and args fields of struct m68k_opcode const.
1484
1485Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1486
1487 * sparc.h (F_NOTV9): Define.
1488
1489Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1490
1491 * mips.h (INSN_4010): Define.
1492
1493Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1494
1495 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1496
1497 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1498 * m68k.h: Fix argument descriptions of coprocessor
1499 instructions to allow only alterable operands where appropriate.
1500 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1501 (m68k_opcode_aliases): Add more aliases.
1502
1503Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1504
1505 * m68k.h: Added explcitly short-sized conditional branches, and a
1506 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1507 svr4-based configurations.
1508
1509Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1510
1511 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1512 * i386.h: added missing Data16/Data32 flags to a few instructions.
1513
1514Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1515
1516 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1517 (OP_MASK_BCC, OP_SH_BCC): Define.
1518 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1519 (OP_MASK_CCC, OP_SH_CCC): Define.
1520 (INSN_READ_FPR_R): Define.
1521 (INSN_RFE): Delete.
1522
1523Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1524
1525 * m68k.h (enum m68k_architecture): Deleted.
1526 (struct m68k_opcode_alias): New type.
1527 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1528 matching constraints, values and flags. As a side effect of this,
1529 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1530 as I know were never used, now may need re-examining.
1531 (numopcodes): Now const.
1532 (m68k_opcode_aliases, numaliases): New variables.
1533 (endop): Deleted.
1534 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1535 m68k_opcode_aliases; update declaration of m68k_opcodes.
1536
1537Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1538
1539 * hppa.h (delay_type): Delete unused enumeration.
1540 (pa_opcode): Replace unused delayed field with an architecture
1541 field.
1542 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1543
1544Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1545
1546 * mips.h (INSN_ISA4): Define.
1547
1548Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1549
1550 * mips.h (M_DLA_AB, M_DLI): Define.
1551
1552Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1553
1554 * hppa.h (fstwx): Fix single-bit error.
1555
1556Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1559
1560Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1561
1562 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1563 debug registers. From Charles Hannum (mycroft@netbsd.org).
1564
1565Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1566
1567 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1568 i386 support:
1569 * i386.h (MOV_AX_DISP32): New macro.
1570 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1571 of several call/return instructions.
1572 (ADDR_PREFIX_OPCODE): New macro.
1573
1574Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1575
1576 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1577
1578 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1579 it pointer to const char;
1580 (struct vot, field `name'): ditto.
1581
1582Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1583
1584 * vax.h: Supply and properly group all values in end sentinel.
1585
1586Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1587
1588 * mips.h (INSN_ISA, INSN_4650): Define.
1589
1590Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1591
1592 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1593 systems with a separate instruction and data cache, such as the
1594 29040, these instructions take an optional argument.
1595
1596Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1597
1598 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1599 INSN_TRAP.
1600
1601Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1602
1603 * mips.h (INSN_STORE_MEMORY): Define.
1604
1605Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1606
1607 * sparc.h: Document new operand type 'x'.
1608
1609Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1610
1611 * i960.h (I_CX2): New instruction category. It includes
1612 instructions available on Cx and Jx processors.
1613 (I_JX): New instruction category, for JX-only instructions.
1614 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1615 Jx-only instructions, in I_JX category.
1616
1617Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1618
1619 * ns32k.h (endop): Made pointer const too.
1620
1621Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1622
1623 * ns32k.h: Drop Q operand type as there is no correct use
1624 for it. Add I and Z operand types which allow better checking.
1625
1626Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1627
1628 * h8300.h (xor.l) :fix bit pattern.
1629 (L_2): New size of operand.
1630 (trapa): Use it.
1631
1632Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1633
1634 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1635
1636Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1637
1638 * sparc.h: Include v9 definitions.
1639
1640Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1641
1642 * m68k.h (m68060): Defined.
1643 (m68040up, mfloat, mmmu): Include it.
1644 (struct m68k_opcode): Widen `arch' field.
1645 (m68k_opcodes): Updated for M68060. Removed comments that were
1646 instructions commented out by "JF" years ago.
1647
1648Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1649
1650 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1651 add a one-bit `flags' field.
1652 (F_ALIAS): New macro.
1653
1654Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1655
1656 * h8300.h (dec, inc): Get encoding right.
1657
1658Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1659
1660 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1661 a flag instead.
1662 (PPC_OPERAND_SIGNED): Define.
1663 (PPC_OPERAND_SIGNOPT): Define.
1664
1665Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1666
1667 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1668 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1669
1670Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1671
1672 * i386.h: Reverse last change. It'll be handled in gas instead.
1673
1674Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1675
1676 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1677 slower on the 486 and used the implicit shift count despite the
1678 explicit operand. The one-operand form is still available to get
1679 the shorter form with the implicit shift count.
1680
1681Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1682
1683 * hppa.h: Fix typo in fstws arg string.
1684
1685Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1686
1687 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1688
1689Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1690
1691 * ppc.h (PPC_OPCODE_601): Define.
1692
1693Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1694
1695 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1696 (so we can determine valid completers for both addb and addb[tf].)
1697
1698 * hppa.h (xmpyu): No floating point format specifier for the
1699 xmpyu instruction.
1700
1701Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1702
1703 * ppc.h (PPC_OPERAND_NEXT): Define.
1704 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1705 (struct powerpc_macro): Define.
1706 (powerpc_macros, powerpc_num_macros): Declare.
1707
1708Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1709
1710 * ppc.h: New file. Header file for PowerPC opcode table.
1711
1712Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1713
1714 * hppa.h: More minor template fixes for sfu and copr (to allow
1715 for easier disassembly).
1716
1717 * hppa.h: Fix templates for all the sfu and copr instructions.
1718
1719Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1720
1721 * i386.h (push): Permit Imm16 operand too.
1722
1723Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1724
1725 * h8300.h (andc): Exists in base arch.
1726
1727Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1728
1729 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1730 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1731
1732Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1733
1734 * hppa.h: Add FP quadword store instructions.
1735
1736Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1737
1738 * mips.h: (M_J_A): Added.
1739 (M_LA): Removed.
1740
1741Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1742
1743 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1744 <mellon@pepper.ncd.com>.
1745
1746Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1747
1748 * hppa.h: Immediate field in probei instructions is unsigned,
1749 not low-sign extended.
1750
1751Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1752
1753 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1754
1755Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1756
1757 * i386.h: Add "fxch" without operand.
1758
1759Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1760
1761 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1762
1763Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1764
1765 * hppa.h: Add gfw and gfr to the opcode table.
1766
1767Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1768
1769 * m88k.h: extended to handle m88110.
1770
1771Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1772
1773 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1774 addresses.
1775
1776Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1777
1778 * i960.h (i960_opcodes): Properly bracket initializers.
1779
1780Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1781
1782 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1783
1784Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1785
1786 * m68k.h (two): Protect second argument with parentheses.
1787
1788Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1789
1790 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1791 Deleted old in/out instructions in "#if 0" section.
1792
1793Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1794
1795 * i386.h (i386_optab): Properly bracket initializers.
1796
1797Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1798
1799 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1800 Jeff Law, law@cs.utah.edu).
1801
1802Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1803
1804 * i386.h (lcall): Accept Imm32 operand also.
1805
1806Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1807
1808 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1809 (M_DABS): Added.
1810
1811Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1812
1813 * mips.h (INSN_*): Changed values. Removed unused definitions.
1814 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1815 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1816 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1817 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1818 (M_*): Added new values for r6000 and r4000 macros.
1819 (ANY_DELAY): Removed.
1820
1821Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1822
1823 * mips.h: Added M_LI_S and M_LI_SS.
1824
1825Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1826
1827 * h8300.h: Get some rare mov.bs correct.
1828
1829Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1830
1831 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1832 been included.
1833
1834Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1835
1836 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1837 jump instructions, for use in disassemblers.
1838
1839Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1840
1841 * m88k.h: Make bitfields just unsigned, not unsigned long or
1842 unsigned short.
1843
1844Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1845
1846 * hppa.h: New argument type 'y'. Use in various float instructions.
1847
1848Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1849
1850 * hppa.h (break): First immediate field is unsigned.
1851
1852 * hppa.h: Add rfir instruction.
1853
1854Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1855
1856 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1857
1858Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1859
1860 * mips.h: Reworked the hazard information somewhat, and fixed some
1861 bugs in the instruction hazard descriptions.
1862
1863Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1864
1865 * m88k.h: Corrected a couple of opcodes.
1866
1867Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1868
1869 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1870 new version includes instruction hazard information, but is
1871 otherwise reasonably similar.
1872
1873Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1874
1875 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1876
1877Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1878
1879 Patches from Jeff Law, law@cs.utah.edu:
1880 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1881 Make the tables be the same for the following instructions:
1882 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1883 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1884 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1885 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1886 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1887 "fcmp", and "ftest".
1888
1889 * hppa.h: Make new and old tables the same for "break", "mtctl",
1890 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1891 Fix typo in last patch. Collapse several #ifdefs into a
1892 single #ifdef.
1893
1894 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1895 of the comments up-to-date.
1896
1897 * hppa.h: Update "free list" of letters and update
1898 comments describing each letter's function.
1899
1900Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1901
1902 * h8300.h: checkpoint, includes H8/300-H opcodes.
1903
1904Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1905
1906 * Patches from Jeffrey Law <law@cs.utah.edu>.
1907 * hppa.h: Rework single precision FP
1908 instructions so that they correctly disassemble code
1909 PA1.1 code.
1910
1911Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1912
1913 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1914 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1915
1916Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1917
1918 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1919 gdb will define it for now.
1920
1921Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1922
1923 * sparc.h: Don't end enumerator list with comma.
1924
1925Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1926
1927 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1928 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1929 ("bc2t"): Correct typo.
1930 ("[ls]wc[023]"): Use T rather than t.
1931 ("c[0123]"): Define general coprocessor instructions.
1932
1933Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1934
1935 * m68k.h: Move split point for gcc compilation more towards
1936 middle.
1937
1938Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1939
1940 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1941 simply wrong, ics, rfi, & rfsvc were missing).
1942 Add "a" to opr_ext for "bb". Doc fix.
1943
1944Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1945
1946 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1947 * mips.h: Add casts, to suppress warnings about shifting too much.
1948 * m68k.h: Document the placement code '9'.
1949
1950Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1951
1952 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1953 allows callers to break up the large initialized struct full of
1954 opcodes into two half-sized ones. This permits GCC to compile
1955 this module, since it takes exponential space for initializers.
1956 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1957
1958Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1959
1960 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1961 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1962 initialized structs in it.
1963
1964Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1965
1966 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1967 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1968 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1969
1970Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1971
1972 * mips.h: document "i" and "j" operands correctly.
1973
1974Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1975
1976 * mips.h: Removed endianness dependency.
1977
1978Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1979
1980 * h8300.h: include info on number of cycles per instruction.
1981
1982Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1983
1984 * hppa.h: Move handy aliases to the front. Fix masks for extract
1985 and deposit instructions.
1986
1987Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1988
1989 * i386.h: accept shld and shrd both with and without the shift
1990 count argument, which is always %cl.
1991
1992Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1993
1994 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1995 (one_byte_segment_defaults, two_byte_segment_defaults,
1996 i386_prefixtab_end): Ditto.
1997
1998Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1999
2000 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2001 for operand 2; from John Carr, jfc@dsg.dec.com.
2002
2003Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2004
2005 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2006 always use 16-bit offsets. Makes calculated-size jump tables
2007 feasible.
2008
2009Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2010
2011 * i386.h: Fix one-operand forms of in* and out* patterns.
2012
2013Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2014
2015 * m68k.h: Added CPU32 support.
2016
2017Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2018
2019 * mips.h (break): Disassemble the argument. Patch from
2020 jonathan@cs.stanford.edu (Jonathan Stone).
2021
2022Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2023
2024 * m68k.h: merged Motorola and MIT syntax.
2025
2026Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2027
2028 * m68k.h (pmove): make the tests less strict, the 68k book is
2029 wrong.
2030
2031Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2032
2033 * m68k.h (m68ec030): Defined as alias for 68030.
2034 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2035 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2036 them. Tightened description of "fmovex" to distinguish it from
2037 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2038 up descriptions that claimed versions were available for chips not
2039 supporting them. Added "pmovefd".
2040
2041Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2042
2043 * m68k.h: fix where the . goes in divull
2044
2045Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2046
2047 * m68k.h: the cas2 instruction is supposed to be written with
2048 indirection on the last two operands, which can be either data or
2049 address registers. Added a new operand type 'r' which accepts
2050 either register type. Added new cases for cas2l and cas2w which
2051 use them. Corrected masks for cas2 which failed to recognize use
2052 of address register.
2053
2054Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2055
2056 * m68k.h: Merged in patches (mostly m68040-specific) from
2057 Colin Smith <colin@wrs.com>.
2058
2059 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2060 base). Also cleaned up duplicates, re-ordered instructions for
2061 the sake of dis-assembling (so aliases come after standard names).
2062 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2063
2064Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2065
2066 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2067 all missing .s
2068
2069Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2070
2071 * sparc.h: Moved tables to BFD library.
2072
2073 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2074
2075Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2076
2077 * h8300.h: Finish filling in all the holes in the opcode table,
2078 so that the Lucid C compiler can digest this as well...
2079
2080Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2081
2082 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2083 Fix opcodes on various sizes of fild/fist instructions
2084 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2085 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2086
2087Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2088
2089 * h8300.h: Fill in all the holes in the opcode table so that the
2090 losing HPUX C compiler can digest this...
2091
2092Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2093
2094 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2095 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2096
2097Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2098
2099 * sparc.h: Add new architecture variant sparclite; add its scan
2100 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2101
2102Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2103
2104 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2105 fy@lucid.com).
2106
2107Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2108
2109 * rs6k.h: New version from IBM (Metin).
2110
2111Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2112
2113 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2114 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2115
2116Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2117
2118 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2119
2120Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2121
2122 * m68k.h (one, two): Cast macro args to unsigned to suppress
2123 complaints from compiler and lint about integer overflow during
2124 shift.
2125
2126Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2127
2128 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2129
2130Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2131
2132 * mips.h: Make bitfield layout depend on the HOST compiler,
2133 not on the TARGET system.
2134
2135Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2136
2137 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2138 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2139 <TRANLE@INTELLICORP.COM>.
2140
2141Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2142
2143 * h8300.h: turned op_type enum into #define list
2144
2145Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2146
2147 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2148 similar instructions -- they've been renamed to "fitoq", etc.
2149 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2150 number of arguments.
2151 * h8300.h: Remove extra ; which produces compiler warning.
2152
2153Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2154
2155 * sparc.h: fix opcode for tsubcctv.
2156
2157Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2158
2159 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2160
2161Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2162
2163 * sparc.h (nop): Made the 'lose' field be even tighter,
2164 so only a standard 'nop' is disassembled as a nop.
2165
2166Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2167
2168 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2169 disassembled as a nop.
2170
2171Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2172
2173 * sparc.h: fix a typo.
2174
2175Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2176
2177 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2178 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2179 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2180
2181\f
2182Local Variables:
2183version-control: never
2184End:
GDB Binutils - Deliverables
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