[ include/opcode/ChangeLog ]
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
9a2e995d
GH
12002-01-22 Graydon Hoare <graydon@redhat.com>
2
3 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
4 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
5
7b45c6e1
AM
62002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
7
8 * h8300.h: Comment typo fix.
9
a09cf9bd
MG
102002-01-03 matthew green <mrg@redhat.com>
11
12 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
13 (PPC_OPCODE_BOOKE64): Likewise.
14
1befefea
JL
15Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
16
17 * hppa.h (call, ret): Move to end of table.
18 (addb, addib): PA2.0 variants should have been PA2.0W.
19 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
20 happy.
21 (fldw, fldd, fstw, fstd, bb): Likewise.
22 (short loads/stores): Tweak format specifier slightly to keep
23 disassembler happy.
24 (indexed loads/stores): Likewise.
25 (absolute loads/stores): Likewise.
26
124ddbb2
AO
272001-12-04 Alexandre Oliva <aoliva@redhat.com>
28
29 * d10v.h (OPERAND_NOSP): New macro.
30
9b21d49b
AO
312001-11-29 Alexandre Oliva <aoliva@redhat.com>
32
33 * d10v.h (OPERAND_SP): New macro.
34
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AM
352001-11-15 Alan Modra <amodra@bigpond.net.au>
36
37 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
38
6e917903
TW
392001-11-11 Timothy Wall <twall@alum.mit.edu>
40
41 * tic54x.h: Revise opcode layout; don't really need a separate
42 structure for parallel opcodes.
43
e5470cdc
AM
442001-11-13 Zack Weinberg <zack@codesourcery.com>
45 Alan Modra <amodra@bigpond.net.au>
46
47 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
48 accept WordReg.
49
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CD
502001-11-04 Chris Demetriou <cgd@broadcom.com>
51
52 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
53
3c3bdf30
NC
542001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
55
56 * mmix.h: New file.
57
e4432525
CD
582001-10-18 Chris Demetriou <cgd@broadcom.com>
59
60 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
61 of the expression, to make source code merging easier.
62
8ff529d8
CD
632001-10-17 Chris Demetriou <cgd@broadcom.com>
64
65 * mips.h: Sort coprocessor instruction argument characters
66 in comment, add a few more words of description for "H".
67
2228315b
CD
682001-10-17 Chris Demetriou <cgd@broadcom.com>
69
70 * mips.h (INSN_SB1): New cpu-specific instruction bit.
71 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
72 if cpu is CPU_SB1.
73
f5c120c5
MG
742001-10-17 matthew green <mrg@redhat.com>
75
76 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
77
418c1742
MG
782001-10-12 matthew green <mrg@redhat.com>
79
0716ce0d
MG
80 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
81 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
82 instructions, respectively.
418c1742 83
6ff2f2ba
NC
842001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
85
86 * v850.h: Remove spurious comment.
87
015cf428
NC
882001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
89
90 * h8300.h: Fix compile time warning messages
91
847b8b31
RH
922001-09-04 Richard Henderson <rth@redhat.com>
93
94 * alpha.h (struct alpha_operand): Pack elements into bitfields.
95
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EC
962001-08-31 Eric Christopher <echristo@redhat.com>
97
98 * mips.h: Remove CPU_MIPS32_4K.
99
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AM
1002001-08-27 Torbjorn Granlund <tege@swox.com>
101
102 * ppc.h (PPC_OPERAND_DS): Define.
103
d83c6548
AJ
1042001-08-25 Andreas Jaeger <aj@suse.de>
105
106 * d30v.h: Fix declaration of reg_name_cnt.
107
108 * d10v.h: Fix declaration of d10v_reg_name_cnt.
109
110 * arc.h: Add prototypes from opcodes/arc-opc.c.
111
99c14723
TS
1122001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
113
114 * mips.h (INSN_10000): Define.
115 (OPCODE_IS_MEMBER): Check for INSN_10000.
116
11b37b7b
AM
1172001-08-10 Alan Modra <amodra@one.net.au>
118
119 * ppc.h: Revert 2001-08-08.
120
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AM
1212001-08-08 Alan Modra <amodra@one.net.au>
122
123 1999-10-25 Torbjorn Granlund <tege@swox.com>
124 * ppc.h (struct powerpc_operand): New field `reloc'.
125
81f6038f
FCE
1262001-07-11 Frank Ch. Eigler <fche@redhat.com>
127
128 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
129 (cgen_cpu_desc): Ditto.
130
32cfffe3
BE
1312001-07-07 Ben Elliston <bje@redhat.com>
132
133 * m88k.h: Clean up and reformat. Remove unused code.
134
3e890047
GK
1352001-06-14 Geoffrey Keating <geoffk@redhat.com>
136
137 * cgen.h (cgen_keyword): Add nonalpha_chars field.
138
d1cf510e
NC
1392001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
140
141 * mips.h (CPU_R12000): Define.
142
e281c457
JH
1432001-05-23 John Healy <jhealy@redhat.com>
144
145 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 146
aa5f19f2
NC
1472001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
148
149 * mips.h (INSN_ISA_MASK): Define.
150
67d6227d
AM
1512001-05-12 Alan Modra <amodra@one.net.au>
152
153 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
154 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
155 and use InvMem as these insns must have register operands.
156
992aaec9
AM
1572001-05-04 Alan Modra <amodra@one.net.au>
158
159 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
160 and pextrw to swap reg/rm assignments.
161
4ef7f0bf
HPN
1622001-04-05 Hans-Peter Nilsson <hp@axis.com>
163
164 * cris.h (enum cris_insn_version_usage): Correct comment for
165 cris_ver_v3p.
166
0f17484f
AM
1672001-03-24 Alan Modra <alan@linuxcare.com.au>
168
169 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
170 Add InvMem to first operand of "maskmovdqu".
171
7ccb5238
HPN
1722001-03-22 Hans-Peter Nilsson <hp@axis.com>
173
174 * cris.h (ADD_PC_INCR_OPCODE): New macro.
175
361bfa20
KH
1762001-03-21 Kazu Hirata <kazu@hxi.com>
177
178 * h8300.h: Fix formatting.
179
87890af0
AM
1802001-03-22 Alan Modra <alan@linuxcare.com.au>
181
182 * i386.h (i386_optab): Add paddq, psubq.
183
2e98d2de
AM
1842001-03-19 Alan Modra <alan@linuxcare.com.au>
185
186 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
187
80a523c2
NC
1882001-02-28 Igor Shevlyakov <igor@windriver.com>
189
190 * m68k.h: new defines for Coldfire V4. Update mcf to know
191 about mcf5407.
192
e135f41b
NC
1932001-02-18 lars brinkhoff <lars@nocrew.org>
194
195 * pdp11.h: New file.
196
1972001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
198
199 * i386.h (i386_optab): SSE integer converison instructions have
200 64bit versions on x86-64.
201
8eaec934
NC
2022001-02-10 Nick Clifton <nickc@redhat.com>
203
204 * mips.h: Remove extraneous whitespace. Formating change to allow
205 for future contribution.
206
a85d7ed0
NC
2072001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
208
209 * s390.h: New file.
210
0715dc88
PM
2112001-02-02 Patrick Macdonald <patrickm@redhat.com>
212
213 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
214 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
215 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
216
296bc568
AM
2172001-01-24 Karsten Keil <kkeil@suse.de>
218
219 * i386.h (i386_optab): Fix swapgs
220
1328dc98
AM
2212001-01-14 Alan Modra <alan@linuxcare.com.au>
222
223 * hppa.h: Describe new '<' and '>' operand types, and tidy
224 existing comments.
225 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
226 Remove duplicate "ldw j(s,b),x". Sort some entries.
227
e135f41b 2282001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
229
230 * i386.h (i386_optab): Fix pusha and ret templates.
231
0d2bcfaf
NC
2322001-01-11 Peter Targett <peter.targett@arccores.com>
233
234 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
235 definitions for masking cpu type.
236 (arc_ext_operand_value) New structure for storing extended
237 operands.
238 (ARC_OPERAND_*) Flags for operand values.
239
2402001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
241
242 * i386.h (pinsrw): Add.
243 (pshufw): Remove.
244 (cvttpd2dq): Fix operands.
245 (cvttps2dq): Likewise.
246 (movq2q): Rename to movdq2q.
247
079966a8
AM
2482001-01-10 Richard Schaal <richard.schaal@intel.com>
249
250 * i386.h: Correct movnti instruction.
251
8c1f9e76
JJ
2522001-01-09 Jeff Johnston <jjohnstn@redhat.com>
253
254 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
255 of operands (unsigned char or unsigned short).
256 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
257 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
258
0d2bcfaf 2592001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
260
261 * i386.h (i386_optab): Make [sml]fence template to use immext field.
262
0d2bcfaf 2632001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
264
265 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
266 introduced by Pentium4
267
0d2bcfaf 2682000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
269
270 * i386.h (i386_optab): Add "rex*" instructions;
271 add swapgs; disable jmp/call far direct instructions for
272 64bit mode; add syscall and sysret; disable registers for 0xc6
273 template. Add 'q' suffixes to extendable instructions, disable
079966a8 274 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
275 (i386_regtab): Add extended registers.
276 (*Suf): Add No_qSuf.
277 (q_Suf, wlq_Suf, bwlq_Suf): New.
278
0d2bcfaf 2792000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
280
281 * i386.h (i386_optab): Replace "Imm" with "EncImm".
282 (i386_regtab): Add flags field.
d83c6548 283
bf40d919
NC
2842000-12-12 Nick Clifton <nickc@redhat.com>
285
286 * mips.h: Fix formatting.
287
4372b673
NC
2882000-12-01 Chris Demetriou <cgd@sibyte.com>
289
290 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
291 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
292 OP_*_SYSCALL definitions.
293 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
294 19 bit wait codes.
295 (MIPS operand specifier comments): Remove 'm', add 'U' and
296 'J', and update the meaning of 'B' so that it's more general.
297
e7af610e
NC
298 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
299 INSN_ISA5): Renumber, redefine to mean the ISA at which the
300 instruction was added.
301 (INSN_ISA32): New constant.
302 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
303 Renumber to avoid new and/or renumbered INSN_* constants.
304 (INSN_MIPS32): Delete.
305 (ISA_UNKNOWN): New constant to indicate unknown ISA.
306 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
307 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 308 constants available at that ISA level.
e7af610e
NC
309 (CPU_UNKNOWN): New constant to indicate unknown CPU.
310 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
311 define it with a unique value.
312 (OPCODE_IS_MEMBER): Update for new ISA membership-related
313 constant meanings.
314
84ea6cf2 315 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 316 definitions.
84ea6cf2 317
c6c98b38
NC
318 * mips.h (CPU_SB1): New constant.
319
19f7b010
JJ
3202000-10-20 Jakub Jelinek <jakub@redhat.com>
321
322 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
323 Note that '3' is used for siam operand.
324
139368c9
JW
3252000-09-22 Jim Wilson <wilson@cygnus.com>
326
327 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
328
156c2f8b 3292000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 330
156c2f8b
NC
331 * mips.h: Use defines instead of hard-coded processor numbers.
332 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 333 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
334 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
335 CPU_4KC, CPU_4KM, CPU_4KP): Define..
336 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 337 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 338 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
339 Add 'P' to used characters.
340 Use 'H' for coprocessor select field.
156c2f8b 341 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
342 Document new arg characters and add to used characters.
343 (INSN_MIPS32): New define for MIPS32 extensions.
344 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 345
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AM
3462000-09-05 Alan Modra <alan@linuxcare.com.au>
347
348 * hppa.h: Mention cz completer.
349
50b81f19
JW
3502000-08-16 Jim Wilson <wilson@cygnus.com>
351
352 * ia64.h (IA64_OPCODE_POSTINC): New.
353
fc29466d
L
3542000-08-15 H.J. Lu <hjl@gnu.org>
355
356 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
357 IgnoreSize change.
358
4f1d9bd8
NC
3592000-08-08 Jason Eckhardt <jle@cygnus.com>
360
361 * i860.h: Small formatting adjustments.
362
45ee1401
DC
3632000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
364
365 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
366 Move related opcodes closer to each other.
367 Minor changes in comments, list undefined opcodes.
368
9d551405
DB
3692000-07-26 Dave Brolley <brolley@redhat.com>
370
371 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
372
4f1d9bd8
NC
3732000-07-22 Jason Eckhardt <jle@cygnus.com>
374
375 * i860.h (btne, bte, bla): Changed these opcodes
376 to use sbroff ('r') instead of split16 ('s').
377 (J, K, L, M): New operand types for 16-bit aligned fields.
378 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
379 use I, J, K, L, M instead of just I.
380 (T, U): New operand types for split 16-bit aligned fields.
381 (st.x): Changed these opcodes to use S, T, U instead of just S.
382 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
383 exist on the i860.
384 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
385 (pfeq.ss, pfeq.dd): New opcodes.
386 (st.s): Fixed incorrect mask bits.
387 (fmlow): Fixed incorrect mask bits.
388 (fzchkl, pfzchkl): Fixed incorrect mask bits.
389 (faddz, pfaddz): Fixed incorrect mask bits.
390 (form, pform): Fixed incorrect mask bits.
391 (pfld.l): Fixed incorrect mask bits.
392 (fst.q): Fixed incorrect mask bits.
393 (all floating point opcodes): Fixed incorrect mask bits for
394 handling of dual bit.
395
c8488617
HPN
3962000-07-20 Hans-Peter Nilsson <hp@axis.com>
397
398 cris.h: New file.
399
65aa24b6
NC
4002000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
401
402 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
403 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
404 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
405 (AVR_ISA_M83): Define for ATmega83, ATmega85.
406 (espm): Remove, because ESPM removed in databook update.
407 (eicall, eijmp): Move to the end of opcode table.
408
60bcf0fa
NC
4092000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
410
411 * m68hc11.h: New file for support of Motorola 68hc11.
412
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DC
413Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
414
415 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
416
68ab2dd9
DC
417Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
418
419 * avr.h: New file with AVR opcodes.
420
f0662e27
DL
421Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
422
423 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
424
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AM
4252000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
426
427 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
428
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AM
4292000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
430
431 * i386.h: Use sl_FP, not sl_Suf for fild.
432
f660ee8b
FCE
4332000-05-16 Frank Ch. Eigler <fche@redhat.com>
434
435 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
436 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
437 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
438 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
439
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AM
4402000-05-13 Alan Modra <alan@linuxcare.com.au>,
441
442 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
443
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AM
4442000-05-13 Alan Modra <alan@linuxcare.com.au>,
445 Alexander Sokolov <robocop@netlink.ru>
446
447 * i386.h (i386_optab): Add cpu_flags for all instructions.
448
4492000-05-13 Alan Modra <alan@linuxcare.com.au>
450
451 From Gavin Romig-Koch <gavin@cygnus.com>
452 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
453
5c84d377
TW
4542000-05-04 Timothy Wall <twall@cygnus.com>
455
456 * tic54x.h: New.
457
966f959b
C
4582000-05-03 J.T. Conklin <jtc@redback.com>
459
460 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
461 (PPC_OPERAND_VR): New operand flag for vector registers.
462
c5d05dbb
JL
4632000-05-01 Kazu Hirata <kazu@hxi.com>
464
465 * h8300.h (EOP): Add missing initializer.
466
a7fba0e0
JL
467Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
468
469 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
470 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
471 New operand types l,y,&,fe,fE,fx added to support above forms.
472 (pa_opcodes): Replaced usage of 'x' as source/target for
473 floating point double-word loads/stores with 'fx'.
474
800eeca4
JW
475Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
476 David Mosberger <davidm@hpl.hp.com>
477 Timothy Wall <twall@cygnus.com>
478 Jim Wilson <wilson@cygnus.com>
479
480 * ia64.h: New file.
481
ba23e138
NC
4822000-03-27 Nick Clifton <nickc@cygnus.com>
483
484 * d30v.h (SHORT_A1): Fix value.
485 (SHORT_AR): Renumber so that it is at the end of the list of short
486 instructions, not the end of the list of long instructions.
487
d0b47220
AM
4882000-03-26 Alan Modra <alan@linuxcare.com>
489
490 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
491 problem isn't really specific to Unixware.
492 (OLDGCC_COMPAT): Define.
493 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
494 destination %st(0).
495 Fix lots of comments.
496
866afedc
NC
4972000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
498
499 * d30v.h:
500 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
501 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
502 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
503 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
504 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
505 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
506 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
507
cc5ca5ce
AM
5082000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
509
510 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
511 fistpd without suffix.
512
68e324a2
NC
5132000-02-24 Nick Clifton <nickc@cygnus.com>
514
515 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
516 'signed_overflow_ok_p'.
517 Delete prototypes for cgen_set_flags() and cgen_get_flags().
518
60f036a2
AH
5192000-02-24 Andrew Haley <aph@cygnus.com>
520
521 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
522 (CGEN_CPU_TABLE): flags: new field.
523 Add prototypes for new functions.
d83c6548 524
9b9b5cd4
AM
5252000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
526
527 * i386.h: Add some more UNIXWARE_COMPAT comments.
528
5b93d8bb
AM
5292000-02-23 Linas Vepstas <linas@linas.org>
530
531 * i370.h: New file.
532
4f1d9bd8
NC
5332000-02-22 Chandra Chavva <cchavva@cygnus.com>
534
535 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
536 cannot be combined in parallel with ADD/SUBppp.
537
87f398dd
AH
5382000-02-22 Andrew Haley <aph@cygnus.com>
539
540 * mips.h: (OPCODE_IS_MEMBER): Add comment.
541
367c01af
AH
5421999-12-30 Andrew Haley <aph@cygnus.com>
543
9a1e79ca
AH
544 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
545 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
546 insns.
367c01af 547
add0c677
AM
5482000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
549
550 * i386.h: Qualify intel mode far call and jmp with x_Suf.
551
3138f287
AM
5521999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
553
554 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
555 indirect jumps and calls. Add FF/3 call for intel mode.
556
ccecd07b
JL
557Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
558
559 * mn10300.h: Add new operand types. Add new instruction formats.
560
b37e19e9
JL
561Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
562
563 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
564 instruction.
565
5fce5ddf
GRK
5661999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
567
568 * mips.h (INSN_ISA5): New.
569
2bd7f1f3
GRK
5701999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
571
572 * mips.h (OPCODE_IS_MEMBER): New.
573
4df2b5c5
NC
5741999-10-29 Nick Clifton <nickc@cygnus.com>
575
576 * d30v.h (SHORT_AR): Define.
577
446a06c9
MM
5781999-10-18 Michael Meissner <meissner@cygnus.com>
579
580 * alpha.h (alpha_num_opcodes): Convert to unsigned.
581 (alpha_num_operands): Ditto.
582
eca04c6a
JL
583Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
584
585 * hppa.h (pa_opcodes): Add load and store cache control to
586 instructions. Add ordered access load and store.
587
588 * hppa.h (pa_opcode): Add new entries for addb and addib.
589
590 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
591
592 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
593
c43185de
DN
594Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
595
596 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
597
ec3533da
JL
598Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
599
390f858d
JL
600 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
601 and "be" using completer prefixes.
602
8c47ebd9
JL
603 * hppa.h (pa_opcodes): Add initializers to silence compiler.
604
ec3533da
JL
605 * hppa.h: Update comments about character usage.
606
18369bea
JL
607Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
608
609 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
610 up the new fstw & bve instructions.
611
c36efdd2
JL
612Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
613
d3ffb032
JL
614 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
615 instructions.
616
c49ec3da
JL
617 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
618
5d2e7ecc
JL
619 * hppa.h (pa_opcodes): Add long offset double word load/store
620 instructions.
621
6397d1a2
JL
622 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
623 stores.
624
142f0fe0
JL
625 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
626
f5a68b45
JL
627 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
628
8235801e
JL
629 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
630
35184366
JL
631 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
632
f0bfde5e
JL
633 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
634
27bbbb58
JL
635 * hppa.h (pa_opcodes): Add support for "b,l".
636
c36efdd2
JL
637 * hppa.h (pa_opcodes): Add support for "b,gate".
638
f2727d04
JL
639Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
640
9392fb11 641 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 642 in xmpyu.
9392fb11 643
e0c52e99
JL
644 * hppa.h (pa_opcodes): Fix mask for probe and probei.
645
f2727d04
JL
646 * hppa.h (pa_opcodes): Fix mask for depwi.
647
52d836e2
JL
648Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
649
650 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
651 an explicit output argument.
652
90765e3a
JL
653Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
654
655 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
656 Add a few PA2.0 loads and store variants.
657
8340b17f
ILT
6581999-09-04 Steve Chamberlain <sac@pobox.com>
659
660 * pj.h: New file.
661
5f47d35b
AM
6621999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
663
664 * i386.h (i386_regtab): Move %st to top of table, and split off
665 other fp reg entries.
666 (i386_float_regtab): To here.
667
1c143202
JL
668Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
669
7d8fdb64
JL
670 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
671 by 'f'.
672
90927b9c
JL
673 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
674 Add supporting args.
675
1d16bf9c
JL
676 * hppa.h: Document new completers and args.
677 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
678 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
679 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
680 pmenb and pmdis.
681
96226a68
JL
682 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
683 hshr, hsub, mixh, mixw, permh.
684
5d4ba527
JL
685 * hppa.h (pa_opcodes): Change completers in instructions to
686 use 'c' prefix.
687
e9fc28c6
JL
688 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
689 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
690
1c143202
JL
691 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
692 fnegabs to use 'I' instead of 'F'.
693
9e525108
AM
6941999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
695
696 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
697 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
698 Alphabetically sort PIII insns.
699
e8da1bf1
DE
700Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
701
702 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
703
7d627258
JL
704Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
705
5696871a
JL
706 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
707 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
708
7d627258
JL
709 * hppa.h: Document 64 bit condition completers.
710
c5e52916
JL
711Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
712
713 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
714
eecb386c
AM
7151999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
716
717 * i386.h (i386_optab): Add DefaultSize modifier to all insns
718 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
719 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
720
88a380f3
JL
721Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
722 Jeff Law <law@cygnus.com>
723
724 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
725
726 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 727
d83c6548 728 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
729 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
730
145cf1f0
AM
7311999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
732
733 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
734
73826640
JL
735Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
736
737 * hppa.h (struct pa_opcode): Add new field "flags".
738 (FLAGS_STRICT): Define.
739
b65db252
JL
740Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
741 Jeff Law <law@cygnus.com>
742
f7fc668b
JL
743 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
744
745 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 746
10084519
AM
7471999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
748
749 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
750 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
751 flag to fcomi and friends.
752
cd8a80ba
JL
753Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
754
755 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 756 integer logical instructions.
cd8a80ba 757
1fca749b
ILT
7581999-05-28 Linus Nordberg <linus.nordberg@canit.se>
759
760 * m68k.h: Document new formats `E', `G', `H' and new places `N',
761 `n', `o'.
762
763 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
764 and new places `m', `M', `h'.
765
aa008907
JL
766Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
767
768 * hppa.h (pa_opcodes): Add several processor specific system
769 instructions.
770
e26b85f0
JL
771Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
772
d83c6548 773 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
774 "addb", and "addib" to be used by the disassembler.
775
c608c12e
AM
7761999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
777
778 * i386.h (ReverseModrm): Remove all occurences.
779 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
780 movmskps, pextrw, pmovmskb, maskmovq.
781 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
782 ignore the data size prefix.
783
784 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
785 Mostly stolen from Doug Ledford <dledford@redhat.com>
786
45c18104
RH
787Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
788
789 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
790
252b5132
RH
7911999-04-14 Doug Evans <devans@casey.cygnus.com>
792
793 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
794 (CGEN_ATTR_TYPE): Update.
795 (CGEN_ATTR_MASK): Number booleans starting at 0.
796 (CGEN_ATTR_VALUE): Update.
797 (CGEN_INSN_ATTR): Update.
798
799Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
800
801 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
802 instructions.
803
804Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
805
806 * hppa.h (bb, bvb): Tweak opcode/mask.
807
808
8091999-03-22 Doug Evans <devans@casey.cygnus.com>
810
811 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
812 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
813 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
814 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
815 Delete member max_insn_size.
816 (enum cgen_cpu_open_arg): New enum.
817 (cpu_open): Update prototype.
818 (cpu_open_1): Declare.
819 (cgen_set_cpu): Delete.
820
8211999-03-11 Doug Evans <devans@casey.cygnus.com>
822
823 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
824 (CGEN_OPERAND_NIL): New macro.
825 (CGEN_OPERAND): New member `type'.
826 (@arch@_cgen_operand_table): Delete decl.
827 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
828 (CGEN_OPERAND_TABLE): New struct.
829 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
830 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
831 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
832 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
833 {get,set}_{int,vma}_operand.
834 (@arch@_cgen_cpu_open): New arg `isa'.
835 (cgen_set_cpu): Ditto.
836
837Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
838
839 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
840
8411999-02-25 Doug Evans <devans@casey.cygnus.com>
842
843 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
844 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
845 enum cgen_hw_type.
846 (CGEN_HW_TABLE): New struct.
847 (hw_table): Delete declaration.
848 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
849 to table entry to enum.
850 (CGEN_OPINST): Ditto.
851 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
852
853Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
854
855 * alpha.h (AXP_OPCODE_EV6): New.
856 (AXP_OPCODE_NOPAL): Include it.
857
8581999-02-09 Doug Evans <devans@casey.cygnus.com>
859
860 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
861 All uses updated. New members int_insn_p, max_insn_size,
862 parse_operand,insert_operand,extract_operand,print_operand,
863 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
864 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
865 extract_handlers,print_handlers.
866 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
867 (CGEN_ATTR_BOOL_OFFSET): New macro.
868 (CGEN_ATTR_MASK): Subtract it to compute bit number.
869 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
870 (cgen_opcode_handler): Renamed from cgen_base.
871 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
872 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
873 all uses updated.
874 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
875 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
876 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
877 (CGEN_OPCODE,CGEN_IBASE): New types.
878 (CGEN_INSN): Rewrite.
879 (CGEN_{ASM,DIS}_HASH*): Delete.
880 (init_opcode_table,init_ibld_table): Declare.
881 (CGEN_INSN_ATTR): New type.
882
883Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 884
252b5132
RH
885 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
886 (x_FP, d_FP, dls_FP, sldx_FP): Define.
887 Change *Suf definitions to include x and d suffixes.
888 (movsx): Use w_Suf and b_Suf.
889 (movzx): Likewise.
890 (movs): Use bwld_Suf.
891 (fld): Change ordering. Use sld_FP.
892 (fild): Add Intel Syntax equivalent of fildq.
893 (fst): Use sld_FP.
894 (fist): Use sld_FP.
895 (fstp): Use sld_FP. Add x_FP version.
896 (fistp): LLongMem version for Intel Syntax.
897 (fcom, fcomp): Use sld_FP.
898 (fadd, fiadd, fsub): Use sld_FP.
899 (fsubr): Use sld_FP.
900 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
901
9021999-01-27 Doug Evans <devans@casey.cygnus.com>
903
904 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
905 CGEN_MODE_UINT.
906
e135f41b 9071999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
908
909 * hppa.h (bv): Fix mask.
910
9111999-01-05 Doug Evans <devans@casey.cygnus.com>
912
913 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
914 (CGEN_ATTR): Use it.
915 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
916 (CGEN_ATTR_TABLE): New member dfault.
917
9181998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
919
920 * mips.h (MIPS16_INSN_BRANCH): New.
921
922Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
923
924 The following is part of a change made by Edith Epstein
d83c6548
AJ
925 <eepstein@sophia.cygnus.com> as part of a project to merge in
926 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
927
928 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 929 after.
252b5132
RH
930
931Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
932
933 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 934 status word instructions.
252b5132
RH
935
9361998-11-30 Doug Evans <devans@casey.cygnus.com>
937
938 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
939 (struct cgen_keyword_entry): Ditto.
940 (struct cgen_operand): Ditto.
941 (CGEN_IFLD): New typedef, with associated access macros.
942 (CGEN_IFMT): New typedef, with associated access macros.
943 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
944 (CGEN_IVALUE): New typedef.
945 (struct cgen_insn): Delete const on syntax,attrs members.
946 `format' now points to format data. Type of `value' is now
947 CGEN_IVALUE.
948 (struct cgen_opcode_table): New member ifld_table.
949
9501998-11-18 Doug Evans <devans@casey.cygnus.com>
951
952 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
953 (CGEN_OPERAND_INSTANCE): New member `attrs'.
954 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
955 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
956 (cgen_opcode_table): Update type of dis_hash fn.
957 (extract_operand): Update type of `insn_value' arg.
958
959Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
960
961 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
962
963Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
964
965 * mips.h (INSN_MULT): Added.
966
967Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
968
969 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
970
971Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
972
973 * cgen.h (CGEN_INSN_INT): New typedef.
974 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
975 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
976 (CGEN_INSN_BYTES_PTR): New typedef.
977 (CGEN_EXTRACT_INFO): New typedef.
978 (cgen_insert_fn,cgen_extract_fn): Update.
979 (cgen_opcode_table): New member `insn_endian'.
980 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
981 (insert_operand,extract_operand): Update.
982 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
983
984Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
985
986 * cgen.h (CGEN_ATTR_BOOLS): New macro.
987 (struct CGEN_HW_ENTRY): New member `attrs'.
988 (CGEN_HW_ATTR): New macro.
989 (struct CGEN_OPERAND_INSTANCE): New member `name'.
990 (CGEN_INSN_INVALID_P): New macro.
991
992Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
993
994 * hppa.h: Add "fid".
d83c6548 995
252b5132
RH
996Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
997
998 From Robert Andrew Dale <rob@nb.net>
999 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1000 (AMD_3DNOW_OPCODE): Define.
1001
1002Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1003
1004 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1005
1006Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1007
1008 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1009
1010Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1011
1012 Move all global state data into opcode table struct, and treat
1013 opcode table as something that is "opened/closed".
1014 * cgen.h (CGEN_OPCODE_DESC): New type.
1015 (all fns): New first arg of opcode table descriptor.
1016 (cgen_set_parse_operand_fn): Add prototype.
1017 (cgen_current_machine,cgen_current_endian): Delete.
1018 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1019 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1020 dis_hash_table,dis_hash_table_entries.
1021 (opcode_open,opcode_close): Add prototypes.
1022
1023 * cgen.h (cgen_insn): New element `cdx'.
1024
1025Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1026
1027 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1028
1029Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1030
1031 * mn10300.h: Add "no_match_operands" field for instructions.
1032 (MN10300_MAX_OPERANDS): Define.
1033
1034Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1035
1036 * cgen.h (cgen_macro_insn_count): Declare.
1037
1038Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1039
1040 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1041 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1042 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1043 set_{int,vma}_operand.
1044
1045Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1046
1047 * mn10300.h: Add "machine" field for instructions.
1048 (MN103, AM30): Define machine types.
d83c6548 1049
252b5132
RH
1050Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1051
1052 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1053
10541998-06-18 Ulrich Drepper <drepper@cygnus.com>
1055
1056 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1057
1058Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1059
1060 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1061 and ud2b.
1062 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1063 those that happen to be implemented on pentiums.
1064
1065Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1066
1067 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1068 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1069 with Size16|IgnoreSize or Size32|IgnoreSize.
1070
1071Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1072
1073 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1074 (REPE): Rename to REPE_PREFIX_OPCODE.
1075 (i386_regtab_end): Remove.
1076 (i386_prefixtab, i386_prefixtab_end): Remove.
1077 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1078 of md_begin.
1079 (MAX_OPCODE_SIZE): Define.
1080 (i386_optab_end): Remove.
1081 (sl_Suf): Define.
1082 (sl_FP): Use sl_Suf.
1083
1084 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1085 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1086 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1087 data32, dword, and adword prefixes.
1088 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1089 regs.
1090
1091Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1092
1093 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1094
1095 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1096 register operands, because this is a common idiom. Flag them with
1097 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1098 fdivrp because gcc erroneously generates them. Also flag with a
1099 warning.
1100
1101 * i386.h: Add suffix modifiers to most insns, and tighter operand
1102 checks in some cases. Fix a number of UnixWare compatibility
1103 issues with float insns. Merge some floating point opcodes, using
1104 new FloatMF modifier.
1105 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1106 consistency.
1107
1108 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1109 IgnoreDataSize where appropriate.
1110
1111Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1112
1113 * i386.h: (one_byte_segment_defaults): Remove.
1114 (two_byte_segment_defaults): Remove.
1115 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1116
1117Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1118
1119 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1120 (cgen_hw_lookup_by_num): Declare.
1121
1122Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1123
1124 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1125 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1126
1127Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1128
1129 * cgen.h (cgen_asm_init_parse): Delete.
1130 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1131 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1132
1133Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1134
1135 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1136 (cgen_asm_finish_insn): Update prototype.
1137 (cgen_insn): New members num, data.
1138 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1139 dis_hash, dis_hash_table_size moved to ...
1140 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1141 All uses updated. New members asm_hash_p, dis_hash_p.
1142 (CGEN_MINSN_EXPANSION): New struct.
1143 (cgen_expand_macro_insn): Declare.
1144 (cgen_macro_insn_count): Declare.
1145 (get_insn_operands): Update prototype.
1146 (lookup_get_insn_operands): Declare.
1147
1148Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1149
1150 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1151 regKludge. Add operands types for string instructions.
1152
1153Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1154
1155 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1156 table.
1157
1158Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1159
1160 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1161 for `gettext'.
1162
1163Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1164
1165 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1166 Add IsString flag to string instructions.
1167 (IS_STRING): Don't define.
1168 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1169 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1170 (SS_PREFIX_OPCODE): Define.
1171
1172Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1173
1174 * i386.h: Revert March 24 patch; no more LinearAddress.
1175
1176Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1177
1178 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1179 instructions, and instead add FWait opcode modifier. Add short
1180 form of fldenv and fstenv.
1181 (FWAIT_OPCODE): Define.
1182
1183 * i386.h (i386_optab): Change second operand constraint of `mov
1184 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1185 allow legal instructions such as `movl %gs,%esi'
1186
1187Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1188
1189 * h8300.h: Various changes to fully bracket initializers.
1190
1191Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1192
1193 * i386.h: Set LinearAddress for lidt and lgdt.
1194
1195Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1196
1197 * cgen.h (CGEN_BOOL_ATTR): New macro.
1198
1199Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1200
1201 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1202
1203Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1204
1205 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1206 (cgen_insn): Record syntax and format entries here, rather than
1207 separately.
1208
1209Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1210
1211 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1212
1213Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1214
1215 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1216 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1217 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1218
1219Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1220
1221 * cgen.h (lookup_insn): New argument alias_p.
1222
1223Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1224
1225Fix rac to accept only a0:
1226 * d10v.h (OPERAND_ACC): Split into:
1227 (OPERAND_ACC0, OPERAND_ACC1) .
1228 (OPERAND_GPR): Define.
1229
1230Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1231
1232 * cgen.h (CGEN_FIELDS): Define here.
1233 (CGEN_HW_ENTRY): New member `type'.
1234 (hw_list): Delete decl.
1235 (enum cgen_mode): Declare.
1236 (CGEN_OPERAND): New member `hw'.
1237 (enum cgen_operand_instance_type): Declare.
1238 (CGEN_OPERAND_INSTANCE): New type.
1239 (CGEN_INSN): New member `operands'.
1240 (CGEN_OPCODE_DATA): Make hw_list const.
1241 (get_insn_operands,lookup_insn): Add prototypes for.
1242
1243Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1244
1245 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1246 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1247 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1248 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1249
1250Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1251
1252 * cgen.h: Correct typo in comment end marker.
1253
1254Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1255
1256 * tic30.h: New file.
1257
5a109b67 1258Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1259
1260 * cgen.h: Add prototypes for cgen_save_fixups(),
1261 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1262 of cgen_asm_finish_insn() to return a char *.
1263
1264Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1265
1266 * cgen.h: Formatting changes to improve readability.
1267
1268Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1269
1270 * cgen.h (*): Clean up pass over `struct foo' usage.
1271 (CGEN_ATTR): Make unsigned char.
1272 (CGEN_ATTR_TYPE): Update.
1273 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1274 (cgen_base): Move member `attrs' to cgen_insn.
1275 (CGEN_KEYWORD): New member `null_entry'.
1276 (CGEN_{SYNTAX,FORMAT}): New types.
1277 (cgen_insn): Format and syntax separated from each other.
1278
1279Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1280
1281 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1282 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1283 flags_{used,set} long.
1284 (d30v_operand): Make flags field long.
1285
1286Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1287
1288 * m68k.h: Fix comment describing operand types.
1289
1290Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1291
1292 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1293 everything else after down.
1294
1295Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1296
1297 * d10v.h (OPERAND_FLAG): Split into:
1298 (OPERAND_FFLAG, OPERAND_CFLAG) .
1299
1300Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1301
1302 * mips.h (struct mips_opcode): Changed comments to reflect new
1303 field usage.
1304
1305Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1306
1307 * mips.h: Added to comments a quick-ref list of all assigned
1308 operand type characters.
1309 (OP_{MASK,SH}_PERFREG): New macros.
1310
1311Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1312
1313 * sparc.h: Add '_' and '/' for v9a asr's.
1314 Patch from David Miller <davem@vger.rutgers.edu>
1315
1316Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1317
1318 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1319 area are not available in the base model (H8/300).
1320
1321Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1322
1323 * m68k.h: Remove documentation of ` operand specifier.
1324
1325Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1326
1327 * m68k.h: Document q and v operand specifiers.
1328
1329Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1330
1331 * v850.h (struct v850_opcode): Add processors field.
1332 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1333 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1334 (PROCESSOR_V850EA): New bit constants.
1335
1336Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1337
1338 Merge changes from Martin Hunt:
1339
1340 * d30v.h: Allow up to 64 control registers. Add
1341 SHORT_A5S format.
1342
1343 * d30v.h (LONG_Db): New form for delayed branches.
1344
1345 * d30v.h: (LONG_Db): New form for repeati.
1346
1347 * d30v.h (SHORT_D2B): New form.
1348
1349 * d30v.h (SHORT_A2): New form.
1350
1351 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1352 registers are used. Needed for VLIW optimization.
1353
1354Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1355
1356 * cgen.h: Move assembler interface section
1357 up so cgen_parse_operand_result is defined for cgen_parse_address.
1358 (cgen_parse_address): Update prototype.
1359
1360Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1361
1362 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1363
1364Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1365
1366 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1367 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1368 <paubert@iram.es>.
1369
1370 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1371 <paubert@iram.es>.
1372
1373 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1374 <paubert@iram.es>.
1375
1376 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1377 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1378
1379Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1380
1381 * v850.h (V850_NOT_R0): New flag.
1382
1383Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1384
1385 * v850.h (struct v850_opcode): Remove flags field.
1386
1387Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1388
1389 * v850.h (struct v850_opcode): Add flags field.
1390 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1391 fields.
1392 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1393 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1394
1395Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1396
1397 * arc.h: New file.
1398
1399Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1400
1401 * sparc.h (sparc_opcodes): Declare as const.
1402
1403Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1404
1405 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1406 uses single or double precision floating point resources.
1407 (INSN_NO_ISA, INSN_ISA1): Define.
1408 (cpu specific INSN macros): Tweak into bitmasks outside the range
1409 of INSN_ISA field.
1410
1411Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1412
1413 * i386.h: Fix pand opcode.
1414
1415Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1416
1417 * mips.h: Widen INSN_ISA and move it to a more convenient
1418 bit position. Add INSN_3900.
1419
1420Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1421
1422 * mips.h (struct mips_opcode): added new field membership.
1423
1424Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1425
1426 * i386.h (movd): only Reg32 is allowed.
1427
1428 * i386.h: add fcomp and ud2. From Wayne Scott
1429 <wscott@ichips.intel.com>.
1430
1431Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1432
1433 * i386.h: Add MMX instructions.
1434
1435Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1436
1437 * i386.h: Remove W modifier from conditional move instructions.
1438
1439Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1440
1441 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1442 with no arguments to match that generated by the UnixWare
1443 assembler.
1444
1445Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1446
1447 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1448 (cgen_parse_operand_fn): Declare.
1449 (cgen_init_parse_operand): Declare.
1450 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1451 new argument `want'.
1452 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1453 (enum cgen_parse_operand_type): New enum.
1454
1455Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1456
1457 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1458
1459Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1460
1461 * cgen.h: New file.
1462
1463Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1464
1465 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1466 fdivrp.
1467
1468Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1469
1470 * v850.h (extract): Make unsigned.
1471
1472Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1473
1474 * i386.h: Add iclr.
1475
1476Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1477
1478 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1479 take a direction bit.
1480
1481Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1482
1483 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1484
1485Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1486
1487 * sparc.h: Include <ansidecl.h>. Update function declarations to
1488 use prototypes, and to use const when appropriate.
1489
1490Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1491
1492 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1493
1494Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1495
1496 * d10v.h: Change pre_defined_registers to
1497 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1498
1499Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1500
1501 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1502 Change mips_opcodes from const array to a pointer,
1503 and change bfd_mips_num_opcodes from const int to int,
1504 so that we can increase the size of the mips opcodes table
1505 dynamically.
1506
1507Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1508
1509 * d30v.h (FLAG_X): Remove unused flag.
1510
1511Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1512
1513 * d30v.h: New file.
1514
1515Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1516
1517 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1518 (PDS_VALUE): Macro to access value field of predefined symbols.
1519 (tic80_next_predefined_symbol): Add prototype.
1520
1521Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1522
1523 * tic80.h (tic80_symbol_to_value): Change prototype to match
1524 change in function, added class parameter.
1525
1526Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1527
1528 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1529 endmask fields, which are somewhat weird in that 0 and 32 are
1530 treated exactly the same.
1531
1532Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1533
1534 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1535 rather than a constant that is 2**X. Reorder them to put bits for
1536 operands that have symbolic names in the upper bits, so they can
1537 be packed into an int where the lower bits contain the value that
1538 corresponds to that symbolic name.
1539 (predefined_symbo): Add struct.
1540 (tic80_predefined_symbols): Declare array of translations.
1541 (tic80_num_predefined_symbols): Declare size of that array.
1542 (tic80_value_to_symbol): Declare function.
1543 (tic80_symbol_to_value): Declare function.
1544
1545Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1546
1547 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1548
1549Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1550
1551 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1552 be the destination register.
1553
1554Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1555
1556 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1557 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1558 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1559 that the opcode can have two vector instructions in a single
1560 32 bit word and we have to encode/decode both.
1561
1562Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1563
1564 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1565 TIC80_OPERAND_RELATIVE for PC relative.
1566 (TIC80_OPERAND_BASEREL): New flag bit for register
1567 base relative.
1568
1569Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1570
1571 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1572
1573Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1574
1575 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1576 ":s" modifier for scaling.
1577
1578Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1579
1580 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1581 (TIC80_OPERAND_M_LI): Ditto
1582
1583Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1584
1585 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1586 (TIC80_OPERAND_CC): New define for condition code operand.
1587 (TIC80_OPERAND_CR): New define for control register operand.
1588
1589Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1590
1591 * tic80.h (struct tic80_opcode): Name changed.
1592 (struct tic80_opcode): Remove format field.
1593 (struct tic80_operand): Add insertion and extraction functions.
1594 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1595 correct ones.
1596 (FMT_*): Ditto.
1597
1598Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1599
1600 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1601 type IV instruction offsets.
1602
1603Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1604
1605 * tic80.h: New file.
1606
1607Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1608
1609 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1610
1611Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1612
1613 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1614 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1615 * v850.h: Fix comment, v850_operand not powerpc_operand.
1616
1617Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1618
1619 * mn10200.h: Flesh out structures and definitions needed by
1620 the mn10200 assembler & disassembler.
1621
1622Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1623
1624 * mips.h: Add mips16 definitions.
1625
1626Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1627
1628 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1629
1630Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1631
1632 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1633 (MN10300_OPERAND_MEMADDR): Define.
1634
1635Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1636
1637 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1638
1639Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1640
1641 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1642
1643Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1644
1645 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1646
1647Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1648
1649 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1650
1651Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1652
1653 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1654 negative to minimize problems with shared libraries. Organize
1655 instruction subsets by AMASK extensions and PALcode
1656 implementation.
252b5132
RH
1657 (struct alpha_operand): Move flags slot for better packing.
1658
1659Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1660
1661 * v850.h (V850_OPERAND_RELAX): New operand flag.
1662
1663Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1664
1665 * mn10300.h (FMT_*): Move operand format definitions
1666 here.
1667
1668Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1669
1670 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1671
1672Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1673
1674 * mn10300.h (mn10300_opcode): Add "format" field.
1675 (MN10300_OPERAND_*): Define.
1676
1677Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1678
1679 * mn10x00.h: Delete.
1680 * mn10200.h, mn10300.h: New files.
1681
1682Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1683
1684 * mn10x00.h: New file.
1685
1686Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1687
1688 * v850.h: Add new flag to indicate this instruction uses a PC
1689 displacement.
1690
1691Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1692
1693 * h8300.h (stmac): Add missing instruction.
1694
1695Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1696
1697 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1698 field.
1699
1700Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1701
1702 * v850.h (V850_OPERAND_EP): Define.
1703
1704 * v850.h (v850_opcode): Add size field.
1705
1706Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1707
1708 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1709 to functions used to handle unusual operand encoding.
252b5132 1710 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1711 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1712
1713Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1714
1715 * v850.h (v850_operands): Add flags field.
1716 (OPERAND_REG, OPERAND_NUM): Defined.
1717
1718Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1719
1720 * v850.h: New file.
1721
1722Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1723
1724 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1725 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1726 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1727 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1728 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1729 Defined.
252b5132
RH
1730
1731Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1732
1733 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1734 a 3 bit space id instead of a 2 bit space id.
1735
1736Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1737
1738 * d10v.h: Add some additional defines to support the
d83c6548 1739 assembler in determining which operations can be done in parallel.
252b5132
RH
1740
1741Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1742
1743 * h8300.h (SN): Define.
1744 (eepmov.b): Renamed from "eepmov"
1745 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1746 with them.
1747
1748Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1749
1750 * d10v.h (OPERAND_SHIFT): New operand flag.
1751
1752Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1753
1754 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1755 signed numbers.
252b5132
RH
1756
1757Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1758
1759 * d10v.h (pd_reg): Define. Putting the definition here allows
1760 the assembler and disassembler to share the same struct.
1761
1762Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1763
1764 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1765 Williams <steve@icarus.com>.
1766
1767Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1768
1769 * d10v.h: New file.
1770
1771Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1772
1773 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1774
1775Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1776
d83c6548 1777 * m68k.h (mcf5200): New macro.
252b5132
RH
1778 Document names of coldfire control registers.
1779
1780Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1781
1782 * h8300.h (SRC_IN_DST): Define.
1783
1784 * h8300.h (UNOP3): Mark the register operand in this insn
1785 as a source operand, not a destination operand.
1786 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1787 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1788 register operand with SRC_IN_DST.
1789
1790Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1791
1792 * alpha.h: New file.
1793
1794Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1795
1796 * rs6k.h: Remove obsolete file.
1797
1798Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1799
1800 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1801 fdivp, and fdivrp. Add ffreep.
1802
1803Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1804
1805 * h8300.h: Reorder various #defines for readability.
1806 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1807 (BITOP): Accept additional (unused) argument. All callers changed.
1808 (EBITOP): Likewise.
1809 (O_LAST): Bump.
1810 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1811
1812 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1813 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1814 (BITOP, EBITOP): Handle new H8/S addressing modes for
1815 bit insns.
1816 (UNOP3): Handle new shift/rotate insns on the H8/S.
1817 (insns using exr): New instructions.
1818 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1819
1820Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1821
1822 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1823 was incorrect.
1824
1825Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1826
1827 * h8300.h (START): Remove.
1828 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1829 and mov.l insns that can be relaxed.
1830
1831Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1832
1833 * i386.h: Remove Abs32 from lcall.
1834
1835Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1836
1837 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1838 (SLCPOP): New macro.
1839 Mark X,Y opcode letters as in use.
1840
1841Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1842
1843 * sparc.h (F_FLOAT, F_FBR): Define.
1844
1845Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1846
1847 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1848 from all insns.
1849 (ABS8SRC,ABS8DST): Add ABS8MEM.
1850 (add.l): Fix reg+reg variant.
1851 (eepmov.w): Renamed from eepmovw.
1852 (ldc,stc): Fix many cases.
1853
1854Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1855
1856 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1857
1858Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1859
1860 * sparc.h (O): Mark operand letter as in use.
1861
1862Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1863
1864 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1865 Mark operand letters uU as in use.
1866
1867Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1868
1869 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1870 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1871 (SPARC_OPCODE_SUPPORTED): New macro.
1872 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1873 (F_NOTV9): Delete.
1874
1875Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1876
1877 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1878 declaration consistent with return type in definition.
1879
1880Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1881
1882 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1883
1884Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1885
1886 * i386.h (i386_regtab): Add 80486 test registers.
1887
1888Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1889
1890 * i960.h (I_HX): Define.
1891 (i960_opcodes): Add HX instruction.
1892
1893Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1894
1895 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1896 and fclex.
1897
1898Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1899
1900 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1901 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1902 (bfd_* defines): Delete.
1903 (sparc_opcode_archs): Replaces architecture_pname.
1904 (sparc_opcode_lookup_arch): Declare.
1905 (NUMOPCODES): Delete.
1906
1907Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1908
1909 * sparc.h (enum sparc_architecture): Add v9a.
1910 (ARCHITECTURES_CONFLICT_P): Update.
1911
1912Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1913
1914 * i386.h: Added Pentium Pro instructions.
1915
1916Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1917
1918 * m68k.h: Document new 'W' operand place.
1919
1920Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1921
1922 * hppa.h: Add lci and syncdma instructions.
1923
1924Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1925
1926 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1927 instructions.
252b5132
RH
1928
1929Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1930
1931 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1932 assembler's -mcom and -many switches.
1933
1934Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1935
1936 * i386.h: Fix cmpxchg8b extension opcode description.
1937
1938Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1939
1940 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1941 and register cr4.
1942
1943Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1944
1945 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1946
1947Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1948
1949 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1950
1951Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1952
1953 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1954
1955Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1956
1957 * m68kmri.h: Remove.
1958
1959 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1960 declarations. Remove F_ALIAS and flag field of struct
1961 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1962 int. Make name and args fields of struct m68k_opcode const.
1963
1964Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1965
1966 * sparc.h (F_NOTV9): Define.
1967
1968Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1969
1970 * mips.h (INSN_4010): Define.
1971
1972Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1973
1974 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1975
1976 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1977 * m68k.h: Fix argument descriptions of coprocessor
1978 instructions to allow only alterable operands where appropriate.
1979 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1980 (m68k_opcode_aliases): Add more aliases.
1981
1982Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1983
1984 * m68k.h: Added explcitly short-sized conditional branches, and a
1985 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1986 svr4-based configurations.
1987
1988Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1989
1990 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1991 * i386.h: added missing Data16/Data32 flags to a few instructions.
1992
1993Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1994
1995 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1996 (OP_MASK_BCC, OP_SH_BCC): Define.
1997 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1998 (OP_MASK_CCC, OP_SH_CCC): Define.
1999 (INSN_READ_FPR_R): Define.
2000 (INSN_RFE): Delete.
2001
2002Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2003
2004 * m68k.h (enum m68k_architecture): Deleted.
2005 (struct m68k_opcode_alias): New type.
2006 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2007 matching constraints, values and flags. As a side effect of this,
2008 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2009 as I know were never used, now may need re-examining.
2010 (numopcodes): Now const.
2011 (m68k_opcode_aliases, numaliases): New variables.
2012 (endop): Deleted.
2013 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2014 m68k_opcode_aliases; update declaration of m68k_opcodes.
2015
2016Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2017
2018 * hppa.h (delay_type): Delete unused enumeration.
2019 (pa_opcode): Replace unused delayed field with an architecture
2020 field.
2021 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2022
2023Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2024
2025 * mips.h (INSN_ISA4): Define.
2026
2027Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2028
2029 * mips.h (M_DLA_AB, M_DLI): Define.
2030
2031Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2032
2033 * hppa.h (fstwx): Fix single-bit error.
2034
2035Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2036
2037 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2038
2039Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2040
2041 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2042 debug registers. From Charles Hannum (mycroft@netbsd.org).
2043
2044Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2045
2046 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2047 i386 support:
2048 * i386.h (MOV_AX_DISP32): New macro.
2049 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2050 of several call/return instructions.
2051 (ADDR_PREFIX_OPCODE): New macro.
2052
2053Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2054
2055 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2056
4f1d9bd8
NC
2057 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2058 char.
252b5132
RH
2059 (struct vot, field `name'): ditto.
2060
2061Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2062
2063 * vax.h: Supply and properly group all values in end sentinel.
2064
2065Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2066
2067 * mips.h (INSN_ISA, INSN_4650): Define.
2068
2069Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2070
2071 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2072 systems with a separate instruction and data cache, such as the
2073 29040, these instructions take an optional argument.
2074
2075Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2076
2077 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2078 INSN_TRAP.
2079
2080Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2081
2082 * mips.h (INSN_STORE_MEMORY): Define.
2083
2084Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2085
2086 * sparc.h: Document new operand type 'x'.
2087
2088Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2089
2090 * i960.h (I_CX2): New instruction category. It includes
2091 instructions available on Cx and Jx processors.
2092 (I_JX): New instruction category, for JX-only instructions.
2093 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2094 Jx-only instructions, in I_JX category.
2095
2096Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2097
2098 * ns32k.h (endop): Made pointer const too.
2099
2100Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2101
2102 * ns32k.h: Drop Q operand type as there is no correct use
2103 for it. Add I and Z operand types which allow better checking.
2104
2105Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2106
2107 * h8300.h (xor.l) :fix bit pattern.
2108 (L_2): New size of operand.
2109 (trapa): Use it.
2110
2111Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2112
2113 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2114
2115Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2116
2117 * sparc.h: Include v9 definitions.
2118
2119Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2120
2121 * m68k.h (m68060): Defined.
2122 (m68040up, mfloat, mmmu): Include it.
2123 (struct m68k_opcode): Widen `arch' field.
2124 (m68k_opcodes): Updated for M68060. Removed comments that were
2125 instructions commented out by "JF" years ago.
2126
2127Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2128
2129 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2130 add a one-bit `flags' field.
2131 (F_ALIAS): New macro.
2132
2133Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2134
2135 * h8300.h (dec, inc): Get encoding right.
2136
2137Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2138
2139 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2140 a flag instead.
2141 (PPC_OPERAND_SIGNED): Define.
2142 (PPC_OPERAND_SIGNOPT): Define.
2143
2144Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2145
2146 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2147 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2148
2149Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2150
2151 * i386.h: Reverse last change. It'll be handled in gas instead.
2152
2153Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2154
2155 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2156 slower on the 486 and used the implicit shift count despite the
2157 explicit operand. The one-operand form is still available to get
2158 the shorter form with the implicit shift count.
2159
2160Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2161
2162 * hppa.h: Fix typo in fstws arg string.
2163
2164Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2165
2166 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2167
2168Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2169
2170 * ppc.h (PPC_OPCODE_601): Define.
2171
2172Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2173
2174 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2175 (so we can determine valid completers for both addb and addb[tf].)
2176
2177 * hppa.h (xmpyu): No floating point format specifier for the
2178 xmpyu instruction.
2179
2180Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2181
2182 * ppc.h (PPC_OPERAND_NEXT): Define.
2183 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2184 (struct powerpc_macro): Define.
2185 (powerpc_macros, powerpc_num_macros): Declare.
2186
2187Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2188
2189 * ppc.h: New file. Header file for PowerPC opcode table.
2190
2191Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2192
2193 * hppa.h: More minor template fixes for sfu and copr (to allow
2194 for easier disassembly).
2195
2196 * hppa.h: Fix templates for all the sfu and copr instructions.
2197
2198Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2199
2200 * i386.h (push): Permit Imm16 operand too.
2201
2202Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2203
2204 * h8300.h (andc): Exists in base arch.
2205
2206Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2207
2208 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2209 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2210
2211Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2212
2213 * hppa.h: Add FP quadword store instructions.
2214
2215Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2216
2217 * mips.h: (M_J_A): Added.
2218 (M_LA): Removed.
2219
2220Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2221
2222 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2223 <mellon@pepper.ncd.com>.
2224
2225Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2226
2227 * hppa.h: Immediate field in probei instructions is unsigned,
2228 not low-sign extended.
2229
2230Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2231
2232 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2233
2234Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2235
2236 * i386.h: Add "fxch" without operand.
2237
2238Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2239
2240 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2241
2242Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2243
2244 * hppa.h: Add gfw and gfr to the opcode table.
2245
2246Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2247
2248 * m88k.h: extended to handle m88110.
2249
2250Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2251
2252 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2253 addresses.
2254
2255Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2256
2257 * i960.h (i960_opcodes): Properly bracket initializers.
2258
2259Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2260
2261 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2262
2263Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2264
2265 * m68k.h (two): Protect second argument with parentheses.
2266
2267Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2268
2269 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2270 Deleted old in/out instructions in "#if 0" section.
2271
2272Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2273
2274 * i386.h (i386_optab): Properly bracket initializers.
2275
2276Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2277
2278 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2279 Jeff Law, law@cs.utah.edu).
2280
2281Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2282
2283 * i386.h (lcall): Accept Imm32 operand also.
2284
2285Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2286
2287 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2288 (M_DABS): Added.
2289
2290Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2291
2292 * mips.h (INSN_*): Changed values. Removed unused definitions.
2293 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2294 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2295 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2296 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2297 (M_*): Added new values for r6000 and r4000 macros.
2298 (ANY_DELAY): Removed.
2299
2300Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2301
2302 * mips.h: Added M_LI_S and M_LI_SS.
2303
2304Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2305
2306 * h8300.h: Get some rare mov.bs correct.
2307
2308Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2309
2310 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2311 been included.
2312
2313Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2314
2315 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2316 jump instructions, for use in disassemblers.
2317
2318Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2319
2320 * m88k.h: Make bitfields just unsigned, not unsigned long or
2321 unsigned short.
2322
2323Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2324
2325 * hppa.h: New argument type 'y'. Use in various float instructions.
2326
2327Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2328
2329 * hppa.h (break): First immediate field is unsigned.
2330
2331 * hppa.h: Add rfir instruction.
2332
2333Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2334
2335 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2336
2337Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2338
2339 * mips.h: Reworked the hazard information somewhat, and fixed some
2340 bugs in the instruction hazard descriptions.
2341
2342Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2343
2344 * m88k.h: Corrected a couple of opcodes.
2345
2346Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2347
2348 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2349 new version includes instruction hazard information, but is
2350 otherwise reasonably similar.
2351
2352Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2353
2354 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2355
2356Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2357
2358 Patches from Jeff Law, law@cs.utah.edu:
2359 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2360 Make the tables be the same for the following instructions:
2361 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2362 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2363 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2364 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2365 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2366 "fcmp", and "ftest".
2367
2368 * hppa.h: Make new and old tables the same for "break", "mtctl",
2369 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2370 Fix typo in last patch. Collapse several #ifdefs into a
2371 single #ifdef.
2372
2373 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2374 of the comments up-to-date.
2375
2376 * hppa.h: Update "free list" of letters and update
2377 comments describing each letter's function.
2378
4f1d9bd8
NC
2379Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2380
2381 * h8300.h: Lots of little fixes for the h8/300h.
2382
2383Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2384
2385 Support for H8/300-H
2386 * h8300.h: Lots of new opcodes.
2387
252b5132
RH
2388Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2389
2390 * h8300.h: checkpoint, includes H8/300-H opcodes.
2391
2392Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2393
2394 * Patches from Jeffrey Law <law@cs.utah.edu>.
2395 * hppa.h: Rework single precision FP
2396 instructions so that they correctly disassemble code
2397 PA1.1 code.
2398
2399Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2400
2401 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2402 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2403
2404Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2405
2406 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2407 gdb will define it for now.
2408
2409Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2410
2411 * sparc.h: Don't end enumerator list with comma.
2412
2413Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2414
2415 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2416 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2417 ("bc2t"): Correct typo.
2418 ("[ls]wc[023]"): Use T rather than t.
2419 ("c[0123]"): Define general coprocessor instructions.
2420
2421Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2422
2423 * m68k.h: Move split point for gcc compilation more towards
2424 middle.
2425
2426Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2427
2428 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2429 simply wrong, ics, rfi, & rfsvc were missing).
2430 Add "a" to opr_ext for "bb". Doc fix.
2431
2432Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2433
2434 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2435 * mips.h: Add casts, to suppress warnings about shifting too much.
2436 * m68k.h: Document the placement code '9'.
2437
2438Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2439
2440 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2441 allows callers to break up the large initialized struct full of
2442 opcodes into two half-sized ones. This permits GCC to compile
2443 this module, since it takes exponential space for initializers.
2444 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2445
2446Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2447
2448 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2449 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2450 initialized structs in it.
2451
2452Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2453
2454 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2455 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2456 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2457
2458Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2459
2460 * mips.h: document "i" and "j" operands correctly.
2461
2462Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2463
2464 * mips.h: Removed endianness dependency.
2465
2466Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2467
2468 * h8300.h: include info on number of cycles per instruction.
2469
2470Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2471
2472 * hppa.h: Move handy aliases to the front. Fix masks for extract
2473 and deposit instructions.
2474
2475Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2476
2477 * i386.h: accept shld and shrd both with and without the shift
2478 count argument, which is always %cl.
2479
2480Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2481
2482 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2483 (one_byte_segment_defaults, two_byte_segment_defaults,
2484 i386_prefixtab_end): Ditto.
2485
2486Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2487
2488 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2489 for operand 2; from John Carr, jfc@dsg.dec.com.
2490
2491Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2492
2493 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2494 always use 16-bit offsets. Makes calculated-size jump tables
2495 feasible.
2496
2497Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2498
2499 * i386.h: Fix one-operand forms of in* and out* patterns.
2500
2501Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2502
2503 * m68k.h: Added CPU32 support.
2504
2505Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2506
2507 * mips.h (break): Disassemble the argument. Patch from
2508 jonathan@cs.stanford.edu (Jonathan Stone).
2509
2510Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2511
2512 * m68k.h: merged Motorola and MIT syntax.
2513
2514Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2515
2516 * m68k.h (pmove): make the tests less strict, the 68k book is
2517 wrong.
2518
2519Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2520
2521 * m68k.h (m68ec030): Defined as alias for 68030.
2522 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2523 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2524 them. Tightened description of "fmovex" to distinguish it from
2525 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2526 up descriptions that claimed versions were available for chips not
2527 supporting them. Added "pmovefd".
2528
2529Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2530
2531 * m68k.h: fix where the . goes in divull
2532
2533Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2534
2535 * m68k.h: the cas2 instruction is supposed to be written with
2536 indirection on the last two operands, which can be either data or
2537 address registers. Added a new operand type 'r' which accepts
2538 either register type. Added new cases for cas2l and cas2w which
2539 use them. Corrected masks for cas2 which failed to recognize use
2540 of address register.
2541
2542Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2543
2544 * m68k.h: Merged in patches (mostly m68040-specific) from
2545 Colin Smith <colin@wrs.com>.
2546
2547 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2548 base). Also cleaned up duplicates, re-ordered instructions for
2549 the sake of dis-assembling (so aliases come after standard names).
2550 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2551
2552Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2553
2554 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2555 all missing .s
2556
2557Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2558
2559 * sparc.h: Moved tables to BFD library.
2560
2561 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2562
2563Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2564
2565 * h8300.h: Finish filling in all the holes in the opcode table,
2566 so that the Lucid C compiler can digest this as well...
2567
2568Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2569
2570 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2571 Fix opcodes on various sizes of fild/fist instructions
2572 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2573 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2574
2575Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2576
2577 * h8300.h: Fill in all the holes in the opcode table so that the
2578 losing HPUX C compiler can digest this...
2579
2580Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2581
2582 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2583 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2584
2585Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2586
2587 * sparc.h: Add new architecture variant sparclite; add its scan
2588 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2589
2590Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2591
2592 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2593 fy@lucid.com).
2594
2595Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2596
2597 * rs6k.h: New version from IBM (Metin).
2598
2599Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2600
2601 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2602 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2603
2604Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2605
2606 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2607
2608Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2609
2610 * m68k.h (one, two): Cast macro args to unsigned to suppress
2611 complaints from compiler and lint about integer overflow during
2612 shift.
2613
2614Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2615
2616 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2617
2618Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2619
2620 * mips.h: Make bitfield layout depend on the HOST compiler,
2621 not on the TARGET system.
2622
2623Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2624
2625 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2626 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2627 <TRANLE@INTELLICORP.COM>.
2628
2629Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2630
2631 * h8300.h: turned op_type enum into #define list
2632
2633Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2634
2635 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2636 similar instructions -- they've been renamed to "fitoq", etc.
2637 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2638 number of arguments.
2639 * h8300.h: Remove extra ; which produces compiler warning.
2640
2641Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2642
2643 * sparc.h: fix opcode for tsubcctv.
2644
2645Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2646
2647 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2648
2649Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2650
2651 * sparc.h (nop): Made the 'lose' field be even tighter,
2652 so only a standard 'nop' is disassembled as a nop.
2653
2654Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2655
2656 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2657 disassembled as a nop.
2658
4f1d9bd8
NC
2659Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2660
2661 * m68k.h, sparc.h: ANSIfy enums.
2662
252b5132
RH
2663Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2664
2665 * sparc.h: fix a typo.
2666
2667Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2668
2669 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2670 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2671 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2672
2673\f
2674Local Variables:
2675version-control: never
2676End:
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