projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Mostly cosmetic. Fixes to comments. Don't start as_bad and as_warn
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
d0b47220
AM		 12000-03-26 Alan Modra <alan@linuxcare.com>
2
3 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
4 problem isn't really specific to Unixware.
5 (OLDGCC_COMPAT): Define.
6 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
7 destination %st(0).
8 Fix lots of comments.
9
866afedc
NC		 102000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
11
12 * d30v.h:
13 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
14 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
15 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
16 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
17 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
18 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
19 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
20
cc5ca5ce
AM		 212000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
22
23 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
24 fistpd without suffix.
25
68e324a2
NC		 262000-02-24 Nick Clifton <nickc@cygnus.com>
27
28 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
29 'signed_overflow_ok_p'.
30 Delete prototypes for cgen_set_flags() and cgen_get_flags().
31
60f036a2
AH		 322000-02-24 Andrew Haley <aph@cygnus.com>
33
34 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
35 (CGEN_CPU_TABLE): flags: new field.
36 Add prototypes for new functions.
37
9b9b5cd4
AM		 382000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
39
40 * i386.h: Add some more UNIXWARE_COMPAT comments.
41
5b93d8bb
AM		 422000-02-23 Linas Vepstas <linas@linas.org>
43
44 * i370.h: New file.
45
87f398dd
AH		 462000-02-22 Andrew Haley <aph@cygnus.com>
47
48 * mips.h: (OPCODE_IS_MEMBER): Add comment.
49
367c01af
AH		 501999-12-30 Andrew Haley <aph@cygnus.com>
51
9a1e79ca
AH		 52 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
53 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
54 insns.
367c01af 55
add0c677
AM		 562000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
57
58 * i386.h: Qualify intel mode far call and jmp with x_Suf.
59
3138f287
AM		 601999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
61
62 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
63 indirect jumps and calls. Add FF/3 call for intel mode.
64
ccecd07b
JL		 65Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
66
67 * mn10300.h: Add new operand types. Add new instruction formats.
68
b37e19e9
JL		 69Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
70
71 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
72 instruction.
73
5fce5ddf
GRK		 741999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
75
76 * mips.h (INSN_ISA5): New.
77
2bd7f1f3
GRK		 781999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
79
80 * mips.h (OPCODE_IS_MEMBER): New.
81
4df2b5c5
NC		 821999-10-29 Nick Clifton <nickc@cygnus.com>
83
84 * d30v.h (SHORT_AR): Define.
85
446a06c9
MM		 861999-10-18 Michael Meissner <meissner@cygnus.com>
87
88 * alpha.h (alpha_num_opcodes): Convert to unsigned.
89 (alpha_num_operands): Ditto.
90
eca04c6a
JL		 91Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
92
93 * hppa.h (pa_opcodes): Add load and store cache control to
94 instructions. Add ordered access load and store.
95
96 * hppa.h (pa_opcode): Add new entries for addb and addib.
97
98 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
99
100 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
101
c43185de
DN		 102Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
103
104 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
105
ec3533da
JL		 106Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
107
390f858d
JL		 108 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
109 and "be" using completer prefixes.
110
8c47ebd9
JL		 111 * hppa.h (pa_opcodes): Add initializers to silence compiler.
112
ec3533da
JL		 113 * hppa.h: Update comments about character usage.
114
18369bea
JL		 115Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
116
117 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
118 up the new fstw & bve instructions.
119
c36efdd2
JL		 120Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
121
d3ffb032
JL		 122 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
123 instructions.
124
c49ec3da
JL		 125 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
126
5d2e7ecc
JL		 127 * hppa.h (pa_opcodes): Add long offset double word load/store
128 instructions.
129
6397d1a2
JL		 130 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
131 stores.
132
142f0fe0
JL		 133 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
134
f5a68b45
JL		 135 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
136
8235801e
JL		 137 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
138
35184366
JL		 139 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
140
f0bfde5e
JL		 141 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
142
27bbbb58
JL		 143 * hppa.h (pa_opcodes): Add support for "b,l".
144
c36efdd2
JL		 145 * hppa.h (pa_opcodes): Add support for "b,gate".
146
f2727d04
JL		 147Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
148
9392fb11
JL		 149 * hppa.h (pa_opcodes): Use 'fX' for first register operand
150 in xmpyu.
151
e0c52e99
JL		 152 * hppa.h (pa_opcodes): Fix mask for probe and probei.
153
f2727d04
JL		 154 * hppa.h (pa_opcodes): Fix mask for depwi.
155
52d836e2
JL		 156Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
157
158 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
159 an explicit output argument.
160
90765e3a
JL		 161Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
162
163 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
164 Add a few PA2.0 loads and store variants.
165
8340b17f
ILT		 1661999-09-04 Steve Chamberlain <sac@pobox.com>
167
168 * pj.h: New file.
169
5f47d35b
AM		 1701999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
171
172 * i386.h (i386_regtab): Move %st to top of table, and split off
173 other fp reg entries.
174 (i386_float_regtab): To here.
175
1c143202
JL		 176Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
177
7d8fdb64
JL		 178 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
179 by 'f'.
180
90927b9c
JL		 181 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
182 Add supporting args.
183
1d16bf9c
JL		 184 * hppa.h: Document new completers and args.
185 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
186 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
187 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
188 pmenb and pmdis.
189
96226a68
JL		 190 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
191 hshr, hsub, mixh, mixw, permh.
192
5d4ba527
JL		 193 * hppa.h (pa_opcodes): Change completers in instructions to
194 use 'c' prefix.
195
e9fc28c6
JL		 196 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
197 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
198
1c143202
JL		 199 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
200 fnegabs to use 'I' instead of 'F'.
201
9e525108
AM		 2021999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
203
204 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
205 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
206 Alphabetically sort PIII insns.
207
e8da1bf1
DE		 208Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
209
210 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
211
7d627258
JL		 212Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
213
5696871a
JL		 214 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
215 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
216
7d627258
JL		 217 * hppa.h: Document 64 bit condition completers.
218
c5e52916
JL		 219Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
220
221 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
222
eecb386c
AM		 2231999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
224
225 * i386.h (i386_optab): Add DefaultSize modifier to all insns
226 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
227 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
228
88a380f3
JL		 229Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
230 Jeff Law <law@cygnus.com>
231
232 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
233
234 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 235
236 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
237 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
238
145cf1f0
AM		 2391999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
240
241 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
242
73826640
JL		 243Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
244
245 * hppa.h (struct pa_opcode): Add new field "flags".
246 (FLAGS_STRICT): Define.
247
b65db252
JL		 248Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
249 Jeff Law <law@cygnus.com>
250
f7fc668b
JL		 251 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
252
253 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 254
10084519
AM		 2551999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
256
257 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
258 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
259 flag to fcomi and friends.
260
cd8a80ba
JL		 261Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
262
263 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
264 integer logical instructions.
265
1fca749b
ILT		 2661999-05-28 Linus Nordberg <linus.nordberg@canit.se>
267
268 * m68k.h: Document new formats `E', `G', `H' and new places `N',
269 `n', `o'.
270
271 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
272 and new places `m', `M', `h'.
273
aa008907
JL		 274Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
275
276 * hppa.h (pa_opcodes): Add several processor specific system
277 instructions.
278
e26b85f0
JL		 279Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
280
281 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
282 "addb", and "addib" to be used by the disassembler.
283
c608c12e
AM		 2841999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
285
286 * i386.h (ReverseModrm): Remove all occurences.
287 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
288 movmskps, pextrw, pmovmskb, maskmovq.
289 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
290 ignore the data size prefix.
291
292 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
293 Mostly stolen from Doug Ledford <dledford@redhat.com>
294
45c18104
RH		 295Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
296
297 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
298
252b5132
RH		 2991999-04-14 Doug Evans <devans@casey.cygnus.com>
300
301 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
302 (CGEN_ATTR_TYPE): Update.
303 (CGEN_ATTR_MASK): Number booleans starting at 0.
304 (CGEN_ATTR_VALUE): Update.
305 (CGEN_INSN_ATTR): Update.
306
307Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
308
309 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
310 instructions.
311
312Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
313
314 * hppa.h (bb, bvb): Tweak opcode/mask.
315
316
3171999-03-22 Doug Evans <devans@casey.cygnus.com>
318
319 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
320 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
321 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
322 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
323 Delete member max_insn_size.
324 (enum cgen_cpu_open_arg): New enum.
325 (cpu_open): Update prototype.
326 (cpu_open_1): Declare.
327 (cgen_set_cpu): Delete.
328
3291999-03-11 Doug Evans <devans@casey.cygnus.com>
330
331 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
332 (CGEN_OPERAND_NIL): New macro.
333 (CGEN_OPERAND): New member `type'.
334 (@arch@_cgen_operand_table): Delete decl.
335 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
336 (CGEN_OPERAND_TABLE): New struct.
337 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
338 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
339 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
340 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
341 {get,set}_{int,vma}_operand.
342 (@arch@_cgen_cpu_open): New arg `isa'.
343 (cgen_set_cpu): Ditto.
344
345Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
346
347 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
348
3491999-02-25 Doug Evans <devans@casey.cygnus.com>
350
351 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
352 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
353 enum cgen_hw_type.
354 (CGEN_HW_TABLE): New struct.
355 (hw_table): Delete declaration.
356 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
357 to table entry to enum.
358 (CGEN_OPINST): Ditto.
359 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
360
361Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
362
363 * alpha.h (AXP_OPCODE_EV6): New.
364 (AXP_OPCODE_NOPAL): Include it.
365
3661999-02-09 Doug Evans <devans@casey.cygnus.com>
367
368 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
369 All uses updated. New members int_insn_p, max_insn_size,
370 parse_operand,insert_operand,extract_operand,print_operand,
371 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
372 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
373 extract_handlers,print_handlers.
374 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
375 (CGEN_ATTR_BOOL_OFFSET): New macro.
376 (CGEN_ATTR_MASK): Subtract it to compute bit number.
377 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
378 (cgen_opcode_handler): Renamed from cgen_base.
379 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
380 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
381 all uses updated.
382 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
383 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
384 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
385 (CGEN_OPCODE,CGEN_IBASE): New types.
386 (CGEN_INSN): Rewrite.
387 (CGEN_{ASM,DIS}_HASH*): Delete.
388 (init_opcode_table,init_ibld_table): Declare.
389 (CGEN_INSN_ATTR): New type.
390
391Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
392
393 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
394 (x_FP, d_FP, dls_FP, sldx_FP): Define.
395 Change *Suf definitions to include x and d suffixes.
396 (movsx): Use w_Suf and b_Suf.
397 (movzx): Likewise.
398 (movs): Use bwld_Suf.
399 (fld): Change ordering. Use sld_FP.
400 (fild): Add Intel Syntax equivalent of fildq.
401 (fst): Use sld_FP.
402 (fist): Use sld_FP.
403 (fstp): Use sld_FP. Add x_FP version.
404 (fistp): LLongMem version for Intel Syntax.
405 (fcom, fcomp): Use sld_FP.
406 (fadd, fiadd, fsub): Use sld_FP.
407 (fsubr): Use sld_FP.
408 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
409
4101999-01-27 Doug Evans <devans@casey.cygnus.com>
411
412 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
413 CGEN_MODE_UINT.
414
415Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
416
417 * hppa.h (bv): Fix mask.
418
4191999-01-05 Doug Evans <devans@casey.cygnus.com>
420
421 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
422 (CGEN_ATTR): Use it.
423 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
424 (CGEN_ATTR_TABLE): New member dfault.
425
4261998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
427
428 * mips.h (MIPS16_INSN_BRANCH): New.
429
430Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
431
432 The following is part of a change made by Edith Epstein
433 <eepstein@sophia.cygnus.com> as part of a project to merge in
434 changes by HP; HP did not create ChangeLog entries.
435
436 * hppa.h (completer_chars): list of chars to not put a space
437 after.
438
439Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
440
441 * i386.h (i386_optab): Permit w suffix on processor control and
442 status word instructions.
443
4441998-11-30 Doug Evans <devans@casey.cygnus.com>
445
446 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
447 (struct cgen_keyword_entry): Ditto.
448 (struct cgen_operand): Ditto.
449 (CGEN_IFLD): New typedef, with associated access macros.
450 (CGEN_IFMT): New typedef, with associated access macros.
451 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
452 (CGEN_IVALUE): New typedef.
453 (struct cgen_insn): Delete const on syntax,attrs members.
454 `format' now points to format data. Type of `value' is now
455 CGEN_IVALUE.
456 (struct cgen_opcode_table): New member ifld_table.
457
4581998-11-18 Doug Evans <devans@casey.cygnus.com>
459
460 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
461 (CGEN_OPERAND_INSTANCE): New member `attrs'.
462 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
463 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
464 (cgen_opcode_table): Update type of dis_hash fn.
465 (extract_operand): Update type of `insn_value' arg.
466
467Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
468
469 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
470
471Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
472
473 * mips.h (INSN_MULT): Added.
474
475Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
476
477 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
478
479Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
480
481 * cgen.h (CGEN_INSN_INT): New typedef.
482 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
483 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
484 (CGEN_INSN_BYTES_PTR): New typedef.
485 (CGEN_EXTRACT_INFO): New typedef.
486 (cgen_insert_fn,cgen_extract_fn): Update.
487 (cgen_opcode_table): New member `insn_endian'.
488 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
489 (insert_operand,extract_operand): Update.
490 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
491
492Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
493
494 * cgen.h (CGEN_ATTR_BOOLS): New macro.
495 (struct CGEN_HW_ENTRY): New member `attrs'.
496 (CGEN_HW_ATTR): New macro.
497 (struct CGEN_OPERAND_INSTANCE): New member `name'.
498 (CGEN_INSN_INVALID_P): New macro.
499
500Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
501
502 * hppa.h: Add "fid".
503
504Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
505
506 From Robert Andrew Dale <rob@nb.net>
507 * i386.h (i386_optab): Add AMD 3DNow! instructions.
508 (AMD_3DNOW_OPCODE): Define.
509
510Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
511
512 * d30v.h (EITHER_BUT_PREFER_MU): Define.
513
514Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
515
516 * cgen.h (cgen_insn): #if 0 out element `cdx'.
517
518Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
519
520 Move all global state data into opcode table struct, and treat
521 opcode table as something that is "opened/closed".
522 * cgen.h (CGEN_OPCODE_DESC): New type.
523 (all fns): New first arg of opcode table descriptor.
524 (cgen_set_parse_operand_fn): Add prototype.
525 (cgen_current_machine,cgen_current_endian): Delete.
526 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
527 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
528 dis_hash_table,dis_hash_table_entries.
529 (opcode_open,opcode_close): Add prototypes.
530
531 * cgen.h (cgen_insn): New element `cdx'.
532
533Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
534
535 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
536
537Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
538
539 * mn10300.h: Add "no_match_operands" field for instructions.
540 (MN10300_MAX_OPERANDS): Define.
541
542Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
543
544 * cgen.h (cgen_macro_insn_count): Declare.
545
546Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
547
548 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
549 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
550 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
551 set_{int,vma}_operand.
552
553Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
554
555 * mn10300.h: Add "machine" field for instructions.
556 (MN103, AM30): Define machine types.
557
558Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
559
560 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
561
5621998-06-18 Ulrich Drepper <drepper@cygnus.com>
563
564 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
565
566Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
567
568 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
569 and ud2b.
570 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
571 those that happen to be implemented on pentiums.
572
573Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
574
575 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
576 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
577 with Size16|IgnoreSize or Size32|IgnoreSize.
578
579Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
580
581 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
582 (REPE): Rename to REPE_PREFIX_OPCODE.
583 (i386_regtab_end): Remove.
584 (i386_prefixtab, i386_prefixtab_end): Remove.
585 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
586 of md_begin.
587 (MAX_OPCODE_SIZE): Define.
588 (i386_optab_end): Remove.
589 (sl_Suf): Define.
590 (sl_FP): Use sl_Suf.
591
592 * i386.h (i386_optab): Allow 16 bit displacement for `mov
593 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
594 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
595 data32, dword, and adword prefixes.
596 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
597 regs.
598
599Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
600
601 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
602
603 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
604 register operands, because this is a common idiom. Flag them with
605 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
606 fdivrp because gcc erroneously generates them. Also flag with a
607 warning.
608
609 * i386.h: Add suffix modifiers to most insns, and tighter operand
610 checks in some cases. Fix a number of UnixWare compatibility
611 issues with float insns. Merge some floating point opcodes, using
612 new FloatMF modifier.
613 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
614 consistency.
615
616 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
617 IgnoreDataSize where appropriate.
618
619Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
620
621 * i386.h: (one_byte_segment_defaults): Remove.
622 (two_byte_segment_defaults): Remove.
623 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
624
625Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
626
627 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
628 (cgen_hw_lookup_by_num): Declare.
629
630Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
631
632 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
633 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
634
635Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
636
637 * cgen.h (cgen_asm_init_parse): Delete.
638 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
639 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
640
641Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
642
643 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
644 (cgen_asm_finish_insn): Update prototype.
645 (cgen_insn): New members num, data.
646 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
647 dis_hash, dis_hash_table_size moved to ...
648 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
649 All uses updated. New members asm_hash_p, dis_hash_p.
650 (CGEN_MINSN_EXPANSION): New struct.
651 (cgen_expand_macro_insn): Declare.
652 (cgen_macro_insn_count): Declare.
653 (get_insn_operands): Update prototype.
654 (lookup_get_insn_operands): Declare.
655
656Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
657
658 * i386.h (i386_optab): Change iclrKludge and imulKludge to
659 regKludge. Add operands types for string instructions.
660
661Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
662
663 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
664 table.
665
666Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
667
668 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
669 for `gettext'.
670
671Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
672
673 * i386.h: Remove NoModrm flag from all insns: it's never checked.
674 Add IsString flag to string instructions.
675 (IS_STRING): Don't define.
676 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
677 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
678 (SS_PREFIX_OPCODE): Define.
679
680Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
681
682 * i386.h: Revert March 24 patch; no more LinearAddress.
683
684Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
685
686 * i386.h (i386_optab): Remove fwait (9b) from all floating point
687 instructions, and instead add FWait opcode modifier. Add short
688 form of fldenv and fstenv.
689 (FWAIT_OPCODE): Define.
690
691 * i386.h (i386_optab): Change second operand constraint of `mov
692 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
693 allow legal instructions such as `movl %gs,%esi'
694
695Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
696
697 * h8300.h: Various changes to fully bracket initializers.
698
699Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
700
701 * i386.h: Set LinearAddress for lidt and lgdt.
702
703Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
704
705 * cgen.h (CGEN_BOOL_ATTR): New macro.
706
707Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
708
709 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
710
711Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
712
713 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
714 (cgen_insn): Record syntax and format entries here, rather than
715 separately.
716
717Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
718
719 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
720
721Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
722
723 * cgen.h (cgen_insert_fn): Change type of result to const char *.
724 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
725 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
726
727Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
728
729 * cgen.h (lookup_insn): New argument alias_p.
730
731Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
732
733Fix rac to accept only a0:
734 * d10v.h (OPERAND_ACC): Split into:
735 (OPERAND_ACC0, OPERAND_ACC1) .
736 (OPERAND_GPR): Define.
737
738Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
739
740 * cgen.h (CGEN_FIELDS): Define here.
741 (CGEN_HW_ENTRY): New member `type'.
742 (hw_list): Delete decl.
743 (enum cgen_mode): Declare.
744 (CGEN_OPERAND): New member `hw'.
745 (enum cgen_operand_instance_type): Declare.
746 (CGEN_OPERAND_INSTANCE): New type.
747 (CGEN_INSN): New member `operands'.
748 (CGEN_OPCODE_DATA): Make hw_list const.
749 (get_insn_operands,lookup_insn): Add prototypes for.
750
751Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
752
753 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
754 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
755 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
756 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
757
758Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
759
760 * cgen.h: Correct typo in comment end marker.
761
762Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
763
764 * tic30.h: New file.
765
766Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
767
768 * cgen.h: Add prototypes for cgen_save_fixups(),
769 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
770 of cgen_asm_finish_insn() to return a char *.
771
772Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
773
774 * cgen.h: Formatting changes to improve readability.
775
776Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
777
778 * cgen.h (*): Clean up pass over `struct foo' usage.
779 (CGEN_ATTR): Make unsigned char.
780 (CGEN_ATTR_TYPE): Update.
781 (CGEN_ATTR_{ENTRY,TABLE}): New types.
782 (cgen_base): Move member `attrs' to cgen_insn.
783 (CGEN_KEYWORD): New member `null_entry'.
784 (CGEN_{SYNTAX,FORMAT}): New types.
785 (cgen_insn): Format and syntax separated from each other.
786
787Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
788
789 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
790 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
791 flags_{used,set} long.
792 (d30v_operand): Make flags field long.
793
794Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
795
796 * m68k.h: Fix comment describing operand types.
797
798Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
799
800 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
801 everything else after down.
802
803Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
804
805 * d10v.h (OPERAND_FLAG): Split into:
806 (OPERAND_FFLAG, OPERAND_CFLAG) .
807
808Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
809
810 * mips.h (struct mips_opcode): Changed comments to reflect new
811 field usage.
812
813Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
814
815 * mips.h: Added to comments a quick-ref list of all assigned
816 operand type characters.
817 (OP_{MASK,SH}_PERFREG): New macros.
818
819Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
820
821 * sparc.h: Add '_' and '/' for v9a asr's.
822 Patch from David Miller <davem@vger.rutgers.edu>
823
824Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
825
826 * h8300.h: Bit ops with absolute addresses not in the 8 bit
827 area are not available in the base model (H8/300).
828
829Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
830
831 * m68k.h: Remove documentation of ` operand specifier.
832
833Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
834
835 * m68k.h: Document q and v operand specifiers.
836
837Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
838
839 * v850.h (struct v850_opcode): Add processors field.
840 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
841 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
842 (PROCESSOR_V850EA): New bit constants.
843
844Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
845
846 Merge changes from Martin Hunt:
847
848 * d30v.h: Allow up to 64 control registers. Add
849 SHORT_A5S format.
850
851 * d30v.h (LONG_Db): New form for delayed branches.
852
853 * d30v.h: (LONG_Db): New form for repeati.
854
855 * d30v.h (SHORT_D2B): New form.
856
857 * d30v.h (SHORT_A2): New form.
858
859 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
860 registers are used. Needed for VLIW optimization.
861
862Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
863
864 * cgen.h: Move assembler interface section
865 up so cgen_parse_operand_result is defined for cgen_parse_address.
866 (cgen_parse_address): Update prototype.
867
868Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
869
870 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
871
872Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
873
874 * i386.h (two_byte_segment_defaults): Correct base register 5 in
875 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
876 <paubert@iram.es>.
877
878 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
879 <paubert@iram.es>.
880
881 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
882 <paubert@iram.es>.
883
884 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
885 (JUMP_ON_ECX_ZERO): Remove commented out macro.
886
887Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
888
889 * v850.h (V850_NOT_R0): New flag.
890
891Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
892
893 * v850.h (struct v850_opcode): Remove flags field.
894
895Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
896
897 * v850.h (struct v850_opcode): Add flags field.
898 (struct v850_operand): Extend meaning of 'bits' and 'shift'
899 fields.
900 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
901 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
902
903Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
904
905 * arc.h: New file.
906
907Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
908
909 * sparc.h (sparc_opcodes): Declare as const.
910
911Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
912
913 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
914 uses single or double precision floating point resources.
915 (INSN_NO_ISA, INSN_ISA1): Define.
916 (cpu specific INSN macros): Tweak into bitmasks outside the range
917 of INSN_ISA field.
918
919Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
920
921 * i386.h: Fix pand opcode.
922
923Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
924
925 * mips.h: Widen INSN_ISA and move it to a more convenient
926 bit position. Add INSN_3900.
927
928Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
929
930 * mips.h (struct mips_opcode): added new field membership.
931
932Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
933
934 * i386.h (movd): only Reg32 is allowed.
935
936 * i386.h: add fcomp and ud2. From Wayne Scott
937 <wscott@ichips.intel.com>.
938
939Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
940
941 * i386.h: Add MMX instructions.
942
943Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
944
945 * i386.h: Remove W modifier from conditional move instructions.
946
947Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
948
949 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
950 with no arguments to match that generated by the UnixWare
951 assembler.
952
953Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
954
955 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
956 (cgen_parse_operand_fn): Declare.
957 (cgen_init_parse_operand): Declare.
958 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
959 new argument `want'.
960 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
961 (enum cgen_parse_operand_type): New enum.
962
963Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
964
965 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
966
967Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
968
969 * cgen.h: New file.
970
971Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
972
973 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
974 fdivrp.
975
976Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
977
978 * v850.h (extract): Make unsigned.
979
980Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
981
982 * i386.h: Add iclr.
983
984Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
985
986 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
987 take a direction bit.
988
989Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
990
991 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
992
993Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
994
995 * sparc.h: Include <ansidecl.h>. Update function declarations to
996 use prototypes, and to use const when appropriate.
997
998Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
999
1000 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1001
1002Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1003
1004 * d10v.h: Change pre_defined_registers to
1005 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1006
1007Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1008
1009 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1010 Change mips_opcodes from const array to a pointer,
1011 and change bfd_mips_num_opcodes from const int to int,
1012 so that we can increase the size of the mips opcodes table
1013 dynamically.
1014
1015Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1016
1017 * d30v.h (FLAG_X): Remove unused flag.
1018
1019Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1020
1021 * d30v.h: New file.
1022
1023Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1024
1025 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1026 (PDS_VALUE): Macro to access value field of predefined symbols.
1027 (tic80_next_predefined_symbol): Add prototype.
1028
1029Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1030
1031 * tic80.h (tic80_symbol_to_value): Change prototype to match
1032 change in function, added class parameter.
1033
1034Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1035
1036 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1037 endmask fields, which are somewhat weird in that 0 and 32 are
1038 treated exactly the same.
1039
1040Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1041
1042 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1043 rather than a constant that is 2**X. Reorder them to put bits for
1044 operands that have symbolic names in the upper bits, so they can
1045 be packed into an int where the lower bits contain the value that
1046 corresponds to that symbolic name.
1047 (predefined_symbo): Add struct.
1048 (tic80_predefined_symbols): Declare array of translations.
1049 (tic80_num_predefined_symbols): Declare size of that array.
1050 (tic80_value_to_symbol): Declare function.
1051 (tic80_symbol_to_value): Declare function.
1052
1053Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1054
1055 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1056
1057Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1058
1059 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1060 be the destination register.
1061
1062Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1063
1064 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1065 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1066 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1067 that the opcode can have two vector instructions in a single
1068 32 bit word and we have to encode/decode both.
1069
1070Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1071
1072 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1073 TIC80_OPERAND_RELATIVE for PC relative.
1074 (TIC80_OPERAND_BASEREL): New flag bit for register
1075 base relative.
1076
1077Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1078
1079 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1080
1081Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1082
1083 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1084 ":s" modifier for scaling.
1085
1086Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1087
1088 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1089 (TIC80_OPERAND_M_LI): Ditto
1090
1091Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1092
1093 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1094 (TIC80_OPERAND_CC): New define for condition code operand.
1095 (TIC80_OPERAND_CR): New define for control register operand.
1096
1097Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1098
1099 * tic80.h (struct tic80_opcode): Name changed.
1100 (struct tic80_opcode): Remove format field.
1101 (struct tic80_operand): Add insertion and extraction functions.
1102 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1103 correct ones.
1104 (FMT_*): Ditto.
1105
1106Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1107
1108 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1109 type IV instruction offsets.
1110
1111Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1112
1113 * tic80.h: New file.
1114
1115Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1116
1117 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1118
1119Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1120
1121 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1122 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1123 * v850.h: Fix comment, v850_operand not powerpc_operand.
1124
1125Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1126
1127 * mn10200.h: Flesh out structures and definitions needed by
1128 the mn10200 assembler & disassembler.
1129
1130Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1131
1132 * mips.h: Add mips16 definitions.
1133
1134Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1135
1136 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1137
1138Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1139
1140 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1141 (MN10300_OPERAND_MEMADDR): Define.
1142
1143Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1144
1145 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1146
1147Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1148
1149 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1150
1151Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1152
1153 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1154
1155Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1156
1157 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1158
1159Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1160
1161 * alpha.h: Don't include "bfd.h"; private relocation types are now
1162 negative to minimize problems with shared libraries. Organize
1163 instruction subsets by AMASK extensions and PALcode
1164 implementation.
1165 (struct alpha_operand): Move flags slot for better packing.
1166
1167Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1168
1169 * v850.h (V850_OPERAND_RELAX): New operand flag.
1170
1171Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1172
1173 * mn10300.h (FMT_*): Move operand format definitions
1174 here.
1175
1176Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1177
1178 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1179
1180Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1181
1182 * mn10300.h (mn10300_opcode): Add "format" field.
1183 (MN10300_OPERAND_*): Define.
1184
1185Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1186
1187 * mn10x00.h: Delete.
1188 * mn10200.h, mn10300.h: New files.
1189
1190Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1191
1192 * mn10x00.h: New file.
1193
1194Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1195
1196 * v850.h: Add new flag to indicate this instruction uses a PC
1197 displacement.
1198
1199Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1200
1201 * h8300.h (stmac): Add missing instruction.
1202
1203Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1204
1205 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1206 field.
1207
1208Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1209
1210 * v850.h (V850_OPERAND_EP): Define.
1211
1212 * v850.h (v850_opcode): Add size field.
1213
1214Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1215
1216 * v850.h (v850_operands): Add insert and extract fields, pointers
1217 to functions used to handle unusual operand encoding.
1218 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1219 V850_OPERAND_SIGNED): Defined.
1220
1221Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1222
1223 * v850.h (v850_operands): Add flags field.
1224 (OPERAND_REG, OPERAND_NUM): Defined.
1225
1226Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1227
1228 * v850.h: New file.
1229
1230Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1231
1232 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1233 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1234 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1235 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1236 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1237 Defined.
1238
1239Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1240
1241 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1242 a 3 bit space id instead of a 2 bit space id.
1243
1244Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1245
1246 * d10v.h: Add some additional defines to support the
1247 assembler in determining which operations can be done in parallel.
1248
1249Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1250
1251 * h8300.h (SN): Define.
1252 (eepmov.b): Renamed from "eepmov"
1253 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1254 with them.
1255
1256Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1257
1258 * d10v.h (OPERAND_SHIFT): New operand flag.
1259
1260Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1261
1262 * d10v.h: Changes for divs, parallel-only instructions, and
1263 signed numbers.
1264
1265Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1266
1267 * d10v.h (pd_reg): Define. Putting the definition here allows
1268 the assembler and disassembler to share the same struct.
1269
1270Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1271
1272 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1273 Williams <steve@icarus.com>.
1274
1275Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1276
1277 * d10v.h: New file.
1278
1279Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1280
1281 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1282
1283Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1284
1285 * m68k.h (mcf5200): New macro.
1286 Document names of coldfire control registers.
1287
1288Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1289
1290 * h8300.h (SRC_IN_DST): Define.
1291
1292 * h8300.h (UNOP3): Mark the register operand in this insn
1293 as a source operand, not a destination operand.
1294 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1295 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1296 register operand with SRC_IN_DST.
1297
1298Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1299
1300 * alpha.h: New file.
1301
1302Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1303
1304 * rs6k.h: Remove obsolete file.
1305
1306Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1307
1308 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1309 fdivp, and fdivrp. Add ffreep.
1310
1311Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1312
1313 * h8300.h: Reorder various #defines for readability.
1314 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1315 (BITOP): Accept additional (unused) argument. All callers changed.
1316 (EBITOP): Likewise.
1317 (O_LAST): Bump.
1318 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1319
1320 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1321 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1322 (BITOP, EBITOP): Handle new H8/S addressing modes for
1323 bit insns.
1324 (UNOP3): Handle new shift/rotate insns on the H8/S.
1325 (insns using exr): New instructions.
1326 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1327
1328Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1329
1330 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1331 was incorrect.
1332
1333Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1334
1335 * h8300.h (START): Remove.
1336 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1337 and mov.l insns that can be relaxed.
1338
1339Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1340
1341 * i386.h: Remove Abs32 from lcall.
1342
1343Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1344
1345 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1346 (SLCPOP): New macro.
1347 Mark X,Y opcode letters as in use.
1348
1349Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1350
1351 * sparc.h (F_FLOAT, F_FBR): Define.
1352
1353Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1354
1355 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1356 from all insns.
1357 (ABS8SRC,ABS8DST): Add ABS8MEM.
1358 (add.l): Fix reg+reg variant.
1359 (eepmov.w): Renamed from eepmovw.
1360 (ldc,stc): Fix many cases.
1361
1362Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1363
1364 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1365
1366Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1367
1368 * sparc.h (O): Mark operand letter as in use.
1369
1370Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1371
1372 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1373 Mark operand letters uU as in use.
1374
1375Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1376
1377 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1378 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1379 (SPARC_OPCODE_SUPPORTED): New macro.
1380 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1381 (F_NOTV9): Delete.
1382
1383Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1384
1385 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1386 declaration consistent with return type in definition.
1387
1388Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1389
1390 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1391
1392Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1393
1394 * i386.h (i386_regtab): Add 80486 test registers.
1395
1396Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1397
1398 * i960.h (I_HX): Define.
1399 (i960_opcodes): Add HX instruction.
1400
1401Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1402
1403 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1404 and fclex.
1405
1406Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1407
1408 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1409 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1410 (bfd_* defines): Delete.
1411 (sparc_opcode_archs): Replaces architecture_pname.
1412 (sparc_opcode_lookup_arch): Declare.
1413 (NUMOPCODES): Delete.
1414
1415Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1416
1417 * sparc.h (enum sparc_architecture): Add v9a.
1418 (ARCHITECTURES_CONFLICT_P): Update.
1419
1420Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1421
1422 * i386.h: Added Pentium Pro instructions.
1423
1424Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1425
1426 * m68k.h: Document new 'W' operand place.
1427
1428Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1429
1430 * hppa.h: Add lci and syncdma instructions.
1431
1432Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1433
1434 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1435 instructions.
1436
1437Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1438
1439 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1440 assembler's -mcom and -many switches.
1441
1442Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1443
1444 * i386.h: Fix cmpxchg8b extension opcode description.
1445
1446Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1447
1448 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1449 and register cr4.
1450
1451Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1452
1453 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1454
1455Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1456
1457 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1458
1459Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1460
1461 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1462
1463Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1464
1465 * m68kmri.h: Remove.
1466
1467 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1468 declarations. Remove F_ALIAS and flag field of struct
1469 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1470 int. Make name and args fields of struct m68k_opcode const.
1471
1472Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1473
1474 * sparc.h (F_NOTV9): Define.
1475
1476Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1477
1478 * mips.h (INSN_4010): Define.
1479
1480Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1481
1482 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1483
1484 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1485 * m68k.h: Fix argument descriptions of coprocessor
1486 instructions to allow only alterable operands where appropriate.
1487 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1488 (m68k_opcode_aliases): Add more aliases.
1489
1490Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1491
1492 * m68k.h: Added explcitly short-sized conditional branches, and a
1493 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1494 svr4-based configurations.
1495
1496Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1497
1498 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1499 * i386.h: added missing Data16/Data32 flags to a few instructions.
1500
1501Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1502
1503 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1504 (OP_MASK_BCC, OP_SH_BCC): Define.
1505 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1506 (OP_MASK_CCC, OP_SH_CCC): Define.
1507 (INSN_READ_FPR_R): Define.
1508 (INSN_RFE): Delete.
1509
1510Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1511
1512 * m68k.h (enum m68k_architecture): Deleted.
1513 (struct m68k_opcode_alias): New type.
1514 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1515 matching constraints, values and flags. As a side effect of this,
1516 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1517 as I know were never used, now may need re-examining.
1518 (numopcodes): Now const.
1519 (m68k_opcode_aliases, numaliases): New variables.
1520 (endop): Deleted.
1521 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1522 m68k_opcode_aliases; update declaration of m68k_opcodes.
1523
1524Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1525
1526 * hppa.h (delay_type): Delete unused enumeration.
1527 (pa_opcode): Replace unused delayed field with an architecture
1528 field.
1529 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1530
1531Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1532
1533 * mips.h (INSN_ISA4): Define.
1534
1535Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * mips.h (M_DLA_AB, M_DLI): Define.
1538
1539Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1540
1541 * hppa.h (fstwx): Fix single-bit error.
1542
1543Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1544
1545 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1546
1547Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1548
1549 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1550 debug registers. From Charles Hannum (mycroft@netbsd.org).
1551
1552Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1553
1554 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1555 i386 support:
1556 * i386.h (MOV_AX_DISP32): New macro.
1557 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1558 of several call/return instructions.
1559 (ADDR_PREFIX_OPCODE): New macro.
1560
1561Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1562
1563 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1564
1565 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1566 it pointer to const char;
1567 (struct vot, field `name'): ditto.
1568
1569Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1570
1571 * vax.h: Supply and properly group all values in end sentinel.
1572
1573Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1574
1575 * mips.h (INSN_ISA, INSN_4650): Define.
1576
1577Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1578
1579 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1580 systems with a separate instruction and data cache, such as the
1581 29040, these instructions take an optional argument.
1582
1583Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1584
1585 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1586 INSN_TRAP.
1587
1588Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1589
1590 * mips.h (INSN_STORE_MEMORY): Define.
1591
1592Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1593
1594 * sparc.h: Document new operand type 'x'.
1595
1596Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1597
1598 * i960.h (I_CX2): New instruction category. It includes
1599 instructions available on Cx and Jx processors.
1600 (I_JX): New instruction category, for JX-only instructions.
1601 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1602 Jx-only instructions, in I_JX category.
1603
1604Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1605
1606 * ns32k.h (endop): Made pointer const too.
1607
1608Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1609
1610 * ns32k.h: Drop Q operand type as there is no correct use
1611 for it. Add I and Z operand types which allow better checking.
1612
1613Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1614
1615 * h8300.h (xor.l) :fix bit pattern.
1616 (L_2): New size of operand.
1617 (trapa): Use it.
1618
1619Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1620
1621 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1622
1623Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1624
1625 * sparc.h: Include v9 definitions.
1626
1627Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1628
1629 * m68k.h (m68060): Defined.
1630 (m68040up, mfloat, mmmu): Include it.
1631 (struct m68k_opcode): Widen `arch' field.
1632 (m68k_opcodes): Updated for M68060. Removed comments that were
1633 instructions commented out by "JF" years ago.
1634
1635Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1636
1637 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1638 add a one-bit `flags' field.
1639 (F_ALIAS): New macro.
1640
1641Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1642
1643 * h8300.h (dec, inc): Get encoding right.
1644
1645Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1646
1647 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1648 a flag instead.
1649 (PPC_OPERAND_SIGNED): Define.
1650 (PPC_OPERAND_SIGNOPT): Define.
1651
1652Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1653
1654 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1655 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1656
1657Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1658
1659 * i386.h: Reverse last change. It'll be handled in gas instead.
1660
1661Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1662
1663 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1664 slower on the 486 and used the implicit shift count despite the
1665 explicit operand. The one-operand form is still available to get
1666 the shorter form with the implicit shift count.
1667
1668Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1669
1670 * hppa.h: Fix typo in fstws arg string.
1671
1672Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1673
1674 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1675
1676Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1677
1678 * ppc.h (PPC_OPCODE_601): Define.
1679
1680Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1681
1682 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1683 (so we can determine valid completers for both addb and addb[tf].)
1684
1685 * hppa.h (xmpyu): No floating point format specifier for the
1686 xmpyu instruction.
1687
1688Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1689
1690 * ppc.h (PPC_OPERAND_NEXT): Define.
1691 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1692 (struct powerpc_macro): Define.
1693 (powerpc_macros, powerpc_num_macros): Declare.
1694
1695Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1696
1697 * ppc.h: New file. Header file for PowerPC opcode table.
1698
1699Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1700
1701 * hppa.h: More minor template fixes for sfu and copr (to allow
1702 for easier disassembly).
1703
1704 * hppa.h: Fix templates for all the sfu and copr instructions.
1705
1706Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1707
1708 * i386.h (push): Permit Imm16 operand too.
1709
1710Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1711
1712 * h8300.h (andc): Exists in base arch.
1713
1714Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1715
1716 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1717 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1718
1719Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1720
1721 * hppa.h: Add FP quadword store instructions.
1722
1723Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1724
1725 * mips.h: (M_J_A): Added.
1726 (M_LA): Removed.
1727
1728Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1729
1730 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1731 <mellon@pepper.ncd.com>.
1732
1733Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1734
1735 * hppa.h: Immediate field in probei instructions is unsigned,
1736 not low-sign extended.
1737
1738Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1739
1740 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1741
1742Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1743
1744 * i386.h: Add "fxch" without operand.
1745
1746Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1747
1748 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1749
1750Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1751
1752 * hppa.h: Add gfw and gfr to the opcode table.
1753
1754Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1755
1756 * m88k.h: extended to handle m88110.
1757
1758Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1759
1760 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1761 addresses.
1762
1763Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1764
1765 * i960.h (i960_opcodes): Properly bracket initializers.
1766
1767Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1768
1769 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1770
1771Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1772
1773 * m68k.h (two): Protect second argument with parentheses.
1774
1775Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1776
1777 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1778 Deleted old in/out instructions in "#if 0" section.
1779
1780Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1781
1782 * i386.h (i386_optab): Properly bracket initializers.
1783
1784Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1785
1786 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1787 Jeff Law, law@cs.utah.edu).
1788
1789Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1790
1791 * i386.h (lcall): Accept Imm32 operand also.
1792
1793Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1794
1795 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1796 (M_DABS): Added.
1797
1798Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1799
1800 * mips.h (INSN_*): Changed values. Removed unused definitions.
1801 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1802 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1803 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1804 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1805 (M_*): Added new values for r6000 and r4000 macros.
1806 (ANY_DELAY): Removed.
1807
1808Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1809
1810 * mips.h: Added M_LI_S and M_LI_SS.
1811
1812Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1813
1814 * h8300.h: Get some rare mov.bs correct.
1815
1816Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1817
1818 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1819 been included.
1820
1821Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1822
1823 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1824 jump instructions, for use in disassemblers.
1825
1826Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1827
1828 * m88k.h: Make bitfields just unsigned, not unsigned long or
1829 unsigned short.
1830
1831Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1832
1833 * hppa.h: New argument type 'y'. Use in various float instructions.
1834
1835Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1836
1837 * hppa.h (break): First immediate field is unsigned.
1838
1839 * hppa.h: Add rfir instruction.
1840
1841Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1842
1843 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1844
1845Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1846
1847 * mips.h: Reworked the hazard information somewhat, and fixed some
1848 bugs in the instruction hazard descriptions.
1849
1850Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1851
1852 * m88k.h: Corrected a couple of opcodes.
1853
1854Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1855
1856 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1857 new version includes instruction hazard information, but is
1858 otherwise reasonably similar.
1859
1860Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1861
1862 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1863
1864Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1865
1866 Patches from Jeff Law, law@cs.utah.edu:
1867 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1868 Make the tables be the same for the following instructions:
1869 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1870 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1871 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1872 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1873 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1874 "fcmp", and "ftest".
1875
1876 * hppa.h: Make new and old tables the same for "break", "mtctl",
1877 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1878 Fix typo in last patch. Collapse several #ifdefs into a
1879 single #ifdef.
1880
1881 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1882 of the comments up-to-date.
1883
1884 * hppa.h: Update "free list" of letters and update
1885 comments describing each letter's function.
1886
1887Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1888
1889 * h8300.h: checkpoint, includes H8/300-H opcodes.
1890
1891Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1892
1893 * Patches from Jeffrey Law <law@cs.utah.edu>.
1894 * hppa.h: Rework single precision FP
1895 instructions so that they correctly disassemble code
1896 PA1.1 code.
1897
1898Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1899
1900 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1901 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1902
1903Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1904
1905 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1906 gdb will define it for now.
1907
1908Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1909
1910 * sparc.h: Don't end enumerator list with comma.
1911
1912Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1913
1914 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1915 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1916 ("bc2t"): Correct typo.
1917 ("[ls]wc[023]"): Use T rather than t.
1918 ("c[0123]"): Define general coprocessor instructions.
1919
1920Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1921
1922 * m68k.h: Move split point for gcc compilation more towards
1923 middle.
1924
1925Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1926
1927 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1928 simply wrong, ics, rfi, & rfsvc were missing).
1929 Add "a" to opr_ext for "bb". Doc fix.
1930
1931Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1932
1933 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1934 * mips.h: Add casts, to suppress warnings about shifting too much.
1935 * m68k.h: Document the placement code '9'.
1936
1937Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1938
1939 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1940 allows callers to break up the large initialized struct full of
1941 opcodes into two half-sized ones. This permits GCC to compile
1942 this module, since it takes exponential space for initializers.
1943 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1944
1945Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1946
1947 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1948 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1949 initialized structs in it.
1950
1951Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1952
1953 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1954 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1955 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1956
1957Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1958
1959 * mips.h: document "i" and "j" operands correctly.
1960
1961Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1962
1963 * mips.h: Removed endianness dependency.
1964
1965Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1966
1967 * h8300.h: include info on number of cycles per instruction.
1968
1969Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1970
1971 * hppa.h: Move handy aliases to the front. Fix masks for extract
1972 and deposit instructions.
1973
1974Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1975
1976 * i386.h: accept shld and shrd both with and without the shift
1977 count argument, which is always %cl.
1978
1979Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1980
1981 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1982 (one_byte_segment_defaults, two_byte_segment_defaults,
1983 i386_prefixtab_end): Ditto.
1984
1985Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1986
1987 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1988 for operand 2; from John Carr, jfc@dsg.dec.com.
1989
1990Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1991
1992 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1993 always use 16-bit offsets. Makes calculated-size jump tables
1994 feasible.
1995
1996Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1997
1998 * i386.h: Fix one-operand forms of in* and out* patterns.
1999
2000Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2001
2002 * m68k.h: Added CPU32 support.
2003
2004Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2005
2006 * mips.h (break): Disassemble the argument. Patch from
2007 jonathan@cs.stanford.edu (Jonathan Stone).
2008
2009Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2010
2011 * m68k.h: merged Motorola and MIT syntax.
2012
2013Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2014
2015 * m68k.h (pmove): make the tests less strict, the 68k book is
2016 wrong.
2017
2018Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2019
2020 * m68k.h (m68ec030): Defined as alias for 68030.
2021 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2022 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2023 them. Tightened description of "fmovex" to distinguish it from
2024 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2025 up descriptions that claimed versions were available for chips not
2026 supporting them. Added "pmovefd".
2027
2028Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2029
2030 * m68k.h: fix where the . goes in divull
2031
2032Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2033
2034 * m68k.h: the cas2 instruction is supposed to be written with
2035 indirection on the last two operands, which can be either data or
2036 address registers. Added a new operand type 'r' which accepts
2037 either register type. Added new cases for cas2l and cas2w which
2038 use them. Corrected masks for cas2 which failed to recognize use
2039 of address register.
2040
2041Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2042
2043 * m68k.h: Merged in patches (mostly m68040-specific) from
2044 Colin Smith <colin@wrs.com>.
2045
2046 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2047 base). Also cleaned up duplicates, re-ordered instructions for
2048 the sake of dis-assembling (so aliases come after standard names).
2049 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2050
2051Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2052
2053 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2054 all missing .s
2055
2056Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2057
2058 * sparc.h: Moved tables to BFD library.
2059
2060 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2061
2062Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2063
2064 * h8300.h: Finish filling in all the holes in the opcode table,
2065 so that the Lucid C compiler can digest this as well...
2066
2067Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2068
2069 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2070 Fix opcodes on various sizes of fild/fist instructions
2071 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2072 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2073
2074Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2075
2076 * h8300.h: Fill in all the holes in the opcode table so that the
2077 losing HPUX C compiler can digest this...
2078
2079Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2080
2081 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2082 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2083
2084Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2085
2086 * sparc.h: Add new architecture variant sparclite; add its scan
2087 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2088
2089Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2090
2091 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2092 fy@lucid.com).
2093
2094Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2095
2096 * rs6k.h: New version from IBM (Metin).
2097
2098Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2099
2100 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2101 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2102
2103Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2104
2105 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2106
2107Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2108
2109 * m68k.h (one, two): Cast macro args to unsigned to suppress
2110 complaints from compiler and lint about integer overflow during
2111 shift.
2112
2113Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2114
2115 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2116
2117Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2118
2119 * mips.h: Make bitfield layout depend on the HOST compiler,
2120 not on the TARGET system.
2121
2122Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2123
2124 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2125 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2126 <TRANLE@INTELLICORP.COM>.
2127
2128Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2129
2130 * h8300.h: turned op_type enum into #define list
2131
2132Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2133
2134 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2135 similar instructions -- they've been renamed to "fitoq", etc.
2136 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2137 number of arguments.
2138 * h8300.h: Remove extra ; which produces compiler warning.
2139
2140Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2141
2142 * sparc.h: fix opcode for tsubcctv.
2143
2144Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2145
2146 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2147
2148Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2149
2150 * sparc.h (nop): Made the 'lose' field be even tighter,
2151 so only a standard 'nop' is disassembled as a nop.
2152
2153Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2154
2155 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2156 disassembled as a nop.
2157
2158Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2159
2160 * sparc.h: fix a typo.
2161
2162Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2163
2164 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2165 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2166 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2167
2168\f
2169Local Variables:
2170version-control: never
2171End:
GDB Binutils - Deliverables
This page took 0.119085 seconds and 4 git commands to generate.