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Add support for the MIPS32
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
156c2f8b
NC		 12000-09-13 Anders Norlander <anorland@acc.umu.se>
2
3 * mips.h: Use defines instead of hard-coded processor numbers.
4 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
5 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
6 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
7 CPU_4KC, CPU_4KM, CPU_4KP): Define..
8 (OPCODE_IS_MEMBER): Use new defines.
9 (OP_MASK_SEL, OP_SH_SEL): Define.
10 (OP_MASK_CODE20, OP_SH_CODE20): Define.
11 Add 'P' to used characters.
12 Use 'H' for coprocessor select field.
13 Use 'm' for 20 bit breakpoint code.
14 Document new arg characters and add to used characters.
15 (INSN_MIPS32): New define for MIPS32 extensions.
16 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
17
3c5ce02e
AM		 182000-09-05 Alan Modra <alan@linuxcare.com.au>
19
20 * hppa.h: Mention cz completer.
21
50b81f19
JW		 222000-08-16 Jim Wilson <wilson@cygnus.com>
23
24 * ia64.h (IA64_OPCODE_POSTINC): New.
25
fc29466d
L		 262000-08-15 H.J. Lu <hjl@gnu.org>
27
28 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
29 IgnoreSize change.
30
45ee1401
DC		 312000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
32
33 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
34 Move related opcodes closer to each other.
35 Minor changes in comments, list undefined opcodes.
36
9d551405
DB		 372000-07-26 Dave Brolley <brolley@redhat.com>
38
39 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
40
c8488617
HPN		 412000-07-20 Hans-Peter Nilsson <hp@axis.com>
42
43 cris.h: New file.
44
65aa24b6
NC		 452000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
46
47 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
48 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
49 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
50 (AVR_ISA_M83): Define for ATmega83, ATmega85.
51 (espm): Remove, because ESPM removed in databook update.
52 (eicall, eijmp): Move to the end of opcode table.
53
60bcf0fa
NC		 542000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
55
56 * m68hc11.h: New file for support of Motorola 68hc11.
57
60a2978a
DC		 58Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
59
60 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
61
68ab2dd9
DC		 62Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
63
64 * avr.h: New file with AVR opcodes.
65
f0662e27
DL		 66Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
67
68 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
69
b722f2be
AM		 702000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
71
72 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
73
f9e0cf0b
AM		 742000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
75
76 * i386.h: Use sl_FP, not sl_Suf for fild.
77
f660ee8b
FCE		 782000-05-16 Frank Ch. Eigler <fche@redhat.com>
79
80 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
81 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
82 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
83 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
84
558b0a60
AM		 852000-05-13 Alan Modra <alan@linuxcare.com.au>,
86
87 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
88
e413e4e9
AM		 892000-05-13 Alan Modra <alan@linuxcare.com.au>,
90 Alexander Sokolov <robocop@netlink.ru>
91
92 * i386.h (i386_optab): Add cpu_flags for all instructions.
93
942000-05-13 Alan Modra <alan@linuxcare.com.au>
95
96 From Gavin Romig-Koch <gavin@cygnus.com>
97 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
98
5c84d377
TW		 992000-05-04 Timothy Wall <twall@cygnus.com>
100
101 * tic54x.h: New.
102
966f959b
C		 1032000-05-03 J.T. Conklin <jtc@redback.com>
104
105 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
106 (PPC_OPERAND_VR): New operand flag for vector registers.
107
c5d05dbb
JL		 1082000-05-01 Kazu Hirata <kazu@hxi.com>
109
110 * h8300.h (EOP): Add missing initializer.
111
a7fba0e0
JL		 112Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
113
114 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
115 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
116 New operand types l,y,&,fe,fE,fx added to support above forms.
117 (pa_opcodes): Replaced usage of 'x' as source/target for
118 floating point double-word loads/stores with 'fx'.
119
800eeca4
JW		 120Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
121 David Mosberger <davidm@hpl.hp.com>
122 Timothy Wall <twall@cygnus.com>
123 Jim Wilson <wilson@cygnus.com>
124
125 * ia64.h: New file.
126
ba23e138
NC		 1272000-03-27 Nick Clifton <nickc@cygnus.com>
128
129 * d30v.h (SHORT_A1): Fix value.
130 (SHORT_AR): Renumber so that it is at the end of the list of short
131 instructions, not the end of the list of long instructions.
132
d0b47220
AM		 1332000-03-26 Alan Modra <alan@linuxcare.com>
134
135 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
136 problem isn't really specific to Unixware.
137 (OLDGCC_COMPAT): Define.
138 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
139 destination %st(0).
140 Fix lots of comments.
141
866afedc
NC		 1422000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
143
144 * d30v.h:
145 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
146 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
147 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
148 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
149 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
150 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
151 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
152
cc5ca5ce
AM		 1532000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
154
155 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
156 fistpd without suffix.
157
68e324a2
NC		 1582000-02-24 Nick Clifton <nickc@cygnus.com>
159
160 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
161 'signed_overflow_ok_p'.
162 Delete prototypes for cgen_set_flags() and cgen_get_flags().
163
60f036a2
AH		 1642000-02-24 Andrew Haley <aph@cygnus.com>
165
166 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
167 (CGEN_CPU_TABLE): flags: new field.
168 Add prototypes for new functions.
169
9b9b5cd4
AM		 1702000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
171
172 * i386.h: Add some more UNIXWARE_COMPAT comments.
173
5b93d8bb
AM		 1742000-02-23 Linas Vepstas <linas@linas.org>
175
176 * i370.h: New file.
177
87f398dd
AH		 1782000-02-22 Andrew Haley <aph@cygnus.com>
179
180 * mips.h: (OPCODE_IS_MEMBER): Add comment.
181
367c01af
AH		 1821999-12-30 Andrew Haley <aph@cygnus.com>
183
9a1e79ca
AH		 184 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
185 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
186 insns.
367c01af 187
add0c677
AM		 1882000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
189
190 * i386.h: Qualify intel mode far call and jmp with x_Suf.
191
3138f287
AM		 1921999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
193
194 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
195 indirect jumps and calls. Add FF/3 call for intel mode.
196
ccecd07b
JL		 197Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
198
199 * mn10300.h: Add new operand types. Add new instruction formats.
200
b37e19e9
JL		 201Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
202
203 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
204 instruction.
205
5fce5ddf
GRK		 2061999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
207
208 * mips.h (INSN_ISA5): New.
209
2bd7f1f3
GRK		 2101999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
211
212 * mips.h (OPCODE_IS_MEMBER): New.
213
4df2b5c5
NC		 2141999-10-29 Nick Clifton <nickc@cygnus.com>
215
216 * d30v.h (SHORT_AR): Define.
217
446a06c9
MM		 2181999-10-18 Michael Meissner <meissner@cygnus.com>
219
220 * alpha.h (alpha_num_opcodes): Convert to unsigned.
221 (alpha_num_operands): Ditto.
222
eca04c6a
JL		 223Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
224
225 * hppa.h (pa_opcodes): Add load and store cache control to
226 instructions. Add ordered access load and store.
227
228 * hppa.h (pa_opcode): Add new entries for addb and addib.
229
230 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
231
232 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
233
c43185de
DN		 234Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
235
236 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
237
ec3533da
JL		 238Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
239
390f858d
JL		 240 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
241 and "be" using completer prefixes.
242
8c47ebd9
JL		 243 * hppa.h (pa_opcodes): Add initializers to silence compiler.
244
ec3533da
JL		 245 * hppa.h: Update comments about character usage.
246
18369bea
JL		 247Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
248
249 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
250 up the new fstw & bve instructions.
251
c36efdd2
JL		 252Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
253
d3ffb032
JL		 254 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
255 instructions.
256
c49ec3da
JL		 257 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
258
5d2e7ecc
JL		 259 * hppa.h (pa_opcodes): Add long offset double word load/store
260 instructions.
261
6397d1a2
JL		 262 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
263 stores.
264
142f0fe0
JL		 265 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
266
f5a68b45
JL		 267 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
268
8235801e
JL		 269 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
270
35184366
JL		 271 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
272
f0bfde5e
JL		 273 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
274
27bbbb58
JL		 275 * hppa.h (pa_opcodes): Add support for "b,l".
276
c36efdd2
JL		 277 * hppa.h (pa_opcodes): Add support for "b,gate".
278
f2727d04
JL		 279Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
280
9392fb11
JL		 281 * hppa.h (pa_opcodes): Use 'fX' for first register operand
282 in xmpyu.
283
e0c52e99
JL		 284 * hppa.h (pa_opcodes): Fix mask for probe and probei.
285
f2727d04
JL		 286 * hppa.h (pa_opcodes): Fix mask for depwi.
287
52d836e2
JL		 288Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
289
290 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
291 an explicit output argument.
292
90765e3a
JL		 293Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
294
295 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
296 Add a few PA2.0 loads and store variants.
297
8340b17f
ILT		 2981999-09-04 Steve Chamberlain <sac@pobox.com>
299
300 * pj.h: New file.
301
5f47d35b
AM		 3021999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
303
304 * i386.h (i386_regtab): Move %st to top of table, and split off
305 other fp reg entries.
306 (i386_float_regtab): To here.
307
1c143202
JL		 308Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
309
7d8fdb64
JL		 310 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
311 by 'f'.
312
90927b9c
JL		 313 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
314 Add supporting args.
315
1d16bf9c
JL		 316 * hppa.h: Document new completers and args.
317 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
318 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
319 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
320 pmenb and pmdis.
321
96226a68
JL		 322 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
323 hshr, hsub, mixh, mixw, permh.
324
5d4ba527
JL		 325 * hppa.h (pa_opcodes): Change completers in instructions to
326 use 'c' prefix.
327
e9fc28c6
JL		 328 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
329 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
330
1c143202
JL		 331 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
332 fnegabs to use 'I' instead of 'F'.
333
9e525108
AM		 3341999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
335
336 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
337 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
338 Alphabetically sort PIII insns.
339
e8da1bf1
DE		 340Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
341
342 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
343
7d627258
JL		 344Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
345
5696871a
JL		 346 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
347 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
348
7d627258
JL		 349 * hppa.h: Document 64 bit condition completers.
350
c5e52916
JL		 351Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
352
353 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
354
eecb386c
AM		 3551999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
356
357 * i386.h (i386_optab): Add DefaultSize modifier to all insns
358 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
359 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
360
88a380f3
JL		 361Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
362 Jeff Law <law@cygnus.com>
363
364 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
365
366 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 367
368 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
369 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
370
145cf1f0
AM		 3711999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
372
373 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
374
73826640
JL		 375Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
376
377 * hppa.h (struct pa_opcode): Add new field "flags".
378 (FLAGS_STRICT): Define.
379
b65db252
JL		 380Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
381 Jeff Law <law@cygnus.com>
382
f7fc668b
JL		 383 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
384
385 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 386
10084519
AM		 3871999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
388
389 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
390 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
391 flag to fcomi and friends.
392
cd8a80ba
JL		 393Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
394
395 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
396 integer logical instructions.
397
1fca749b
ILT		 3981999-05-28 Linus Nordberg <linus.nordberg@canit.se>
399
400 * m68k.h: Document new formats `E', `G', `H' and new places `N',
401 `n', `o'.
402
403 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
404 and new places `m', `M', `h'.
405
aa008907
JL		 406Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
407
408 * hppa.h (pa_opcodes): Add several processor specific system
409 instructions.
410
e26b85f0
JL		 411Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
412
413 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
414 "addb", and "addib" to be used by the disassembler.
415
c608c12e
AM		 4161999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
417
418 * i386.h (ReverseModrm): Remove all occurences.
419 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
420 movmskps, pextrw, pmovmskb, maskmovq.
421 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
422 ignore the data size prefix.
423
424 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
425 Mostly stolen from Doug Ledford <dledford@redhat.com>
426
45c18104
RH		 427Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
428
429 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
430
252b5132
RH		 4311999-04-14 Doug Evans <devans@casey.cygnus.com>
432
433 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
434 (CGEN_ATTR_TYPE): Update.
435 (CGEN_ATTR_MASK): Number booleans starting at 0.
436 (CGEN_ATTR_VALUE): Update.
437 (CGEN_INSN_ATTR): Update.
438
439Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
440
441 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
442 instructions.
443
444Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
445
446 * hppa.h (bb, bvb): Tweak opcode/mask.
447
448
4491999-03-22 Doug Evans <devans@casey.cygnus.com>
450
451 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
452 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
453 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
454 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
455 Delete member max_insn_size.
456 (enum cgen_cpu_open_arg): New enum.
457 (cpu_open): Update prototype.
458 (cpu_open_1): Declare.
459 (cgen_set_cpu): Delete.
460
4611999-03-11 Doug Evans <devans@casey.cygnus.com>
462
463 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
464 (CGEN_OPERAND_NIL): New macro.
465 (CGEN_OPERAND): New member `type'.
466 (@arch@_cgen_operand_table): Delete decl.
467 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
468 (CGEN_OPERAND_TABLE): New struct.
469 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
470 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
471 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
472 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
473 {get,set}_{int,vma}_operand.
474 (@arch@_cgen_cpu_open): New arg `isa'.
475 (cgen_set_cpu): Ditto.
476
477Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
478
479 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
480
4811999-02-25 Doug Evans <devans@casey.cygnus.com>
482
483 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
484 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
485 enum cgen_hw_type.
486 (CGEN_HW_TABLE): New struct.
487 (hw_table): Delete declaration.
488 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
489 to table entry to enum.
490 (CGEN_OPINST): Ditto.
491 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
492
493Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
494
495 * alpha.h (AXP_OPCODE_EV6): New.
496 (AXP_OPCODE_NOPAL): Include it.
497
4981999-02-09 Doug Evans <devans@casey.cygnus.com>
499
500 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
501 All uses updated. New members int_insn_p, max_insn_size,
502 parse_operand,insert_operand,extract_operand,print_operand,
503 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
504 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
505 extract_handlers,print_handlers.
506 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
507 (CGEN_ATTR_BOOL_OFFSET): New macro.
508 (CGEN_ATTR_MASK): Subtract it to compute bit number.
509 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
510 (cgen_opcode_handler): Renamed from cgen_base.
511 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
512 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
513 all uses updated.
514 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
515 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
516 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
517 (CGEN_OPCODE,CGEN_IBASE): New types.
518 (CGEN_INSN): Rewrite.
519 (CGEN_{ASM,DIS}_HASH*): Delete.
520 (init_opcode_table,init_ibld_table): Declare.
521 (CGEN_INSN_ATTR): New type.
522
523Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
524
525 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
526 (x_FP, d_FP, dls_FP, sldx_FP): Define.
527 Change *Suf definitions to include x and d suffixes.
528 (movsx): Use w_Suf and b_Suf.
529 (movzx): Likewise.
530 (movs): Use bwld_Suf.
531 (fld): Change ordering. Use sld_FP.
532 (fild): Add Intel Syntax equivalent of fildq.
533 (fst): Use sld_FP.
534 (fist): Use sld_FP.
535 (fstp): Use sld_FP. Add x_FP version.
536 (fistp): LLongMem version for Intel Syntax.
537 (fcom, fcomp): Use sld_FP.
538 (fadd, fiadd, fsub): Use sld_FP.
539 (fsubr): Use sld_FP.
540 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
541
5421999-01-27 Doug Evans <devans@casey.cygnus.com>
543
544 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
545 CGEN_MODE_UINT.
546
547Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
548
549 * hppa.h (bv): Fix mask.
550
5511999-01-05 Doug Evans <devans@casey.cygnus.com>
552
553 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
554 (CGEN_ATTR): Use it.
555 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
556 (CGEN_ATTR_TABLE): New member dfault.
557
5581998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
559
560 * mips.h (MIPS16_INSN_BRANCH): New.
561
562Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
563
564 The following is part of a change made by Edith Epstein
565 <eepstein@sophia.cygnus.com> as part of a project to merge in
566 changes by HP; HP did not create ChangeLog entries.
567
568 * hppa.h (completer_chars): list of chars to not put a space
569 after.
570
571Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
572
573 * i386.h (i386_optab): Permit w suffix on processor control and
574 status word instructions.
575
5761998-11-30 Doug Evans <devans@casey.cygnus.com>
577
578 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
579 (struct cgen_keyword_entry): Ditto.
580 (struct cgen_operand): Ditto.
581 (CGEN_IFLD): New typedef, with associated access macros.
582 (CGEN_IFMT): New typedef, with associated access macros.
583 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
584 (CGEN_IVALUE): New typedef.
585 (struct cgen_insn): Delete const on syntax,attrs members.
586 `format' now points to format data. Type of `value' is now
587 CGEN_IVALUE.
588 (struct cgen_opcode_table): New member ifld_table.
589
5901998-11-18 Doug Evans <devans@casey.cygnus.com>
591
592 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
593 (CGEN_OPERAND_INSTANCE): New member `attrs'.
594 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
595 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
596 (cgen_opcode_table): Update type of dis_hash fn.
597 (extract_operand): Update type of `insn_value' arg.
598
599Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
600
601 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
602
603Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
604
605 * mips.h (INSN_MULT): Added.
606
607Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
608
609 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
610
611Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
612
613 * cgen.h (CGEN_INSN_INT): New typedef.
614 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
615 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
616 (CGEN_INSN_BYTES_PTR): New typedef.
617 (CGEN_EXTRACT_INFO): New typedef.
618 (cgen_insert_fn,cgen_extract_fn): Update.
619 (cgen_opcode_table): New member `insn_endian'.
620 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
621 (insert_operand,extract_operand): Update.
622 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
623
624Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
625
626 * cgen.h (CGEN_ATTR_BOOLS): New macro.
627 (struct CGEN_HW_ENTRY): New member `attrs'.
628 (CGEN_HW_ATTR): New macro.
629 (struct CGEN_OPERAND_INSTANCE): New member `name'.
630 (CGEN_INSN_INVALID_P): New macro.
631
632Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
633
634 * hppa.h: Add "fid".
635
636Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
637
638 From Robert Andrew Dale <rob@nb.net>
639 * i386.h (i386_optab): Add AMD 3DNow! instructions.
640 (AMD_3DNOW_OPCODE): Define.
641
642Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
643
644 * d30v.h (EITHER_BUT_PREFER_MU): Define.
645
646Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
647
648 * cgen.h (cgen_insn): #if 0 out element `cdx'.
649
650Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
651
652 Move all global state data into opcode table struct, and treat
653 opcode table as something that is "opened/closed".
654 * cgen.h (CGEN_OPCODE_DESC): New type.
655 (all fns): New first arg of opcode table descriptor.
656 (cgen_set_parse_operand_fn): Add prototype.
657 (cgen_current_machine,cgen_current_endian): Delete.
658 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
659 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
660 dis_hash_table,dis_hash_table_entries.
661 (opcode_open,opcode_close): Add prototypes.
662
663 * cgen.h (cgen_insn): New element `cdx'.
664
665Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
666
667 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
668
669Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
670
671 * mn10300.h: Add "no_match_operands" field for instructions.
672 (MN10300_MAX_OPERANDS): Define.
673
674Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
675
676 * cgen.h (cgen_macro_insn_count): Declare.
677
678Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
679
680 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
681 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
682 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
683 set_{int,vma}_operand.
684
685Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
686
687 * mn10300.h: Add "machine" field for instructions.
688 (MN103, AM30): Define machine types.
689
690Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
691
692 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
693
6941998-06-18 Ulrich Drepper <drepper@cygnus.com>
695
696 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
697
698Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
699
700 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
701 and ud2b.
702 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
703 those that happen to be implemented on pentiums.
704
705Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
706
707 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
708 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
709 with Size16|IgnoreSize or Size32|IgnoreSize.
710
711Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
712
713 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
714 (REPE): Rename to REPE_PREFIX_OPCODE.
715 (i386_regtab_end): Remove.
716 (i386_prefixtab, i386_prefixtab_end): Remove.
717 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
718 of md_begin.
719 (MAX_OPCODE_SIZE): Define.
720 (i386_optab_end): Remove.
721 (sl_Suf): Define.
722 (sl_FP): Use sl_Suf.
723
724 * i386.h (i386_optab): Allow 16 bit displacement for `mov
725 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
726 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
727 data32, dword, and adword prefixes.
728 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
729 regs.
730
731Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
732
733 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
734
735 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
736 register operands, because this is a common idiom. Flag them with
737 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
738 fdivrp because gcc erroneously generates them. Also flag with a
739 warning.
740
741 * i386.h: Add suffix modifiers to most insns, and tighter operand
742 checks in some cases. Fix a number of UnixWare compatibility
743 issues with float insns. Merge some floating point opcodes, using
744 new FloatMF modifier.
745 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
746 consistency.
747
748 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
749 IgnoreDataSize where appropriate.
750
751Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
752
753 * i386.h: (one_byte_segment_defaults): Remove.
754 (two_byte_segment_defaults): Remove.
755 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
756
757Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
758
759 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
760 (cgen_hw_lookup_by_num): Declare.
761
762Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
763
764 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
765 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
766
767Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
768
769 * cgen.h (cgen_asm_init_parse): Delete.
770 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
771 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
772
773Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
774
775 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
776 (cgen_asm_finish_insn): Update prototype.
777 (cgen_insn): New members num, data.
778 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
779 dis_hash, dis_hash_table_size moved to ...
780 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
781 All uses updated. New members asm_hash_p, dis_hash_p.
782 (CGEN_MINSN_EXPANSION): New struct.
783 (cgen_expand_macro_insn): Declare.
784 (cgen_macro_insn_count): Declare.
785 (get_insn_operands): Update prototype.
786 (lookup_get_insn_operands): Declare.
787
788Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
789
790 * i386.h (i386_optab): Change iclrKludge and imulKludge to
791 regKludge. Add operands types for string instructions.
792
793Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
794
795 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
796 table.
797
798Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
799
800 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
801 for `gettext'.
802
803Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
804
805 * i386.h: Remove NoModrm flag from all insns: it's never checked.
806 Add IsString flag to string instructions.
807 (IS_STRING): Don't define.
808 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
809 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
810 (SS_PREFIX_OPCODE): Define.
811
812Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
813
814 * i386.h: Revert March 24 patch; no more LinearAddress.
815
816Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
817
818 * i386.h (i386_optab): Remove fwait (9b) from all floating point
819 instructions, and instead add FWait opcode modifier. Add short
820 form of fldenv and fstenv.
821 (FWAIT_OPCODE): Define.
822
823 * i386.h (i386_optab): Change second operand constraint of `mov
824 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
825 allow legal instructions such as `movl %gs,%esi'
826
827Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
828
829 * h8300.h: Various changes to fully bracket initializers.
830
831Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
832
833 * i386.h: Set LinearAddress for lidt and lgdt.
834
835Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
836
837 * cgen.h (CGEN_BOOL_ATTR): New macro.
838
839Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
840
841 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
842
843Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
844
845 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
846 (cgen_insn): Record syntax and format entries here, rather than
847 separately.
848
849Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
850
851 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
852
853Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
854
855 * cgen.h (cgen_insert_fn): Change type of result to const char *.
856 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
857 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
858
859Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
860
861 * cgen.h (lookup_insn): New argument alias_p.
862
863Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
864
865Fix rac to accept only a0:
866 * d10v.h (OPERAND_ACC): Split into:
867 (OPERAND_ACC0, OPERAND_ACC1) .
868 (OPERAND_GPR): Define.
869
870Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
871
872 * cgen.h (CGEN_FIELDS): Define here.
873 (CGEN_HW_ENTRY): New member `type'.
874 (hw_list): Delete decl.
875 (enum cgen_mode): Declare.
876 (CGEN_OPERAND): New member `hw'.
877 (enum cgen_operand_instance_type): Declare.
878 (CGEN_OPERAND_INSTANCE): New type.
879 (CGEN_INSN): New member `operands'.
880 (CGEN_OPCODE_DATA): Make hw_list const.
881 (get_insn_operands,lookup_insn): Add prototypes for.
882
883Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
884
885 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
886 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
887 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
888 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
889
890Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
891
892 * cgen.h: Correct typo in comment end marker.
893
894Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
895
896 * tic30.h: New file.
897
898Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
899
900 * cgen.h: Add prototypes for cgen_save_fixups(),
901 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
902 of cgen_asm_finish_insn() to return a char *.
903
904Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
905
906 * cgen.h: Formatting changes to improve readability.
907
908Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
909
910 * cgen.h (*): Clean up pass over `struct foo' usage.
911 (CGEN_ATTR): Make unsigned char.
912 (CGEN_ATTR_TYPE): Update.
913 (CGEN_ATTR_{ENTRY,TABLE}): New types.
914 (cgen_base): Move member `attrs' to cgen_insn.
915 (CGEN_KEYWORD): New member `null_entry'.
916 (CGEN_{SYNTAX,FORMAT}): New types.
917 (cgen_insn): Format and syntax separated from each other.
918
919Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
920
921 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
922 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
923 flags_{used,set} long.
924 (d30v_operand): Make flags field long.
925
926Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
927
928 * m68k.h: Fix comment describing operand types.
929
930Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
931
932 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
933 everything else after down.
934
935Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
936
937 * d10v.h (OPERAND_FLAG): Split into:
938 (OPERAND_FFLAG, OPERAND_CFLAG) .
939
940Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
941
942 * mips.h (struct mips_opcode): Changed comments to reflect new
943 field usage.
944
945Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
946
947 * mips.h: Added to comments a quick-ref list of all assigned
948 operand type characters.
949 (OP_{MASK,SH}_PERFREG): New macros.
950
951Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
952
953 * sparc.h: Add '_' and '/' for v9a asr's.
954 Patch from David Miller <davem@vger.rutgers.edu>
955
956Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
957
958 * h8300.h: Bit ops with absolute addresses not in the 8 bit
959 area are not available in the base model (H8/300).
960
961Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
962
963 * m68k.h: Remove documentation of ` operand specifier.
964
965Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
966
967 * m68k.h: Document q and v operand specifiers.
968
969Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
970
971 * v850.h (struct v850_opcode): Add processors field.
972 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
973 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
974 (PROCESSOR_V850EA): New bit constants.
975
976Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
977
978 Merge changes from Martin Hunt:
979
980 * d30v.h: Allow up to 64 control registers. Add
981 SHORT_A5S format.
982
983 * d30v.h (LONG_Db): New form for delayed branches.
984
985 * d30v.h: (LONG_Db): New form for repeati.
986
987 * d30v.h (SHORT_D2B): New form.
988
989 * d30v.h (SHORT_A2): New form.
990
991 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
992 registers are used. Needed for VLIW optimization.
993
994Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
995
996 * cgen.h: Move assembler interface section
997 up so cgen_parse_operand_result is defined for cgen_parse_address.
998 (cgen_parse_address): Update prototype.
999
1000Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1001
1002 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1003
1004Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1005
1006 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1007 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1008 <paubert@iram.es>.
1009
1010 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1011 <paubert@iram.es>.
1012
1013 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1014 <paubert@iram.es>.
1015
1016 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1017 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1018
1019Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1020
1021 * v850.h (V850_NOT_R0): New flag.
1022
1023Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1024
1025 * v850.h (struct v850_opcode): Remove flags field.
1026
1027Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1028
1029 * v850.h (struct v850_opcode): Add flags field.
1030 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1031 fields.
1032 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1033 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1034
1035Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1036
1037 * arc.h: New file.
1038
1039Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1040
1041 * sparc.h (sparc_opcodes): Declare as const.
1042
1043Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1044
1045 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1046 uses single or double precision floating point resources.
1047 (INSN_NO_ISA, INSN_ISA1): Define.
1048 (cpu specific INSN macros): Tweak into bitmasks outside the range
1049 of INSN_ISA field.
1050
1051Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1052
1053 * i386.h: Fix pand opcode.
1054
1055Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1056
1057 * mips.h: Widen INSN_ISA and move it to a more convenient
1058 bit position. Add INSN_3900.
1059
1060Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1061
1062 * mips.h (struct mips_opcode): added new field membership.
1063
1064Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1065
1066 * i386.h (movd): only Reg32 is allowed.
1067
1068 * i386.h: add fcomp and ud2. From Wayne Scott
1069 <wscott@ichips.intel.com>.
1070
1071Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1072
1073 * i386.h: Add MMX instructions.
1074
1075Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1076
1077 * i386.h: Remove W modifier from conditional move instructions.
1078
1079Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1080
1081 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1082 with no arguments to match that generated by the UnixWare
1083 assembler.
1084
1085Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1086
1087 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1088 (cgen_parse_operand_fn): Declare.
1089 (cgen_init_parse_operand): Declare.
1090 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1091 new argument `want'.
1092 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1093 (enum cgen_parse_operand_type): New enum.
1094
1095Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1096
1097 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1098
1099Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1100
1101 * cgen.h: New file.
1102
1103Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1104
1105 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1106 fdivrp.
1107
1108Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1109
1110 * v850.h (extract): Make unsigned.
1111
1112Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1113
1114 * i386.h: Add iclr.
1115
1116Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1117
1118 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1119 take a direction bit.
1120
1121Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1122
1123 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1124
1125Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1126
1127 * sparc.h: Include <ansidecl.h>. Update function declarations to
1128 use prototypes, and to use const when appropriate.
1129
1130Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1131
1132 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1133
1134Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1135
1136 * d10v.h: Change pre_defined_registers to
1137 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1138
1139Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1140
1141 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1142 Change mips_opcodes from const array to a pointer,
1143 and change bfd_mips_num_opcodes from const int to int,
1144 so that we can increase the size of the mips opcodes table
1145 dynamically.
1146
1147Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1148
1149 * d30v.h (FLAG_X): Remove unused flag.
1150
1151Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1152
1153 * d30v.h: New file.
1154
1155Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1156
1157 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1158 (PDS_VALUE): Macro to access value field of predefined symbols.
1159 (tic80_next_predefined_symbol): Add prototype.
1160
1161Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1162
1163 * tic80.h (tic80_symbol_to_value): Change prototype to match
1164 change in function, added class parameter.
1165
1166Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1167
1168 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1169 endmask fields, which are somewhat weird in that 0 and 32 are
1170 treated exactly the same.
1171
1172Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1173
1174 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1175 rather than a constant that is 2**X. Reorder them to put bits for
1176 operands that have symbolic names in the upper bits, so they can
1177 be packed into an int where the lower bits contain the value that
1178 corresponds to that symbolic name.
1179 (predefined_symbo): Add struct.
1180 (tic80_predefined_symbols): Declare array of translations.
1181 (tic80_num_predefined_symbols): Declare size of that array.
1182 (tic80_value_to_symbol): Declare function.
1183 (tic80_symbol_to_value): Declare function.
1184
1185Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1186
1187 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1188
1189Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1190
1191 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1192 be the destination register.
1193
1194Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1195
1196 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1197 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1198 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1199 that the opcode can have two vector instructions in a single
1200 32 bit word and we have to encode/decode both.
1201
1202Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1203
1204 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1205 TIC80_OPERAND_RELATIVE for PC relative.
1206 (TIC80_OPERAND_BASEREL): New flag bit for register
1207 base relative.
1208
1209Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1210
1211 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1212
1213Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1214
1215 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1216 ":s" modifier for scaling.
1217
1218Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1219
1220 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1221 (TIC80_OPERAND_M_LI): Ditto
1222
1223Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1224
1225 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1226 (TIC80_OPERAND_CC): New define for condition code operand.
1227 (TIC80_OPERAND_CR): New define for control register operand.
1228
1229Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1230
1231 * tic80.h (struct tic80_opcode): Name changed.
1232 (struct tic80_opcode): Remove format field.
1233 (struct tic80_operand): Add insertion and extraction functions.
1234 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1235 correct ones.
1236 (FMT_*): Ditto.
1237
1238Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1239
1240 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1241 type IV instruction offsets.
1242
1243Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1244
1245 * tic80.h: New file.
1246
1247Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1248
1249 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1250
1251Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1252
1253 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1254 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1255 * v850.h: Fix comment, v850_operand not powerpc_operand.
1256
1257Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1258
1259 * mn10200.h: Flesh out structures and definitions needed by
1260 the mn10200 assembler & disassembler.
1261
1262Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1263
1264 * mips.h: Add mips16 definitions.
1265
1266Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1267
1268 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1269
1270Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1271
1272 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1273 (MN10300_OPERAND_MEMADDR): Define.
1274
1275Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1276
1277 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1278
1279Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1280
1281 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1282
1283Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1284
1285 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1286
1287Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1288
1289 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1290
1291Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1292
1293 * alpha.h: Don't include "bfd.h"; private relocation types are now
1294 negative to minimize problems with shared libraries. Organize
1295 instruction subsets by AMASK extensions and PALcode
1296 implementation.
1297 (struct alpha_operand): Move flags slot for better packing.
1298
1299Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1300
1301 * v850.h (V850_OPERAND_RELAX): New operand flag.
1302
1303Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1304
1305 * mn10300.h (FMT_*): Move operand format definitions
1306 here.
1307
1308Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1309
1310 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1311
1312Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1313
1314 * mn10300.h (mn10300_opcode): Add "format" field.
1315 (MN10300_OPERAND_*): Define.
1316
1317Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1318
1319 * mn10x00.h: Delete.
1320 * mn10200.h, mn10300.h: New files.
1321
1322Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1323
1324 * mn10x00.h: New file.
1325
1326Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1327
1328 * v850.h: Add new flag to indicate this instruction uses a PC
1329 displacement.
1330
1331Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1332
1333 * h8300.h (stmac): Add missing instruction.
1334
1335Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1336
1337 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1338 field.
1339
1340Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1341
1342 * v850.h (V850_OPERAND_EP): Define.
1343
1344 * v850.h (v850_opcode): Add size field.
1345
1346Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1347
1348 * v850.h (v850_operands): Add insert and extract fields, pointers
1349 to functions used to handle unusual operand encoding.
1350 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1351 V850_OPERAND_SIGNED): Defined.
1352
1353Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1354
1355 * v850.h (v850_operands): Add flags field.
1356 (OPERAND_REG, OPERAND_NUM): Defined.
1357
1358Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1359
1360 * v850.h: New file.
1361
1362Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1363
1364 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1365 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1366 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1367 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1368 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1369 Defined.
1370
1371Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1372
1373 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1374 a 3 bit space id instead of a 2 bit space id.
1375
1376Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1377
1378 * d10v.h: Add some additional defines to support the
1379 assembler in determining which operations can be done in parallel.
1380
1381Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1382
1383 * h8300.h (SN): Define.
1384 (eepmov.b): Renamed from "eepmov"
1385 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1386 with them.
1387
1388Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1389
1390 * d10v.h (OPERAND_SHIFT): New operand flag.
1391
1392Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1393
1394 * d10v.h: Changes for divs, parallel-only instructions, and
1395 signed numbers.
1396
1397Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1398
1399 * d10v.h (pd_reg): Define. Putting the definition here allows
1400 the assembler and disassembler to share the same struct.
1401
1402Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1403
1404 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1405 Williams <steve@icarus.com>.
1406
1407Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1408
1409 * d10v.h: New file.
1410
1411Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1412
1413 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1414
1415Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1416
1417 * m68k.h (mcf5200): New macro.
1418 Document names of coldfire control registers.
1419
1420Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1421
1422 * h8300.h (SRC_IN_DST): Define.
1423
1424 * h8300.h (UNOP3): Mark the register operand in this insn
1425 as a source operand, not a destination operand.
1426 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1427 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1428 register operand with SRC_IN_DST.
1429
1430Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1431
1432 * alpha.h: New file.
1433
1434Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1435
1436 * rs6k.h: Remove obsolete file.
1437
1438Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1439
1440 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1441 fdivp, and fdivrp. Add ffreep.
1442
1443Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1444
1445 * h8300.h: Reorder various #defines for readability.
1446 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1447 (BITOP): Accept additional (unused) argument. All callers changed.
1448 (EBITOP): Likewise.
1449 (O_LAST): Bump.
1450 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1451
1452 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1453 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1454 (BITOP, EBITOP): Handle new H8/S addressing modes for
1455 bit insns.
1456 (UNOP3): Handle new shift/rotate insns on the H8/S.
1457 (insns using exr): New instructions.
1458 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1459
1460Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1461
1462 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1463 was incorrect.
1464
1465Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1466
1467 * h8300.h (START): Remove.
1468 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1469 and mov.l insns that can be relaxed.
1470
1471Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1472
1473 * i386.h: Remove Abs32 from lcall.
1474
1475Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1476
1477 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1478 (SLCPOP): New macro.
1479 Mark X,Y opcode letters as in use.
1480
1481Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1482
1483 * sparc.h (F_FLOAT, F_FBR): Define.
1484
1485Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1486
1487 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1488 from all insns.
1489 (ABS8SRC,ABS8DST): Add ABS8MEM.
1490 (add.l): Fix reg+reg variant.
1491 (eepmov.w): Renamed from eepmovw.
1492 (ldc,stc): Fix many cases.
1493
1494Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1495
1496 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1497
1498Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1499
1500 * sparc.h (O): Mark operand letter as in use.
1501
1502Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1503
1504 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1505 Mark operand letters uU as in use.
1506
1507Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1508
1509 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1510 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1511 (SPARC_OPCODE_SUPPORTED): New macro.
1512 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1513 (F_NOTV9): Delete.
1514
1515Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1516
1517 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1518 declaration consistent with return type in definition.
1519
1520Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1521
1522 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1523
1524Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1525
1526 * i386.h (i386_regtab): Add 80486 test registers.
1527
1528Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1529
1530 * i960.h (I_HX): Define.
1531 (i960_opcodes): Add HX instruction.
1532
1533Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1534
1535 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1536 and fclex.
1537
1538Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1539
1540 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1541 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1542 (bfd_* defines): Delete.
1543 (sparc_opcode_archs): Replaces architecture_pname.
1544 (sparc_opcode_lookup_arch): Declare.
1545 (NUMOPCODES): Delete.
1546
1547Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1548
1549 * sparc.h (enum sparc_architecture): Add v9a.
1550 (ARCHITECTURES_CONFLICT_P): Update.
1551
1552Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1553
1554 * i386.h: Added Pentium Pro instructions.
1555
1556Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * m68k.h: Document new 'W' operand place.
1559
1560Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1561
1562 * hppa.h: Add lci and syncdma instructions.
1563
1564Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1565
1566 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1567 instructions.
1568
1569Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1570
1571 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1572 assembler's -mcom and -many switches.
1573
1574Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1575
1576 * i386.h: Fix cmpxchg8b extension opcode description.
1577
1578Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1579
1580 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1581 and register cr4.
1582
1583Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1584
1585 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1586
1587Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1588
1589 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1590
1591Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1592
1593 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1594
1595Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1596
1597 * m68kmri.h: Remove.
1598
1599 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1600 declarations. Remove F_ALIAS and flag field of struct
1601 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1602 int. Make name and args fields of struct m68k_opcode const.
1603
1604Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1605
1606 * sparc.h (F_NOTV9): Define.
1607
1608Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1609
1610 * mips.h (INSN_4010): Define.
1611
1612Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1613
1614 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1615
1616 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1617 * m68k.h: Fix argument descriptions of coprocessor
1618 instructions to allow only alterable operands where appropriate.
1619 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1620 (m68k_opcode_aliases): Add more aliases.
1621
1622Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1623
1624 * m68k.h: Added explcitly short-sized conditional branches, and a
1625 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1626 svr4-based configurations.
1627
1628Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1629
1630 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1631 * i386.h: added missing Data16/Data32 flags to a few instructions.
1632
1633Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1634
1635 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1636 (OP_MASK_BCC, OP_SH_BCC): Define.
1637 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1638 (OP_MASK_CCC, OP_SH_CCC): Define.
1639 (INSN_READ_FPR_R): Define.
1640 (INSN_RFE): Delete.
1641
1642Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1643
1644 * m68k.h (enum m68k_architecture): Deleted.
1645 (struct m68k_opcode_alias): New type.
1646 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1647 matching constraints, values and flags. As a side effect of this,
1648 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1649 as I know were never used, now may need re-examining.
1650 (numopcodes): Now const.
1651 (m68k_opcode_aliases, numaliases): New variables.
1652 (endop): Deleted.
1653 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1654 m68k_opcode_aliases; update declaration of m68k_opcodes.
1655
1656Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1657
1658 * hppa.h (delay_type): Delete unused enumeration.
1659 (pa_opcode): Replace unused delayed field with an architecture
1660 field.
1661 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1662
1663Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1664
1665 * mips.h (INSN_ISA4): Define.
1666
1667Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1668
1669 * mips.h (M_DLA_AB, M_DLI): Define.
1670
1671Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1672
1673 * hppa.h (fstwx): Fix single-bit error.
1674
1675Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1676
1677 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1678
1679Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1680
1681 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1682 debug registers. From Charles Hannum (mycroft@netbsd.org).
1683
1684Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1685
1686 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1687 i386 support:
1688 * i386.h (MOV_AX_DISP32): New macro.
1689 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1690 of several call/return instructions.
1691 (ADDR_PREFIX_OPCODE): New macro.
1692
1693Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1694
1695 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1696
1697 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1698 it pointer to const char;
1699 (struct vot, field `name'): ditto.
1700
1701Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1702
1703 * vax.h: Supply and properly group all values in end sentinel.
1704
1705Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1706
1707 * mips.h (INSN_ISA, INSN_4650): Define.
1708
1709Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1710
1711 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1712 systems with a separate instruction and data cache, such as the
1713 29040, these instructions take an optional argument.
1714
1715Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1716
1717 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1718 INSN_TRAP.
1719
1720Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1721
1722 * mips.h (INSN_STORE_MEMORY): Define.
1723
1724Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1725
1726 * sparc.h: Document new operand type 'x'.
1727
1728Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1729
1730 * i960.h (I_CX2): New instruction category. It includes
1731 instructions available on Cx and Jx processors.
1732 (I_JX): New instruction category, for JX-only instructions.
1733 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1734 Jx-only instructions, in I_JX category.
1735
1736Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1737
1738 * ns32k.h (endop): Made pointer const too.
1739
1740Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1741
1742 * ns32k.h: Drop Q operand type as there is no correct use
1743 for it. Add I and Z operand types which allow better checking.
1744
1745Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1746
1747 * h8300.h (xor.l) :fix bit pattern.
1748 (L_2): New size of operand.
1749 (trapa): Use it.
1750
1751Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1752
1753 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1754
1755Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1756
1757 * sparc.h: Include v9 definitions.
1758
1759Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1760
1761 * m68k.h (m68060): Defined.
1762 (m68040up, mfloat, mmmu): Include it.
1763 (struct m68k_opcode): Widen `arch' field.
1764 (m68k_opcodes): Updated for M68060. Removed comments that were
1765 instructions commented out by "JF" years ago.
1766
1767Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1768
1769 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1770 add a one-bit `flags' field.
1771 (F_ALIAS): New macro.
1772
1773Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1774
1775 * h8300.h (dec, inc): Get encoding right.
1776
1777Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1778
1779 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1780 a flag instead.
1781 (PPC_OPERAND_SIGNED): Define.
1782 (PPC_OPERAND_SIGNOPT): Define.
1783
1784Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1785
1786 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1787 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1788
1789Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1790
1791 * i386.h: Reverse last change. It'll be handled in gas instead.
1792
1793Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1794
1795 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1796 slower on the 486 and used the implicit shift count despite the
1797 explicit operand. The one-operand form is still available to get
1798 the shorter form with the implicit shift count.
1799
1800Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1801
1802 * hppa.h: Fix typo in fstws arg string.
1803
1804Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1805
1806 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1807
1808Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1809
1810 * ppc.h (PPC_OPCODE_601): Define.
1811
1812Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1813
1814 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1815 (so we can determine valid completers for both addb and addb[tf].)
1816
1817 * hppa.h (xmpyu): No floating point format specifier for the
1818 xmpyu instruction.
1819
1820Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1821
1822 * ppc.h (PPC_OPERAND_NEXT): Define.
1823 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1824 (struct powerpc_macro): Define.
1825 (powerpc_macros, powerpc_num_macros): Declare.
1826
1827Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1828
1829 * ppc.h: New file. Header file for PowerPC opcode table.
1830
1831Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1832
1833 * hppa.h: More minor template fixes for sfu and copr (to allow
1834 for easier disassembly).
1835
1836 * hppa.h: Fix templates for all the sfu and copr instructions.
1837
1838Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1839
1840 * i386.h (push): Permit Imm16 operand too.
1841
1842Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1843
1844 * h8300.h (andc): Exists in base arch.
1845
1846Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1847
1848 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1849 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1850
1851Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1852
1853 * hppa.h: Add FP quadword store instructions.
1854
1855Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1856
1857 * mips.h: (M_J_A): Added.
1858 (M_LA): Removed.
1859
1860Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1861
1862 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1863 <mellon@pepper.ncd.com>.
1864
1865Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1866
1867 * hppa.h: Immediate field in probei instructions is unsigned,
1868 not low-sign extended.
1869
1870Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1871
1872 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1873
1874Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1875
1876 * i386.h: Add "fxch" without operand.
1877
1878Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1879
1880 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1881
1882Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1883
1884 * hppa.h: Add gfw and gfr to the opcode table.
1885
1886Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1887
1888 * m88k.h: extended to handle m88110.
1889
1890Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1891
1892 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1893 addresses.
1894
1895Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1896
1897 * i960.h (i960_opcodes): Properly bracket initializers.
1898
1899Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1900
1901 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1902
1903Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1904
1905 * m68k.h (two): Protect second argument with parentheses.
1906
1907Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1908
1909 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1910 Deleted old in/out instructions in "#if 0" section.
1911
1912Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1913
1914 * i386.h (i386_optab): Properly bracket initializers.
1915
1916Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1917
1918 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1919 Jeff Law, law@cs.utah.edu).
1920
1921Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1922
1923 * i386.h (lcall): Accept Imm32 operand also.
1924
1925Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1926
1927 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1928 (M_DABS): Added.
1929
1930Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1931
1932 * mips.h (INSN_*): Changed values. Removed unused definitions.
1933 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1934 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1935 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1936 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1937 (M_*): Added new values for r6000 and r4000 macros.
1938 (ANY_DELAY): Removed.
1939
1940Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1941
1942 * mips.h: Added M_LI_S and M_LI_SS.
1943
1944Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1945
1946 * h8300.h: Get some rare mov.bs correct.
1947
1948Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1949
1950 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1951 been included.
1952
1953Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1954
1955 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1956 jump instructions, for use in disassemblers.
1957
1958Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1959
1960 * m88k.h: Make bitfields just unsigned, not unsigned long or
1961 unsigned short.
1962
1963Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1964
1965 * hppa.h: New argument type 'y'. Use in various float instructions.
1966
1967Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1968
1969 * hppa.h (break): First immediate field is unsigned.
1970
1971 * hppa.h: Add rfir instruction.
1972
1973Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1974
1975 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1976
1977Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1978
1979 * mips.h: Reworked the hazard information somewhat, and fixed some
1980 bugs in the instruction hazard descriptions.
1981
1982Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1983
1984 * m88k.h: Corrected a couple of opcodes.
1985
1986Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1987
1988 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1989 new version includes instruction hazard information, but is
1990 otherwise reasonably similar.
1991
1992Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1993
1994 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1995
1996Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1997
1998 Patches from Jeff Law, law@cs.utah.edu:
1999 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2000 Make the tables be the same for the following instructions:
2001 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2002 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2003 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2004 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2005 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2006 "fcmp", and "ftest".
2007
2008 * hppa.h: Make new and old tables the same for "break", "mtctl",
2009 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2010 Fix typo in last patch. Collapse several #ifdefs into a
2011 single #ifdef.
2012
2013 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2014 of the comments up-to-date.
2015
2016 * hppa.h: Update "free list" of letters and update
2017 comments describing each letter's function.
2018
2019Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2020
2021 * h8300.h: checkpoint, includes H8/300-H opcodes.
2022
2023Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2024
2025 * Patches from Jeffrey Law <law@cs.utah.edu>.
2026 * hppa.h: Rework single precision FP
2027 instructions so that they correctly disassemble code
2028 PA1.1 code.
2029
2030Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2031
2032 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2033 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2034
2035Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2036
2037 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2038 gdb will define it for now.
2039
2040Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2041
2042 * sparc.h: Don't end enumerator list with comma.
2043
2044Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2045
2046 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2047 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2048 ("bc2t"): Correct typo.
2049 ("[ls]wc[023]"): Use T rather than t.
2050 ("c[0123]"): Define general coprocessor instructions.
2051
2052Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2053
2054 * m68k.h: Move split point for gcc compilation more towards
2055 middle.
2056
2057Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2058
2059 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2060 simply wrong, ics, rfi, & rfsvc were missing).
2061 Add "a" to opr_ext for "bb". Doc fix.
2062
2063Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2064
2065 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2066 * mips.h: Add casts, to suppress warnings about shifting too much.
2067 * m68k.h: Document the placement code '9'.
2068
2069Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2070
2071 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2072 allows callers to break up the large initialized struct full of
2073 opcodes into two half-sized ones. This permits GCC to compile
2074 this module, since it takes exponential space for initializers.
2075 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2076
2077Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2078
2079 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2080 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2081 initialized structs in it.
2082
2083Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2084
2085 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2086 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2087 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2088
2089Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2090
2091 * mips.h: document "i" and "j" operands correctly.
2092
2093Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2094
2095 * mips.h: Removed endianness dependency.
2096
2097Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2098
2099 * h8300.h: include info on number of cycles per instruction.
2100
2101Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2102
2103 * hppa.h: Move handy aliases to the front. Fix masks for extract
2104 and deposit instructions.
2105
2106Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2107
2108 * i386.h: accept shld and shrd both with and without the shift
2109 count argument, which is always %cl.
2110
2111Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2112
2113 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2114 (one_byte_segment_defaults, two_byte_segment_defaults,
2115 i386_prefixtab_end): Ditto.
2116
2117Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2118
2119 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2120 for operand 2; from John Carr, jfc@dsg.dec.com.
2121
2122Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2123
2124 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2125 always use 16-bit offsets. Makes calculated-size jump tables
2126 feasible.
2127
2128Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2129
2130 * i386.h: Fix one-operand forms of in* and out* patterns.
2131
2132Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2133
2134 * m68k.h: Added CPU32 support.
2135
2136Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2137
2138 * mips.h (break): Disassemble the argument. Patch from
2139 jonathan@cs.stanford.edu (Jonathan Stone).
2140
2141Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2142
2143 * m68k.h: merged Motorola and MIT syntax.
2144
2145Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2146
2147 * m68k.h (pmove): make the tests less strict, the 68k book is
2148 wrong.
2149
2150Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2151
2152 * m68k.h (m68ec030): Defined as alias for 68030.
2153 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2154 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2155 them. Tightened description of "fmovex" to distinguish it from
2156 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2157 up descriptions that claimed versions were available for chips not
2158 supporting them. Added "pmovefd".
2159
2160Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2161
2162 * m68k.h: fix where the . goes in divull
2163
2164Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2165
2166 * m68k.h: the cas2 instruction is supposed to be written with
2167 indirection on the last two operands, which can be either data or
2168 address registers. Added a new operand type 'r' which accepts
2169 either register type. Added new cases for cas2l and cas2w which
2170 use them. Corrected masks for cas2 which failed to recognize use
2171 of address register.
2172
2173Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2174
2175 * m68k.h: Merged in patches (mostly m68040-specific) from
2176 Colin Smith <colin@wrs.com>.
2177
2178 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2179 base). Also cleaned up duplicates, re-ordered instructions for
2180 the sake of dis-assembling (so aliases come after standard names).
2181 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2182
2183Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2184
2185 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2186 all missing .s
2187
2188Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2189
2190 * sparc.h: Moved tables to BFD library.
2191
2192 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2193
2194Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2195
2196 * h8300.h: Finish filling in all the holes in the opcode table,
2197 so that the Lucid C compiler can digest this as well...
2198
2199Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2200
2201 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2202 Fix opcodes on various sizes of fild/fist instructions
2203 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2204 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2205
2206Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2207
2208 * h8300.h: Fill in all the holes in the opcode table so that the
2209 losing HPUX C compiler can digest this...
2210
2211Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2212
2213 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2214 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2215
2216Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2217
2218 * sparc.h: Add new architecture variant sparclite; add its scan
2219 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2220
2221Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2222
2223 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2224 fy@lucid.com).
2225
2226Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2227
2228 * rs6k.h: New version from IBM (Metin).
2229
2230Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2231
2232 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2233 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2234
2235Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2236
2237 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2238
2239Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2240
2241 * m68k.h (one, two): Cast macro args to unsigned to suppress
2242 complaints from compiler and lint about integer overflow during
2243 shift.
2244
2245Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2246
2247 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2248
2249Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2250
2251 * mips.h: Make bitfield layout depend on the HOST compiler,
2252 not on the TARGET system.
2253
2254Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2255
2256 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2257 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2258 <TRANLE@INTELLICORP.COM>.
2259
2260Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2261
2262 * h8300.h: turned op_type enum into #define list
2263
2264Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2265
2266 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2267 similar instructions -- they've been renamed to "fitoq", etc.
2268 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2269 number of arguments.
2270 * h8300.h: Remove extra ; which produces compiler warning.
2271
2272Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2273
2274 * sparc.h: fix opcode for tsubcctv.
2275
2276Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2277
2278 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2279
2280Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2281
2282 * sparc.h (nop): Made the 'lose' field be even tighter,
2283 so only a standard 'nop' is disassembled as a nop.
2284
2285Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2286
2287 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2288 disassembled as a nop.
2289
2290Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2291
2292 * sparc.h: fix a typo.
2293
2294Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2295
2296 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2297 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2298 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2299
2300\f
2301Local Variables:
2302version-control: never
2303End:
GDB Binutils - Deliverables
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