* procfs.c (procfs_can_use_hw_breakpoint): New function.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
aec421e0
TS
12002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
2
3 * mips.h (INSN_MIPS16): New define.
4
cd61ebfe
AM
52002-07-08 Alan Modra <amodra@bigpond.net.au>
6
7 * i386.h: Remove IgnoreSize from movsx and movzx.
8
92007e40
AM
92002-06-08 Alan Modra <amodra@bigpond.net.au>
10
11 * a29k.h: Replace CONST with const.
12 (CONST): Don't define.
13 * convex.h: Replace CONST with const.
14 (CONST): Don't define.
15 * dlx.h: Replace CONST with const.
16 * or32.h (CONST): Don't define.
17
deec1734
CD
182002-05-30 Chris G. Demetriou <cgd@broadcom.com>
19
20 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
21 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
22 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
23 (INSN_MDMX): New constants, for MDMX support.
24 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
25
d172d4ba
NC
262002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
27
28 * dlx.h: New file.
29
b3f7d5fd
AM
302002-05-25 Alan Modra <amodra@bigpond.net.au>
31
32 * ia64.h: Use #include "" instead of <> for local header files.
33 * sparc.h: Likewise.
34
771c7ce4
TS
352002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
36
37 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
38
b9c9142c
AV
392002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
40
41 * h8300.h: Corrected defs of all control regs
42 and eepmov instr.
43
cd47f4f1
AM
442002-04-11 Alan Modra <amodra@bigpond.net.au>
45
46 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 47 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 48
1f25f5d3
CD
492002-03-15 Chris G. Demetriou <cgd@broadcom.com>
50
51 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
52 instructions.
53 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
54 may be passed along with the ISA bitmask.
55
e4b29ec6
AM
562002-03-05 Paul Koning <pkoning@equallogic.com>
57
58 * pdp11.h: Add format codes for float instruction formats.
59
eea5c83f
AM
602002-02-25 Alan Modra <amodra@bigpond.net.au>
61
62 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
63
5a8b245c
JH
64Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
65
66 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
67
85a33fe2
JH
68Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
69
70 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
71 (xchg): Fix.
72 (in, out): Disable 64bit operands.
73 (call, jmp): Avoid REX prefixes.
74 (jcxz): Prohibit in 64bit mode
75 (jrcxz, loop): Add 64bit variants.
76 (movq): Fix patterns.
77 (movmskps, pextrw, pinstrw): Add 64bit variants.
78
3b16e843
NC
792002-01-31 Ivan Guzvinec <ivang@opencores.org>
80
81 * or32.h: New file.
82
9a2e995d
GH
832002-01-22 Graydon Hoare <graydon@redhat.com>
84
85 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
86 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
87
7b45c6e1
AM
882002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
89
90 * h8300.h: Comment typo fix.
91
a09cf9bd
MG
922002-01-03 matthew green <mrg@redhat.com>
93
94 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
95 (PPC_OPCODE_BOOKE64): Likewise.
96
1befefea
JL
97Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
98
99 * hppa.h (call, ret): Move to end of table.
100 (addb, addib): PA2.0 variants should have been PA2.0W.
101 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
102 happy.
103 (fldw, fldd, fstw, fstd, bb): Likewise.
104 (short loads/stores): Tweak format specifier slightly to keep
105 disassembler happy.
106 (indexed loads/stores): Likewise.
107 (absolute loads/stores): Likewise.
108
124ddbb2
AO
1092001-12-04 Alexandre Oliva <aoliva@redhat.com>
110
111 * d10v.h (OPERAND_NOSP): New macro.
112
9b21d49b
AO
1132001-11-29 Alexandre Oliva <aoliva@redhat.com>
114
115 * d10v.h (OPERAND_SP): New macro.
116
802a735e
AM
1172001-11-15 Alan Modra <amodra@bigpond.net.au>
118
119 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
120
6e917903
TW
1212001-11-11 Timothy Wall <twall@alum.mit.edu>
122
123 * tic54x.h: Revise opcode layout; don't really need a separate
124 structure for parallel opcodes.
125
e5470cdc
AM
1262001-11-13 Zack Weinberg <zack@codesourcery.com>
127 Alan Modra <amodra@bigpond.net.au>
128
129 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
130 accept WordReg.
131
5d84d93f
CD
1322001-11-04 Chris Demetriou <cgd@broadcom.com>
133
134 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
135
3c3bdf30
NC
1362001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
137
138 * mmix.h: New file.
139
e4432525
CD
1402001-10-18 Chris Demetriou <cgd@broadcom.com>
141
142 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
143 of the expression, to make source code merging easier.
144
8ff529d8
CD
1452001-10-17 Chris Demetriou <cgd@broadcom.com>
146
147 * mips.h: Sort coprocessor instruction argument characters
148 in comment, add a few more words of description for "H".
149
2228315b
CD
1502001-10-17 Chris Demetriou <cgd@broadcom.com>
151
152 * mips.h (INSN_SB1): New cpu-specific instruction bit.
153 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
154 if cpu is CPU_SB1.
155
f5c120c5
MG
1562001-10-17 matthew green <mrg@redhat.com>
157
158 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
159
418c1742
MG
1602001-10-12 matthew green <mrg@redhat.com>
161
0716ce0d
MG
162 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
163 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
164 instructions, respectively.
418c1742 165
6ff2f2ba
NC
1662001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
167
168 * v850.h: Remove spurious comment.
169
015cf428
NC
1702001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
171
172 * h8300.h: Fix compile time warning messages
173
847b8b31
RH
1742001-09-04 Richard Henderson <rth@redhat.com>
175
176 * alpha.h (struct alpha_operand): Pack elements into bitfields.
177
a98b9439
EC
1782001-08-31 Eric Christopher <echristo@redhat.com>
179
180 * mips.h: Remove CPU_MIPS32_4K.
181
a6959011
AM
1822001-08-27 Torbjorn Granlund <tege@swox.com>
183
184 * ppc.h (PPC_OPERAND_DS): Define.
185
d83c6548
AJ
1862001-08-25 Andreas Jaeger <aj@suse.de>
187
188 * d30v.h: Fix declaration of reg_name_cnt.
189
190 * d10v.h: Fix declaration of d10v_reg_name_cnt.
191
192 * arc.h: Add prototypes from opcodes/arc-opc.c.
193
99c14723
TS
1942001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
195
196 * mips.h (INSN_10000): Define.
197 (OPCODE_IS_MEMBER): Check for INSN_10000.
198
11b37b7b
AM
1992001-08-10 Alan Modra <amodra@one.net.au>
200
201 * ppc.h: Revert 2001-08-08.
202
3b16e843
NC
2032001-08-10 Richard Sandiford <rsandifo@redhat.com>
204
205 * mips.h (INSN_GP32): Remove.
206 (OPCODE_IS_MEMBER): Remove gp32 parameter.
207 (M_MOVE): New macro identifier.
208
0f1bac05
AM
2092001-08-08 Alan Modra <amodra@one.net.au>
210
211 1999-10-25 Torbjorn Granlund <tege@swox.com>
212 * ppc.h (struct powerpc_operand): New field `reloc'.
213
3b16e843
NC
2142001-08-01 Aldy Hernandez <aldyh@redhat.com>
215
216 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
217
2182001-07-12 Jeff Johnston <jjohnstn@redhat.com>
219
220 * cgen.h (CGEN_INSN): Add regex support.
221 (build_insn_regex): Declare.
222
81f6038f
FCE
2232001-07-11 Frank Ch. Eigler <fche@redhat.com>
224
225 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
226 (cgen_cpu_desc): Ditto.
227
32cfffe3
BE
2282001-07-07 Ben Elliston <bje@redhat.com>
229
230 * m88k.h: Clean up and reformat. Remove unused code.
231
3e890047
GK
2322001-06-14 Geoffrey Keating <geoffk@redhat.com>
233
234 * cgen.h (cgen_keyword): Add nonalpha_chars field.
235
d1cf510e
NC
2362001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
237
238 * mips.h (CPU_R12000): Define.
239
e281c457
JH
2402001-05-23 John Healy <jhealy@redhat.com>
241
242 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 243
aa5f19f2
NC
2442001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
245
246 * mips.h (INSN_ISA_MASK): Define.
247
67d6227d
AM
2482001-05-12 Alan Modra <amodra@one.net.au>
249
250 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
251 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
252 and use InvMem as these insns must have register operands.
253
992aaec9
AM
2542001-05-04 Alan Modra <amodra@one.net.au>
255
256 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
257 and pextrw to swap reg/rm assignments.
258
4ef7f0bf
HPN
2592001-04-05 Hans-Peter Nilsson <hp@axis.com>
260
261 * cris.h (enum cris_insn_version_usage): Correct comment for
262 cris_ver_v3p.
263
0f17484f
AM
2642001-03-24 Alan Modra <alan@linuxcare.com.au>
265
266 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
267 Add InvMem to first operand of "maskmovdqu".
268
7ccb5238
HPN
2692001-03-22 Hans-Peter Nilsson <hp@axis.com>
270
271 * cris.h (ADD_PC_INCR_OPCODE): New macro.
272
361bfa20
KH
2732001-03-21 Kazu Hirata <kazu@hxi.com>
274
275 * h8300.h: Fix formatting.
276
87890af0
AM
2772001-03-22 Alan Modra <alan@linuxcare.com.au>
278
279 * i386.h (i386_optab): Add paddq, psubq.
280
2e98d2de
AM
2812001-03-19 Alan Modra <alan@linuxcare.com.au>
282
283 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
284
80a523c2
NC
2852001-02-28 Igor Shevlyakov <igor@windriver.com>
286
287 * m68k.h: new defines for Coldfire V4. Update mcf to know
288 about mcf5407.
289
e135f41b
NC
2902001-02-18 lars brinkhoff <lars@nocrew.org>
291
292 * pdp11.h: New file.
293
2942001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
295
296 * i386.h (i386_optab): SSE integer converison instructions have
297 64bit versions on x86-64.
298
8eaec934
NC
2992001-02-10 Nick Clifton <nickc@redhat.com>
300
301 * mips.h: Remove extraneous whitespace. Formating change to allow
302 for future contribution.
303
a85d7ed0
NC
3042001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
305
306 * s390.h: New file.
307
0715dc88
PM
3082001-02-02 Patrick Macdonald <patrickm@redhat.com>
309
310 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
311 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
312 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
313
296bc568
AM
3142001-01-24 Karsten Keil <kkeil@suse.de>
315
316 * i386.h (i386_optab): Fix swapgs
317
1328dc98
AM
3182001-01-14 Alan Modra <alan@linuxcare.com.au>
319
320 * hppa.h: Describe new '<' and '>' operand types, and tidy
321 existing comments.
322 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
323 Remove duplicate "ldw j(s,b),x". Sort some entries.
324
e135f41b 3252001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
326
327 * i386.h (i386_optab): Fix pusha and ret templates.
328
0d2bcfaf
NC
3292001-01-11 Peter Targett <peter.targett@arccores.com>
330
331 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
332 definitions for masking cpu type.
333 (arc_ext_operand_value) New structure for storing extended
334 operands.
335 (ARC_OPERAND_*) Flags for operand values.
336
3372001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
338
339 * i386.h (pinsrw): Add.
340 (pshufw): Remove.
341 (cvttpd2dq): Fix operands.
342 (cvttps2dq): Likewise.
343 (movq2q): Rename to movdq2q.
344
079966a8
AM
3452001-01-10 Richard Schaal <richard.schaal@intel.com>
346
347 * i386.h: Correct movnti instruction.
348
8c1f9e76
JJ
3492001-01-09 Jeff Johnston <jjohnstn@redhat.com>
350
351 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
352 of operands (unsigned char or unsigned short).
353 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
354 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
355
0d2bcfaf 3562001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
357
358 * i386.h (i386_optab): Make [sml]fence template to use immext field.
359
0d2bcfaf 3602001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
361
362 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
363 introduced by Pentium4
364
0d2bcfaf 3652000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
366
367 * i386.h (i386_optab): Add "rex*" instructions;
368 add swapgs; disable jmp/call far direct instructions for
369 64bit mode; add syscall and sysret; disable registers for 0xc6
370 template. Add 'q' suffixes to extendable instructions, disable
079966a8 371 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
372 (i386_regtab): Add extended registers.
373 (*Suf): Add No_qSuf.
374 (q_Suf, wlq_Suf, bwlq_Suf): New.
375
0d2bcfaf 3762000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
377
378 * i386.h (i386_optab): Replace "Imm" with "EncImm".
379 (i386_regtab): Add flags field.
d83c6548 380
bf40d919
NC
3812000-12-12 Nick Clifton <nickc@redhat.com>
382
383 * mips.h: Fix formatting.
384
4372b673
NC
3852000-12-01 Chris Demetriou <cgd@sibyte.com>
386
387 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
388 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
389 OP_*_SYSCALL definitions.
390 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
391 19 bit wait codes.
392 (MIPS operand specifier comments): Remove 'm', add 'U' and
393 'J', and update the meaning of 'B' so that it's more general.
394
e7af610e
NC
395 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
396 INSN_ISA5): Renumber, redefine to mean the ISA at which the
397 instruction was added.
398 (INSN_ISA32): New constant.
399 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
400 Renumber to avoid new and/or renumbered INSN_* constants.
401 (INSN_MIPS32): Delete.
402 (ISA_UNKNOWN): New constant to indicate unknown ISA.
403 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
404 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 405 constants available at that ISA level.
e7af610e
NC
406 (CPU_UNKNOWN): New constant to indicate unknown CPU.
407 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
408 define it with a unique value.
409 (OPCODE_IS_MEMBER): Update for new ISA membership-related
410 constant meanings.
411
84ea6cf2 412 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 413 definitions.
84ea6cf2 414
c6c98b38
NC
415 * mips.h (CPU_SB1): New constant.
416
19f7b010
JJ
4172000-10-20 Jakub Jelinek <jakub@redhat.com>
418
419 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
420 Note that '3' is used for siam operand.
421
139368c9
JW
4222000-09-22 Jim Wilson <wilson@cygnus.com>
423
424 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
425
156c2f8b 4262000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 427
156c2f8b
NC
428 * mips.h: Use defines instead of hard-coded processor numbers.
429 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 430 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
431 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
432 CPU_4KC, CPU_4KM, CPU_4KP): Define..
433 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 434 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 435 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
436 Add 'P' to used characters.
437 Use 'H' for coprocessor select field.
156c2f8b 438 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
439 Document new arg characters and add to used characters.
440 (INSN_MIPS32): New define for MIPS32 extensions.
441 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 442
3c5ce02e
AM
4432000-09-05 Alan Modra <alan@linuxcare.com.au>
444
445 * hppa.h: Mention cz completer.
446
50b81f19
JW
4472000-08-16 Jim Wilson <wilson@cygnus.com>
448
449 * ia64.h (IA64_OPCODE_POSTINC): New.
450
fc29466d
L
4512000-08-15 H.J. Lu <hjl@gnu.org>
452
453 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
454 IgnoreSize change.
455
4f1d9bd8
NC
4562000-08-08 Jason Eckhardt <jle@cygnus.com>
457
458 * i860.h: Small formatting adjustments.
459
45ee1401
DC
4602000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
461
462 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
463 Move related opcodes closer to each other.
464 Minor changes in comments, list undefined opcodes.
465
9d551405
DB
4662000-07-26 Dave Brolley <brolley@redhat.com>
467
468 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
469
4f1d9bd8
NC
4702000-07-22 Jason Eckhardt <jle@cygnus.com>
471
472 * i860.h (btne, bte, bla): Changed these opcodes
473 to use sbroff ('r') instead of split16 ('s').
474 (J, K, L, M): New operand types for 16-bit aligned fields.
475 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
476 use I, J, K, L, M instead of just I.
477 (T, U): New operand types for split 16-bit aligned fields.
478 (st.x): Changed these opcodes to use S, T, U instead of just S.
479 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
480 exist on the i860.
481 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
482 (pfeq.ss, pfeq.dd): New opcodes.
483 (st.s): Fixed incorrect mask bits.
484 (fmlow): Fixed incorrect mask bits.
485 (fzchkl, pfzchkl): Fixed incorrect mask bits.
486 (faddz, pfaddz): Fixed incorrect mask bits.
487 (form, pform): Fixed incorrect mask bits.
488 (pfld.l): Fixed incorrect mask bits.
489 (fst.q): Fixed incorrect mask bits.
490 (all floating point opcodes): Fixed incorrect mask bits for
491 handling of dual bit.
492
c8488617
HPN
4932000-07-20 Hans-Peter Nilsson <hp@axis.com>
494
495 cris.h: New file.
496
65aa24b6
NC
4972000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
498
499 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
500 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
501 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
502 (AVR_ISA_M83): Define for ATmega83, ATmega85.
503 (espm): Remove, because ESPM removed in databook update.
504 (eicall, eijmp): Move to the end of opcode table.
505
60bcf0fa
NC
5062000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
507
508 * m68hc11.h: New file for support of Motorola 68hc11.
509
60a2978a
DC
510Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
511
512 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
513
68ab2dd9
DC
514Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
515
516 * avr.h: New file with AVR opcodes.
517
f0662e27
DL
518Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
519
520 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
521
b722f2be
AM
5222000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
523
524 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
525
f9e0cf0b
AM
5262000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
527
528 * i386.h: Use sl_FP, not sl_Suf for fild.
529
f660ee8b
FCE
5302000-05-16 Frank Ch. Eigler <fche@redhat.com>
531
532 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
533 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
534 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
535 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
536
558b0a60
AM
5372000-05-13 Alan Modra <alan@linuxcare.com.au>,
538
539 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
540
e413e4e9
AM
5412000-05-13 Alan Modra <alan@linuxcare.com.au>,
542 Alexander Sokolov <robocop@netlink.ru>
543
544 * i386.h (i386_optab): Add cpu_flags for all instructions.
545
5462000-05-13 Alan Modra <alan@linuxcare.com.au>
547
548 From Gavin Romig-Koch <gavin@cygnus.com>
549 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
550
5c84d377
TW
5512000-05-04 Timothy Wall <twall@cygnus.com>
552
553 * tic54x.h: New.
554
966f959b
C
5552000-05-03 J.T. Conklin <jtc@redback.com>
556
557 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
558 (PPC_OPERAND_VR): New operand flag for vector registers.
559
c5d05dbb
JL
5602000-05-01 Kazu Hirata <kazu@hxi.com>
561
562 * h8300.h (EOP): Add missing initializer.
563
a7fba0e0
JL
564Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
565
566 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
567 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
568 New operand types l,y,&,fe,fE,fx added to support above forms.
569 (pa_opcodes): Replaced usage of 'x' as source/target for
570 floating point double-word loads/stores with 'fx'.
571
800eeca4
JW
572Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
573 David Mosberger <davidm@hpl.hp.com>
574 Timothy Wall <twall@cygnus.com>
575 Jim Wilson <wilson@cygnus.com>
576
577 * ia64.h: New file.
578
ba23e138
NC
5792000-03-27 Nick Clifton <nickc@cygnus.com>
580
581 * d30v.h (SHORT_A1): Fix value.
582 (SHORT_AR): Renumber so that it is at the end of the list of short
583 instructions, not the end of the list of long instructions.
584
d0b47220
AM
5852000-03-26 Alan Modra <alan@linuxcare.com>
586
587 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
588 problem isn't really specific to Unixware.
589 (OLDGCC_COMPAT): Define.
590 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
591 destination %st(0).
592 Fix lots of comments.
593
866afedc
NC
5942000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
595
596 * d30v.h:
597 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
598 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
599 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
600 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
601 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
602 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
603 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
604
cc5ca5ce
AM
6052000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
606
607 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
608 fistpd without suffix.
609
68e324a2
NC
6102000-02-24 Nick Clifton <nickc@cygnus.com>
611
612 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
613 'signed_overflow_ok_p'.
614 Delete prototypes for cgen_set_flags() and cgen_get_flags().
615
60f036a2
AH
6162000-02-24 Andrew Haley <aph@cygnus.com>
617
618 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
619 (CGEN_CPU_TABLE): flags: new field.
620 Add prototypes for new functions.
d83c6548 621
9b9b5cd4
AM
6222000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
623
624 * i386.h: Add some more UNIXWARE_COMPAT comments.
625
5b93d8bb
AM
6262000-02-23 Linas Vepstas <linas@linas.org>
627
628 * i370.h: New file.
629
4f1d9bd8
NC
6302000-02-22 Chandra Chavva <cchavva@cygnus.com>
631
632 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
633 cannot be combined in parallel with ADD/SUBppp.
634
87f398dd
AH
6352000-02-22 Andrew Haley <aph@cygnus.com>
636
637 * mips.h: (OPCODE_IS_MEMBER): Add comment.
638
367c01af
AH
6391999-12-30 Andrew Haley <aph@cygnus.com>
640
9a1e79ca
AH
641 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
642 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
643 insns.
367c01af 644
add0c677
AM
6452000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
646
647 * i386.h: Qualify intel mode far call and jmp with x_Suf.
648
3138f287
AM
6491999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
650
651 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
652 indirect jumps and calls. Add FF/3 call for intel mode.
653
ccecd07b
JL
654Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
655
656 * mn10300.h: Add new operand types. Add new instruction formats.
657
b37e19e9
JL
658Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
659
660 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
661 instruction.
662
5fce5ddf
GRK
6631999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
664
665 * mips.h (INSN_ISA5): New.
666
2bd7f1f3
GRK
6671999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
668
669 * mips.h (OPCODE_IS_MEMBER): New.
670
4df2b5c5
NC
6711999-10-29 Nick Clifton <nickc@cygnus.com>
672
673 * d30v.h (SHORT_AR): Define.
674
446a06c9
MM
6751999-10-18 Michael Meissner <meissner@cygnus.com>
676
677 * alpha.h (alpha_num_opcodes): Convert to unsigned.
678 (alpha_num_operands): Ditto.
679
eca04c6a
JL
680Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
681
682 * hppa.h (pa_opcodes): Add load and store cache control to
683 instructions. Add ordered access load and store.
684
685 * hppa.h (pa_opcode): Add new entries for addb and addib.
686
687 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
688
689 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
690
c43185de
DN
691Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
692
693 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
694
ec3533da
JL
695Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
696
390f858d
JL
697 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
698 and "be" using completer prefixes.
699
8c47ebd9
JL
700 * hppa.h (pa_opcodes): Add initializers to silence compiler.
701
ec3533da
JL
702 * hppa.h: Update comments about character usage.
703
18369bea
JL
704Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
705
706 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
707 up the new fstw & bve instructions.
708
c36efdd2
JL
709Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
710
d3ffb032
JL
711 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
712 instructions.
713
c49ec3da
JL
714 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
715
5d2e7ecc
JL
716 * hppa.h (pa_opcodes): Add long offset double word load/store
717 instructions.
718
6397d1a2
JL
719 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
720 stores.
721
142f0fe0
JL
722 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
723
f5a68b45
JL
724 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
725
8235801e
JL
726 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
727
35184366
JL
728 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
729
f0bfde5e
JL
730 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
731
27bbbb58
JL
732 * hppa.h (pa_opcodes): Add support for "b,l".
733
c36efdd2
JL
734 * hppa.h (pa_opcodes): Add support for "b,gate".
735
f2727d04
JL
736Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
737
9392fb11 738 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 739 in xmpyu.
9392fb11 740
e0c52e99
JL
741 * hppa.h (pa_opcodes): Fix mask for probe and probei.
742
f2727d04
JL
743 * hppa.h (pa_opcodes): Fix mask for depwi.
744
52d836e2
JL
745Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
746
747 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
748 an explicit output argument.
749
90765e3a
JL
750Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
751
752 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
753 Add a few PA2.0 loads and store variants.
754
8340b17f
ILT
7551999-09-04 Steve Chamberlain <sac@pobox.com>
756
757 * pj.h: New file.
758
5f47d35b
AM
7591999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
760
761 * i386.h (i386_regtab): Move %st to top of table, and split off
762 other fp reg entries.
763 (i386_float_regtab): To here.
764
1c143202
JL
765Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
766
7d8fdb64
JL
767 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
768 by 'f'.
769
90927b9c
JL
770 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
771 Add supporting args.
772
1d16bf9c
JL
773 * hppa.h: Document new completers and args.
774 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
775 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
776 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
777 pmenb and pmdis.
778
96226a68
JL
779 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
780 hshr, hsub, mixh, mixw, permh.
781
5d4ba527
JL
782 * hppa.h (pa_opcodes): Change completers in instructions to
783 use 'c' prefix.
784
e9fc28c6
JL
785 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
786 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
787
1c143202
JL
788 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
789 fnegabs to use 'I' instead of 'F'.
790
9e525108
AM
7911999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
792
793 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
794 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
795 Alphabetically sort PIII insns.
796
e8da1bf1
DE
797Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
798
799 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
800
7d627258
JL
801Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
802
5696871a
JL
803 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
804 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
805
7d627258
JL
806 * hppa.h: Document 64 bit condition completers.
807
c5e52916
JL
808Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
809
810 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
811
eecb386c
AM
8121999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h (i386_optab): Add DefaultSize modifier to all insns
815 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
816 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
817
88a380f3
JL
818Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
819 Jeff Law <law@cygnus.com>
820
821 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
822
823 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 824
d83c6548 825 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
826 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
827
145cf1f0
AM
8281999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
829
830 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
831
73826640
JL
832Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
833
834 * hppa.h (struct pa_opcode): Add new field "flags".
835 (FLAGS_STRICT): Define.
836
b65db252
JL
837Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
838 Jeff Law <law@cygnus.com>
839
f7fc668b
JL
840 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
841
842 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 843
10084519
AM
8441999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
845
846 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
847 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
848 flag to fcomi and friends.
849
cd8a80ba
JL
850Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
851
852 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 853 integer logical instructions.
cd8a80ba 854
1fca749b
ILT
8551999-05-28 Linus Nordberg <linus.nordberg@canit.se>
856
857 * m68k.h: Document new formats `E', `G', `H' and new places `N',
858 `n', `o'.
859
860 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
861 and new places `m', `M', `h'.
862
aa008907
JL
863Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
864
865 * hppa.h (pa_opcodes): Add several processor specific system
866 instructions.
867
e26b85f0
JL
868Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
869
d83c6548 870 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
871 "addb", and "addib" to be used by the disassembler.
872
c608c12e
AM
8731999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
874
875 * i386.h (ReverseModrm): Remove all occurences.
876 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
877 movmskps, pextrw, pmovmskb, maskmovq.
878 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
879 ignore the data size prefix.
880
881 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
882 Mostly stolen from Doug Ledford <dledford@redhat.com>
883
45c18104
RH
884Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
885
886 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
887
252b5132
RH
8881999-04-14 Doug Evans <devans@casey.cygnus.com>
889
890 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
891 (CGEN_ATTR_TYPE): Update.
892 (CGEN_ATTR_MASK): Number booleans starting at 0.
893 (CGEN_ATTR_VALUE): Update.
894 (CGEN_INSN_ATTR): Update.
895
896Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
897
898 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
899 instructions.
900
901Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
902
903 * hppa.h (bb, bvb): Tweak opcode/mask.
904
905
9061999-03-22 Doug Evans <devans@casey.cygnus.com>
907
908 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
909 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
910 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
911 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
912 Delete member max_insn_size.
913 (enum cgen_cpu_open_arg): New enum.
914 (cpu_open): Update prototype.
915 (cpu_open_1): Declare.
916 (cgen_set_cpu): Delete.
917
9181999-03-11 Doug Evans <devans@casey.cygnus.com>
919
920 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
921 (CGEN_OPERAND_NIL): New macro.
922 (CGEN_OPERAND): New member `type'.
923 (@arch@_cgen_operand_table): Delete decl.
924 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
925 (CGEN_OPERAND_TABLE): New struct.
926 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
927 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
928 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
929 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
930 {get,set}_{int,vma}_operand.
931 (@arch@_cgen_cpu_open): New arg `isa'.
932 (cgen_set_cpu): Ditto.
933
934Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
935
936 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
937
9381999-02-25 Doug Evans <devans@casey.cygnus.com>
939
940 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
941 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
942 enum cgen_hw_type.
943 (CGEN_HW_TABLE): New struct.
944 (hw_table): Delete declaration.
945 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
946 to table entry to enum.
947 (CGEN_OPINST): Ditto.
948 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
949
950Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
951
952 * alpha.h (AXP_OPCODE_EV6): New.
953 (AXP_OPCODE_NOPAL): Include it.
954
9551999-02-09 Doug Evans <devans@casey.cygnus.com>
956
957 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
958 All uses updated. New members int_insn_p, max_insn_size,
959 parse_operand,insert_operand,extract_operand,print_operand,
960 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
961 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
962 extract_handlers,print_handlers.
963 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
964 (CGEN_ATTR_BOOL_OFFSET): New macro.
965 (CGEN_ATTR_MASK): Subtract it to compute bit number.
966 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
967 (cgen_opcode_handler): Renamed from cgen_base.
968 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
969 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
970 all uses updated.
971 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
972 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
973 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
974 (CGEN_OPCODE,CGEN_IBASE): New types.
975 (CGEN_INSN): Rewrite.
976 (CGEN_{ASM,DIS}_HASH*): Delete.
977 (init_opcode_table,init_ibld_table): Declare.
978 (CGEN_INSN_ATTR): New type.
979
980Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 981
252b5132
RH
982 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
983 (x_FP, d_FP, dls_FP, sldx_FP): Define.
984 Change *Suf definitions to include x and d suffixes.
985 (movsx): Use w_Suf and b_Suf.
986 (movzx): Likewise.
987 (movs): Use bwld_Suf.
988 (fld): Change ordering. Use sld_FP.
989 (fild): Add Intel Syntax equivalent of fildq.
990 (fst): Use sld_FP.
991 (fist): Use sld_FP.
992 (fstp): Use sld_FP. Add x_FP version.
993 (fistp): LLongMem version for Intel Syntax.
994 (fcom, fcomp): Use sld_FP.
995 (fadd, fiadd, fsub): Use sld_FP.
996 (fsubr): Use sld_FP.
997 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
998
9991999-01-27 Doug Evans <devans@casey.cygnus.com>
1000
1001 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1002 CGEN_MODE_UINT.
1003
e135f41b 10041999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1005
1006 * hppa.h (bv): Fix mask.
1007
10081999-01-05 Doug Evans <devans@casey.cygnus.com>
1009
1010 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1011 (CGEN_ATTR): Use it.
1012 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1013 (CGEN_ATTR_TABLE): New member dfault.
1014
10151998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1016
1017 * mips.h (MIPS16_INSN_BRANCH): New.
1018
1019Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1020
1021 The following is part of a change made by Edith Epstein
d83c6548
AJ
1022 <eepstein@sophia.cygnus.com> as part of a project to merge in
1023 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1024
1025 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1026 after.
252b5132
RH
1027
1028Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1029
1030 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1031 status word instructions.
252b5132
RH
1032
10331998-11-30 Doug Evans <devans@casey.cygnus.com>
1034
1035 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1036 (struct cgen_keyword_entry): Ditto.
1037 (struct cgen_operand): Ditto.
1038 (CGEN_IFLD): New typedef, with associated access macros.
1039 (CGEN_IFMT): New typedef, with associated access macros.
1040 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1041 (CGEN_IVALUE): New typedef.
1042 (struct cgen_insn): Delete const on syntax,attrs members.
1043 `format' now points to format data. Type of `value' is now
1044 CGEN_IVALUE.
1045 (struct cgen_opcode_table): New member ifld_table.
1046
10471998-11-18 Doug Evans <devans@casey.cygnus.com>
1048
1049 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1050 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1051 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1052 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1053 (cgen_opcode_table): Update type of dis_hash fn.
1054 (extract_operand): Update type of `insn_value' arg.
1055
1056Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1057
1058 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1059
1060Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1061
1062 * mips.h (INSN_MULT): Added.
1063
1064Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1065
1066 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1067
1068Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1069
1070 * cgen.h (CGEN_INSN_INT): New typedef.
1071 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1072 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1073 (CGEN_INSN_BYTES_PTR): New typedef.
1074 (CGEN_EXTRACT_INFO): New typedef.
1075 (cgen_insert_fn,cgen_extract_fn): Update.
1076 (cgen_opcode_table): New member `insn_endian'.
1077 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1078 (insert_operand,extract_operand): Update.
1079 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1080
1081Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1082
1083 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1084 (struct CGEN_HW_ENTRY): New member `attrs'.
1085 (CGEN_HW_ATTR): New macro.
1086 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1087 (CGEN_INSN_INVALID_P): New macro.
1088
1089Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1090
1091 * hppa.h: Add "fid".
d83c6548 1092
252b5132
RH
1093Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1094
1095 From Robert Andrew Dale <rob@nb.net>
1096 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1097 (AMD_3DNOW_OPCODE): Define.
1098
1099Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1100
1101 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1102
1103Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1104
1105 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1106
1107Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1108
1109 Move all global state data into opcode table struct, and treat
1110 opcode table as something that is "opened/closed".
1111 * cgen.h (CGEN_OPCODE_DESC): New type.
1112 (all fns): New first arg of opcode table descriptor.
1113 (cgen_set_parse_operand_fn): Add prototype.
1114 (cgen_current_machine,cgen_current_endian): Delete.
1115 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1116 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1117 dis_hash_table,dis_hash_table_entries.
1118 (opcode_open,opcode_close): Add prototypes.
1119
1120 * cgen.h (cgen_insn): New element `cdx'.
1121
1122Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1123
1124 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1125
1126Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1127
1128 * mn10300.h: Add "no_match_operands" field for instructions.
1129 (MN10300_MAX_OPERANDS): Define.
1130
1131Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1132
1133 * cgen.h (cgen_macro_insn_count): Declare.
1134
1135Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1136
1137 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1138 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1139 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1140 set_{int,vma}_operand.
1141
1142Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1143
1144 * mn10300.h: Add "machine" field for instructions.
1145 (MN103, AM30): Define machine types.
d83c6548 1146
252b5132
RH
1147Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1148
1149 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1150
11511998-06-18 Ulrich Drepper <drepper@cygnus.com>
1152
1153 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1154
1155Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1156
1157 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1158 and ud2b.
1159 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1160 those that happen to be implemented on pentiums.
1161
1162Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1163
1164 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1165 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1166 with Size16|IgnoreSize or Size32|IgnoreSize.
1167
1168Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1169
1170 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1171 (REPE): Rename to REPE_PREFIX_OPCODE.
1172 (i386_regtab_end): Remove.
1173 (i386_prefixtab, i386_prefixtab_end): Remove.
1174 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1175 of md_begin.
1176 (MAX_OPCODE_SIZE): Define.
1177 (i386_optab_end): Remove.
1178 (sl_Suf): Define.
1179 (sl_FP): Use sl_Suf.
1180
1181 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1182 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1183 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1184 data32, dword, and adword prefixes.
1185 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1186 regs.
1187
1188Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1189
1190 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1191
1192 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1193 register operands, because this is a common idiom. Flag them with
1194 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1195 fdivrp because gcc erroneously generates them. Also flag with a
1196 warning.
1197
1198 * i386.h: Add suffix modifiers to most insns, and tighter operand
1199 checks in some cases. Fix a number of UnixWare compatibility
1200 issues with float insns. Merge some floating point opcodes, using
1201 new FloatMF modifier.
1202 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1203 consistency.
1204
1205 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1206 IgnoreDataSize where appropriate.
1207
1208Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1209
1210 * i386.h: (one_byte_segment_defaults): Remove.
1211 (two_byte_segment_defaults): Remove.
1212 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1213
1214Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1215
1216 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1217 (cgen_hw_lookup_by_num): Declare.
1218
1219Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1220
1221 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1222 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1223
1224Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1225
1226 * cgen.h (cgen_asm_init_parse): Delete.
1227 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1228 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1229
1230Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1231
1232 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1233 (cgen_asm_finish_insn): Update prototype.
1234 (cgen_insn): New members num, data.
1235 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1236 dis_hash, dis_hash_table_size moved to ...
1237 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1238 All uses updated. New members asm_hash_p, dis_hash_p.
1239 (CGEN_MINSN_EXPANSION): New struct.
1240 (cgen_expand_macro_insn): Declare.
1241 (cgen_macro_insn_count): Declare.
1242 (get_insn_operands): Update prototype.
1243 (lookup_get_insn_operands): Declare.
1244
1245Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1246
1247 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1248 regKludge. Add operands types for string instructions.
1249
1250Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1251
1252 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1253 table.
1254
1255Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1256
1257 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1258 for `gettext'.
1259
1260Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1261
1262 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1263 Add IsString flag to string instructions.
1264 (IS_STRING): Don't define.
1265 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1266 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1267 (SS_PREFIX_OPCODE): Define.
1268
1269Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1270
1271 * i386.h: Revert March 24 patch; no more LinearAddress.
1272
1273Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1274
1275 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1276 instructions, and instead add FWait opcode modifier. Add short
1277 form of fldenv and fstenv.
1278 (FWAIT_OPCODE): Define.
1279
1280 * i386.h (i386_optab): Change second operand constraint of `mov
1281 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1282 allow legal instructions such as `movl %gs,%esi'
1283
1284Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1285
1286 * h8300.h: Various changes to fully bracket initializers.
1287
1288Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1289
1290 * i386.h: Set LinearAddress for lidt and lgdt.
1291
1292Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1293
1294 * cgen.h (CGEN_BOOL_ATTR): New macro.
1295
1296Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1297
1298 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1299
1300Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1301
1302 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1303 (cgen_insn): Record syntax and format entries here, rather than
1304 separately.
1305
1306Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1307
1308 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1309
1310Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1311
1312 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1313 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1314 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1315
1316Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1317
1318 * cgen.h (lookup_insn): New argument alias_p.
1319
1320Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1321
1322Fix rac to accept only a0:
1323 * d10v.h (OPERAND_ACC): Split into:
1324 (OPERAND_ACC0, OPERAND_ACC1) .
1325 (OPERAND_GPR): Define.
1326
1327Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1328
1329 * cgen.h (CGEN_FIELDS): Define here.
1330 (CGEN_HW_ENTRY): New member `type'.
1331 (hw_list): Delete decl.
1332 (enum cgen_mode): Declare.
1333 (CGEN_OPERAND): New member `hw'.
1334 (enum cgen_operand_instance_type): Declare.
1335 (CGEN_OPERAND_INSTANCE): New type.
1336 (CGEN_INSN): New member `operands'.
1337 (CGEN_OPCODE_DATA): Make hw_list const.
1338 (get_insn_operands,lookup_insn): Add prototypes for.
1339
1340Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1341
1342 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1343 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1344 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1345 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1346
1347Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1348
1349 * cgen.h: Correct typo in comment end marker.
1350
1351Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1352
1353 * tic30.h: New file.
1354
5a109b67 1355Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1356
1357 * cgen.h: Add prototypes for cgen_save_fixups(),
1358 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1359 of cgen_asm_finish_insn() to return a char *.
1360
1361Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1362
1363 * cgen.h: Formatting changes to improve readability.
1364
1365Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1366
1367 * cgen.h (*): Clean up pass over `struct foo' usage.
1368 (CGEN_ATTR): Make unsigned char.
1369 (CGEN_ATTR_TYPE): Update.
1370 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1371 (cgen_base): Move member `attrs' to cgen_insn.
1372 (CGEN_KEYWORD): New member `null_entry'.
1373 (CGEN_{SYNTAX,FORMAT}): New types.
1374 (cgen_insn): Format and syntax separated from each other.
1375
1376Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1377
1378 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1379 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1380 flags_{used,set} long.
1381 (d30v_operand): Make flags field long.
1382
1383Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1384
1385 * m68k.h: Fix comment describing operand types.
1386
1387Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1388
1389 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1390 everything else after down.
1391
1392Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1393
1394 * d10v.h (OPERAND_FLAG): Split into:
1395 (OPERAND_FFLAG, OPERAND_CFLAG) .
1396
1397Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1398
1399 * mips.h (struct mips_opcode): Changed comments to reflect new
1400 field usage.
1401
1402Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1403
1404 * mips.h: Added to comments a quick-ref list of all assigned
1405 operand type characters.
1406 (OP_{MASK,SH}_PERFREG): New macros.
1407
1408Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1409
1410 * sparc.h: Add '_' and '/' for v9a asr's.
1411 Patch from David Miller <davem@vger.rutgers.edu>
1412
1413Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1414
1415 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1416 area are not available in the base model (H8/300).
1417
1418Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1419
1420 * m68k.h: Remove documentation of ` operand specifier.
1421
1422Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1423
1424 * m68k.h: Document q and v operand specifiers.
1425
1426Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1427
1428 * v850.h (struct v850_opcode): Add processors field.
1429 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1430 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1431 (PROCESSOR_V850EA): New bit constants.
1432
1433Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1434
1435 Merge changes from Martin Hunt:
1436
1437 * d30v.h: Allow up to 64 control registers. Add
1438 SHORT_A5S format.
1439
1440 * d30v.h (LONG_Db): New form for delayed branches.
1441
1442 * d30v.h: (LONG_Db): New form for repeati.
1443
1444 * d30v.h (SHORT_D2B): New form.
1445
1446 * d30v.h (SHORT_A2): New form.
1447
1448 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1449 registers are used. Needed for VLIW optimization.
1450
1451Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1452
1453 * cgen.h: Move assembler interface section
1454 up so cgen_parse_operand_result is defined for cgen_parse_address.
1455 (cgen_parse_address): Update prototype.
1456
1457Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1458
1459 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1460
1461Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1462
1463 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1464 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1465 <paubert@iram.es>.
1466
1467 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1468 <paubert@iram.es>.
1469
1470 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1471 <paubert@iram.es>.
1472
1473 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1474 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1475
1476Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1477
1478 * v850.h (V850_NOT_R0): New flag.
1479
1480Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1481
1482 * v850.h (struct v850_opcode): Remove flags field.
1483
1484Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1485
1486 * v850.h (struct v850_opcode): Add flags field.
1487 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1488 fields.
1489 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1490 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1491
1492Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1493
1494 * arc.h: New file.
1495
1496Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1497
1498 * sparc.h (sparc_opcodes): Declare as const.
1499
1500Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1501
1502 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1503 uses single or double precision floating point resources.
1504 (INSN_NO_ISA, INSN_ISA1): Define.
1505 (cpu specific INSN macros): Tweak into bitmasks outside the range
1506 of INSN_ISA field.
1507
1508Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1509
1510 * i386.h: Fix pand opcode.
1511
1512Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1513
1514 * mips.h: Widen INSN_ISA and move it to a more convenient
1515 bit position. Add INSN_3900.
1516
1517Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1518
1519 * mips.h (struct mips_opcode): added new field membership.
1520
1521Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1522
1523 * i386.h (movd): only Reg32 is allowed.
1524
1525 * i386.h: add fcomp and ud2. From Wayne Scott
1526 <wscott@ichips.intel.com>.
1527
1528Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1529
1530 * i386.h: Add MMX instructions.
1531
1532Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1533
1534 * i386.h: Remove W modifier from conditional move instructions.
1535
1536Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1537
1538 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1539 with no arguments to match that generated by the UnixWare
1540 assembler.
1541
1542Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1543
1544 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1545 (cgen_parse_operand_fn): Declare.
1546 (cgen_init_parse_operand): Declare.
1547 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1548 new argument `want'.
1549 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1550 (enum cgen_parse_operand_type): New enum.
1551
1552Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1553
1554 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1555
1556Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1557
1558 * cgen.h: New file.
1559
1560Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1563 fdivrp.
1564
1565Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1566
1567 * v850.h (extract): Make unsigned.
1568
1569Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1570
1571 * i386.h: Add iclr.
1572
1573Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1574
1575 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1576 take a direction bit.
1577
1578Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1579
1580 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1581
1582Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1583
1584 * sparc.h: Include <ansidecl.h>. Update function declarations to
1585 use prototypes, and to use const when appropriate.
1586
1587Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1588
1589 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1590
1591Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1592
1593 * d10v.h: Change pre_defined_registers to
1594 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1595
1596Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1597
1598 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1599 Change mips_opcodes from const array to a pointer,
1600 and change bfd_mips_num_opcodes from const int to int,
1601 so that we can increase the size of the mips opcodes table
1602 dynamically.
1603
1604Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1605
1606 * d30v.h (FLAG_X): Remove unused flag.
1607
1608Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1609
1610 * d30v.h: New file.
1611
1612Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1613
1614 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1615 (PDS_VALUE): Macro to access value field of predefined symbols.
1616 (tic80_next_predefined_symbol): Add prototype.
1617
1618Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1619
1620 * tic80.h (tic80_symbol_to_value): Change prototype to match
1621 change in function, added class parameter.
1622
1623Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1624
1625 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1626 endmask fields, which are somewhat weird in that 0 and 32 are
1627 treated exactly the same.
1628
1629Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1630
1631 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1632 rather than a constant that is 2**X. Reorder them to put bits for
1633 operands that have symbolic names in the upper bits, so they can
1634 be packed into an int where the lower bits contain the value that
1635 corresponds to that symbolic name.
1636 (predefined_symbo): Add struct.
1637 (tic80_predefined_symbols): Declare array of translations.
1638 (tic80_num_predefined_symbols): Declare size of that array.
1639 (tic80_value_to_symbol): Declare function.
1640 (tic80_symbol_to_value): Declare function.
1641
1642Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1643
1644 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1645
1646Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1647
1648 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1649 be the destination register.
1650
1651Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1652
1653 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1654 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1655 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1656 that the opcode can have two vector instructions in a single
1657 32 bit word and we have to encode/decode both.
1658
1659Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1660
1661 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1662 TIC80_OPERAND_RELATIVE for PC relative.
1663 (TIC80_OPERAND_BASEREL): New flag bit for register
1664 base relative.
1665
1666Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1667
1668 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1669
1670Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1671
1672 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1673 ":s" modifier for scaling.
1674
1675Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1676
1677 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1678 (TIC80_OPERAND_M_LI): Ditto
1679
1680Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1681
1682 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1683 (TIC80_OPERAND_CC): New define for condition code operand.
1684 (TIC80_OPERAND_CR): New define for control register operand.
1685
1686Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1687
1688 * tic80.h (struct tic80_opcode): Name changed.
1689 (struct tic80_opcode): Remove format field.
1690 (struct tic80_operand): Add insertion and extraction functions.
1691 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1692 correct ones.
1693 (FMT_*): Ditto.
1694
1695Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1696
1697 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1698 type IV instruction offsets.
1699
1700Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1701
1702 * tic80.h: New file.
1703
1704Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1705
1706 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1707
1708Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1709
1710 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1711 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1712 * v850.h: Fix comment, v850_operand not powerpc_operand.
1713
1714Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1715
1716 * mn10200.h: Flesh out structures and definitions needed by
1717 the mn10200 assembler & disassembler.
1718
1719Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1720
1721 * mips.h: Add mips16 definitions.
1722
1723Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1724
1725 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1726
1727Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1728
1729 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1730 (MN10300_OPERAND_MEMADDR): Define.
1731
1732Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1733
1734 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1735
1736Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1737
1738 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1739
1740Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1741
1742 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1743
1744Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1745
1746 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1747
1748Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1749
1750 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1751 negative to minimize problems with shared libraries. Organize
1752 instruction subsets by AMASK extensions and PALcode
1753 implementation.
252b5132
RH
1754 (struct alpha_operand): Move flags slot for better packing.
1755
1756Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1757
1758 * v850.h (V850_OPERAND_RELAX): New operand flag.
1759
1760Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1761
1762 * mn10300.h (FMT_*): Move operand format definitions
1763 here.
1764
1765Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1766
1767 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1768
1769Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1770
1771 * mn10300.h (mn10300_opcode): Add "format" field.
1772 (MN10300_OPERAND_*): Define.
1773
1774Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1775
1776 * mn10x00.h: Delete.
1777 * mn10200.h, mn10300.h: New files.
1778
1779Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1780
1781 * mn10x00.h: New file.
1782
1783Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1784
1785 * v850.h: Add new flag to indicate this instruction uses a PC
1786 displacement.
1787
1788Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1789
1790 * h8300.h (stmac): Add missing instruction.
1791
1792Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1793
1794 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1795 field.
1796
1797Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1798
1799 * v850.h (V850_OPERAND_EP): Define.
1800
1801 * v850.h (v850_opcode): Add size field.
1802
1803Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1804
1805 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1806 to functions used to handle unusual operand encoding.
252b5132 1807 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1808 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1809
1810Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1811
1812 * v850.h (v850_operands): Add flags field.
1813 (OPERAND_REG, OPERAND_NUM): Defined.
1814
1815Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1816
1817 * v850.h: New file.
1818
1819Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1820
1821 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1822 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1823 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1824 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1825 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1826 Defined.
252b5132
RH
1827
1828Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1829
1830 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1831 a 3 bit space id instead of a 2 bit space id.
1832
1833Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1834
1835 * d10v.h: Add some additional defines to support the
d83c6548 1836 assembler in determining which operations can be done in parallel.
252b5132
RH
1837
1838Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1839
1840 * h8300.h (SN): Define.
1841 (eepmov.b): Renamed from "eepmov"
1842 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1843 with them.
1844
1845Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1846
1847 * d10v.h (OPERAND_SHIFT): New operand flag.
1848
1849Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1850
1851 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1852 signed numbers.
252b5132
RH
1853
1854Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1855
1856 * d10v.h (pd_reg): Define. Putting the definition here allows
1857 the assembler and disassembler to share the same struct.
1858
1859Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1860
1861 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1862 Williams <steve@icarus.com>.
1863
1864Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1865
1866 * d10v.h: New file.
1867
1868Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1869
1870 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1871
1872Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1873
d83c6548 1874 * m68k.h (mcf5200): New macro.
252b5132
RH
1875 Document names of coldfire control registers.
1876
1877Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1878
1879 * h8300.h (SRC_IN_DST): Define.
1880
1881 * h8300.h (UNOP3): Mark the register operand in this insn
1882 as a source operand, not a destination operand.
1883 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1884 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1885 register operand with SRC_IN_DST.
1886
1887Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1888
1889 * alpha.h: New file.
1890
1891Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1892
1893 * rs6k.h: Remove obsolete file.
1894
1895Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1896
1897 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1898 fdivp, and fdivrp. Add ffreep.
1899
1900Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1901
1902 * h8300.h: Reorder various #defines for readability.
1903 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1904 (BITOP): Accept additional (unused) argument. All callers changed.
1905 (EBITOP): Likewise.
1906 (O_LAST): Bump.
1907 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1908
1909 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1910 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1911 (BITOP, EBITOP): Handle new H8/S addressing modes for
1912 bit insns.
1913 (UNOP3): Handle new shift/rotate insns on the H8/S.
1914 (insns using exr): New instructions.
1915 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1916
1917Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1918
1919 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1920 was incorrect.
1921
1922Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1923
1924 * h8300.h (START): Remove.
1925 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1926 and mov.l insns that can be relaxed.
1927
1928Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1929
1930 * i386.h: Remove Abs32 from lcall.
1931
1932Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1933
1934 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1935 (SLCPOP): New macro.
1936 Mark X,Y opcode letters as in use.
1937
1938Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1939
1940 * sparc.h (F_FLOAT, F_FBR): Define.
1941
1942Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1943
1944 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1945 from all insns.
1946 (ABS8SRC,ABS8DST): Add ABS8MEM.
1947 (add.l): Fix reg+reg variant.
1948 (eepmov.w): Renamed from eepmovw.
1949 (ldc,stc): Fix many cases.
1950
1951Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1952
1953 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1954
1955Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1956
1957 * sparc.h (O): Mark operand letter as in use.
1958
1959Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1960
1961 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1962 Mark operand letters uU as in use.
1963
1964Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1965
1966 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1967 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1968 (SPARC_OPCODE_SUPPORTED): New macro.
1969 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1970 (F_NOTV9): Delete.
1971
1972Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1973
1974 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1975 declaration consistent with return type in definition.
1976
1977Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1978
1979 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1980
1981Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1982
1983 * i386.h (i386_regtab): Add 80486 test registers.
1984
1985Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1986
1987 * i960.h (I_HX): Define.
1988 (i960_opcodes): Add HX instruction.
1989
1990Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1991
1992 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1993 and fclex.
1994
1995Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1996
1997 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1998 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1999 (bfd_* defines): Delete.
2000 (sparc_opcode_archs): Replaces architecture_pname.
2001 (sparc_opcode_lookup_arch): Declare.
2002 (NUMOPCODES): Delete.
2003
2004Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2005
2006 * sparc.h (enum sparc_architecture): Add v9a.
2007 (ARCHITECTURES_CONFLICT_P): Update.
2008
2009Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2010
2011 * i386.h: Added Pentium Pro instructions.
2012
2013Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2014
2015 * m68k.h: Document new 'W' operand place.
2016
2017Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2018
2019 * hppa.h: Add lci and syncdma instructions.
2020
2021Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2022
2023 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2024 instructions.
252b5132
RH
2025
2026Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2027
2028 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2029 assembler's -mcom and -many switches.
2030
2031Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2032
2033 * i386.h: Fix cmpxchg8b extension opcode description.
2034
2035Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2036
2037 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2038 and register cr4.
2039
2040Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2041
2042 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2043
2044Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2045
2046 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2047
2048Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2049
2050 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2051
2052Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2053
2054 * m68kmri.h: Remove.
2055
2056 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2057 declarations. Remove F_ALIAS and flag field of struct
2058 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2059 int. Make name and args fields of struct m68k_opcode const.
2060
2061Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2062
2063 * sparc.h (F_NOTV9): Define.
2064
2065Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2066
2067 * mips.h (INSN_4010): Define.
2068
2069Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2070
2071 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2072
2073 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2074 * m68k.h: Fix argument descriptions of coprocessor
2075 instructions to allow only alterable operands where appropriate.
2076 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2077 (m68k_opcode_aliases): Add more aliases.
2078
2079Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2080
2081 * m68k.h: Added explcitly short-sized conditional branches, and a
2082 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2083 svr4-based configurations.
2084
2085Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2086
2087 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2088 * i386.h: added missing Data16/Data32 flags to a few instructions.
2089
2090Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2091
2092 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2093 (OP_MASK_BCC, OP_SH_BCC): Define.
2094 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2095 (OP_MASK_CCC, OP_SH_CCC): Define.
2096 (INSN_READ_FPR_R): Define.
2097 (INSN_RFE): Delete.
2098
2099Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2100
2101 * m68k.h (enum m68k_architecture): Deleted.
2102 (struct m68k_opcode_alias): New type.
2103 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2104 matching constraints, values and flags. As a side effect of this,
2105 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2106 as I know were never used, now may need re-examining.
2107 (numopcodes): Now const.
2108 (m68k_opcode_aliases, numaliases): New variables.
2109 (endop): Deleted.
2110 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2111 m68k_opcode_aliases; update declaration of m68k_opcodes.
2112
2113Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2114
2115 * hppa.h (delay_type): Delete unused enumeration.
2116 (pa_opcode): Replace unused delayed field with an architecture
2117 field.
2118 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2119
2120Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2121
2122 * mips.h (INSN_ISA4): Define.
2123
2124Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2125
2126 * mips.h (M_DLA_AB, M_DLI): Define.
2127
2128Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2129
2130 * hppa.h (fstwx): Fix single-bit error.
2131
2132Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2133
2134 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2135
2136Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2137
2138 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2139 debug registers. From Charles Hannum (mycroft@netbsd.org).
2140
2141Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2142
2143 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2144 i386 support:
2145 * i386.h (MOV_AX_DISP32): New macro.
2146 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2147 of several call/return instructions.
2148 (ADDR_PREFIX_OPCODE): New macro.
2149
2150Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2151
2152 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2153
4f1d9bd8
NC
2154 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2155 char.
252b5132
RH
2156 (struct vot, field `name'): ditto.
2157
2158Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2159
2160 * vax.h: Supply and properly group all values in end sentinel.
2161
2162Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2163
2164 * mips.h (INSN_ISA, INSN_4650): Define.
2165
2166Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2167
2168 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2169 systems with a separate instruction and data cache, such as the
2170 29040, these instructions take an optional argument.
2171
2172Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2173
2174 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2175 INSN_TRAP.
2176
2177Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2178
2179 * mips.h (INSN_STORE_MEMORY): Define.
2180
2181Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2182
2183 * sparc.h: Document new operand type 'x'.
2184
2185Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2186
2187 * i960.h (I_CX2): New instruction category. It includes
2188 instructions available on Cx and Jx processors.
2189 (I_JX): New instruction category, for JX-only instructions.
2190 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2191 Jx-only instructions, in I_JX category.
2192
2193Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2194
2195 * ns32k.h (endop): Made pointer const too.
2196
2197Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2198
2199 * ns32k.h: Drop Q operand type as there is no correct use
2200 for it. Add I and Z operand types which allow better checking.
2201
2202Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2203
2204 * h8300.h (xor.l) :fix bit pattern.
2205 (L_2): New size of operand.
2206 (trapa): Use it.
2207
2208Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2209
2210 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2211
2212Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2213
2214 * sparc.h: Include v9 definitions.
2215
2216Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2217
2218 * m68k.h (m68060): Defined.
2219 (m68040up, mfloat, mmmu): Include it.
2220 (struct m68k_opcode): Widen `arch' field.
2221 (m68k_opcodes): Updated for M68060. Removed comments that were
2222 instructions commented out by "JF" years ago.
2223
2224Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2225
2226 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2227 add a one-bit `flags' field.
2228 (F_ALIAS): New macro.
2229
2230Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2231
2232 * h8300.h (dec, inc): Get encoding right.
2233
2234Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2235
2236 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2237 a flag instead.
2238 (PPC_OPERAND_SIGNED): Define.
2239 (PPC_OPERAND_SIGNOPT): Define.
2240
2241Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2242
2243 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2244 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2245
2246Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2247
2248 * i386.h: Reverse last change. It'll be handled in gas instead.
2249
2250Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2251
2252 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2253 slower on the 486 and used the implicit shift count despite the
2254 explicit operand. The one-operand form is still available to get
2255 the shorter form with the implicit shift count.
2256
2257Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2258
2259 * hppa.h: Fix typo in fstws arg string.
2260
2261Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2262
2263 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2264
2265Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2266
2267 * ppc.h (PPC_OPCODE_601): Define.
2268
2269Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2270
2271 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2272 (so we can determine valid completers for both addb and addb[tf].)
2273
2274 * hppa.h (xmpyu): No floating point format specifier for the
2275 xmpyu instruction.
2276
2277Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2278
2279 * ppc.h (PPC_OPERAND_NEXT): Define.
2280 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2281 (struct powerpc_macro): Define.
2282 (powerpc_macros, powerpc_num_macros): Declare.
2283
2284Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2285
2286 * ppc.h: New file. Header file for PowerPC opcode table.
2287
2288Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2289
2290 * hppa.h: More minor template fixes for sfu and copr (to allow
2291 for easier disassembly).
2292
2293 * hppa.h: Fix templates for all the sfu and copr instructions.
2294
2295Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2296
2297 * i386.h (push): Permit Imm16 operand too.
2298
2299Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2300
2301 * h8300.h (andc): Exists in base arch.
2302
2303Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2304
2305 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2306 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2307
2308Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2309
2310 * hppa.h: Add FP quadword store instructions.
2311
2312Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2313
2314 * mips.h: (M_J_A): Added.
2315 (M_LA): Removed.
2316
2317Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2318
2319 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2320 <mellon@pepper.ncd.com>.
2321
2322Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2323
2324 * hppa.h: Immediate field in probei instructions is unsigned,
2325 not low-sign extended.
2326
2327Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2328
2329 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2330
2331Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2332
2333 * i386.h: Add "fxch" without operand.
2334
2335Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2336
2337 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2338
2339Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2340
2341 * hppa.h: Add gfw and gfr to the opcode table.
2342
2343Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2344
2345 * m88k.h: extended to handle m88110.
2346
2347Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2348
2349 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2350 addresses.
2351
2352Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2353
2354 * i960.h (i960_opcodes): Properly bracket initializers.
2355
2356Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2357
2358 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2359
2360Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2361
2362 * m68k.h (two): Protect second argument with parentheses.
2363
2364Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2365
2366 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2367 Deleted old in/out instructions in "#if 0" section.
2368
2369Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2370
2371 * i386.h (i386_optab): Properly bracket initializers.
2372
2373Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2374
2375 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2376 Jeff Law, law@cs.utah.edu).
2377
2378Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2379
2380 * i386.h (lcall): Accept Imm32 operand also.
2381
2382Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2383
2384 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2385 (M_DABS): Added.
2386
2387Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2388
2389 * mips.h (INSN_*): Changed values. Removed unused definitions.
2390 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2391 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2392 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2393 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2394 (M_*): Added new values for r6000 and r4000 macros.
2395 (ANY_DELAY): Removed.
2396
2397Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2398
2399 * mips.h: Added M_LI_S and M_LI_SS.
2400
2401Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2402
2403 * h8300.h: Get some rare mov.bs correct.
2404
2405Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2406
2407 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2408 been included.
2409
2410Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2411
2412 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2413 jump instructions, for use in disassemblers.
2414
2415Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2416
2417 * m88k.h: Make bitfields just unsigned, not unsigned long or
2418 unsigned short.
2419
2420Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2421
2422 * hppa.h: New argument type 'y'. Use in various float instructions.
2423
2424Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2425
2426 * hppa.h (break): First immediate field is unsigned.
2427
2428 * hppa.h: Add rfir instruction.
2429
2430Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2431
2432 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2433
2434Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2435
2436 * mips.h: Reworked the hazard information somewhat, and fixed some
2437 bugs in the instruction hazard descriptions.
2438
2439Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2440
2441 * m88k.h: Corrected a couple of opcodes.
2442
2443Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2444
2445 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2446 new version includes instruction hazard information, but is
2447 otherwise reasonably similar.
2448
2449Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2450
2451 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2452
2453Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2454
2455 Patches from Jeff Law, law@cs.utah.edu:
2456 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2457 Make the tables be the same for the following instructions:
2458 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2459 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2460 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2461 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2462 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2463 "fcmp", and "ftest".
2464
2465 * hppa.h: Make new and old tables the same for "break", "mtctl",
2466 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2467 Fix typo in last patch. Collapse several #ifdefs into a
2468 single #ifdef.
2469
2470 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2471 of the comments up-to-date.
2472
2473 * hppa.h: Update "free list" of letters and update
2474 comments describing each letter's function.
2475
4f1d9bd8
NC
2476Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2477
2478 * h8300.h: Lots of little fixes for the h8/300h.
2479
2480Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2481
2482 Support for H8/300-H
2483 * h8300.h: Lots of new opcodes.
2484
252b5132
RH
2485Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2486
2487 * h8300.h: checkpoint, includes H8/300-H opcodes.
2488
2489Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2490
2491 * Patches from Jeffrey Law <law@cs.utah.edu>.
2492 * hppa.h: Rework single precision FP
2493 instructions so that they correctly disassemble code
2494 PA1.1 code.
2495
2496Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2497
2498 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2499 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2500
2501Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2502
2503 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2504 gdb will define it for now.
2505
2506Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2507
2508 * sparc.h: Don't end enumerator list with comma.
2509
2510Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2511
2512 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2513 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2514 ("bc2t"): Correct typo.
2515 ("[ls]wc[023]"): Use T rather than t.
2516 ("c[0123]"): Define general coprocessor instructions.
2517
2518Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2519
2520 * m68k.h: Move split point for gcc compilation more towards
2521 middle.
2522
2523Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2524
2525 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2526 simply wrong, ics, rfi, & rfsvc were missing).
2527 Add "a" to opr_ext for "bb". Doc fix.
2528
2529Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2530
2531 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2532 * mips.h: Add casts, to suppress warnings about shifting too much.
2533 * m68k.h: Document the placement code '9'.
2534
2535Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2536
2537 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2538 allows callers to break up the large initialized struct full of
2539 opcodes into two half-sized ones. This permits GCC to compile
2540 this module, since it takes exponential space for initializers.
2541 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2542
2543Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2544
2545 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2546 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2547 initialized structs in it.
2548
2549Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2550
2551 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2552 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2553 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2554
2555Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2556
2557 * mips.h: document "i" and "j" operands correctly.
2558
2559Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2560
2561 * mips.h: Removed endianness dependency.
2562
2563Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2564
2565 * h8300.h: include info on number of cycles per instruction.
2566
2567Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2568
2569 * hppa.h: Move handy aliases to the front. Fix masks for extract
2570 and deposit instructions.
2571
2572Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2573
2574 * i386.h: accept shld and shrd both with and without the shift
2575 count argument, which is always %cl.
2576
2577Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2578
2579 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2580 (one_byte_segment_defaults, two_byte_segment_defaults,
2581 i386_prefixtab_end): Ditto.
2582
2583Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2584
2585 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2586 for operand 2; from John Carr, jfc@dsg.dec.com.
2587
2588Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2589
2590 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2591 always use 16-bit offsets. Makes calculated-size jump tables
2592 feasible.
2593
2594Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2595
2596 * i386.h: Fix one-operand forms of in* and out* patterns.
2597
2598Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2599
2600 * m68k.h: Added CPU32 support.
2601
2602Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2603
2604 * mips.h (break): Disassemble the argument. Patch from
2605 jonathan@cs.stanford.edu (Jonathan Stone).
2606
2607Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2608
2609 * m68k.h: merged Motorola and MIT syntax.
2610
2611Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2612
2613 * m68k.h (pmove): make the tests less strict, the 68k book is
2614 wrong.
2615
2616Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2617
2618 * m68k.h (m68ec030): Defined as alias for 68030.
2619 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2620 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2621 them. Tightened description of "fmovex" to distinguish it from
2622 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2623 up descriptions that claimed versions were available for chips not
2624 supporting them. Added "pmovefd".
2625
2626Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2627
2628 * m68k.h: fix where the . goes in divull
2629
2630Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2631
2632 * m68k.h: the cas2 instruction is supposed to be written with
2633 indirection on the last two operands, which can be either data or
2634 address registers. Added a new operand type 'r' which accepts
2635 either register type. Added new cases for cas2l and cas2w which
2636 use them. Corrected masks for cas2 which failed to recognize use
2637 of address register.
2638
2639Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2640
2641 * m68k.h: Merged in patches (mostly m68040-specific) from
2642 Colin Smith <colin@wrs.com>.
2643
2644 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2645 base). Also cleaned up duplicates, re-ordered instructions for
2646 the sake of dis-assembling (so aliases come after standard names).
2647 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2648
2649Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2650
2651 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2652 all missing .s
2653
2654Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2655
2656 * sparc.h: Moved tables to BFD library.
2657
2658 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2659
2660Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2661
2662 * h8300.h: Finish filling in all the holes in the opcode table,
2663 so that the Lucid C compiler can digest this as well...
2664
2665Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2666
2667 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2668 Fix opcodes on various sizes of fild/fist instructions
2669 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2670 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2671
2672Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2673
2674 * h8300.h: Fill in all the holes in the opcode table so that the
2675 losing HPUX C compiler can digest this...
2676
2677Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2678
2679 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2680 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2681
2682Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2683
2684 * sparc.h: Add new architecture variant sparclite; add its scan
2685 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2686
2687Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2688
2689 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2690 fy@lucid.com).
2691
2692Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2693
2694 * rs6k.h: New version from IBM (Metin).
2695
2696Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2697
2698 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2699 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2700
2701Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2702
2703 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2704
2705Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2706
2707 * m68k.h (one, two): Cast macro args to unsigned to suppress
2708 complaints from compiler and lint about integer overflow during
2709 shift.
2710
2711Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2712
2713 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2714
2715Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2716
2717 * mips.h: Make bitfield layout depend on the HOST compiler,
2718 not on the TARGET system.
2719
2720Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2721
2722 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2723 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2724 <TRANLE@INTELLICORP.COM>.
2725
2726Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2727
2728 * h8300.h: turned op_type enum into #define list
2729
2730Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2731
2732 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2733 similar instructions -- they've been renamed to "fitoq", etc.
2734 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2735 number of arguments.
2736 * h8300.h: Remove extra ; which produces compiler warning.
2737
2738Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2739
2740 * sparc.h: fix opcode for tsubcctv.
2741
2742Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2743
2744 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2745
2746Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2747
2748 * sparc.h (nop): Made the 'lose' field be even tighter,
2749 so only a standard 'nop' is disassembled as a nop.
2750
2751Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2752
2753 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2754 disassembled as a nop.
2755
4f1d9bd8
NC
2756Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2757
2758 * m68k.h, sparc.h: ANSIfy enums.
2759
252b5132
RH
2760Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2761
2762 * sparc.h: fix a typo.
2763
2764Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2765
2766 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2767 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2768 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2769
2770\f
2771Local Variables:
2772version-control: never
2773End:
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