2002-08-19 Elena Zannoni <ezannoni@redhat.com>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
030ad53b
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12002-08-13 Stephane Carrez <stcarrez@nerim.fr>
2
3 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
4 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
5 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
6 memory banks.
7 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
8
aec421e0
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92002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
10
11 * mips.h (INSN_MIPS16): New define.
12
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132002-07-08 Alan Modra <amodra@bigpond.net.au>
14
15 * i386.h: Remove IgnoreSize from movsx and movzx.
16
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172002-06-08 Alan Modra <amodra@bigpond.net.au>
18
19 * a29k.h: Replace CONST with const.
20 (CONST): Don't define.
21 * convex.h: Replace CONST with const.
22 (CONST): Don't define.
23 * dlx.h: Replace CONST with const.
24 * or32.h (CONST): Don't define.
25
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262002-05-30 Chris G. Demetriou <cgd@broadcom.com>
27
28 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
29 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
30 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
31 (INSN_MDMX): New constants, for MDMX support.
32 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
33
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342002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
35
36 * dlx.h: New file.
37
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382002-05-25 Alan Modra <amodra@bigpond.net.au>
39
40 * ia64.h: Use #include "" instead of <> for local header files.
41 * sparc.h: Likewise.
42
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TS
432002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
44
45 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
46
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472002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
48
49 * h8300.h: Corrected defs of all control regs
50 and eepmov instr.
51
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522002-04-11 Alan Modra <amodra@bigpond.net.au>
53
54 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 55 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 56
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572002-03-15 Chris G. Demetriou <cgd@broadcom.com>
58
59 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
60 instructions.
61 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
62 may be passed along with the ISA bitmask.
63
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642002-03-05 Paul Koning <pkoning@equallogic.com>
65
66 * pdp11.h: Add format codes for float instruction formats.
67
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682002-02-25 Alan Modra <amodra@bigpond.net.au>
69
70 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
71
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72Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
73
74 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
75
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76Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
77
78 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
79 (xchg): Fix.
80 (in, out): Disable 64bit operands.
81 (call, jmp): Avoid REX prefixes.
82 (jcxz): Prohibit in 64bit mode
83 (jrcxz, loop): Add 64bit variants.
84 (movq): Fix patterns.
85 (movmskps, pextrw, pinstrw): Add 64bit variants.
86
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872002-01-31 Ivan Guzvinec <ivang@opencores.org>
88
89 * or32.h: New file.
90
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912002-01-22 Graydon Hoare <graydon@redhat.com>
92
93 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
94 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
95
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962002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
97
98 * h8300.h: Comment typo fix.
99
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1002002-01-03 matthew green <mrg@redhat.com>
101
102 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
103 (PPC_OPCODE_BOOKE64): Likewise.
104
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105Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
106
107 * hppa.h (call, ret): Move to end of table.
108 (addb, addib): PA2.0 variants should have been PA2.0W.
109 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
110 happy.
111 (fldw, fldd, fstw, fstd, bb): Likewise.
112 (short loads/stores): Tweak format specifier slightly to keep
113 disassembler happy.
114 (indexed loads/stores): Likewise.
115 (absolute loads/stores): Likewise.
116
124ddbb2
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1172001-12-04 Alexandre Oliva <aoliva@redhat.com>
118
119 * d10v.h (OPERAND_NOSP): New macro.
120
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1212001-11-29 Alexandre Oliva <aoliva@redhat.com>
122
123 * d10v.h (OPERAND_SP): New macro.
124
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1252001-11-15 Alan Modra <amodra@bigpond.net.au>
126
127 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
128
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1292001-11-11 Timothy Wall <twall@alum.mit.edu>
130
131 * tic54x.h: Revise opcode layout; don't really need a separate
132 structure for parallel opcodes.
133
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AM
1342001-11-13 Zack Weinberg <zack@codesourcery.com>
135 Alan Modra <amodra@bigpond.net.au>
136
137 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
138 accept WordReg.
139
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1402001-11-04 Chris Demetriou <cgd@broadcom.com>
141
142 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
143
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NC
1442001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
145
146 * mmix.h: New file.
147
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CD
1482001-10-18 Chris Demetriou <cgd@broadcom.com>
149
150 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
151 of the expression, to make source code merging easier.
152
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CD
1532001-10-17 Chris Demetriou <cgd@broadcom.com>
154
155 * mips.h: Sort coprocessor instruction argument characters
156 in comment, add a few more words of description for "H".
157
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CD
1582001-10-17 Chris Demetriou <cgd@broadcom.com>
159
160 * mips.h (INSN_SB1): New cpu-specific instruction bit.
161 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
162 if cpu is CPU_SB1.
163
f5c120c5
MG
1642001-10-17 matthew green <mrg@redhat.com>
165
166 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
167
418c1742
MG
1682001-10-12 matthew green <mrg@redhat.com>
169
0716ce0d
MG
170 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
171 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
172 instructions, respectively.
418c1742 173
6ff2f2ba
NC
1742001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
175
176 * v850.h: Remove spurious comment.
177
015cf428
NC
1782001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
179
180 * h8300.h: Fix compile time warning messages
181
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RH
1822001-09-04 Richard Henderson <rth@redhat.com>
183
184 * alpha.h (struct alpha_operand): Pack elements into bitfields.
185
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1862001-08-31 Eric Christopher <echristo@redhat.com>
187
188 * mips.h: Remove CPU_MIPS32_4K.
189
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1902001-08-27 Torbjorn Granlund <tege@swox.com>
191
192 * ppc.h (PPC_OPERAND_DS): Define.
193
d83c6548
AJ
1942001-08-25 Andreas Jaeger <aj@suse.de>
195
196 * d30v.h: Fix declaration of reg_name_cnt.
197
198 * d10v.h: Fix declaration of d10v_reg_name_cnt.
199
200 * arc.h: Add prototypes from opcodes/arc-opc.c.
201
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TS
2022001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
203
204 * mips.h (INSN_10000): Define.
205 (OPCODE_IS_MEMBER): Check for INSN_10000.
206
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AM
2072001-08-10 Alan Modra <amodra@one.net.au>
208
209 * ppc.h: Revert 2001-08-08.
210
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2112001-08-10 Richard Sandiford <rsandifo@redhat.com>
212
213 * mips.h (INSN_GP32): Remove.
214 (OPCODE_IS_MEMBER): Remove gp32 parameter.
215 (M_MOVE): New macro identifier.
216
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AM
2172001-08-08 Alan Modra <amodra@one.net.au>
218
219 1999-10-25 Torbjorn Granlund <tege@swox.com>
220 * ppc.h (struct powerpc_operand): New field `reloc'.
221
3b16e843
NC
2222001-08-01 Aldy Hernandez <aldyh@redhat.com>
223
224 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
225
2262001-07-12 Jeff Johnston <jjohnstn@redhat.com>
227
228 * cgen.h (CGEN_INSN): Add regex support.
229 (build_insn_regex): Declare.
230
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FCE
2312001-07-11 Frank Ch. Eigler <fche@redhat.com>
232
233 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
234 (cgen_cpu_desc): Ditto.
235
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BE
2362001-07-07 Ben Elliston <bje@redhat.com>
237
238 * m88k.h: Clean up and reformat. Remove unused code.
239
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GK
2402001-06-14 Geoffrey Keating <geoffk@redhat.com>
241
242 * cgen.h (cgen_keyword): Add nonalpha_chars field.
243
d1cf510e
NC
2442001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
245
246 * mips.h (CPU_R12000): Define.
247
e281c457
JH
2482001-05-23 John Healy <jhealy@redhat.com>
249
250 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 251
aa5f19f2
NC
2522001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
253
254 * mips.h (INSN_ISA_MASK): Define.
255
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AM
2562001-05-12 Alan Modra <amodra@one.net.au>
257
258 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
259 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
260 and use InvMem as these insns must have register operands.
261
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AM
2622001-05-04 Alan Modra <amodra@one.net.au>
263
264 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
265 and pextrw to swap reg/rm assignments.
266
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HPN
2672001-04-05 Hans-Peter Nilsson <hp@axis.com>
268
269 * cris.h (enum cris_insn_version_usage): Correct comment for
270 cris_ver_v3p.
271
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AM
2722001-03-24 Alan Modra <alan@linuxcare.com.au>
273
274 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
275 Add InvMem to first operand of "maskmovdqu".
276
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HPN
2772001-03-22 Hans-Peter Nilsson <hp@axis.com>
278
279 * cris.h (ADD_PC_INCR_OPCODE): New macro.
280
361bfa20
KH
2812001-03-21 Kazu Hirata <kazu@hxi.com>
282
283 * h8300.h: Fix formatting.
284
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2852001-03-22 Alan Modra <alan@linuxcare.com.au>
286
287 * i386.h (i386_optab): Add paddq, psubq.
288
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AM
2892001-03-19 Alan Modra <alan@linuxcare.com.au>
290
291 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
292
80a523c2
NC
2932001-02-28 Igor Shevlyakov <igor@windriver.com>
294
295 * m68k.h: new defines for Coldfire V4. Update mcf to know
296 about mcf5407.
297
e135f41b
NC
2982001-02-18 lars brinkhoff <lars@nocrew.org>
299
300 * pdp11.h: New file.
301
3022001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
303
304 * i386.h (i386_optab): SSE integer converison instructions have
305 64bit versions on x86-64.
306
8eaec934
NC
3072001-02-10 Nick Clifton <nickc@redhat.com>
308
309 * mips.h: Remove extraneous whitespace. Formating change to allow
310 for future contribution.
311
a85d7ed0
NC
3122001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
313
314 * s390.h: New file.
315
0715dc88
PM
3162001-02-02 Patrick Macdonald <patrickm@redhat.com>
317
318 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
319 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
320 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
321
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AM
3222001-01-24 Karsten Keil <kkeil@suse.de>
323
324 * i386.h (i386_optab): Fix swapgs
325
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3262001-01-14 Alan Modra <alan@linuxcare.com.au>
327
328 * hppa.h: Describe new '<' and '>' operand types, and tidy
329 existing comments.
330 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
331 Remove duplicate "ldw j(s,b),x". Sort some entries.
332
e135f41b 3332001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
334
335 * i386.h (i386_optab): Fix pusha and ret templates.
336
0d2bcfaf
NC
3372001-01-11 Peter Targett <peter.targett@arccores.com>
338
339 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
340 definitions for masking cpu type.
341 (arc_ext_operand_value) New structure for storing extended
342 operands.
343 (ARC_OPERAND_*) Flags for operand values.
344
3452001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
346
347 * i386.h (pinsrw): Add.
348 (pshufw): Remove.
349 (cvttpd2dq): Fix operands.
350 (cvttps2dq): Likewise.
351 (movq2q): Rename to movdq2q.
352
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AM
3532001-01-10 Richard Schaal <richard.schaal@intel.com>
354
355 * i386.h: Correct movnti instruction.
356
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JJ
3572001-01-09 Jeff Johnston <jjohnstn@redhat.com>
358
359 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
360 of operands (unsigned char or unsigned short).
361 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
362 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
363
0d2bcfaf 3642001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
365
366 * i386.h (i386_optab): Make [sml]fence template to use immext field.
367
0d2bcfaf 3682001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
369
370 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
371 introduced by Pentium4
372
0d2bcfaf 3732000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
374
375 * i386.h (i386_optab): Add "rex*" instructions;
376 add swapgs; disable jmp/call far direct instructions for
377 64bit mode; add syscall and sysret; disable registers for 0xc6
378 template. Add 'q' suffixes to extendable instructions, disable
079966a8 379 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
380 (i386_regtab): Add extended registers.
381 (*Suf): Add No_qSuf.
382 (q_Suf, wlq_Suf, bwlq_Suf): New.
383
0d2bcfaf 3842000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
385
386 * i386.h (i386_optab): Replace "Imm" with "EncImm".
387 (i386_regtab): Add flags field.
d83c6548 388
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NC
3892000-12-12 Nick Clifton <nickc@redhat.com>
390
391 * mips.h: Fix formatting.
392
4372b673
NC
3932000-12-01 Chris Demetriou <cgd@sibyte.com>
394
395 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
396 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
397 OP_*_SYSCALL definitions.
398 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
399 19 bit wait codes.
400 (MIPS operand specifier comments): Remove 'm', add 'U' and
401 'J', and update the meaning of 'B' so that it's more general.
402
e7af610e
NC
403 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
404 INSN_ISA5): Renumber, redefine to mean the ISA at which the
405 instruction was added.
406 (INSN_ISA32): New constant.
407 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
408 Renumber to avoid new and/or renumbered INSN_* constants.
409 (INSN_MIPS32): Delete.
410 (ISA_UNKNOWN): New constant to indicate unknown ISA.
411 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
412 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 413 constants available at that ISA level.
e7af610e
NC
414 (CPU_UNKNOWN): New constant to indicate unknown CPU.
415 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
416 define it with a unique value.
417 (OPCODE_IS_MEMBER): Update for new ISA membership-related
418 constant meanings.
419
84ea6cf2 420 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 421 definitions.
84ea6cf2 422
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NC
423 * mips.h (CPU_SB1): New constant.
424
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JJ
4252000-10-20 Jakub Jelinek <jakub@redhat.com>
426
427 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
428 Note that '3' is used for siam operand.
429
139368c9
JW
4302000-09-22 Jim Wilson <wilson@cygnus.com>
431
432 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
433
156c2f8b 4342000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 435
156c2f8b
NC
436 * mips.h: Use defines instead of hard-coded processor numbers.
437 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 438 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
439 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
440 CPU_4KC, CPU_4KM, CPU_4KP): Define..
441 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 442 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 443 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
444 Add 'P' to used characters.
445 Use 'H' for coprocessor select field.
156c2f8b 446 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
447 Document new arg characters and add to used characters.
448 (INSN_MIPS32): New define for MIPS32 extensions.
449 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 450
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4512000-09-05 Alan Modra <alan@linuxcare.com.au>
452
453 * hppa.h: Mention cz completer.
454
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JW
4552000-08-16 Jim Wilson <wilson@cygnus.com>
456
457 * ia64.h (IA64_OPCODE_POSTINC): New.
458
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L
4592000-08-15 H.J. Lu <hjl@gnu.org>
460
461 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
462 IgnoreSize change.
463
4f1d9bd8
NC
4642000-08-08 Jason Eckhardt <jle@cygnus.com>
465
466 * i860.h: Small formatting adjustments.
467
45ee1401
DC
4682000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
469
470 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
471 Move related opcodes closer to each other.
472 Minor changes in comments, list undefined opcodes.
473
9d551405
DB
4742000-07-26 Dave Brolley <brolley@redhat.com>
475
476 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
477
4f1d9bd8
NC
4782000-07-22 Jason Eckhardt <jle@cygnus.com>
479
480 * i860.h (btne, bte, bla): Changed these opcodes
481 to use sbroff ('r') instead of split16 ('s').
482 (J, K, L, M): New operand types for 16-bit aligned fields.
483 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
484 use I, J, K, L, M instead of just I.
485 (T, U): New operand types for split 16-bit aligned fields.
486 (st.x): Changed these opcodes to use S, T, U instead of just S.
487 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
488 exist on the i860.
489 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
490 (pfeq.ss, pfeq.dd): New opcodes.
491 (st.s): Fixed incorrect mask bits.
492 (fmlow): Fixed incorrect mask bits.
493 (fzchkl, pfzchkl): Fixed incorrect mask bits.
494 (faddz, pfaddz): Fixed incorrect mask bits.
495 (form, pform): Fixed incorrect mask bits.
496 (pfld.l): Fixed incorrect mask bits.
497 (fst.q): Fixed incorrect mask bits.
498 (all floating point opcodes): Fixed incorrect mask bits for
499 handling of dual bit.
500
c8488617
HPN
5012000-07-20 Hans-Peter Nilsson <hp@axis.com>
502
503 cris.h: New file.
504
65aa24b6
NC
5052000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
506
507 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
508 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
509 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
510 (AVR_ISA_M83): Define for ATmega83, ATmega85.
511 (espm): Remove, because ESPM removed in databook update.
512 (eicall, eijmp): Move to the end of opcode table.
513
60bcf0fa
NC
5142000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
515
516 * m68hc11.h: New file for support of Motorola 68hc11.
517
60a2978a
DC
518Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
519
520 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
521
68ab2dd9
DC
522Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
523
524 * avr.h: New file with AVR opcodes.
525
f0662e27
DL
526Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
527
528 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
529
b722f2be
AM
5302000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
531
532 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
533
f9e0cf0b
AM
5342000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
535
536 * i386.h: Use sl_FP, not sl_Suf for fild.
537
f660ee8b
FCE
5382000-05-16 Frank Ch. Eigler <fche@redhat.com>
539
540 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
541 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
542 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
543 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
544
558b0a60
AM
5452000-05-13 Alan Modra <alan@linuxcare.com.au>,
546
547 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
548
e413e4e9
AM
5492000-05-13 Alan Modra <alan@linuxcare.com.au>,
550 Alexander Sokolov <robocop@netlink.ru>
551
552 * i386.h (i386_optab): Add cpu_flags for all instructions.
553
5542000-05-13 Alan Modra <alan@linuxcare.com.au>
555
556 From Gavin Romig-Koch <gavin@cygnus.com>
557 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
558
5c84d377
TW
5592000-05-04 Timothy Wall <twall@cygnus.com>
560
561 * tic54x.h: New.
562
966f959b
C
5632000-05-03 J.T. Conklin <jtc@redback.com>
564
565 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
566 (PPC_OPERAND_VR): New operand flag for vector registers.
567
c5d05dbb
JL
5682000-05-01 Kazu Hirata <kazu@hxi.com>
569
570 * h8300.h (EOP): Add missing initializer.
571
a7fba0e0
JL
572Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
573
574 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
575 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
576 New operand types l,y,&,fe,fE,fx added to support above forms.
577 (pa_opcodes): Replaced usage of 'x' as source/target for
578 floating point double-word loads/stores with 'fx'.
579
800eeca4
JW
580Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
581 David Mosberger <davidm@hpl.hp.com>
582 Timothy Wall <twall@cygnus.com>
583 Jim Wilson <wilson@cygnus.com>
584
585 * ia64.h: New file.
586
ba23e138
NC
5872000-03-27 Nick Clifton <nickc@cygnus.com>
588
589 * d30v.h (SHORT_A1): Fix value.
590 (SHORT_AR): Renumber so that it is at the end of the list of short
591 instructions, not the end of the list of long instructions.
592
d0b47220
AM
5932000-03-26 Alan Modra <alan@linuxcare.com>
594
595 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
596 problem isn't really specific to Unixware.
597 (OLDGCC_COMPAT): Define.
598 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
599 destination %st(0).
600 Fix lots of comments.
601
866afedc
NC
6022000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
603
604 * d30v.h:
605 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
606 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
607 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
608 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
609 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
610 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
611 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
612
cc5ca5ce
AM
6132000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
614
615 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
616 fistpd without suffix.
617
68e324a2
NC
6182000-02-24 Nick Clifton <nickc@cygnus.com>
619
620 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
621 'signed_overflow_ok_p'.
622 Delete prototypes for cgen_set_flags() and cgen_get_flags().
623
60f036a2
AH
6242000-02-24 Andrew Haley <aph@cygnus.com>
625
626 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
627 (CGEN_CPU_TABLE): flags: new field.
628 Add prototypes for new functions.
d83c6548 629
9b9b5cd4
AM
6302000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
631
632 * i386.h: Add some more UNIXWARE_COMPAT comments.
633
5b93d8bb
AM
6342000-02-23 Linas Vepstas <linas@linas.org>
635
636 * i370.h: New file.
637
4f1d9bd8
NC
6382000-02-22 Chandra Chavva <cchavva@cygnus.com>
639
640 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
641 cannot be combined in parallel with ADD/SUBppp.
642
87f398dd
AH
6432000-02-22 Andrew Haley <aph@cygnus.com>
644
645 * mips.h: (OPCODE_IS_MEMBER): Add comment.
646
367c01af
AH
6471999-12-30 Andrew Haley <aph@cygnus.com>
648
9a1e79ca
AH
649 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
650 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
651 insns.
367c01af 652
add0c677
AM
6532000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
654
655 * i386.h: Qualify intel mode far call and jmp with x_Suf.
656
3138f287
AM
6571999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
658
659 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
660 indirect jumps and calls. Add FF/3 call for intel mode.
661
ccecd07b
JL
662Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
663
664 * mn10300.h: Add new operand types. Add new instruction formats.
665
b37e19e9
JL
666Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
667
668 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
669 instruction.
670
5fce5ddf
GRK
6711999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
672
673 * mips.h (INSN_ISA5): New.
674
2bd7f1f3
GRK
6751999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
676
677 * mips.h (OPCODE_IS_MEMBER): New.
678
4df2b5c5
NC
6791999-10-29 Nick Clifton <nickc@cygnus.com>
680
681 * d30v.h (SHORT_AR): Define.
682
446a06c9
MM
6831999-10-18 Michael Meissner <meissner@cygnus.com>
684
685 * alpha.h (alpha_num_opcodes): Convert to unsigned.
686 (alpha_num_operands): Ditto.
687
eca04c6a
JL
688Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
689
690 * hppa.h (pa_opcodes): Add load and store cache control to
691 instructions. Add ordered access load and store.
692
693 * hppa.h (pa_opcode): Add new entries for addb and addib.
694
695 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
696
697 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
698
c43185de
DN
699Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
700
701 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
702
ec3533da
JL
703Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
704
390f858d
JL
705 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
706 and "be" using completer prefixes.
707
8c47ebd9
JL
708 * hppa.h (pa_opcodes): Add initializers to silence compiler.
709
ec3533da
JL
710 * hppa.h: Update comments about character usage.
711
18369bea
JL
712Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
713
714 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
715 up the new fstw & bve instructions.
716
c36efdd2
JL
717Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
718
d3ffb032
JL
719 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
720 instructions.
721
c49ec3da
JL
722 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
723
5d2e7ecc
JL
724 * hppa.h (pa_opcodes): Add long offset double word load/store
725 instructions.
726
6397d1a2
JL
727 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
728 stores.
729
142f0fe0
JL
730 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
731
f5a68b45
JL
732 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
733
8235801e
JL
734 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
735
35184366
JL
736 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
737
f0bfde5e
JL
738 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
739
27bbbb58
JL
740 * hppa.h (pa_opcodes): Add support for "b,l".
741
c36efdd2
JL
742 * hppa.h (pa_opcodes): Add support for "b,gate".
743
f2727d04
JL
744Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
745
9392fb11 746 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 747 in xmpyu.
9392fb11 748
e0c52e99
JL
749 * hppa.h (pa_opcodes): Fix mask for probe and probei.
750
f2727d04
JL
751 * hppa.h (pa_opcodes): Fix mask for depwi.
752
52d836e2
JL
753Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
754
755 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
756 an explicit output argument.
757
90765e3a
JL
758Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
759
760 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
761 Add a few PA2.0 loads and store variants.
762
8340b17f
ILT
7631999-09-04 Steve Chamberlain <sac@pobox.com>
764
765 * pj.h: New file.
766
5f47d35b
AM
7671999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
768
769 * i386.h (i386_regtab): Move %st to top of table, and split off
770 other fp reg entries.
771 (i386_float_regtab): To here.
772
1c143202
JL
773Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
774
7d8fdb64
JL
775 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
776 by 'f'.
777
90927b9c
JL
778 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
779 Add supporting args.
780
1d16bf9c
JL
781 * hppa.h: Document new completers and args.
782 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
783 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
784 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
785 pmenb and pmdis.
786
96226a68
JL
787 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
788 hshr, hsub, mixh, mixw, permh.
789
5d4ba527
JL
790 * hppa.h (pa_opcodes): Change completers in instructions to
791 use 'c' prefix.
792
e9fc28c6
JL
793 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
794 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
795
1c143202
JL
796 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
797 fnegabs to use 'I' instead of 'F'.
798
9e525108
AM
7991999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
800
801 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
802 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
803 Alphabetically sort PIII insns.
804
e8da1bf1
DE
805Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
806
807 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
808
7d627258
JL
809Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
810
5696871a
JL
811 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
812 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
813
7d627258
JL
814 * hppa.h: Document 64 bit condition completers.
815
c5e52916
JL
816Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
817
818 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
819
eecb386c
AM
8201999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
821
822 * i386.h (i386_optab): Add DefaultSize modifier to all insns
823 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
824 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
825
88a380f3
JL
826Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
827 Jeff Law <law@cygnus.com>
828
829 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
830
831 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 832
d83c6548 833 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
834 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
835
145cf1f0
AM
8361999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
837
838 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
839
73826640
JL
840Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
841
842 * hppa.h (struct pa_opcode): Add new field "flags".
843 (FLAGS_STRICT): Define.
844
b65db252
JL
845Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
846 Jeff Law <law@cygnus.com>
847
f7fc668b
JL
848 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
849
850 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 851
10084519
AM
8521999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
853
854 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
855 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
856 flag to fcomi and friends.
857
cd8a80ba
JL
858Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
859
860 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 861 integer logical instructions.
cd8a80ba 862
1fca749b
ILT
8631999-05-28 Linus Nordberg <linus.nordberg@canit.se>
864
865 * m68k.h: Document new formats `E', `G', `H' and new places `N',
866 `n', `o'.
867
868 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
869 and new places `m', `M', `h'.
870
aa008907
JL
871Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
872
873 * hppa.h (pa_opcodes): Add several processor specific system
874 instructions.
875
e26b85f0
JL
876Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
877
d83c6548 878 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
879 "addb", and "addib" to be used by the disassembler.
880
c608c12e
AM
8811999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
882
883 * i386.h (ReverseModrm): Remove all occurences.
884 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
885 movmskps, pextrw, pmovmskb, maskmovq.
886 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
887 ignore the data size prefix.
888
889 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
890 Mostly stolen from Doug Ledford <dledford@redhat.com>
891
45c18104
RH
892Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
893
894 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
895
252b5132
RH
8961999-04-14 Doug Evans <devans@casey.cygnus.com>
897
898 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
899 (CGEN_ATTR_TYPE): Update.
900 (CGEN_ATTR_MASK): Number booleans starting at 0.
901 (CGEN_ATTR_VALUE): Update.
902 (CGEN_INSN_ATTR): Update.
903
904Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
905
906 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
907 instructions.
908
909Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
910
911 * hppa.h (bb, bvb): Tweak opcode/mask.
912
913
9141999-03-22 Doug Evans <devans@casey.cygnus.com>
915
916 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
917 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
918 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
919 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
920 Delete member max_insn_size.
921 (enum cgen_cpu_open_arg): New enum.
922 (cpu_open): Update prototype.
923 (cpu_open_1): Declare.
924 (cgen_set_cpu): Delete.
925
9261999-03-11 Doug Evans <devans@casey.cygnus.com>
927
928 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
929 (CGEN_OPERAND_NIL): New macro.
930 (CGEN_OPERAND): New member `type'.
931 (@arch@_cgen_operand_table): Delete decl.
932 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
933 (CGEN_OPERAND_TABLE): New struct.
934 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
935 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
936 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
937 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
938 {get,set}_{int,vma}_operand.
939 (@arch@_cgen_cpu_open): New arg `isa'.
940 (cgen_set_cpu): Ditto.
941
942Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
943
944 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
945
9461999-02-25 Doug Evans <devans@casey.cygnus.com>
947
948 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
949 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
950 enum cgen_hw_type.
951 (CGEN_HW_TABLE): New struct.
952 (hw_table): Delete declaration.
953 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
954 to table entry to enum.
955 (CGEN_OPINST): Ditto.
956 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
957
958Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
959
960 * alpha.h (AXP_OPCODE_EV6): New.
961 (AXP_OPCODE_NOPAL): Include it.
962
9631999-02-09 Doug Evans <devans@casey.cygnus.com>
964
965 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
966 All uses updated. New members int_insn_p, max_insn_size,
967 parse_operand,insert_operand,extract_operand,print_operand,
968 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
969 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
970 extract_handlers,print_handlers.
971 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
972 (CGEN_ATTR_BOOL_OFFSET): New macro.
973 (CGEN_ATTR_MASK): Subtract it to compute bit number.
974 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
975 (cgen_opcode_handler): Renamed from cgen_base.
976 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
977 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
978 all uses updated.
979 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
980 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
981 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
982 (CGEN_OPCODE,CGEN_IBASE): New types.
983 (CGEN_INSN): Rewrite.
984 (CGEN_{ASM,DIS}_HASH*): Delete.
985 (init_opcode_table,init_ibld_table): Declare.
986 (CGEN_INSN_ATTR): New type.
987
988Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 989
252b5132
RH
990 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
991 (x_FP, d_FP, dls_FP, sldx_FP): Define.
992 Change *Suf definitions to include x and d suffixes.
993 (movsx): Use w_Suf and b_Suf.
994 (movzx): Likewise.
995 (movs): Use bwld_Suf.
996 (fld): Change ordering. Use sld_FP.
997 (fild): Add Intel Syntax equivalent of fildq.
998 (fst): Use sld_FP.
999 (fist): Use sld_FP.
1000 (fstp): Use sld_FP. Add x_FP version.
1001 (fistp): LLongMem version for Intel Syntax.
1002 (fcom, fcomp): Use sld_FP.
1003 (fadd, fiadd, fsub): Use sld_FP.
1004 (fsubr): Use sld_FP.
1005 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1006
10071999-01-27 Doug Evans <devans@casey.cygnus.com>
1008
1009 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1010 CGEN_MODE_UINT.
1011
e135f41b 10121999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1013
1014 * hppa.h (bv): Fix mask.
1015
10161999-01-05 Doug Evans <devans@casey.cygnus.com>
1017
1018 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1019 (CGEN_ATTR): Use it.
1020 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1021 (CGEN_ATTR_TABLE): New member dfault.
1022
10231998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1024
1025 * mips.h (MIPS16_INSN_BRANCH): New.
1026
1027Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1028
1029 The following is part of a change made by Edith Epstein
d83c6548
AJ
1030 <eepstein@sophia.cygnus.com> as part of a project to merge in
1031 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1032
1033 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1034 after.
252b5132
RH
1035
1036Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1037
1038 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1039 status word instructions.
252b5132
RH
1040
10411998-11-30 Doug Evans <devans@casey.cygnus.com>
1042
1043 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1044 (struct cgen_keyword_entry): Ditto.
1045 (struct cgen_operand): Ditto.
1046 (CGEN_IFLD): New typedef, with associated access macros.
1047 (CGEN_IFMT): New typedef, with associated access macros.
1048 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1049 (CGEN_IVALUE): New typedef.
1050 (struct cgen_insn): Delete const on syntax,attrs members.
1051 `format' now points to format data. Type of `value' is now
1052 CGEN_IVALUE.
1053 (struct cgen_opcode_table): New member ifld_table.
1054
10551998-11-18 Doug Evans <devans@casey.cygnus.com>
1056
1057 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1058 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1059 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1060 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1061 (cgen_opcode_table): Update type of dis_hash fn.
1062 (extract_operand): Update type of `insn_value' arg.
1063
1064Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1065
1066 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1067
1068Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1069
1070 * mips.h (INSN_MULT): Added.
1071
1072Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1073
1074 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1075
1076Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1077
1078 * cgen.h (CGEN_INSN_INT): New typedef.
1079 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1080 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1081 (CGEN_INSN_BYTES_PTR): New typedef.
1082 (CGEN_EXTRACT_INFO): New typedef.
1083 (cgen_insert_fn,cgen_extract_fn): Update.
1084 (cgen_opcode_table): New member `insn_endian'.
1085 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1086 (insert_operand,extract_operand): Update.
1087 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1088
1089Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1090
1091 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1092 (struct CGEN_HW_ENTRY): New member `attrs'.
1093 (CGEN_HW_ATTR): New macro.
1094 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1095 (CGEN_INSN_INVALID_P): New macro.
1096
1097Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1098
1099 * hppa.h: Add "fid".
d83c6548 1100
252b5132
RH
1101Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1102
1103 From Robert Andrew Dale <rob@nb.net>
1104 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1105 (AMD_3DNOW_OPCODE): Define.
1106
1107Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1108
1109 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1110
1111Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1112
1113 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1114
1115Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1116
1117 Move all global state data into opcode table struct, and treat
1118 opcode table as something that is "opened/closed".
1119 * cgen.h (CGEN_OPCODE_DESC): New type.
1120 (all fns): New first arg of opcode table descriptor.
1121 (cgen_set_parse_operand_fn): Add prototype.
1122 (cgen_current_machine,cgen_current_endian): Delete.
1123 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1124 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1125 dis_hash_table,dis_hash_table_entries.
1126 (opcode_open,opcode_close): Add prototypes.
1127
1128 * cgen.h (cgen_insn): New element `cdx'.
1129
1130Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1131
1132 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1133
1134Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1135
1136 * mn10300.h: Add "no_match_operands" field for instructions.
1137 (MN10300_MAX_OPERANDS): Define.
1138
1139Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1140
1141 * cgen.h (cgen_macro_insn_count): Declare.
1142
1143Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1144
1145 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1146 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1147 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1148 set_{int,vma}_operand.
1149
1150Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1151
1152 * mn10300.h: Add "machine" field for instructions.
1153 (MN103, AM30): Define machine types.
d83c6548 1154
252b5132
RH
1155Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1156
1157 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1158
11591998-06-18 Ulrich Drepper <drepper@cygnus.com>
1160
1161 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1162
1163Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1164
1165 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1166 and ud2b.
1167 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1168 those that happen to be implemented on pentiums.
1169
1170Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1171
1172 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1173 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1174 with Size16|IgnoreSize or Size32|IgnoreSize.
1175
1176Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1177
1178 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1179 (REPE): Rename to REPE_PREFIX_OPCODE.
1180 (i386_regtab_end): Remove.
1181 (i386_prefixtab, i386_prefixtab_end): Remove.
1182 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1183 of md_begin.
1184 (MAX_OPCODE_SIZE): Define.
1185 (i386_optab_end): Remove.
1186 (sl_Suf): Define.
1187 (sl_FP): Use sl_Suf.
1188
1189 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1190 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1191 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1192 data32, dword, and adword prefixes.
1193 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1194 regs.
1195
1196Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1197
1198 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1199
1200 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1201 register operands, because this is a common idiom. Flag them with
1202 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1203 fdivrp because gcc erroneously generates them. Also flag with a
1204 warning.
1205
1206 * i386.h: Add suffix modifiers to most insns, and tighter operand
1207 checks in some cases. Fix a number of UnixWare compatibility
1208 issues with float insns. Merge some floating point opcodes, using
1209 new FloatMF modifier.
1210 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1211 consistency.
1212
1213 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1214 IgnoreDataSize where appropriate.
1215
1216Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1217
1218 * i386.h: (one_byte_segment_defaults): Remove.
1219 (two_byte_segment_defaults): Remove.
1220 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1221
1222Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1223
1224 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1225 (cgen_hw_lookup_by_num): Declare.
1226
1227Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1228
1229 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1230 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1231
1232Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1233
1234 * cgen.h (cgen_asm_init_parse): Delete.
1235 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1236 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1237
1238Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1239
1240 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1241 (cgen_asm_finish_insn): Update prototype.
1242 (cgen_insn): New members num, data.
1243 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1244 dis_hash, dis_hash_table_size moved to ...
1245 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1246 All uses updated. New members asm_hash_p, dis_hash_p.
1247 (CGEN_MINSN_EXPANSION): New struct.
1248 (cgen_expand_macro_insn): Declare.
1249 (cgen_macro_insn_count): Declare.
1250 (get_insn_operands): Update prototype.
1251 (lookup_get_insn_operands): Declare.
1252
1253Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1254
1255 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1256 regKludge. Add operands types for string instructions.
1257
1258Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1259
1260 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1261 table.
1262
1263Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1264
1265 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1266 for `gettext'.
1267
1268Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1269
1270 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1271 Add IsString flag to string instructions.
1272 (IS_STRING): Don't define.
1273 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1274 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1275 (SS_PREFIX_OPCODE): Define.
1276
1277Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1278
1279 * i386.h: Revert March 24 patch; no more LinearAddress.
1280
1281Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1282
1283 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1284 instructions, and instead add FWait opcode modifier. Add short
1285 form of fldenv and fstenv.
1286 (FWAIT_OPCODE): Define.
1287
1288 * i386.h (i386_optab): Change second operand constraint of `mov
1289 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1290 allow legal instructions such as `movl %gs,%esi'
1291
1292Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1293
1294 * h8300.h: Various changes to fully bracket initializers.
1295
1296Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1297
1298 * i386.h: Set LinearAddress for lidt and lgdt.
1299
1300Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1301
1302 * cgen.h (CGEN_BOOL_ATTR): New macro.
1303
1304Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1305
1306 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1307
1308Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1309
1310 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1311 (cgen_insn): Record syntax and format entries here, rather than
1312 separately.
1313
1314Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1315
1316 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1317
1318Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1319
1320 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1321 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1322 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1323
1324Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1325
1326 * cgen.h (lookup_insn): New argument alias_p.
1327
1328Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1329
1330Fix rac to accept only a0:
1331 * d10v.h (OPERAND_ACC): Split into:
1332 (OPERAND_ACC0, OPERAND_ACC1) .
1333 (OPERAND_GPR): Define.
1334
1335Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1336
1337 * cgen.h (CGEN_FIELDS): Define here.
1338 (CGEN_HW_ENTRY): New member `type'.
1339 (hw_list): Delete decl.
1340 (enum cgen_mode): Declare.
1341 (CGEN_OPERAND): New member `hw'.
1342 (enum cgen_operand_instance_type): Declare.
1343 (CGEN_OPERAND_INSTANCE): New type.
1344 (CGEN_INSN): New member `operands'.
1345 (CGEN_OPCODE_DATA): Make hw_list const.
1346 (get_insn_operands,lookup_insn): Add prototypes for.
1347
1348Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1349
1350 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1351 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1352 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1353 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1354
1355Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1356
1357 * cgen.h: Correct typo in comment end marker.
1358
1359Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1360
1361 * tic30.h: New file.
1362
5a109b67 1363Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1364
1365 * cgen.h: Add prototypes for cgen_save_fixups(),
1366 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1367 of cgen_asm_finish_insn() to return a char *.
1368
1369Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1370
1371 * cgen.h: Formatting changes to improve readability.
1372
1373Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1374
1375 * cgen.h (*): Clean up pass over `struct foo' usage.
1376 (CGEN_ATTR): Make unsigned char.
1377 (CGEN_ATTR_TYPE): Update.
1378 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1379 (cgen_base): Move member `attrs' to cgen_insn.
1380 (CGEN_KEYWORD): New member `null_entry'.
1381 (CGEN_{SYNTAX,FORMAT}): New types.
1382 (cgen_insn): Format and syntax separated from each other.
1383
1384Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1385
1386 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1387 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1388 flags_{used,set} long.
1389 (d30v_operand): Make flags field long.
1390
1391Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1392
1393 * m68k.h: Fix comment describing operand types.
1394
1395Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1396
1397 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1398 everything else after down.
1399
1400Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1401
1402 * d10v.h (OPERAND_FLAG): Split into:
1403 (OPERAND_FFLAG, OPERAND_CFLAG) .
1404
1405Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1406
1407 * mips.h (struct mips_opcode): Changed comments to reflect new
1408 field usage.
1409
1410Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1411
1412 * mips.h: Added to comments a quick-ref list of all assigned
1413 operand type characters.
1414 (OP_{MASK,SH}_PERFREG): New macros.
1415
1416Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1417
1418 * sparc.h: Add '_' and '/' for v9a asr's.
1419 Patch from David Miller <davem@vger.rutgers.edu>
1420
1421Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1422
1423 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1424 area are not available in the base model (H8/300).
1425
1426Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1427
1428 * m68k.h: Remove documentation of ` operand specifier.
1429
1430Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1431
1432 * m68k.h: Document q and v operand specifiers.
1433
1434Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1435
1436 * v850.h (struct v850_opcode): Add processors field.
1437 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1438 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1439 (PROCESSOR_V850EA): New bit constants.
1440
1441Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1442
1443 Merge changes from Martin Hunt:
1444
1445 * d30v.h: Allow up to 64 control registers. Add
1446 SHORT_A5S format.
1447
1448 * d30v.h (LONG_Db): New form for delayed branches.
1449
1450 * d30v.h: (LONG_Db): New form for repeati.
1451
1452 * d30v.h (SHORT_D2B): New form.
1453
1454 * d30v.h (SHORT_A2): New form.
1455
1456 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1457 registers are used. Needed for VLIW optimization.
1458
1459Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1460
1461 * cgen.h: Move assembler interface section
1462 up so cgen_parse_operand_result is defined for cgen_parse_address.
1463 (cgen_parse_address): Update prototype.
1464
1465Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1466
1467 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1468
1469Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1470
1471 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1472 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1473 <paubert@iram.es>.
1474
1475 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1476 <paubert@iram.es>.
1477
1478 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1479 <paubert@iram.es>.
1480
1481 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1482 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1483
1484Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1485
1486 * v850.h (V850_NOT_R0): New flag.
1487
1488Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1489
1490 * v850.h (struct v850_opcode): Remove flags field.
1491
1492Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1493
1494 * v850.h (struct v850_opcode): Add flags field.
1495 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1496 fields.
1497 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1498 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1499
1500Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1501
1502 * arc.h: New file.
1503
1504Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1505
1506 * sparc.h (sparc_opcodes): Declare as const.
1507
1508Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1509
1510 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1511 uses single or double precision floating point resources.
1512 (INSN_NO_ISA, INSN_ISA1): Define.
1513 (cpu specific INSN macros): Tweak into bitmasks outside the range
1514 of INSN_ISA field.
1515
1516Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1517
1518 * i386.h: Fix pand opcode.
1519
1520Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1521
1522 * mips.h: Widen INSN_ISA and move it to a more convenient
1523 bit position. Add INSN_3900.
1524
1525Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1526
1527 * mips.h (struct mips_opcode): added new field membership.
1528
1529Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1530
1531 * i386.h (movd): only Reg32 is allowed.
1532
1533 * i386.h: add fcomp and ud2. From Wayne Scott
1534 <wscott@ichips.intel.com>.
1535
1536Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1537
1538 * i386.h: Add MMX instructions.
1539
1540Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1541
1542 * i386.h: Remove W modifier from conditional move instructions.
1543
1544Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1545
1546 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1547 with no arguments to match that generated by the UnixWare
1548 assembler.
1549
1550Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1551
1552 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1553 (cgen_parse_operand_fn): Declare.
1554 (cgen_init_parse_operand): Declare.
1555 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1556 new argument `want'.
1557 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1558 (enum cgen_parse_operand_type): New enum.
1559
1560Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1563
1564Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1565
1566 * cgen.h: New file.
1567
1568Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1569
1570 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1571 fdivrp.
1572
1573Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1574
1575 * v850.h (extract): Make unsigned.
1576
1577Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1578
1579 * i386.h: Add iclr.
1580
1581Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1582
1583 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1584 take a direction bit.
1585
1586Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1587
1588 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1589
1590Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1591
1592 * sparc.h: Include <ansidecl.h>. Update function declarations to
1593 use prototypes, and to use const when appropriate.
1594
1595Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1596
1597 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1598
1599Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1600
1601 * d10v.h: Change pre_defined_registers to
1602 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1603
1604Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1605
1606 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1607 Change mips_opcodes from const array to a pointer,
1608 and change bfd_mips_num_opcodes from const int to int,
1609 so that we can increase the size of the mips opcodes table
1610 dynamically.
1611
1612Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1613
1614 * d30v.h (FLAG_X): Remove unused flag.
1615
1616Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1617
1618 * d30v.h: New file.
1619
1620Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1621
1622 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1623 (PDS_VALUE): Macro to access value field of predefined symbols.
1624 (tic80_next_predefined_symbol): Add prototype.
1625
1626Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1627
1628 * tic80.h (tic80_symbol_to_value): Change prototype to match
1629 change in function, added class parameter.
1630
1631Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1632
1633 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1634 endmask fields, which are somewhat weird in that 0 and 32 are
1635 treated exactly the same.
1636
1637Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1638
1639 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1640 rather than a constant that is 2**X. Reorder them to put bits for
1641 operands that have symbolic names in the upper bits, so they can
1642 be packed into an int where the lower bits contain the value that
1643 corresponds to that symbolic name.
1644 (predefined_symbo): Add struct.
1645 (tic80_predefined_symbols): Declare array of translations.
1646 (tic80_num_predefined_symbols): Declare size of that array.
1647 (tic80_value_to_symbol): Declare function.
1648 (tic80_symbol_to_value): Declare function.
1649
1650Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1651
1652 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1653
1654Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1655
1656 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1657 be the destination register.
1658
1659Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1660
1661 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1662 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1663 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1664 that the opcode can have two vector instructions in a single
1665 32 bit word and we have to encode/decode both.
1666
1667Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1668
1669 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1670 TIC80_OPERAND_RELATIVE for PC relative.
1671 (TIC80_OPERAND_BASEREL): New flag bit for register
1672 base relative.
1673
1674Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1675
1676 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1677
1678Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1679
1680 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1681 ":s" modifier for scaling.
1682
1683Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1684
1685 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1686 (TIC80_OPERAND_M_LI): Ditto
1687
1688Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1689
1690 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1691 (TIC80_OPERAND_CC): New define for condition code operand.
1692 (TIC80_OPERAND_CR): New define for control register operand.
1693
1694Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1695
1696 * tic80.h (struct tic80_opcode): Name changed.
1697 (struct tic80_opcode): Remove format field.
1698 (struct tic80_operand): Add insertion and extraction functions.
1699 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1700 correct ones.
1701 (FMT_*): Ditto.
1702
1703Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1704
1705 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1706 type IV instruction offsets.
1707
1708Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1709
1710 * tic80.h: New file.
1711
1712Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1713
1714 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1715
1716Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1717
1718 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1719 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1720 * v850.h: Fix comment, v850_operand not powerpc_operand.
1721
1722Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1723
1724 * mn10200.h: Flesh out structures and definitions needed by
1725 the mn10200 assembler & disassembler.
1726
1727Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1728
1729 * mips.h: Add mips16 definitions.
1730
1731Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1732
1733 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1734
1735Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1736
1737 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1738 (MN10300_OPERAND_MEMADDR): Define.
1739
1740Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1741
1742 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1743
1744Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1745
1746 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1747
1748Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1749
1750 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1751
1752Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1753
1754 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1755
1756Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1757
1758 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1759 negative to minimize problems with shared libraries. Organize
1760 instruction subsets by AMASK extensions and PALcode
1761 implementation.
252b5132
RH
1762 (struct alpha_operand): Move flags slot for better packing.
1763
1764Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1765
1766 * v850.h (V850_OPERAND_RELAX): New operand flag.
1767
1768Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1769
1770 * mn10300.h (FMT_*): Move operand format definitions
1771 here.
1772
1773Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1774
1775 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1776
1777Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1778
1779 * mn10300.h (mn10300_opcode): Add "format" field.
1780 (MN10300_OPERAND_*): Define.
1781
1782Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1783
1784 * mn10x00.h: Delete.
1785 * mn10200.h, mn10300.h: New files.
1786
1787Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1788
1789 * mn10x00.h: New file.
1790
1791Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1792
1793 * v850.h: Add new flag to indicate this instruction uses a PC
1794 displacement.
1795
1796Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1797
1798 * h8300.h (stmac): Add missing instruction.
1799
1800Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1801
1802 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1803 field.
1804
1805Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1806
1807 * v850.h (V850_OPERAND_EP): Define.
1808
1809 * v850.h (v850_opcode): Add size field.
1810
1811Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1812
1813 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1814 to functions used to handle unusual operand encoding.
252b5132 1815 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1816 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1817
1818Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1819
1820 * v850.h (v850_operands): Add flags field.
1821 (OPERAND_REG, OPERAND_NUM): Defined.
1822
1823Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1824
1825 * v850.h: New file.
1826
1827Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1828
1829 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1830 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1831 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1832 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1833 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1834 Defined.
252b5132
RH
1835
1836Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1837
1838 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1839 a 3 bit space id instead of a 2 bit space id.
1840
1841Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1842
1843 * d10v.h: Add some additional defines to support the
d83c6548 1844 assembler in determining which operations can be done in parallel.
252b5132
RH
1845
1846Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1847
1848 * h8300.h (SN): Define.
1849 (eepmov.b): Renamed from "eepmov"
1850 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1851 with them.
1852
1853Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1854
1855 * d10v.h (OPERAND_SHIFT): New operand flag.
1856
1857Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1858
1859 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1860 signed numbers.
252b5132
RH
1861
1862Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1863
1864 * d10v.h (pd_reg): Define. Putting the definition here allows
1865 the assembler and disassembler to share the same struct.
1866
1867Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1868
1869 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1870 Williams <steve@icarus.com>.
1871
1872Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1873
1874 * d10v.h: New file.
1875
1876Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1877
1878 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1879
1880Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1881
d83c6548 1882 * m68k.h (mcf5200): New macro.
252b5132
RH
1883 Document names of coldfire control registers.
1884
1885Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1886
1887 * h8300.h (SRC_IN_DST): Define.
1888
1889 * h8300.h (UNOP3): Mark the register operand in this insn
1890 as a source operand, not a destination operand.
1891 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1892 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1893 register operand with SRC_IN_DST.
1894
1895Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1896
1897 * alpha.h: New file.
1898
1899Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1900
1901 * rs6k.h: Remove obsolete file.
1902
1903Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1904
1905 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1906 fdivp, and fdivrp. Add ffreep.
1907
1908Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1909
1910 * h8300.h: Reorder various #defines for readability.
1911 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1912 (BITOP): Accept additional (unused) argument. All callers changed.
1913 (EBITOP): Likewise.
1914 (O_LAST): Bump.
1915 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1916
1917 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1918 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1919 (BITOP, EBITOP): Handle new H8/S addressing modes for
1920 bit insns.
1921 (UNOP3): Handle new shift/rotate insns on the H8/S.
1922 (insns using exr): New instructions.
1923 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1924
1925Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1926
1927 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1928 was incorrect.
1929
1930Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1931
1932 * h8300.h (START): Remove.
1933 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1934 and mov.l insns that can be relaxed.
1935
1936Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1937
1938 * i386.h: Remove Abs32 from lcall.
1939
1940Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1941
1942 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1943 (SLCPOP): New macro.
1944 Mark X,Y opcode letters as in use.
1945
1946Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1947
1948 * sparc.h (F_FLOAT, F_FBR): Define.
1949
1950Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1951
1952 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1953 from all insns.
1954 (ABS8SRC,ABS8DST): Add ABS8MEM.
1955 (add.l): Fix reg+reg variant.
1956 (eepmov.w): Renamed from eepmovw.
1957 (ldc,stc): Fix many cases.
1958
1959Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1960
1961 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1962
1963Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1964
1965 * sparc.h (O): Mark operand letter as in use.
1966
1967Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1968
1969 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1970 Mark operand letters uU as in use.
1971
1972Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1973
1974 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1975 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1976 (SPARC_OPCODE_SUPPORTED): New macro.
1977 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1978 (F_NOTV9): Delete.
1979
1980Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1981
1982 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1983 declaration consistent with return type in definition.
1984
1985Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1986
1987 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1988
1989Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1990
1991 * i386.h (i386_regtab): Add 80486 test registers.
1992
1993Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1994
1995 * i960.h (I_HX): Define.
1996 (i960_opcodes): Add HX instruction.
1997
1998Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1999
2000 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2001 and fclex.
2002
2003Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2004
2005 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2006 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2007 (bfd_* defines): Delete.
2008 (sparc_opcode_archs): Replaces architecture_pname.
2009 (sparc_opcode_lookup_arch): Declare.
2010 (NUMOPCODES): Delete.
2011
2012Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2013
2014 * sparc.h (enum sparc_architecture): Add v9a.
2015 (ARCHITECTURES_CONFLICT_P): Update.
2016
2017Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2018
2019 * i386.h: Added Pentium Pro instructions.
2020
2021Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2022
2023 * m68k.h: Document new 'W' operand place.
2024
2025Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2026
2027 * hppa.h: Add lci and syncdma instructions.
2028
2029Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2030
2031 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2032 instructions.
252b5132
RH
2033
2034Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2035
2036 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2037 assembler's -mcom and -many switches.
2038
2039Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2040
2041 * i386.h: Fix cmpxchg8b extension opcode description.
2042
2043Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2044
2045 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2046 and register cr4.
2047
2048Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2049
2050 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2051
2052Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2053
2054 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2055
2056Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2057
2058 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2059
2060Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2061
2062 * m68kmri.h: Remove.
2063
2064 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2065 declarations. Remove F_ALIAS and flag field of struct
2066 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2067 int. Make name and args fields of struct m68k_opcode const.
2068
2069Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2070
2071 * sparc.h (F_NOTV9): Define.
2072
2073Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2074
2075 * mips.h (INSN_4010): Define.
2076
2077Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2078
2079 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2080
2081 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2082 * m68k.h: Fix argument descriptions of coprocessor
2083 instructions to allow only alterable operands where appropriate.
2084 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2085 (m68k_opcode_aliases): Add more aliases.
2086
2087Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2088
2089 * m68k.h: Added explcitly short-sized conditional branches, and a
2090 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2091 svr4-based configurations.
2092
2093Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2094
2095 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2096 * i386.h: added missing Data16/Data32 flags to a few instructions.
2097
2098Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2099
2100 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2101 (OP_MASK_BCC, OP_SH_BCC): Define.
2102 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2103 (OP_MASK_CCC, OP_SH_CCC): Define.
2104 (INSN_READ_FPR_R): Define.
2105 (INSN_RFE): Delete.
2106
2107Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2108
2109 * m68k.h (enum m68k_architecture): Deleted.
2110 (struct m68k_opcode_alias): New type.
2111 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2112 matching constraints, values and flags. As a side effect of this,
2113 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2114 as I know were never used, now may need re-examining.
2115 (numopcodes): Now const.
2116 (m68k_opcode_aliases, numaliases): New variables.
2117 (endop): Deleted.
2118 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2119 m68k_opcode_aliases; update declaration of m68k_opcodes.
2120
2121Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2122
2123 * hppa.h (delay_type): Delete unused enumeration.
2124 (pa_opcode): Replace unused delayed field with an architecture
2125 field.
2126 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2127
2128Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2129
2130 * mips.h (INSN_ISA4): Define.
2131
2132Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2133
2134 * mips.h (M_DLA_AB, M_DLI): Define.
2135
2136Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2137
2138 * hppa.h (fstwx): Fix single-bit error.
2139
2140Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2141
2142 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2143
2144Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2145
2146 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2147 debug registers. From Charles Hannum (mycroft@netbsd.org).
2148
2149Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2150
2151 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2152 i386 support:
2153 * i386.h (MOV_AX_DISP32): New macro.
2154 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2155 of several call/return instructions.
2156 (ADDR_PREFIX_OPCODE): New macro.
2157
2158Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2159
2160 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2161
4f1d9bd8
NC
2162 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2163 char.
252b5132
RH
2164 (struct vot, field `name'): ditto.
2165
2166Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2167
2168 * vax.h: Supply and properly group all values in end sentinel.
2169
2170Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2171
2172 * mips.h (INSN_ISA, INSN_4650): Define.
2173
2174Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2175
2176 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2177 systems with a separate instruction and data cache, such as the
2178 29040, these instructions take an optional argument.
2179
2180Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2181
2182 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2183 INSN_TRAP.
2184
2185Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2186
2187 * mips.h (INSN_STORE_MEMORY): Define.
2188
2189Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2190
2191 * sparc.h: Document new operand type 'x'.
2192
2193Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2194
2195 * i960.h (I_CX2): New instruction category. It includes
2196 instructions available on Cx and Jx processors.
2197 (I_JX): New instruction category, for JX-only instructions.
2198 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2199 Jx-only instructions, in I_JX category.
2200
2201Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2202
2203 * ns32k.h (endop): Made pointer const too.
2204
2205Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2206
2207 * ns32k.h: Drop Q operand type as there is no correct use
2208 for it. Add I and Z operand types which allow better checking.
2209
2210Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2211
2212 * h8300.h (xor.l) :fix bit pattern.
2213 (L_2): New size of operand.
2214 (trapa): Use it.
2215
2216Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2217
2218 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2219
2220Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2221
2222 * sparc.h: Include v9 definitions.
2223
2224Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2225
2226 * m68k.h (m68060): Defined.
2227 (m68040up, mfloat, mmmu): Include it.
2228 (struct m68k_opcode): Widen `arch' field.
2229 (m68k_opcodes): Updated for M68060. Removed comments that were
2230 instructions commented out by "JF" years ago.
2231
2232Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2233
2234 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2235 add a one-bit `flags' field.
2236 (F_ALIAS): New macro.
2237
2238Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2239
2240 * h8300.h (dec, inc): Get encoding right.
2241
2242Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2243
2244 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2245 a flag instead.
2246 (PPC_OPERAND_SIGNED): Define.
2247 (PPC_OPERAND_SIGNOPT): Define.
2248
2249Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2250
2251 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2252 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2253
2254Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2255
2256 * i386.h: Reverse last change. It'll be handled in gas instead.
2257
2258Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2259
2260 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2261 slower on the 486 and used the implicit shift count despite the
2262 explicit operand. The one-operand form is still available to get
2263 the shorter form with the implicit shift count.
2264
2265Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2266
2267 * hppa.h: Fix typo in fstws arg string.
2268
2269Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2270
2271 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2272
2273Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2274
2275 * ppc.h (PPC_OPCODE_601): Define.
2276
2277Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2278
2279 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2280 (so we can determine valid completers for both addb and addb[tf].)
2281
2282 * hppa.h (xmpyu): No floating point format specifier for the
2283 xmpyu instruction.
2284
2285Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2286
2287 * ppc.h (PPC_OPERAND_NEXT): Define.
2288 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2289 (struct powerpc_macro): Define.
2290 (powerpc_macros, powerpc_num_macros): Declare.
2291
2292Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2293
2294 * ppc.h: New file. Header file for PowerPC opcode table.
2295
2296Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2297
2298 * hppa.h: More minor template fixes for sfu and copr (to allow
2299 for easier disassembly).
2300
2301 * hppa.h: Fix templates for all the sfu and copr instructions.
2302
2303Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2304
2305 * i386.h (push): Permit Imm16 operand too.
2306
2307Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2308
2309 * h8300.h (andc): Exists in base arch.
2310
2311Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2312
2313 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2314 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2315
2316Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2317
2318 * hppa.h: Add FP quadword store instructions.
2319
2320Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2321
2322 * mips.h: (M_J_A): Added.
2323 (M_LA): Removed.
2324
2325Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2326
2327 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2328 <mellon@pepper.ncd.com>.
2329
2330Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2331
2332 * hppa.h: Immediate field in probei instructions is unsigned,
2333 not low-sign extended.
2334
2335Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2336
2337 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2338
2339Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2340
2341 * i386.h: Add "fxch" without operand.
2342
2343Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2344
2345 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2346
2347Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2348
2349 * hppa.h: Add gfw and gfr to the opcode table.
2350
2351Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2352
2353 * m88k.h: extended to handle m88110.
2354
2355Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2356
2357 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2358 addresses.
2359
2360Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2361
2362 * i960.h (i960_opcodes): Properly bracket initializers.
2363
2364Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2365
2366 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2367
2368Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2369
2370 * m68k.h (two): Protect second argument with parentheses.
2371
2372Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2373
2374 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2375 Deleted old in/out instructions in "#if 0" section.
2376
2377Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2378
2379 * i386.h (i386_optab): Properly bracket initializers.
2380
2381Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2382
2383 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2384 Jeff Law, law@cs.utah.edu).
2385
2386Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2387
2388 * i386.h (lcall): Accept Imm32 operand also.
2389
2390Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2391
2392 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2393 (M_DABS): Added.
2394
2395Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2396
2397 * mips.h (INSN_*): Changed values. Removed unused definitions.
2398 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2399 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2400 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2401 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2402 (M_*): Added new values for r6000 and r4000 macros.
2403 (ANY_DELAY): Removed.
2404
2405Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2406
2407 * mips.h: Added M_LI_S and M_LI_SS.
2408
2409Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2410
2411 * h8300.h: Get some rare mov.bs correct.
2412
2413Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2414
2415 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2416 been included.
2417
2418Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2419
2420 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2421 jump instructions, for use in disassemblers.
2422
2423Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2424
2425 * m88k.h: Make bitfields just unsigned, not unsigned long or
2426 unsigned short.
2427
2428Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2429
2430 * hppa.h: New argument type 'y'. Use in various float instructions.
2431
2432Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2433
2434 * hppa.h (break): First immediate field is unsigned.
2435
2436 * hppa.h: Add rfir instruction.
2437
2438Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2439
2440 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2441
2442Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2443
2444 * mips.h: Reworked the hazard information somewhat, and fixed some
2445 bugs in the instruction hazard descriptions.
2446
2447Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2448
2449 * m88k.h: Corrected a couple of opcodes.
2450
2451Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2452
2453 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2454 new version includes instruction hazard information, but is
2455 otherwise reasonably similar.
2456
2457Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2458
2459 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2460
2461Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2462
2463 Patches from Jeff Law, law@cs.utah.edu:
2464 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2465 Make the tables be the same for the following instructions:
2466 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2467 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2468 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2469 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2470 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2471 "fcmp", and "ftest".
2472
2473 * hppa.h: Make new and old tables the same for "break", "mtctl",
2474 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2475 Fix typo in last patch. Collapse several #ifdefs into a
2476 single #ifdef.
2477
2478 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2479 of the comments up-to-date.
2480
2481 * hppa.h: Update "free list" of letters and update
2482 comments describing each letter's function.
2483
4f1d9bd8
NC
2484Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2485
2486 * h8300.h: Lots of little fixes for the h8/300h.
2487
2488Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2489
2490 Support for H8/300-H
2491 * h8300.h: Lots of new opcodes.
2492
252b5132
RH
2493Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2494
2495 * h8300.h: checkpoint, includes H8/300-H opcodes.
2496
2497Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2498
2499 * Patches from Jeffrey Law <law@cs.utah.edu>.
2500 * hppa.h: Rework single precision FP
2501 instructions so that they correctly disassemble code
2502 PA1.1 code.
2503
2504Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2505
2506 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2507 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2508
2509Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2510
2511 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2512 gdb will define it for now.
2513
2514Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2515
2516 * sparc.h: Don't end enumerator list with comma.
2517
2518Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2519
2520 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2521 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2522 ("bc2t"): Correct typo.
2523 ("[ls]wc[023]"): Use T rather than t.
2524 ("c[0123]"): Define general coprocessor instructions.
2525
2526Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2527
2528 * m68k.h: Move split point for gcc compilation more towards
2529 middle.
2530
2531Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2532
2533 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2534 simply wrong, ics, rfi, & rfsvc were missing).
2535 Add "a" to opr_ext for "bb". Doc fix.
2536
2537Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2538
2539 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2540 * mips.h: Add casts, to suppress warnings about shifting too much.
2541 * m68k.h: Document the placement code '9'.
2542
2543Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2544
2545 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2546 allows callers to break up the large initialized struct full of
2547 opcodes into two half-sized ones. This permits GCC to compile
2548 this module, since it takes exponential space for initializers.
2549 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2550
2551Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2552
2553 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2554 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2555 initialized structs in it.
2556
2557Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2558
2559 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2560 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2561 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2562
2563Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2564
2565 * mips.h: document "i" and "j" operands correctly.
2566
2567Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2568
2569 * mips.h: Removed endianness dependency.
2570
2571Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2572
2573 * h8300.h: include info on number of cycles per instruction.
2574
2575Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2576
2577 * hppa.h: Move handy aliases to the front. Fix masks for extract
2578 and deposit instructions.
2579
2580Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2581
2582 * i386.h: accept shld and shrd both with and without the shift
2583 count argument, which is always %cl.
2584
2585Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2586
2587 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2588 (one_byte_segment_defaults, two_byte_segment_defaults,
2589 i386_prefixtab_end): Ditto.
2590
2591Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2592
2593 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2594 for operand 2; from John Carr, jfc@dsg.dec.com.
2595
2596Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2597
2598 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2599 always use 16-bit offsets. Makes calculated-size jump tables
2600 feasible.
2601
2602Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2603
2604 * i386.h: Fix one-operand forms of in* and out* patterns.
2605
2606Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2607
2608 * m68k.h: Added CPU32 support.
2609
2610Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2611
2612 * mips.h (break): Disassemble the argument. Patch from
2613 jonathan@cs.stanford.edu (Jonathan Stone).
2614
2615Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2616
2617 * m68k.h: merged Motorola and MIT syntax.
2618
2619Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2620
2621 * m68k.h (pmove): make the tests less strict, the 68k book is
2622 wrong.
2623
2624Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2625
2626 * m68k.h (m68ec030): Defined as alias for 68030.
2627 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2628 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2629 them. Tightened description of "fmovex" to distinguish it from
2630 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2631 up descriptions that claimed versions were available for chips not
2632 supporting them. Added "pmovefd".
2633
2634Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2635
2636 * m68k.h: fix where the . goes in divull
2637
2638Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2639
2640 * m68k.h: the cas2 instruction is supposed to be written with
2641 indirection on the last two operands, which can be either data or
2642 address registers. Added a new operand type 'r' which accepts
2643 either register type. Added new cases for cas2l and cas2w which
2644 use them. Corrected masks for cas2 which failed to recognize use
2645 of address register.
2646
2647Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2648
2649 * m68k.h: Merged in patches (mostly m68040-specific) from
2650 Colin Smith <colin@wrs.com>.
2651
2652 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2653 base). Also cleaned up duplicates, re-ordered instructions for
2654 the sake of dis-assembling (so aliases come after standard names).
2655 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2656
2657Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2658
2659 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2660 all missing .s
2661
2662Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2663
2664 * sparc.h: Moved tables to BFD library.
2665
2666 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2667
2668Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2669
2670 * h8300.h: Finish filling in all the holes in the opcode table,
2671 so that the Lucid C compiler can digest this as well...
2672
2673Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2674
2675 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2676 Fix opcodes on various sizes of fild/fist instructions
2677 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2678 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2679
2680Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2681
2682 * h8300.h: Fill in all the holes in the opcode table so that the
2683 losing HPUX C compiler can digest this...
2684
2685Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2686
2687 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2688 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2689
2690Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2691
2692 * sparc.h: Add new architecture variant sparclite; add its scan
2693 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2694
2695Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2696
2697 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2698 fy@lucid.com).
2699
2700Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2701
2702 * rs6k.h: New version from IBM (Metin).
2703
2704Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2705
2706 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2707 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2708
2709Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2710
2711 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2712
2713Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2714
2715 * m68k.h (one, two): Cast macro args to unsigned to suppress
2716 complaints from compiler and lint about integer overflow during
2717 shift.
2718
2719Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2720
2721 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2722
2723Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2724
2725 * mips.h: Make bitfield layout depend on the HOST compiler,
2726 not on the TARGET system.
2727
2728Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2729
2730 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2731 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2732 <TRANLE@INTELLICORP.COM>.
2733
2734Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2735
2736 * h8300.h: turned op_type enum into #define list
2737
2738Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2739
2740 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2741 similar instructions -- they've been renamed to "fitoq", etc.
2742 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2743 number of arguments.
2744 * h8300.h: Remove extra ; which produces compiler warning.
2745
2746Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2747
2748 * sparc.h: fix opcode for tsubcctv.
2749
2750Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2751
2752 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2753
2754Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2755
2756 * sparc.h (nop): Made the 'lose' field be even tighter,
2757 so only a standard 'nop' is disassembled as a nop.
2758
2759Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2760
2761 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2762 disassembled as a nop.
2763
4f1d9bd8
NC
2764Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2765
2766 * m68k.h, sparc.h: ANSIfy enums.
2767
252b5132
RH
2768Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2769
2770 * sparc.h: fix a typo.
2771
2772Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2773
2774 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2775 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2776 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2777
2778\f
2779Local Variables:
2780version-control: never
2781End:
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