include/opcode/
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
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12003-06-25 Richard Sandiford <rsandifo@redhat.com>
2
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3 * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
4 (IMM8U, IMM8U_NS): Define.
5 (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
6
72003-06-25 Richard Sandiford <rsandifo@redhat.com>
8
9 * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
10 mov.l ERs,@(dd:32,ERd) entries.
8d1e520a 11
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122003-06-23 H.J. Lu <hongjiu.lu@intel.com>
13
14 * i386.h (i386_optab): Support Intel Precott New Instructions.
15
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162003-06-10 Gary Hade <garyhade@us.ibm.com>
17
18 * ppc.h (PPC_OPERAND_DQ): Define.
19
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202003-06-10 Richard Sandiford <rsandifo@redhat.com>
21
22 * h8300.h (IMM4_NS, IMM8_NS): New.
23 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
24 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
25
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262003-06-03 Michael Snyder <msnyder@redhat.com>
27
50649e42 28 * h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
adadcc0c 29 (ldc): Split ccr ops from exr ops (which are only available
66f2268e
MS
30 on H8S or H8SX).
31 (stc): Ditto.
32 (andc, orc, xorc): Ditto.
33 (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
34
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352003-06-03 Michael Snyder <msnyder@redhat.com>
36 and Bernd Schmidt <bernds@redhat.com>
37 and Alexandre Oliva <aoliva@redhat.com>
38 * h8300.h: Add support for h8300sx instruction set.
39
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402003-05-23 Jason Eckhardt <jle@rice.edu>
41
42 * i860.h (expand_type): Add XP_ONLY.
43 (scyc.b): New XP instruction.
44 (ldio.l): Likewise.
45 (ldio.s): Likewise.
46 (ldio.b): Likewise.
47 (ldint.l): Likewise.
48 (ldint.s): Likewise.
49 (ldint.b): Likewise.
50 (stio.l): Likewise.
51 (stio.s): Likewise.
52 (stio.b): Likewise.
53 (pfld.q): Likewise.
54
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552003-05-20 Jason Eckhardt <jle@rice.edu>
56
14218d5f 57 * i860.h (flush): Set lower 3 bits properly and use 'L'
941bbe78
JE
58 for the immediate operand type instead of 'i'.
59
ca464f37
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602003-05-20 Jason Eckhardt <jle@rice.edu>
61
14218d5f 62 * i860.h (fzchks): Both S and R bits must be set.
ca464f37
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63 (pfzchks): Likewise.
64 (faddp): Likewise.
65 (pfaddp): Likewise.
66 (fix.ss): Remove (invalid instruction).
67 (pfix.ss): Likewise.
68 (ftrunc.ss): Likewise.
69 (pftrunc.ss): Likewise.
70
b645cb17
JE
712003-05-18 Jason Eckhardt <jle@rice.edu>
72
73 * i860.h (form, pform): Add missing .dd suffix.
74
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752003-05-13 Stephane Carrez <stcarrez@nerim.fr>
76
77 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
78
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792003-04-07 Michael Snyder <msnyder@redhat.com>
80
81 * h8300.h (ldc/stc): Fix up src/dst swaps.
82
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AM
832003-04-09 J. Grant <jg-binutils@jguk.org>
84
85 * mips.h: Correct comment typo.
86
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872003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
88
89 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
90 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
91 (s390_opcode): Remove architecture. Add modes and min_cpu.
92
c8cc2f32
NC
932003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
94
95 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
96 processing.
97
d1c1f910
NC
982003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
99
100 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
101
f0abc2a1
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1022003-01-23 Alan Modra <amodra@bigpond.net.au>
103
104 * m68hc11.h (cpu6812s): Define.
105
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1062003-01-07 Chris Demetriou <cgd@broadcom.com>
107
108 * mips.h: Fix missing space in comment.
109 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
110 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
111 by four bits.
112
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1132003-01-02 Chris Demetriou <cgd@broadcom.com>
114
115 * mips.h: Update copyright years to include 2002 (which had
116 been missed previously) and 2003. Make comments about "+A",
117 "+B", and "+C" operand types more descriptive.
118
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1192002-12-31 Chris Demetriou <cgd@broadcom.com>
120
121 * mips.h: Note that the "+D" operand type name is now used.
122
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1232002-12-30 Chris Demetriou <cgd@broadcom.com>
124
125 * mips.h: Document "+" as the start of two-character operand
126 type names, and add new "K", "+A", "+B", and "+C" operand types.
127 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
128 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
129 defines.
130
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1312002-12-24 Dmitry Diky <diwil@mail.ru>
132
133 * msp430.h: New file. Defines msp430 opcodes.
134
3badd465
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1352002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
136
137 * h8300.h: Added some more pseudo opcodes for system call
138 processing.
139
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1402002-12-19 Chris Demetriou <cgd@broadcom.com>
141
142 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
143 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
144 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
145 (OP_OP_SDC2, OP_OP_SDC3): Define.
146
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1472002-12-16 Alan Modra <amodra@bigpond.net.au>
148
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149 * hppa.h (completer_chars): #if 0 out.
150
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151 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
152 "default_args".
153 (struct not_wot): Constify "args".
154 (struct not): Constify "name".
155 (numopcodes): Delete.
156 (endop): Delete.
157
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1582002-12-13 Alan Modra <amodra@bigpond.net.au>
159
160 * pj.h (pj_opc_info_t): Add union.
161
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JW
1622002-12-04 David Mosberger <davidm@hpl.hp.com>
163
164 * ia64.h: Fix copyright message.
165 (IA64_OPND_AR_CSD): New operand kind.
166
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RH
1672002-12-03 Richard Henderson <rth@redhat.com>
168
169 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
170
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1712002-12-03 Alan Modra <amodra@bigpond.net.au>
172
173 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
174 Constify "leaf" and "multi".
175
53cc2791
KD
1762002-11-19 Klee Dienes <kdienes@apple.com>
177
178 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
179 fields.
180 (h8_opcodes). Modify initializer and initializer macros to no
181 longer initialize the removed fields.
adadcc0c 182
5dec9182
SS
1832002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
184
185 * tic4x.h (c4x_insts): Fixed LDHI constraint
186
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KD
1872002-11-18 Klee Dienes <kdienes@apple.com>
188
189 * h8300.h (h8_opcode): Remove 'length' field.
190 (h8_opcodes): Mark as 'const' (both the declaration and
191 definition). Modify initializer and initializer macros to no
192 longer initialize the length field.
193
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KD
1942002-11-18 Klee Dienes <kdienes@apple.com>
195
196 * arc.h (arc_ext_opcodes): Declare as extern.
197 (arc_ext_operands): Declare as extern.
198 * i860.h (i860_opcodes): Declare as const.
199
eb128449
SS
2002002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
201
202 * tic4x.h: File reordering. Added enhanced opcodes.
203
2042002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
205
206 * tic4x.h: Major rewrite of entire file. Define instruction
207 classes, and put each instruction into a class.
208
2092002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
210
211 * tic4x.h: Added new opcodes and corrected some bugs. Add support
212 for new DSP types.
213
ea6a213a
AM
2142002-10-14 Alan Modra <amodra@bigpond.net.au>
215
216 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
217
701b80cd 2182002-09-30 Gavin Romig-Koch <gavin@redhat.com>
adadcc0c
AM
219 Ken Raeburn <raeburn@cygnus.com>
220 Aldy Hernandez <aldyh@redhat.com>
221 Eric Christopher <echristo@redhat.com>
222 Richard Sandiford <rsandifo@redhat.com>
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RS
223
224 * mips.h: Update comment for new opcodes.
225 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
226 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
227 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
228 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
229 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
230 Don't match CPU_R4111 with INSN_4100.
231
0449635d 2322002-08-19 Elena Zannoni <ezannoni@redhat.com>
0449635d 233
adadcc0c
AM
234 From matthew green <mrg@redhat.com>
235
236 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
0449635d 237 instructions.
adadcc0c 238 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
0449635d
EZ
239 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
240 e500x2 Integer select, branch locking, performance monitor,
241 cache locking and machine check APUs, respectively.
242 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
243 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
244
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SC
2452002-08-13 Stephane Carrez <stcarrez@nerim.fr>
246
247 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
248 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
249 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
250 memory banks.
251 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
252
aec421e0
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2532002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
254
255 * mips.h (INSN_MIPS16): New define.
256
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2572002-07-08 Alan Modra <amodra@bigpond.net.au>
258
259 * i386.h: Remove IgnoreSize from movsx and movzx.
260
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2612002-06-08 Alan Modra <amodra@bigpond.net.au>
262
263 * a29k.h: Replace CONST with const.
264 (CONST): Don't define.
265 * convex.h: Replace CONST with const.
266 (CONST): Don't define.
267 * dlx.h: Replace CONST with const.
268 * or32.h (CONST): Don't define.
269
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CD
2702002-05-30 Chris G. Demetriou <cgd@broadcom.com>
271
272 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
273 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
274 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
275 (INSN_MDMX): New constants, for MDMX support.
276 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
277
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2782002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
279
280 * dlx.h: New file.
281
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2822002-05-25 Alan Modra <amodra@bigpond.net.au>
283
284 * ia64.h: Use #include "" instead of <> for local header files.
285 * sparc.h: Likewise.
286
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TS
2872002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
288
289 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
290
b9c9142c
AV
2912002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
292
adadcc0c 293 * h8300.h: Corrected defs of all control regs
b9c9142c 294 and eepmov instr.
adadcc0c 295
cd47f4f1
AM
2962002-04-11 Alan Modra <amodra@bigpond.net.au>
297
298 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 299 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 300
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CD
3012002-03-15 Chris G. Demetriou <cgd@broadcom.com>
302
303 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
304 instructions.
305 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
306 may be passed along with the ISA bitmask.
307
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3082002-03-05 Paul Koning <pkoning@equallogic.com>
309
310 * pdp11.h: Add format codes for float instruction formats.
311
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3122002-02-25 Alan Modra <amodra@bigpond.net.au>
313
314 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
315
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JH
316Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
317
318 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
319
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JH
320Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
321
322 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
323 (xchg): Fix.
324 (in, out): Disable 64bit operands.
325 (call, jmp): Avoid REX prefixes.
326 (jcxz): Prohibit in 64bit mode
327 (jrcxz, loop): Add 64bit variants.
328 (movq): Fix patterns.
329 (movmskps, pextrw, pinstrw): Add 64bit variants.
330
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3312002-01-31 Ivan Guzvinec <ivang@opencores.org>
332
333 * or32.h: New file.
334
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3352002-01-22 Graydon Hoare <graydon@redhat.com>
336
337 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
338 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
339
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3402002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
341
342 * h8300.h: Comment typo fix.
343
a09cf9bd
MG
3442002-01-03 matthew green <mrg@redhat.com>
345
346 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
347 (PPC_OPCODE_BOOKE64): Likewise.
348
1befefea
JL
349Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
350
351 * hppa.h (call, ret): Move to end of table.
352 (addb, addib): PA2.0 variants should have been PA2.0W.
353 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
354 happy.
355 (fldw, fldd, fstw, fstd, bb): Likewise.
356 (short loads/stores): Tweak format specifier slightly to keep
357 disassembler happy.
358 (indexed loads/stores): Likewise.
359 (absolute loads/stores): Likewise.
360
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AO
3612001-12-04 Alexandre Oliva <aoliva@redhat.com>
362
363 * d10v.h (OPERAND_NOSP): New macro.
364
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3652001-11-29 Alexandre Oliva <aoliva@redhat.com>
366
367 * d10v.h (OPERAND_SP): New macro.
368
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3692001-11-15 Alan Modra <amodra@bigpond.net.au>
370
371 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
372
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TW
3732001-11-11 Timothy Wall <twall@alum.mit.edu>
374
375 * tic54x.h: Revise opcode layout; don't really need a separate
376 structure for parallel opcodes.
377
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3782001-11-13 Zack Weinberg <zack@codesourcery.com>
379 Alan Modra <amodra@bigpond.net.au>
380
381 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
382 accept WordReg.
383
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CD
3842001-11-04 Chris Demetriou <cgd@broadcom.com>
385
386 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
387
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NC
3882001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
389
390 * mmix.h: New file.
391
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CD
3922001-10-18 Chris Demetriou <cgd@broadcom.com>
393
394 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
395 of the expression, to make source code merging easier.
396
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CD
3972001-10-17 Chris Demetriou <cgd@broadcom.com>
398
399 * mips.h: Sort coprocessor instruction argument characters
400 in comment, add a few more words of description for "H".
401
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CD
4022001-10-17 Chris Demetriou <cgd@broadcom.com>
403
404 * mips.h (INSN_SB1): New cpu-specific instruction bit.
405 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
406 if cpu is CPU_SB1.
407
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MG
4082001-10-17 matthew green <mrg@redhat.com>
409
410 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
411
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MG
4122001-10-12 matthew green <mrg@redhat.com>
413
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MG
414 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
415 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
416 instructions, respectively.
418c1742 417
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NC
4182001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
419
420 * v850.h: Remove spurious comment.
421
015cf428
NC
4222001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
423
424 * h8300.h: Fix compile time warning messages
425
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RH
4262001-09-04 Richard Henderson <rth@redhat.com>
427
428 * alpha.h (struct alpha_operand): Pack elements into bitfields.
429
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4302001-08-31 Eric Christopher <echristo@redhat.com>
431
432 * mips.h: Remove CPU_MIPS32_4K.
433
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4342001-08-27 Torbjorn Granlund <tege@swox.com>
435
436 * ppc.h (PPC_OPERAND_DS): Define.
437
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AJ
4382001-08-25 Andreas Jaeger <aj@suse.de>
439
440 * d30v.h: Fix declaration of reg_name_cnt.
441
442 * d10v.h: Fix declaration of d10v_reg_name_cnt.
443
444 * arc.h: Add prototypes from opcodes/arc-opc.c.
445
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TS
4462001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
447
448 * mips.h (INSN_10000): Define.
449 (OPCODE_IS_MEMBER): Check for INSN_10000.
450
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4512001-08-10 Alan Modra <amodra@one.net.au>
452
453 * ppc.h: Revert 2001-08-08.
454
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4552001-08-10 Richard Sandiford <rsandifo@redhat.com>
456
457 * mips.h (INSN_GP32): Remove.
458 (OPCODE_IS_MEMBER): Remove gp32 parameter.
459 (M_MOVE): New macro identifier.
460
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4612001-08-08 Alan Modra <amodra@one.net.au>
462
463 1999-10-25 Torbjorn Granlund <tege@swox.com>
464 * ppc.h (struct powerpc_operand): New field `reloc'.
465
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NC
4662001-08-01 Aldy Hernandez <aldyh@redhat.com>
467
468 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
469
4702001-07-12 Jeff Johnston <jjohnstn@redhat.com>
471
472 * cgen.h (CGEN_INSN): Add regex support.
473 (build_insn_regex): Declare.
474
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FCE
4752001-07-11 Frank Ch. Eigler <fche@redhat.com>
476
477 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
478 (cgen_cpu_desc): Ditto.
479
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4802001-07-07 Ben Elliston <bje@redhat.com>
481
482 * m88k.h: Clean up and reformat. Remove unused code.
483
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GK
4842001-06-14 Geoffrey Keating <geoffk@redhat.com>
485
486 * cgen.h (cgen_keyword): Add nonalpha_chars field.
487
d1cf510e
NC
4882001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
489
490 * mips.h (CPU_R12000): Define.
491
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JH
4922001-05-23 John Healy <jhealy@redhat.com>
493
494 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 495
aa5f19f2
NC
4962001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
497
498 * mips.h (INSN_ISA_MASK): Define.
499
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5002001-05-12 Alan Modra <amodra@one.net.au>
501
502 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
503 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
504 and use InvMem as these insns must have register operands.
505
992aaec9
AM
5062001-05-04 Alan Modra <amodra@one.net.au>
507
508 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
509 and pextrw to swap reg/rm assignments.
510
4ef7f0bf
HPN
5112001-04-05 Hans-Peter Nilsson <hp@axis.com>
512
513 * cris.h (enum cris_insn_version_usage): Correct comment for
514 cris_ver_v3p.
515
0f17484f
AM
5162001-03-24 Alan Modra <alan@linuxcare.com.au>
517
518 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
519 Add InvMem to first operand of "maskmovdqu".
520
7ccb5238
HPN
5212001-03-22 Hans-Peter Nilsson <hp@axis.com>
522
523 * cris.h (ADD_PC_INCR_OPCODE): New macro.
524
361bfa20
KH
5252001-03-21 Kazu Hirata <kazu@hxi.com>
526
527 * h8300.h: Fix formatting.
528
87890af0
AM
5292001-03-22 Alan Modra <alan@linuxcare.com.au>
530
531 * i386.h (i386_optab): Add paddq, psubq.
532
2e98d2de
AM
5332001-03-19 Alan Modra <alan@linuxcare.com.au>
534
535 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
536
80a523c2
NC
5372001-02-28 Igor Shevlyakov <igor@windriver.com>
538
539 * m68k.h: new defines for Coldfire V4. Update mcf to know
540 about mcf5407.
541
e135f41b
NC
5422001-02-18 lars brinkhoff <lars@nocrew.org>
543
544 * pdp11.h: New file.
545
5462001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
547
548 * i386.h (i386_optab): SSE integer converison instructions have
549 64bit versions on x86-64.
550
8eaec934
NC
5512001-02-10 Nick Clifton <nickc@redhat.com>
552
553 * mips.h: Remove extraneous whitespace. Formating change to allow
554 for future contribution.
555
a85d7ed0
NC
5562001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
557
558 * s390.h: New file.
559
0715dc88
PM
5602001-02-02 Patrick Macdonald <patrickm@redhat.com>
561
adadcc0c
AM
562 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
563 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
564 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
0715dc88 565
296bc568
AM
5662001-01-24 Karsten Keil <kkeil@suse.de>
567
568 * i386.h (i386_optab): Fix swapgs
569
1328dc98
AM
5702001-01-14 Alan Modra <alan@linuxcare.com.au>
571
572 * hppa.h: Describe new '<' and '>' operand types, and tidy
573 existing comments.
574 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
575 Remove duplicate "ldw j(s,b),x". Sort some entries.
576
e135f41b 5772001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
578
579 * i386.h (i386_optab): Fix pusha and ret templates.
580
0d2bcfaf
NC
5812001-01-11 Peter Targett <peter.targett@arccores.com>
582
583 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
584 definitions for masking cpu type.
585 (arc_ext_operand_value) New structure for storing extended
586 operands.
587 (ARC_OPERAND_*) Flags for operand values.
588
5892001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
590
591 * i386.h (pinsrw): Add.
592 (pshufw): Remove.
593 (cvttpd2dq): Fix operands.
594 (cvttps2dq): Likewise.
595 (movq2q): Rename to movdq2q.
596
079966a8
AM
5972001-01-10 Richard Schaal <richard.schaal@intel.com>
598
599 * i386.h: Correct movnti instruction.
600
8c1f9e76
JJ
6012001-01-09 Jeff Johnston <jjohnstn@redhat.com>
602
603 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
604 of operands (unsigned char or unsigned short).
605 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
606 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
607
0d2bcfaf 6082001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
609
610 * i386.h (i386_optab): Make [sml]fence template to use immext field.
611
0d2bcfaf 6122001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
613
614 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
615 introduced by Pentium4
616
0d2bcfaf 6172000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
618
619 * i386.h (i386_optab): Add "rex*" instructions;
620 add swapgs; disable jmp/call far direct instructions for
621 64bit mode; add syscall and sysret; disable registers for 0xc6
622 template. Add 'q' suffixes to extendable instructions, disable
079966a8 623 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
624 (i386_regtab): Add extended registers.
625 (*Suf): Add No_qSuf.
626 (q_Suf, wlq_Suf, bwlq_Suf): New.
627
0d2bcfaf 6282000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
629
630 * i386.h (i386_optab): Replace "Imm" with "EncImm".
631 (i386_regtab): Add flags field.
d83c6548 632
bf40d919
NC
6332000-12-12 Nick Clifton <nickc@redhat.com>
634
635 * mips.h: Fix formatting.
636
4372b673
NC
6372000-12-01 Chris Demetriou <cgd@sibyte.com>
638
adadcc0c
AM
639 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
640 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
641 OP_*_SYSCALL definitions.
642 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
643 19 bit wait codes.
644 (MIPS operand specifier comments): Remove 'm', add 'U' and
645 'J', and update the meaning of 'B' so that it's more general.
646
647 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
648 INSN_ISA5): Renumber, redefine to mean the ISA at which the
649 instruction was added.
650 (INSN_ISA32): New constant.
651 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
652 Renumber to avoid new and/or renumbered INSN_* constants.
653 (INSN_MIPS32): Delete.
654 (ISA_UNKNOWN): New constant to indicate unknown ISA.
655 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
656 ISA_MIPS32): New constants, defined to be the mask of INSN_*
657 constants available at that ISA level.
658 (CPU_UNKNOWN): New constant to indicate unknown CPU.
659 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
660 define it with a unique value.
661 (OPCODE_IS_MEMBER): Update for new ISA membership-related
662 constant meanings.
663
664 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
665 definitions.
666
667 * mips.h (CPU_SB1): New constant.
c6c98b38 668
19f7b010
JJ
6692000-10-20 Jakub Jelinek <jakub@redhat.com>
670
671 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
672 Note that '3' is used for siam operand.
673
139368c9
JW
6742000-09-22 Jim Wilson <wilson@cygnus.com>
675
676 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
677
156c2f8b 6782000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 679
156c2f8b
NC
680 * mips.h: Use defines instead of hard-coded processor numbers.
681 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 682 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
683 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
684 CPU_4KC, CPU_4KM, CPU_4KP): Define..
685 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 686 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 687 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
688 Add 'P' to used characters.
689 Use 'H' for coprocessor select field.
156c2f8b 690 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
691 Document new arg characters and add to used characters.
692 (INSN_MIPS32): New define for MIPS32 extensions.
693 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 694
3c5ce02e
AM
6952000-09-05 Alan Modra <alan@linuxcare.com.au>
696
697 * hppa.h: Mention cz completer.
698
50b81f19
JW
6992000-08-16 Jim Wilson <wilson@cygnus.com>
700
701 * ia64.h (IA64_OPCODE_POSTINC): New.
702
fc29466d
L
7032000-08-15 H.J. Lu <hjl@gnu.org>
704
705 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
706 IgnoreSize change.
707
4f1d9bd8
NC
7082000-08-08 Jason Eckhardt <jle@cygnus.com>
709
710 * i860.h: Small formatting adjustments.
711
45ee1401
DC
7122000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
713
714 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
715 Move related opcodes closer to each other.
716 Minor changes in comments, list undefined opcodes.
717
9d551405
DB
7182000-07-26 Dave Brolley <brolley@redhat.com>
719
720 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
721
4f1d9bd8
NC
7222000-07-22 Jason Eckhardt <jle@cygnus.com>
723
724 * i860.h (btne, bte, bla): Changed these opcodes
725 to use sbroff ('r') instead of split16 ('s').
726 (J, K, L, M): New operand types for 16-bit aligned fields.
727 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
728 use I, J, K, L, M instead of just I.
729 (T, U): New operand types for split 16-bit aligned fields.
730 (st.x): Changed these opcodes to use S, T, U instead of just S.
731 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
732 exist on the i860.
733 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
734 (pfeq.ss, pfeq.dd): New opcodes.
735 (st.s): Fixed incorrect mask bits.
736 (fmlow): Fixed incorrect mask bits.
737 (fzchkl, pfzchkl): Fixed incorrect mask bits.
738 (faddz, pfaddz): Fixed incorrect mask bits.
739 (form, pform): Fixed incorrect mask bits.
740 (pfld.l): Fixed incorrect mask bits.
741 (fst.q): Fixed incorrect mask bits.
742 (all floating point opcodes): Fixed incorrect mask bits for
743 handling of dual bit.
744
c8488617
HPN
7452000-07-20 Hans-Peter Nilsson <hp@axis.com>
746
747 cris.h: New file.
748
65aa24b6
NC
7492000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
750
751 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
752 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
753 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
754 (AVR_ISA_M83): Define for ATmega83, ATmega85.
755 (espm): Remove, because ESPM removed in databook update.
756 (eicall, eijmp): Move to the end of opcode table.
757
60bcf0fa
NC
7582000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
759
760 * m68hc11.h: New file for support of Motorola 68hc11.
761
60a2978a
DC
762Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
763
764 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
765
68ab2dd9
DC
766Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
767
768 * avr.h: New file with AVR opcodes.
769
f0662e27
DL
770Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
771
772 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
773
b722f2be
AM
7742000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
775
776 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
777
f9e0cf0b
AM
7782000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
779
780 * i386.h: Use sl_FP, not sl_Suf for fild.
781
f660ee8b
FCE
7822000-05-16 Frank Ch. Eigler <fche@redhat.com>
783
784 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
785 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
786 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
787 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
788
558b0a60
AM
7892000-05-13 Alan Modra <alan@linuxcare.com.au>,
790
791 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
792
e413e4e9
AM
7932000-05-13 Alan Modra <alan@linuxcare.com.au>,
794 Alexander Sokolov <robocop@netlink.ru>
795
796 * i386.h (i386_optab): Add cpu_flags for all instructions.
797
7982000-05-13 Alan Modra <alan@linuxcare.com.au>
799
800 From Gavin Romig-Koch <gavin@cygnus.com>
801 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
802
5c84d377
TW
8032000-05-04 Timothy Wall <twall@cygnus.com>
804
805 * tic54x.h: New.
806
966f959b
C
8072000-05-03 J.T. Conklin <jtc@redback.com>
808
809 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
810 (PPC_OPERAND_VR): New operand flag for vector registers.
811
c5d05dbb
JL
8122000-05-01 Kazu Hirata <kazu@hxi.com>
813
814 * h8300.h (EOP): Add missing initializer.
815
a7fba0e0
JL
816Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
817
818 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
819 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
820 New operand types l,y,&,fe,fE,fx added to support above forms.
821 (pa_opcodes): Replaced usage of 'x' as source/target for
822 floating point double-word loads/stores with 'fx'.
823
800eeca4
JW
824Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
825 David Mosberger <davidm@hpl.hp.com>
826 Timothy Wall <twall@cygnus.com>
827 Jim Wilson <wilson@cygnus.com>
828
829 * ia64.h: New file.
830
ba23e138
NC
8312000-03-27 Nick Clifton <nickc@cygnus.com>
832
833 * d30v.h (SHORT_A1): Fix value.
834 (SHORT_AR): Renumber so that it is at the end of the list of short
835 instructions, not the end of the list of long instructions.
836
d0b47220
AM
8372000-03-26 Alan Modra <alan@linuxcare.com>
838
839 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
840 problem isn't really specific to Unixware.
841 (OLDGCC_COMPAT): Define.
842 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
843 destination %st(0).
844 Fix lots of comments.
845
866afedc
NC
8462000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
847
adadcc0c
AM
848 * d30v.h:
849 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
850 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
851 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
852 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
853 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
854 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
855 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
866afedc 856
cc5ca5ce
AM
8572000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
858
859 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
860 fistpd without suffix.
861
68e324a2
NC
8622000-02-24 Nick Clifton <nickc@cygnus.com>
863
864 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
adadcc0c 865 'signed_overflow_ok_p'.
68e324a2
NC
866 Delete prototypes for cgen_set_flags() and cgen_get_flags().
867
60f036a2
AH
8682000-02-24 Andrew Haley <aph@cygnus.com>
869
870 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
871 (CGEN_CPU_TABLE): flags: new field.
872 Add prototypes for new functions.
d83c6548 873
9b9b5cd4
AM
8742000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
875
876 * i386.h: Add some more UNIXWARE_COMPAT comments.
877
5b93d8bb
AM
8782000-02-23 Linas Vepstas <linas@linas.org>
879
880 * i370.h: New file.
881
4f1d9bd8
NC
8822000-02-22 Chandra Chavva <cchavva@cygnus.com>
883
884 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
885 cannot be combined in parallel with ADD/SUBppp.
886
87f398dd
AH
8872000-02-22 Andrew Haley <aph@cygnus.com>
888
889 * mips.h: (OPCODE_IS_MEMBER): Add comment.
890
367c01af
AH
8911999-12-30 Andrew Haley <aph@cygnus.com>
892
9a1e79ca
AH
893 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
894 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
895 insns.
367c01af 896
add0c677
AM
8972000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
898
899 * i386.h: Qualify intel mode far call and jmp with x_Suf.
900
3138f287
AM
9011999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
902
903 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
904 indirect jumps and calls. Add FF/3 call for intel mode.
905
ccecd07b
JL
906Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
907
908 * mn10300.h: Add new operand types. Add new instruction formats.
909
b37e19e9
JL
910Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
911
912 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
913 instruction.
914
5fce5ddf
GRK
9151999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
916
917 * mips.h (INSN_ISA5): New.
918
2bd7f1f3
GRK
9191999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
920
921 * mips.h (OPCODE_IS_MEMBER): New.
922
4df2b5c5
NC
9231999-10-29 Nick Clifton <nickc@cygnus.com>
924
925 * d30v.h (SHORT_AR): Define.
926
446a06c9
MM
9271999-10-18 Michael Meissner <meissner@cygnus.com>
928
929 * alpha.h (alpha_num_opcodes): Convert to unsigned.
930 (alpha_num_operands): Ditto.
931
eca04c6a
JL
932Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
933
adadcc0c 934 * hppa.h (pa_opcodes): Add load and store cache control to
eca04c6a
JL
935 instructions. Add ordered access load and store.
936
937 * hppa.h (pa_opcode): Add new entries for addb and addib.
938
939 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
940
adadcc0c 941 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
eca04c6a 942
c43185de
DN
943Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
944
945 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
946
ec3533da
JL
947Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
948
390f858d
JL
949 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
950 and "be" using completer prefixes.
951
8c47ebd9
JL
952 * hppa.h (pa_opcodes): Add initializers to silence compiler.
953
ec3533da
JL
954 * hppa.h: Update comments about character usage.
955
18369bea
JL
956Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
957
958 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
959 up the new fstw & bve instructions.
960
c36efdd2
JL
961Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
962
d3ffb032
JL
963 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
964 instructions.
965
c49ec3da
JL
966 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
967
5d2e7ecc
JL
968 * hppa.h (pa_opcodes): Add long offset double word load/store
969 instructions.
970
6397d1a2
JL
971 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
972 stores.
973
142f0fe0
JL
974 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
975
f5a68b45
JL
976 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
977
8235801e
JL
978 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
979
35184366
JL
980 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
981
f0bfde5e
JL
982 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
983
27bbbb58
JL
984 * hppa.h (pa_opcodes): Add support for "b,l".
985
c36efdd2
JL
986 * hppa.h (pa_opcodes): Add support for "b,gate".
987
f2727d04
JL
988Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
989
9392fb11 990 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 991 in xmpyu.
9392fb11 992
e0c52e99
JL
993 * hppa.h (pa_opcodes): Fix mask for probe and probei.
994
f2727d04
JL
995 * hppa.h (pa_opcodes): Fix mask for depwi.
996
52d836e2
JL
997Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
998
999 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
1000 an explicit output argument.
1001
90765e3a
JL
1002Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
1003
1004 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
1005 Add a few PA2.0 loads and store variants.
1006
8340b17f
ILT
10071999-09-04 Steve Chamberlain <sac@pobox.com>
1008
1009 * pj.h: New file.
1010
5f47d35b
AM
10111999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
1012
1013 * i386.h (i386_regtab): Move %st to top of table, and split off
1014 other fp reg entries.
1015 (i386_float_regtab): To here.
1016
1c143202
JL
1017Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1018
7d8fdb64
JL
1019 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1020 by 'f'.
1021
90927b9c
JL
1022 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1023 Add supporting args.
1024
adadcc0c
AM
1025 * hppa.h: Document new completers and args.
1026 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1d16bf9c
JL
1027 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1028 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1029 pmenb and pmdis.
1030
adadcc0c 1031 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
96226a68
JL
1032 hshr, hsub, mixh, mixw, permh.
1033
5d4ba527
JL
1034 * hppa.h (pa_opcodes): Change completers in instructions to
1035 use 'c' prefix.
1036
adadcc0c 1037 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
e9fc28c6
JL
1038 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1039
adadcc0c 1040 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1c143202
JL
1041 fnegabs to use 'I' instead of 'F'.
1042
9e525108
AM
10431999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1044
1045 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1046 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1047 Alphabetically sort PIII insns.
1048
e8da1bf1
DE
1049Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1050
1051 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1052
7d627258
JL
1053Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1054
5696871a
JL
1055 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1056 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1057
adadcc0c 1058 * hppa.h: Document 64 bit condition completers.
7d627258 1059
c5e52916
JL
1060Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1061
1062 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1063
eecb386c
AM
10641999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1065
1066 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1067 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1068 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1069
88a380f3
JL
1070Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1071 Jeff Law <law@cygnus.com>
1072
1073 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1074
1075 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 1076
adadcc0c 1077 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
1078 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1079
145cf1f0
AM
10801999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1081
1082 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1083
73826640
JL
1084Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1085
1086 * hppa.h (struct pa_opcode): Add new field "flags".
1087 (FLAGS_STRICT): Define.
1088
b65db252
JL
1089Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1090 Jeff Law <law@cygnus.com>
1091
f7fc668b
JL
1092 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1093
1094 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 1095
10084519
AM
10961999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1097
1098 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1099 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1100 flag to fcomi and friends.
1101
cd8a80ba
JL
1102Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1103
1104 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 1105 integer logical instructions.
cd8a80ba 1106
1fca749b
ILT
11071999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1108
1109 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1110 `n', `o'.
1111
1112 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1113 and new places `m', `M', `h'.
1114
aa008907
JL
1115Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1116
1117 * hppa.h (pa_opcodes): Add several processor specific system
1118 instructions.
1119
e26b85f0
JL
1120Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1121
d83c6548 1122 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
1123 "addb", and "addib" to be used by the disassembler.
1124
c608c12e
AM
11251999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1126
1127 * i386.h (ReverseModrm): Remove all occurences.
1128 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1129 movmskps, pextrw, pmovmskb, maskmovq.
1130 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1131 ignore the data size prefix.
1132
1133 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1134 Mostly stolen from Doug Ledford <dledford@redhat.com>
1135
45c18104
RH
1136Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1137
1138 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1139
252b5132
RH
11401999-04-14 Doug Evans <devans@casey.cygnus.com>
1141
1142 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1143 (CGEN_ATTR_TYPE): Update.
1144 (CGEN_ATTR_MASK): Number booleans starting at 0.
1145 (CGEN_ATTR_VALUE): Update.
1146 (CGEN_INSN_ATTR): Update.
1147
1148Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1149
1150 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1151 instructions.
1152
1153Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1154
1155 * hppa.h (bb, bvb): Tweak opcode/mask.
1156
1157
11581999-03-22 Doug Evans <devans@casey.cygnus.com>
1159
1160 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1161 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1162 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1163 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1164 Delete member max_insn_size.
1165 (enum cgen_cpu_open_arg): New enum.
1166 (cpu_open): Update prototype.
1167 (cpu_open_1): Declare.
1168 (cgen_set_cpu): Delete.
1169
11701999-03-11 Doug Evans <devans@casey.cygnus.com>
1171
1172 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1173 (CGEN_OPERAND_NIL): New macro.
1174 (CGEN_OPERAND): New member `type'.
1175 (@arch@_cgen_operand_table): Delete decl.
1176 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1177 (CGEN_OPERAND_TABLE): New struct.
1178 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1179 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1180 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1181 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1182 {get,set}_{int,vma}_operand.
1183 (@arch@_cgen_cpu_open): New arg `isa'.
1184 (cgen_set_cpu): Ditto.
1185
1186Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1187
1188 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1189
11901999-02-25 Doug Evans <devans@casey.cygnus.com>
1191
1192 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1193 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1194 enum cgen_hw_type.
1195 (CGEN_HW_TABLE): New struct.
1196 (hw_table): Delete declaration.
1197 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1198 to table entry to enum.
1199 (CGEN_OPINST): Ditto.
1200 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1201
1202Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1203
1204 * alpha.h (AXP_OPCODE_EV6): New.
1205 (AXP_OPCODE_NOPAL): Include it.
1206
12071999-02-09 Doug Evans <devans@casey.cygnus.com>
1208
1209 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1210 All uses updated. New members int_insn_p, max_insn_size,
1211 parse_operand,insert_operand,extract_operand,print_operand,
1212 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1213 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1214 extract_handlers,print_handlers.
1215 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1216 (CGEN_ATTR_BOOL_OFFSET): New macro.
1217 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1218 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1219 (cgen_opcode_handler): Renamed from cgen_base.
1220 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1221 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1222 all uses updated.
1223 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1224 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1225 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1226 (CGEN_OPCODE,CGEN_IBASE): New types.
1227 (CGEN_INSN): Rewrite.
1228 (CGEN_{ASM,DIS}_HASH*): Delete.
1229 (init_opcode_table,init_ibld_table): Declare.
1230 (CGEN_INSN_ATTR): New type.
1231
1232Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1233
adadcc0c
AM
1234 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1235 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1236 Change *Suf definitions to include x and d suffixes.
1237 (movsx): Use w_Suf and b_Suf.
1238 (movzx): Likewise.
1239 (movs): Use bwld_Suf.
1240 (fld): Change ordering. Use sld_FP.
1241 (fild): Add Intel Syntax equivalent of fildq.
1242 (fst): Use sld_FP.
1243 (fist): Use sld_FP.
1244 (fstp): Use sld_FP. Add x_FP version.
1245 (fistp): LLongMem version for Intel Syntax.
1246 (fcom, fcomp): Use sld_FP.
1247 (fadd, fiadd, fsub): Use sld_FP.
1248 (fsubr): Use sld_FP.
1249 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
252b5132
RH
1250
12511999-01-27 Doug Evans <devans@casey.cygnus.com>
1252
1253 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1254 CGEN_MODE_UINT.
1255
e135f41b 12561999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1257
1258 * hppa.h (bv): Fix mask.
1259
12601999-01-05 Doug Evans <devans@casey.cygnus.com>
1261
1262 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1263 (CGEN_ATTR): Use it.
1264 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1265 (CGEN_ATTR_TABLE): New member dfault.
1266
12671998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1268
1269 * mips.h (MIPS16_INSN_BRANCH): New.
1270
1271Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1272
1273 The following is part of a change made by Edith Epstein
d83c6548
AJ
1274 <eepstein@sophia.cygnus.com> as part of a project to merge in
1275 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1276
1277 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1278 after.
252b5132
RH
1279
1280Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1281
1282 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1283 status word instructions.
252b5132
RH
1284
12851998-11-30 Doug Evans <devans@casey.cygnus.com>
1286
1287 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1288 (struct cgen_keyword_entry): Ditto.
1289 (struct cgen_operand): Ditto.
1290 (CGEN_IFLD): New typedef, with associated access macros.
1291 (CGEN_IFMT): New typedef, with associated access macros.
1292 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1293 (CGEN_IVALUE): New typedef.
1294 (struct cgen_insn): Delete const on syntax,attrs members.
1295 `format' now points to format data. Type of `value' is now
1296 CGEN_IVALUE.
1297 (struct cgen_opcode_table): New member ifld_table.
1298
12991998-11-18 Doug Evans <devans@casey.cygnus.com>
1300
1301 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1302 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1303 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1304 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1305 (cgen_opcode_table): Update type of dis_hash fn.
1306 (extract_operand): Update type of `insn_value' arg.
1307
1308Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1309
1310 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1311
1312Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1313
1314 * mips.h (INSN_MULT): Added.
1315
1316Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1317
1318 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1319
1320Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1321
1322 * cgen.h (CGEN_INSN_INT): New typedef.
1323 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1324 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1325 (CGEN_INSN_BYTES_PTR): New typedef.
1326 (CGEN_EXTRACT_INFO): New typedef.
1327 (cgen_insert_fn,cgen_extract_fn): Update.
1328 (cgen_opcode_table): New member `insn_endian'.
1329 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1330 (insert_operand,extract_operand): Update.
1331 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1332
1333Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1334
1335 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1336 (struct CGEN_HW_ENTRY): New member `attrs'.
1337 (CGEN_HW_ATTR): New macro.
1338 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1339 (CGEN_INSN_INVALID_P): New macro.
1340
1341Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1342
1343 * hppa.h: Add "fid".
d83c6548 1344
252b5132
RH
1345Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1346
1347 From Robert Andrew Dale <rob@nb.net>
1348 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1349 (AMD_3DNOW_OPCODE): Define.
1350
1351Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1352
1353 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1354
1355Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1356
1357 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1358
1359Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1360
1361 Move all global state data into opcode table struct, and treat
1362 opcode table as something that is "opened/closed".
1363 * cgen.h (CGEN_OPCODE_DESC): New type.
1364 (all fns): New first arg of opcode table descriptor.
1365 (cgen_set_parse_operand_fn): Add prototype.
1366 (cgen_current_machine,cgen_current_endian): Delete.
1367 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1368 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1369 dis_hash_table,dis_hash_table_entries.
1370 (opcode_open,opcode_close): Add prototypes.
1371
1372 * cgen.h (cgen_insn): New element `cdx'.
1373
1374Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1375
1376 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1377
1378Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1379
1380 * mn10300.h: Add "no_match_operands" field for instructions.
1381 (MN10300_MAX_OPERANDS): Define.
1382
1383Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1384
1385 * cgen.h (cgen_macro_insn_count): Declare.
1386
1387Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1388
1389 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1390 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1391 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1392 set_{int,vma}_operand.
1393
1394Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1395
1396 * mn10300.h: Add "machine" field for instructions.
1397 (MN103, AM30): Define machine types.
d83c6548 1398
252b5132
RH
1399Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1400
1401 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1402
14031998-06-18 Ulrich Drepper <drepper@cygnus.com>
1404
1405 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1406
1407Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1408
1409 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1410 and ud2b.
1411 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1412 those that happen to be implemented on pentiums.
1413
1414Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1415
1416 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1417 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1418 with Size16|IgnoreSize or Size32|IgnoreSize.
1419
1420Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1421
1422 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1423 (REPE): Rename to REPE_PREFIX_OPCODE.
1424 (i386_regtab_end): Remove.
1425 (i386_prefixtab, i386_prefixtab_end): Remove.
1426 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1427 of md_begin.
1428 (MAX_OPCODE_SIZE): Define.
1429 (i386_optab_end): Remove.
1430 (sl_Suf): Define.
1431 (sl_FP): Use sl_Suf.
1432
1433 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1434 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1435 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1436 data32, dword, and adword prefixes.
1437 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1438 regs.
1439
1440Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1441
1442 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1443
1444 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1445 register operands, because this is a common idiom. Flag them with
1446 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1447 fdivrp because gcc erroneously generates them. Also flag with a
1448 warning.
1449
1450 * i386.h: Add suffix modifiers to most insns, and tighter operand
1451 checks in some cases. Fix a number of UnixWare compatibility
1452 issues with float insns. Merge some floating point opcodes, using
1453 new FloatMF modifier.
1454 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1455 consistency.
1456
1457 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1458 IgnoreDataSize where appropriate.
1459
1460Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1461
1462 * i386.h: (one_byte_segment_defaults): Remove.
1463 (two_byte_segment_defaults): Remove.
1464 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1465
1466Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1467
1468 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1469 (cgen_hw_lookup_by_num): Declare.
1470
1471Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1472
1473 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1474 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1475
1476Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1477
1478 * cgen.h (cgen_asm_init_parse): Delete.
1479 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1480 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1481
1482Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1483
1484 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1485 (cgen_asm_finish_insn): Update prototype.
1486 (cgen_insn): New members num, data.
1487 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1488 dis_hash, dis_hash_table_size moved to ...
1489 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1490 All uses updated. New members asm_hash_p, dis_hash_p.
1491 (CGEN_MINSN_EXPANSION): New struct.
1492 (cgen_expand_macro_insn): Declare.
1493 (cgen_macro_insn_count): Declare.
1494 (get_insn_operands): Update prototype.
1495 (lookup_get_insn_operands): Declare.
1496
1497Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1498
1499 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1500 regKludge. Add operands types for string instructions.
1501
1502Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1503
1504 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1505 table.
1506
1507Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1508
1509 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1510 for `gettext'.
1511
1512Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1513
1514 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1515 Add IsString flag to string instructions.
1516 (IS_STRING): Don't define.
1517 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1518 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1519 (SS_PREFIX_OPCODE): Define.
1520
1521Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1522
1523 * i386.h: Revert March 24 patch; no more LinearAddress.
1524
1525Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1526
1527 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1528 instructions, and instead add FWait opcode modifier. Add short
1529 form of fldenv and fstenv.
1530 (FWAIT_OPCODE): Define.
1531
1532 * i386.h (i386_optab): Change second operand constraint of `mov
1533 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1534 allow legal instructions such as `movl %gs,%esi'
1535
1536Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1537
1538 * h8300.h: Various changes to fully bracket initializers.
1539
1540Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1541
1542 * i386.h: Set LinearAddress for lidt and lgdt.
1543
1544Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1545
1546 * cgen.h (CGEN_BOOL_ATTR): New macro.
1547
1548Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1549
1550 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1551
1552Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1553
1554 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1555 (cgen_insn): Record syntax and format entries here, rather than
1556 separately.
1557
1558Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1559
1560 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1561
1562Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1563
1564 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1565 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1566 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1567
1568Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1569
1570 * cgen.h (lookup_insn): New argument alias_p.
1571
1572Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1573
1574Fix rac to accept only a0:
1575 * d10v.h (OPERAND_ACC): Split into:
1576 (OPERAND_ACC0, OPERAND_ACC1) .
1577 (OPERAND_GPR): Define.
1578
1579Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1580
1581 * cgen.h (CGEN_FIELDS): Define here.
1582 (CGEN_HW_ENTRY): New member `type'.
1583 (hw_list): Delete decl.
1584 (enum cgen_mode): Declare.
1585 (CGEN_OPERAND): New member `hw'.
1586 (enum cgen_operand_instance_type): Declare.
1587 (CGEN_OPERAND_INSTANCE): New type.
1588 (CGEN_INSN): New member `operands'.
1589 (CGEN_OPCODE_DATA): Make hw_list const.
1590 (get_insn_operands,lookup_insn): Add prototypes for.
1591
1592Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1593
1594 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1595 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1596 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1597 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1598
1599Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1600
1601 * cgen.h: Correct typo in comment end marker.
1602
1603Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1604
1605 * tic30.h: New file.
1606
5a109b67 1607Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1608
1609 * cgen.h: Add prototypes for cgen_save_fixups(),
1610 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1611 of cgen_asm_finish_insn() to return a char *.
1612
1613Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1614
1615 * cgen.h: Formatting changes to improve readability.
1616
1617Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1618
1619 * cgen.h (*): Clean up pass over `struct foo' usage.
1620 (CGEN_ATTR): Make unsigned char.
1621 (CGEN_ATTR_TYPE): Update.
1622 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1623 (cgen_base): Move member `attrs' to cgen_insn.
1624 (CGEN_KEYWORD): New member `null_entry'.
1625 (CGEN_{SYNTAX,FORMAT}): New types.
1626 (cgen_insn): Format and syntax separated from each other.
1627
1628Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1629
1630 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1631 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1632 flags_{used,set} long.
1633 (d30v_operand): Make flags field long.
1634
1635Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1636
1637 * m68k.h: Fix comment describing operand types.
1638
1639Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1640
1641 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1642 everything else after down.
1643
1644Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1645
1646 * d10v.h (OPERAND_FLAG): Split into:
1647 (OPERAND_FFLAG, OPERAND_CFLAG) .
1648
1649Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1650
1651 * mips.h (struct mips_opcode): Changed comments to reflect new
1652 field usage.
1653
1654Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1655
1656 * mips.h: Added to comments a quick-ref list of all assigned
1657 operand type characters.
1658 (OP_{MASK,SH}_PERFREG): New macros.
1659
1660Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1661
1662 * sparc.h: Add '_' and '/' for v9a asr's.
1663 Patch from David Miller <davem@vger.rutgers.edu>
1664
1665Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1666
1667 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1668 area are not available in the base model (H8/300).
1669
1670Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1671
1672 * m68k.h: Remove documentation of ` operand specifier.
1673
1674Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1675
1676 * m68k.h: Document q and v operand specifiers.
1677
1678Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1679
1680 * v850.h (struct v850_opcode): Add processors field.
1681 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1682 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1683 (PROCESSOR_V850EA): New bit constants.
1684
1685Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1686
1687 Merge changes from Martin Hunt:
1688
1689 * d30v.h: Allow up to 64 control registers. Add
1690 SHORT_A5S format.
1691
1692 * d30v.h (LONG_Db): New form for delayed branches.
1693
1694 * d30v.h: (LONG_Db): New form for repeati.
1695
1696 * d30v.h (SHORT_D2B): New form.
1697
1698 * d30v.h (SHORT_A2): New form.
1699
1700 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1701 registers are used. Needed for VLIW optimization.
1702
1703Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1704
1705 * cgen.h: Move assembler interface section
1706 up so cgen_parse_operand_result is defined for cgen_parse_address.
1707 (cgen_parse_address): Update prototype.
1708
1709Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1710
1711 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1712
1713Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1714
1715 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1716 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1717 <paubert@iram.es>.
1718
1719 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1720 <paubert@iram.es>.
1721
1722 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1723 <paubert@iram.es>.
1724
1725 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1726 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1727
1728Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1729
1730 * v850.h (V850_NOT_R0): New flag.
1731
1732Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1733
1734 * v850.h (struct v850_opcode): Remove flags field.
1735
1736Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1737
1738 * v850.h (struct v850_opcode): Add flags field.
1739 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1740 fields.
1741 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1742 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1743
1744Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1745
1746 * arc.h: New file.
1747
1748Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1749
1750 * sparc.h (sparc_opcodes): Declare as const.
1751
1752Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1753
1754 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1755 uses single or double precision floating point resources.
1756 (INSN_NO_ISA, INSN_ISA1): Define.
1757 (cpu specific INSN macros): Tweak into bitmasks outside the range
1758 of INSN_ISA field.
1759
1760Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1761
1762 * i386.h: Fix pand opcode.
1763
1764Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1765
1766 * mips.h: Widen INSN_ISA and move it to a more convenient
1767 bit position. Add INSN_3900.
1768
1769Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1770
1771 * mips.h (struct mips_opcode): added new field membership.
1772
1773Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1774
1775 * i386.h (movd): only Reg32 is allowed.
1776
1777 * i386.h: add fcomp and ud2. From Wayne Scott
1778 <wscott@ichips.intel.com>.
1779
1780Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1781
1782 * i386.h: Add MMX instructions.
1783
1784Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1785
1786 * i386.h: Remove W modifier from conditional move instructions.
1787
1788Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1789
1790 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1791 with no arguments to match that generated by the UnixWare
1792 assembler.
1793
1794Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1795
1796 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1797 (cgen_parse_operand_fn): Declare.
1798 (cgen_init_parse_operand): Declare.
1799 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1800 new argument `want'.
1801 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1802 (enum cgen_parse_operand_type): New enum.
1803
1804Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1805
1806 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1807
1808Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1809
1810 * cgen.h: New file.
1811
1812Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1813
1814 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1815 fdivrp.
1816
1817Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1818
adadcc0c 1819 * v850.h (extract): Make unsigned.
252b5132
RH
1820
1821Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1822
1823 * i386.h: Add iclr.
1824
1825Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1826
1827 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1828 take a direction bit.
1829
1830Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1831
1832 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1833
1834Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1835
1836 * sparc.h: Include <ansidecl.h>. Update function declarations to
1837 use prototypes, and to use const when appropriate.
1838
1839Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1840
1841 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1842
1843Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1844
1845 * d10v.h: Change pre_defined_registers to
1846 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1847
1848Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1849
1850 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1851 Change mips_opcodes from const array to a pointer,
1852 and change bfd_mips_num_opcodes from const int to int,
1853 so that we can increase the size of the mips opcodes table
1854 dynamically.
1855
1856Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1857
1858 * d30v.h (FLAG_X): Remove unused flag.
1859
1860Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1861
1862 * d30v.h: New file.
1863
1864Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1865
1866 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1867 (PDS_VALUE): Macro to access value field of predefined symbols.
1868 (tic80_next_predefined_symbol): Add prototype.
1869
1870Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1871
1872 * tic80.h (tic80_symbol_to_value): Change prototype to match
1873 change in function, added class parameter.
1874
1875Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1876
1877 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1878 endmask fields, which are somewhat weird in that 0 and 32 are
1879 treated exactly the same.
1880
1881Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1882
1883 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1884 rather than a constant that is 2**X. Reorder them to put bits for
1885 operands that have symbolic names in the upper bits, so they can
1886 be packed into an int where the lower bits contain the value that
1887 corresponds to that symbolic name.
1888 (predefined_symbo): Add struct.
1889 (tic80_predefined_symbols): Declare array of translations.
1890 (tic80_num_predefined_symbols): Declare size of that array.
1891 (tic80_value_to_symbol): Declare function.
1892 (tic80_symbol_to_value): Declare function.
1893
1894Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1895
1896 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1897
1898Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1899
1900 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1901 be the destination register.
1902
1903Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1904
1905 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1906 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1907 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1908 that the opcode can have two vector instructions in a single
1909 32 bit word and we have to encode/decode both.
1910
1911Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1912
1913 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1914 TIC80_OPERAND_RELATIVE for PC relative.
1915 (TIC80_OPERAND_BASEREL): New flag bit for register
1916 base relative.
1917
1918Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1919
1920 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1921
1922Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1923
1924 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1925 ":s" modifier for scaling.
1926
1927Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1928
1929 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1930 (TIC80_OPERAND_M_LI): Ditto
1931
1932Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1933
1934 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1935 (TIC80_OPERAND_CC): New define for condition code operand.
1936 (TIC80_OPERAND_CR): New define for control register operand.
1937
1938Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1939
1940 * tic80.h (struct tic80_opcode): Name changed.
1941 (struct tic80_opcode): Remove format field.
1942 (struct tic80_operand): Add insertion and extraction functions.
1943 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1944 correct ones.
1945 (FMT_*): Ditto.
1946
1947Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1948
1949 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1950 type IV instruction offsets.
1951
1952Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1953
1954 * tic80.h: New file.
1955
1956Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1957
1958 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1959
1960Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1961
1962 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1963 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1964 * v850.h: Fix comment, v850_operand not powerpc_operand.
1965
1966Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1967
1968 * mn10200.h: Flesh out structures and definitions needed by
1969 the mn10200 assembler & disassembler.
1970
1971Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1972
1973 * mips.h: Add mips16 definitions.
1974
1975Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1976
1977 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1978
1979Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1980
1981 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1982 (MN10300_OPERAND_MEMADDR): Define.
1983
1984Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1985
1986 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1987
1988Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1989
1990 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1991
1992Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1993
1994 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1995
1996Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1997
1998 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1999
2000Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
2001
2002 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
2003 negative to minimize problems with shared libraries. Organize
2004 instruction subsets by AMASK extensions and PALcode
2005 implementation.
252b5132
RH
2006 (struct alpha_operand): Move flags slot for better packing.
2007
2008Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
2009
2010 * v850.h (V850_OPERAND_RELAX): New operand flag.
2011
2012Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
2013
2014 * mn10300.h (FMT_*): Move operand format definitions
2015 here.
2016
2017Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
2018
2019 * mn10300.h (MN10300_OPERAND_PAREN): Define.
2020
2021Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2022
2023 * mn10300.h (mn10300_opcode): Add "format" field.
2024 (MN10300_OPERAND_*): Define.
2025
2026Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2027
2028 * mn10x00.h: Delete.
2029 * mn10200.h, mn10300.h: New files.
2030
2031Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2032
2033 * mn10x00.h: New file.
2034
2035Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2036
adadcc0c 2037 * v850.h: Add new flag to indicate this instruction uses a PC
252b5132
RH
2038 displacement.
2039
2040Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2041
2042 * h8300.h (stmac): Add missing instruction.
2043
2044Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2045
2046 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2047 field.
2048
2049Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2050
2051 * v850.h (V850_OPERAND_EP): Define.
2052
2053 * v850.h (v850_opcode): Add size field.
2054
2055Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2056
2057 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 2058 to functions used to handle unusual operand encoding.
252b5132 2059 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 2060 V850_OPERAND_SIGNED): Defined.
252b5132
RH
2061
2062Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2063
2064 * v850.h (v850_operands): Add flags field.
2065 (OPERAND_REG, OPERAND_NUM): Defined.
2066
2067Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2068
2069 * v850.h: New file.
2070
2071Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2072
2073 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
2074 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2075 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2076 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2077 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2078 Defined.
252b5132
RH
2079
2080Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2081
2082 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2083 a 3 bit space id instead of a 2 bit space id.
2084
2085Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2086
2087 * d10v.h: Add some additional defines to support the
d83c6548 2088 assembler in determining which operations can be done in parallel.
252b5132
RH
2089
2090Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2091
2092 * h8300.h (SN): Define.
2093 (eepmov.b): Renamed from "eepmov"
2094 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2095 with them.
2096
2097Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2098
2099 * d10v.h (OPERAND_SHIFT): New operand flag.
2100
2101Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2102
2103 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 2104 signed numbers.
252b5132
RH
2105
2106Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2107
2108 * d10v.h (pd_reg): Define. Putting the definition here allows
2109 the assembler and disassembler to share the same struct.
2110
2111Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2112
2113 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2114 Williams <steve@icarus.com>.
2115
2116Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2117
2118 * d10v.h: New file.
2119
2120Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2121
2122 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2123
2124Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2125
d83c6548 2126 * m68k.h (mcf5200): New macro.
252b5132
RH
2127 Document names of coldfire control registers.
2128
2129Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2130
2131 * h8300.h (SRC_IN_DST): Define.
2132
2133 * h8300.h (UNOP3): Mark the register operand in this insn
2134 as a source operand, not a destination operand.
2135 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2136 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2137 register operand with SRC_IN_DST.
2138
2139Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2140
2141 * alpha.h: New file.
2142
2143Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2144
2145 * rs6k.h: Remove obsolete file.
2146
2147Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2148
2149 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2150 fdivp, and fdivrp. Add ffreep.
2151
2152Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2153
2154 * h8300.h: Reorder various #defines for readability.
2155 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2156 (BITOP): Accept additional (unused) argument. All callers changed.
2157 (EBITOP): Likewise.
2158 (O_LAST): Bump.
2159 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2160
2161 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2162 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2163 (BITOP, EBITOP): Handle new H8/S addressing modes for
2164 bit insns.
2165 (UNOP3): Handle new shift/rotate insns on the H8/S.
2166 (insns using exr): New instructions.
2167 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2168
2169Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2170
2171 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2172 was incorrect.
2173
2174Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2175
2176 * h8300.h (START): Remove.
2177 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2178 and mov.l insns that can be relaxed.
2179
2180Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2181
2182 * i386.h: Remove Abs32 from lcall.
2183
2184Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2185
2186 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2187 (SLCPOP): New macro.
2188 Mark X,Y opcode letters as in use.
2189
2190Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2191
2192 * sparc.h (F_FLOAT, F_FBR): Define.
2193
2194Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2195
2196 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2197 from all insns.
2198 (ABS8SRC,ABS8DST): Add ABS8MEM.
2199 (add.l): Fix reg+reg variant.
2200 (eepmov.w): Renamed from eepmovw.
2201 (ldc,stc): Fix many cases.
2202
2203Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2204
2205 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2206
2207Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2208
2209 * sparc.h (O): Mark operand letter as in use.
2210
2211Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2212
2213 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2214 Mark operand letters uU as in use.
2215
2216Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2217
2218 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2219 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2220 (SPARC_OPCODE_SUPPORTED): New macro.
2221 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2222 (F_NOTV9): Delete.
2223
2224Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2225
2226 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2227 declaration consistent with return type in definition.
2228
2229Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2230
2231 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2232
2233Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2234
2235 * i386.h (i386_regtab): Add 80486 test registers.
2236
2237Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2238
2239 * i960.h (I_HX): Define.
2240 (i960_opcodes): Add HX instruction.
2241
2242Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2243
2244 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2245 and fclex.
2246
2247Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2248
2249 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2250 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2251 (bfd_* defines): Delete.
2252 (sparc_opcode_archs): Replaces architecture_pname.
2253 (sparc_opcode_lookup_arch): Declare.
2254 (NUMOPCODES): Delete.
2255
2256Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2257
2258 * sparc.h (enum sparc_architecture): Add v9a.
2259 (ARCHITECTURES_CONFLICT_P): Update.
2260
2261Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2262
2263 * i386.h: Added Pentium Pro instructions.
2264
2265Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2266
2267 * m68k.h: Document new 'W' operand place.
2268
2269Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2270
2271 * hppa.h: Add lci and syncdma instructions.
2272
2273Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2274
2275 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2276 instructions.
252b5132
RH
2277
2278Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2279
2280 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2281 assembler's -mcom and -many switches.
2282
2283Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2284
2285 * i386.h: Fix cmpxchg8b extension opcode description.
2286
2287Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2288
2289 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2290 and register cr4.
2291
2292Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2293
2294 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2295
2296Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2297
2298 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2299
2300Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2301
2302 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2303
2304Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2305
2306 * m68kmri.h: Remove.
2307
2308 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2309 declarations. Remove F_ALIAS and flag field of struct
2310 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2311 int. Make name and args fields of struct m68k_opcode const.
2312
2313Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2314
2315 * sparc.h (F_NOTV9): Define.
2316
2317Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2318
2319 * mips.h (INSN_4010): Define.
2320
2321Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2322
2323 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2324
2325 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2326 * m68k.h: Fix argument descriptions of coprocessor
2327 instructions to allow only alterable operands where appropriate.
2328 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2329 (m68k_opcode_aliases): Add more aliases.
2330
2331Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2332
2333 * m68k.h: Added explcitly short-sized conditional branches, and a
2334 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2335 svr4-based configurations.
2336
2337Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2338
2339 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2340 * i386.h: added missing Data16/Data32 flags to a few instructions.
2341
2342Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2343
2344 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2345 (OP_MASK_BCC, OP_SH_BCC): Define.
2346 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2347 (OP_MASK_CCC, OP_SH_CCC): Define.
2348 (INSN_READ_FPR_R): Define.
2349 (INSN_RFE): Delete.
2350
2351Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2352
2353 * m68k.h (enum m68k_architecture): Deleted.
2354 (struct m68k_opcode_alias): New type.
2355 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2356 matching constraints, values and flags. As a side effect of this,
2357 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2358 as I know were never used, now may need re-examining.
2359 (numopcodes): Now const.
2360 (m68k_opcode_aliases, numaliases): New variables.
2361 (endop): Deleted.
2362 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2363 m68k_opcode_aliases; update declaration of m68k_opcodes.
2364
2365Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2366
2367 * hppa.h (delay_type): Delete unused enumeration.
2368 (pa_opcode): Replace unused delayed field with an architecture
2369 field.
2370 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2371
2372Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2373
2374 * mips.h (INSN_ISA4): Define.
2375
2376Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2377
2378 * mips.h (M_DLA_AB, M_DLI): Define.
2379
2380Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2381
2382 * hppa.h (fstwx): Fix single-bit error.
2383
2384Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2385
2386 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2387
2388Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2389
2390 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2391 debug registers. From Charles Hannum (mycroft@netbsd.org).
2392
2393Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2394
2395 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2396 i386 support:
2397 * i386.h (MOV_AX_DISP32): New macro.
2398 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2399 of several call/return instructions.
2400 (ADDR_PREFIX_OPCODE): New macro.
2401
2402Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2403
2404 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2405
adadcc0c 2406 * vax.h (struct vot_wot, field `args'): Make it pointer to const
4f1d9bd8 2407 char.
adadcc0c 2408 (struct vot, field `name'): ditto.
252b5132
RH
2409
2410Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2411
2412 * vax.h: Supply and properly group all values in end sentinel.
2413
2414Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2415
2416 * mips.h (INSN_ISA, INSN_4650): Define.
2417
2418Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2419
2420 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2421 systems with a separate instruction and data cache, such as the
2422 29040, these instructions take an optional argument.
2423
2424Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2425
2426 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2427 INSN_TRAP.
2428
2429Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2430
2431 * mips.h (INSN_STORE_MEMORY): Define.
2432
2433Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2434
2435 * sparc.h: Document new operand type 'x'.
2436
2437Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2438
2439 * i960.h (I_CX2): New instruction category. It includes
2440 instructions available on Cx and Jx processors.
2441 (I_JX): New instruction category, for JX-only instructions.
2442 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2443 Jx-only instructions, in I_JX category.
2444
2445Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2446
2447 * ns32k.h (endop): Made pointer const too.
2448
2449Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2450
2451 * ns32k.h: Drop Q operand type as there is no correct use
2452 for it. Add I and Z operand types which allow better checking.
2453
2454Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2455
2456 * h8300.h (xor.l) :fix bit pattern.
2457 (L_2): New size of operand.
2458 (trapa): Use it.
2459
2460Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2461
2462 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2463
2464Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2465
2466 * sparc.h: Include v9 definitions.
2467
2468Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2469
2470 * m68k.h (m68060): Defined.
2471 (m68040up, mfloat, mmmu): Include it.
2472 (struct m68k_opcode): Widen `arch' field.
2473 (m68k_opcodes): Updated for M68060. Removed comments that were
2474 instructions commented out by "JF" years ago.
2475
2476Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2477
2478 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2479 add a one-bit `flags' field.
2480 (F_ALIAS): New macro.
2481
2482Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2483
2484 * h8300.h (dec, inc): Get encoding right.
2485
2486Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2487
2488 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2489 a flag instead.
2490 (PPC_OPERAND_SIGNED): Define.
2491 (PPC_OPERAND_SIGNOPT): Define.
2492
2493Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2494
2495 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2496 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2497
2498Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2499
2500 * i386.h: Reverse last change. It'll be handled in gas instead.
2501
2502Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2503
2504 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2505 slower on the 486 and used the implicit shift count despite the
2506 explicit operand. The one-operand form is still available to get
2507 the shorter form with the implicit shift count.
2508
2509Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2510
2511 * hppa.h: Fix typo in fstws arg string.
2512
2513Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2514
2515 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2516
2517Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2518
2519 * ppc.h (PPC_OPCODE_601): Define.
2520
2521Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2522
2523 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2524 (so we can determine valid completers for both addb and addb[tf].)
2525
2526 * hppa.h (xmpyu): No floating point format specifier for the
2527 xmpyu instruction.
2528
2529Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2530
2531 * ppc.h (PPC_OPERAND_NEXT): Define.
2532 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2533 (struct powerpc_macro): Define.
2534 (powerpc_macros, powerpc_num_macros): Declare.
2535
2536Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2537
2538 * ppc.h: New file. Header file for PowerPC opcode table.
2539
2540Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2541
2542 * hppa.h: More minor template fixes for sfu and copr (to allow
2543 for easier disassembly).
2544
2545 * hppa.h: Fix templates for all the sfu and copr instructions.
2546
2547Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2548
2549 * i386.h (push): Permit Imm16 operand too.
2550
2551Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2552
2553 * h8300.h (andc): Exists in base arch.
2554
2555Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2556
2557 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2558 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2559
2560Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2561
2562 * hppa.h: Add FP quadword store instructions.
2563
2564Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2565
2566 * mips.h: (M_J_A): Added.
2567 (M_LA): Removed.
2568
2569Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2570
2571 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2572 <mellon@pepper.ncd.com>.
2573
2574Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2575
2576 * hppa.h: Immediate field in probei instructions is unsigned,
2577 not low-sign extended.
2578
2579Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2580
2581 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2582
2583Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2584
2585 * i386.h: Add "fxch" without operand.
2586
2587Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2588
2589 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2590
2591Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2592
2593 * hppa.h: Add gfw and gfr to the opcode table.
2594
2595Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2596
2597 * m88k.h: extended to handle m88110.
2598
2599Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2600
2601 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2602 addresses.
2603
2604Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2605
2606 * i960.h (i960_opcodes): Properly bracket initializers.
2607
2608Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2609
2610 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2611
2612Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2613
2614 * m68k.h (two): Protect second argument with parentheses.
2615
2616Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2617
2618 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2619 Deleted old in/out instructions in "#if 0" section.
2620
2621Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2622
2623 * i386.h (i386_optab): Properly bracket initializers.
2624
2625Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2626
2627 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2628 Jeff Law, law@cs.utah.edu).
2629
2630Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2631
2632 * i386.h (lcall): Accept Imm32 operand also.
2633
2634Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2635
2636 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2637 (M_DABS): Added.
2638
2639Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2640
2641 * mips.h (INSN_*): Changed values. Removed unused definitions.
2642 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2643 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2644 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2645 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2646 (M_*): Added new values for r6000 and r4000 macros.
2647 (ANY_DELAY): Removed.
2648
2649Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2650
2651 * mips.h: Added M_LI_S and M_LI_SS.
2652
2653Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2654
2655 * h8300.h: Get some rare mov.bs correct.
2656
2657Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2658
2659 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2660 been included.
2661
2662Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2663
adadcc0c 2664 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
252b5132
RH
2665 jump instructions, for use in disassemblers.
2666
2667Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2668
2669 * m88k.h: Make bitfields just unsigned, not unsigned long or
2670 unsigned short.
2671
2672Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2673
2674 * hppa.h: New argument type 'y'. Use in various float instructions.
2675
2676Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2677
2678 * hppa.h (break): First immediate field is unsigned.
2679
2680 * hppa.h: Add rfir instruction.
2681
2682Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2683
2684 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2685
2686Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2687
2688 * mips.h: Reworked the hazard information somewhat, and fixed some
2689 bugs in the instruction hazard descriptions.
2690
2691Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2692
2693 * m88k.h: Corrected a couple of opcodes.
2694
2695Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2696
2697 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2698 new version includes instruction hazard information, but is
2699 otherwise reasonably similar.
2700
2701Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2702
2703 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2704
2705Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2706
2707 Patches from Jeff Law, law@cs.utah.edu:
2708 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2709 Make the tables be the same for the following instructions:
2710 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2711 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2712 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2713 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2714 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2715 "fcmp", and "ftest".
2716
2717 * hppa.h: Make new and old tables the same for "break", "mtctl",
2718 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2719 Fix typo in last patch. Collapse several #ifdefs into a
2720 single #ifdef.
2721
2722 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2723 of the comments up-to-date.
2724
2725 * hppa.h: Update "free list" of letters and update
2726 comments describing each letter's function.
2727
4f1d9bd8
NC
2728Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2729
2730 * h8300.h: Lots of little fixes for the h8/300h.
2731
2732Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2733
2734 Support for H8/300-H
2735 * h8300.h: Lots of new opcodes.
2736
252b5132
RH
2737Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2738
2739 * h8300.h: checkpoint, includes H8/300-H opcodes.
2740
2741Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2742
2743 * Patches from Jeffrey Law <law@cs.utah.edu>.
2744 * hppa.h: Rework single precision FP
2745 instructions so that they correctly disassemble code
2746 PA1.1 code.
2747
2748Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2749
2750 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2751 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2752
2753Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2754
2755 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2756 gdb will define it for now.
2757
2758Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2759
2760 * sparc.h: Don't end enumerator list with comma.
2761
2762Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2763
2764 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2765 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2766 ("bc2t"): Correct typo.
2767 ("[ls]wc[023]"): Use T rather than t.
2768 ("c[0123]"): Define general coprocessor instructions.
2769
2770Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2771
2772 * m68k.h: Move split point for gcc compilation more towards
2773 middle.
2774
2775Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2776
2777 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2778 simply wrong, ics, rfi, & rfsvc were missing).
2779 Add "a" to opr_ext for "bb". Doc fix.
2780
2781Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2782
adadcc0c
AM
2783 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2784 * mips.h: Add casts, to suppress warnings about shifting too much.
2785 * m68k.h: Document the placement code '9'.
252b5132
RH
2786
2787Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2788
adadcc0c 2789 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
252b5132
RH
2790 allows callers to break up the large initialized struct full of
2791 opcodes into two half-sized ones. This permits GCC to compile
2792 this module, since it takes exponential space for initializers.
adadcc0c 2793 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
252b5132
RH
2794
2795Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2796
adadcc0c
AM
2797 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2798 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
252b5132
RH
2799 initialized structs in it.
2800
2801Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2802
2803 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
adadcc0c
AM
2804 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2805 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
252b5132
RH
2806
2807Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2808
2809 * mips.h: document "i" and "j" operands correctly.
2810
2811Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2812
2813 * mips.h: Removed endianness dependency.
2814
2815Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2816
2817 * h8300.h: include info on number of cycles per instruction.
2818
2819Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2820
adadcc0c 2821 * hppa.h: Move handy aliases to the front. Fix masks for extract
252b5132
RH
2822 and deposit instructions.
2823
2824Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2825
2826 * i386.h: accept shld and shrd both with and without the shift
2827 count argument, which is always %cl.
2828
2829Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2830
2831 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2832 (one_byte_segment_defaults, two_byte_segment_defaults,
2833 i386_prefixtab_end): Ditto.
2834
2835Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2836
2837 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2838 for operand 2; from John Carr, jfc@dsg.dec.com.
2839
2840Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2841
2842 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2843 always use 16-bit offsets. Makes calculated-size jump tables
2844 feasible.
2845
2846Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2847
2848 * i386.h: Fix one-operand forms of in* and out* patterns.
2849
2850Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2851
2852 * m68k.h: Added CPU32 support.
2853
2854Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2855
adadcc0c 2856 * mips.h (break): Disassemble the argument. Patch from
252b5132
RH
2857 jonathan@cs.stanford.edu (Jonathan Stone).
2858
2859Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2860
2861 * m68k.h: merged Motorola and MIT syntax.
2862
2863Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2864
2865 * m68k.h (pmove): make the tests less strict, the 68k book is
2866 wrong.
2867
2868Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2869
2870 * m68k.h (m68ec030): Defined as alias for 68030.
2871 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2872 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2873 them. Tightened description of "fmovex" to distinguish it from
2874 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2875 up descriptions that claimed versions were available for chips not
2876 supporting them. Added "pmovefd".
2877
2878Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2879
2880 * m68k.h: fix where the . goes in divull
2881
2882Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2883
2884 * m68k.h: the cas2 instruction is supposed to be written with
2885 indirection on the last two operands, which can be either data or
2886 address registers. Added a new operand type 'r' which accepts
2887 either register type. Added new cases for cas2l and cas2w which
2888 use them. Corrected masks for cas2 which failed to recognize use
2889 of address register.
2890
2891Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2892
adadcc0c 2893 * m68k.h: Merged in patches (mostly m68040-specific) from
252b5132
RH
2894 Colin Smith <colin@wrs.com>.
2895
adadcc0c 2896 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
252b5132
RH
2897 base). Also cleaned up duplicates, re-ordered instructions for
2898 the sake of dis-assembling (so aliases come after standard names).
2899 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2900
2901Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2902
2903 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2904 all missing .s
2905
2906Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2907
2908 * sparc.h: Moved tables to BFD library.
2909
2910 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2911
2912Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2913
adadcc0c 2914 * h8300.h: Finish filling in all the holes in the opcode table,
252b5132
RH
2915 so that the Lucid C compiler can digest this as well...
2916
2917Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2918
adadcc0c 2919 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
252b5132
RH
2920 Fix opcodes on various sizes of fild/fist instructions
2921 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2922 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2923
2924Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2925
adadcc0c 2926 * h8300.h: Fill in all the holes in the opcode table so that the
252b5132
RH
2927 losing HPUX C compiler can digest this...
2928
2929Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2930
adadcc0c 2931 * mips.h: Fix decoding of coprocessor instructions, somewhat.
252b5132
RH
2932 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2933
2934Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2935
2936 * sparc.h: Add new architecture variant sparclite; add its scan
2937 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2938
2939Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2940
adadcc0c 2941 * mips.h: Add some more opcode synonyms (from Frank Yellin,
252b5132
RH
2942 fy@lucid.com).
2943
2944Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2945
adadcc0c 2946 * rs6k.h: New version from IBM (Metin).
252b5132
RH
2947
2948Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2949
2950 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
adadcc0c 2951 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
252b5132
RH
2952
2953Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2954
adadcc0c 2955 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
252b5132
RH
2956
2957Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2958
adadcc0c 2959 * m68k.h (one, two): Cast macro args to unsigned to suppress
252b5132
RH
2960 complaints from compiler and lint about integer overflow during
2961 shift.
2962
2963Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2964
adadcc0c 2965 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
252b5132
RH
2966
2967Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2968
adadcc0c 2969 * mips.h: Make bitfield layout depend on the HOST compiler,
252b5132
RH
2970 not on the TARGET system.
2971
2972Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2973
2974 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2975 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2976 <TRANLE@INTELLICORP.COM>.
2977
2978Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2979
2980 * h8300.h: turned op_type enum into #define list
2981
2982Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2983
adadcc0c 2984 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
252b5132
RH
2985 similar instructions -- they've been renamed to "fitoq", etc.
2986 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2987 number of arguments.
adadcc0c 2988 * h8300.h: Remove extra ; which produces compiler warning.
252b5132
RH
2989
2990Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2991
adadcc0c 2992 * sparc.h: fix opcode for tsubcctv.
252b5132
RH
2993
2994Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2995
2996 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2997
2998Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2999
adadcc0c 3000 * sparc.h (nop): Made the 'lose' field be even tighter,
252b5132
RH
3001 so only a standard 'nop' is disassembled as a nop.
3002
3003Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
3004
3005 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
3006 disassembled as a nop.
3007
4f1d9bd8
NC
3008Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
3009
adadcc0c 3010 * m68k.h, sparc.h: ANSIfy enums.
4f1d9bd8 3011
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RH
3012Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
3013
3014 * sparc.h: fix a typo.
3015
3016Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
3017
3018 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3019 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 3020 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
3021
3022\f
3023Local Variables:
3024version-control: never
3025End:
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