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Fix cpu_flags for sys{enter,exit} fx{save,restore}
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
558b0a60
AM		 12000-05-13 Alan Modra <alan@linuxcare.com.au>,
2
3 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
4
e413e4e9
AM		 52000-05-13 Alan Modra <alan@linuxcare.com.au>,
6 Alexander Sokolov <robocop@netlink.ru>
7
8 * i386.h (i386_optab): Add cpu_flags for all instructions.
9
102000-05-13 Alan Modra <alan@linuxcare.com.au>
11
12 From Gavin Romig-Koch <gavin@cygnus.com>
13 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
14
5c84d377
TW		 152000-05-04 Timothy Wall <twall@cygnus.com>
16
17 * tic54x.h: New.
18
966f959b
C		 192000-05-03 J.T. Conklin <jtc@redback.com>
20
21 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
22 (PPC_OPERAND_VR): New operand flag for vector registers.
23
c5d05dbb
JL		 242000-05-01 Kazu Hirata <kazu@hxi.com>
25
26 * h8300.h (EOP): Add missing initializer.
27
a7fba0e0
JL		 28Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
29
30 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
31 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
32 New operand types l,y,&,fe,fE,fx added to support above forms.
33 (pa_opcodes): Replaced usage of 'x' as source/target for
34 floating point double-word loads/stores with 'fx'.
35
800eeca4
JW		 36Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
37 David Mosberger <davidm@hpl.hp.com>
38 Timothy Wall <twall@cygnus.com>
39 Jim Wilson <wilson@cygnus.com>
40
41 * ia64.h: New file.
42
ba23e138
NC		 432000-03-27 Nick Clifton <nickc@cygnus.com>
44
45 * d30v.h (SHORT_A1): Fix value.
46 (SHORT_AR): Renumber so that it is at the end of the list of short
47 instructions, not the end of the list of long instructions.
48
d0b47220
AM		 492000-03-26 Alan Modra <alan@linuxcare.com>
50
51 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
52 problem isn't really specific to Unixware.
53 (OLDGCC_COMPAT): Define.
54 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
55 destination %st(0).
56 Fix lots of comments.
57
866afedc
NC		 582000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
59
60 * d30v.h:
61 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
62 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
63 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
64 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
65 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
66 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
67 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
68
cc5ca5ce
AM		 692000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
70
71 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
72 fistpd without suffix.
73
68e324a2
NC		 742000-02-24 Nick Clifton <nickc@cygnus.com>
75
76 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
77 'signed_overflow_ok_p'.
78 Delete prototypes for cgen_set_flags() and cgen_get_flags().
79
60f036a2
AH		 802000-02-24 Andrew Haley <aph@cygnus.com>
81
82 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
83 (CGEN_CPU_TABLE): flags: new field.
84 Add prototypes for new functions.
85
9b9b5cd4
AM		 862000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
87
88 * i386.h: Add some more UNIXWARE_COMPAT comments.
89
5b93d8bb
AM		 902000-02-23 Linas Vepstas <linas@linas.org>
91
92 * i370.h: New file.
93
87f398dd
AH		 942000-02-22 Andrew Haley <aph@cygnus.com>
95
96 * mips.h: (OPCODE_IS_MEMBER): Add comment.
97
367c01af
AH		 981999-12-30 Andrew Haley <aph@cygnus.com>
99
9a1e79ca
AH		 100 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
101 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
102 insns.
367c01af 103
add0c677
AM		 1042000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
105
106 * i386.h: Qualify intel mode far call and jmp with x_Suf.
107
3138f287
AM		 1081999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
109
110 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
111 indirect jumps and calls. Add FF/3 call for intel mode.
112
ccecd07b
JL		 113Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
114
115 * mn10300.h: Add new operand types. Add new instruction formats.
116
b37e19e9
JL		 117Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
118
119 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
120 instruction.
121
5fce5ddf
GRK		 1221999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
123
124 * mips.h (INSN_ISA5): New.
125
2bd7f1f3
GRK		 1261999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
127
128 * mips.h (OPCODE_IS_MEMBER): New.
129
4df2b5c5
NC		 1301999-10-29 Nick Clifton <nickc@cygnus.com>
131
132 * d30v.h (SHORT_AR): Define.
133
446a06c9
MM		 1341999-10-18 Michael Meissner <meissner@cygnus.com>
135
136 * alpha.h (alpha_num_opcodes): Convert to unsigned.
137 (alpha_num_operands): Ditto.
138
eca04c6a
JL		 139Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
140
141 * hppa.h (pa_opcodes): Add load and store cache control to
142 instructions. Add ordered access load and store.
143
144 * hppa.h (pa_opcode): Add new entries for addb and addib.
145
146 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
147
148 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
149
c43185de
DN		 150Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
151
152 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
153
ec3533da
JL		 154Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
155
390f858d
JL		 156 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
157 and "be" using completer prefixes.
158
8c47ebd9
JL		 159 * hppa.h (pa_opcodes): Add initializers to silence compiler.
160
ec3533da
JL		 161 * hppa.h: Update comments about character usage.
162
18369bea
JL		 163Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
164
165 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
166 up the new fstw & bve instructions.
167
c36efdd2
JL		 168Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
169
d3ffb032
JL		 170 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
171 instructions.
172
c49ec3da
JL		 173 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
174
5d2e7ecc
JL		 175 * hppa.h (pa_opcodes): Add long offset double word load/store
176 instructions.
177
6397d1a2
JL		 178 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
179 stores.
180
142f0fe0
JL		 181 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
182
f5a68b45
JL		 183 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
184
8235801e
JL		 185 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
186
35184366
JL		 187 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
188
f0bfde5e
JL		 189 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
190
27bbbb58
JL		 191 * hppa.h (pa_opcodes): Add support for "b,l".
192
c36efdd2
JL		 193 * hppa.h (pa_opcodes): Add support for "b,gate".
194
f2727d04
JL		 195Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
196
9392fb11
JL		 197 * hppa.h (pa_opcodes): Use 'fX' for first register operand
198 in xmpyu.
199
e0c52e99
JL		 200 * hppa.h (pa_opcodes): Fix mask for probe and probei.
201
f2727d04
JL		 202 * hppa.h (pa_opcodes): Fix mask for depwi.
203
52d836e2
JL		 204Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
205
206 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
207 an explicit output argument.
208
90765e3a
JL		 209Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
210
211 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
212 Add a few PA2.0 loads and store variants.
213
8340b17f
ILT		 2141999-09-04 Steve Chamberlain <sac@pobox.com>
215
216 * pj.h: New file.
217
5f47d35b
AM		 2181999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
219
220 * i386.h (i386_regtab): Move %st to top of table, and split off
221 other fp reg entries.
222 (i386_float_regtab): To here.
223
1c143202
JL		 224Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
225
7d8fdb64
JL		 226 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
227 by 'f'.
228
90927b9c
JL		 229 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
230 Add supporting args.
231
1d16bf9c
JL		 232 * hppa.h: Document new completers and args.
233 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
234 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
235 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
236 pmenb and pmdis.
237
96226a68
JL		 238 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
239 hshr, hsub, mixh, mixw, permh.
240
5d4ba527
JL		 241 * hppa.h (pa_opcodes): Change completers in instructions to
242 use 'c' prefix.
243
e9fc28c6
JL		 244 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
245 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
246
1c143202
JL		 247 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
248 fnegabs to use 'I' instead of 'F'.
249
9e525108
AM		 2501999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
251
252 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
253 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
254 Alphabetically sort PIII insns.
255
e8da1bf1
DE		 256Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
257
258 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
259
7d627258
JL		 260Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
261
5696871a
JL		 262 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
263 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
264
7d627258
JL		 265 * hppa.h: Document 64 bit condition completers.
266
c5e52916
JL		 267Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
268
269 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
270
eecb386c
AM		 2711999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
272
273 * i386.h (i386_optab): Add DefaultSize modifier to all insns
274 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
275 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
276
88a380f3
JL		 277Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
278 Jeff Law <law@cygnus.com>
279
280 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
281
282 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 283
284 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
285 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
286
145cf1f0
AM		 2871999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
288
289 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
290
73826640
JL		 291Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
292
293 * hppa.h (struct pa_opcode): Add new field "flags".
294 (FLAGS_STRICT): Define.
295
b65db252
JL		 296Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
297 Jeff Law <law@cygnus.com>
298
f7fc668b
JL		 299 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
300
301 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 302
10084519
AM		 3031999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
304
305 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
306 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
307 flag to fcomi and friends.
308
cd8a80ba
JL		 309Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
310
311 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
312 integer logical instructions.
313
1fca749b
ILT		 3141999-05-28 Linus Nordberg <linus.nordberg@canit.se>
315
316 * m68k.h: Document new formats `E', `G', `H' and new places `N',
317 `n', `o'.
318
319 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
320 and new places `m', `M', `h'.
321
aa008907
JL		 322Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
323
324 * hppa.h (pa_opcodes): Add several processor specific system
325 instructions.
326
e26b85f0
JL		 327Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
328
329 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
330 "addb", and "addib" to be used by the disassembler.
331
c608c12e
AM		 3321999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
333
334 * i386.h (ReverseModrm): Remove all occurences.
335 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
336 movmskps, pextrw, pmovmskb, maskmovq.
337 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
338 ignore the data size prefix.
339
340 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
341 Mostly stolen from Doug Ledford <dledford@redhat.com>
342
45c18104
RH		 343Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
344
345 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
346
252b5132
RH		 3471999-04-14 Doug Evans <devans@casey.cygnus.com>
348
349 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
350 (CGEN_ATTR_TYPE): Update.
351 (CGEN_ATTR_MASK): Number booleans starting at 0.
352 (CGEN_ATTR_VALUE): Update.
353 (CGEN_INSN_ATTR): Update.
354
355Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
356
357 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
358 instructions.
359
360Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
361
362 * hppa.h (bb, bvb): Tweak opcode/mask.
363
364
3651999-03-22 Doug Evans <devans@casey.cygnus.com>
366
367 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
368 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
369 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
370 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
371 Delete member max_insn_size.
372 (enum cgen_cpu_open_arg): New enum.
373 (cpu_open): Update prototype.
374 (cpu_open_1): Declare.
375 (cgen_set_cpu): Delete.
376
3771999-03-11 Doug Evans <devans@casey.cygnus.com>
378
379 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
380 (CGEN_OPERAND_NIL): New macro.
381 (CGEN_OPERAND): New member `type'.
382 (@arch@_cgen_operand_table): Delete decl.
383 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
384 (CGEN_OPERAND_TABLE): New struct.
385 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
386 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
387 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
388 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
389 {get,set}_{int,vma}_operand.
390 (@arch@_cgen_cpu_open): New arg `isa'.
391 (cgen_set_cpu): Ditto.
392
393Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
394
395 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
396
3971999-02-25 Doug Evans <devans@casey.cygnus.com>
398
399 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
400 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
401 enum cgen_hw_type.
402 (CGEN_HW_TABLE): New struct.
403 (hw_table): Delete declaration.
404 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
405 to table entry to enum.
406 (CGEN_OPINST): Ditto.
407 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
408
409Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
410
411 * alpha.h (AXP_OPCODE_EV6): New.
412 (AXP_OPCODE_NOPAL): Include it.
413
4141999-02-09 Doug Evans <devans@casey.cygnus.com>
415
416 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
417 All uses updated. New members int_insn_p, max_insn_size,
418 parse_operand,insert_operand,extract_operand,print_operand,
419 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
420 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
421 extract_handlers,print_handlers.
422 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
423 (CGEN_ATTR_BOOL_OFFSET): New macro.
424 (CGEN_ATTR_MASK): Subtract it to compute bit number.
425 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
426 (cgen_opcode_handler): Renamed from cgen_base.
427 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
428 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
429 all uses updated.
430 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
431 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
432 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
433 (CGEN_OPCODE,CGEN_IBASE): New types.
434 (CGEN_INSN): Rewrite.
435 (CGEN_{ASM,DIS}_HASH*): Delete.
436 (init_opcode_table,init_ibld_table): Declare.
437 (CGEN_INSN_ATTR): New type.
438
439Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
440
441 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
442 (x_FP, d_FP, dls_FP, sldx_FP): Define.
443 Change *Suf definitions to include x and d suffixes.
444 (movsx): Use w_Suf and b_Suf.
445 (movzx): Likewise.
446 (movs): Use bwld_Suf.
447 (fld): Change ordering. Use sld_FP.
448 (fild): Add Intel Syntax equivalent of fildq.
449 (fst): Use sld_FP.
450 (fist): Use sld_FP.
451 (fstp): Use sld_FP. Add x_FP version.
452 (fistp): LLongMem version for Intel Syntax.
453 (fcom, fcomp): Use sld_FP.
454 (fadd, fiadd, fsub): Use sld_FP.
455 (fsubr): Use sld_FP.
456 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
457
4581999-01-27 Doug Evans <devans@casey.cygnus.com>
459
460 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
461 CGEN_MODE_UINT.
462
463Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
464
465 * hppa.h (bv): Fix mask.
466
4671999-01-05 Doug Evans <devans@casey.cygnus.com>
468
469 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
470 (CGEN_ATTR): Use it.
471 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
472 (CGEN_ATTR_TABLE): New member dfault.
473
4741998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
475
476 * mips.h (MIPS16_INSN_BRANCH): New.
477
478Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
479
480 The following is part of a change made by Edith Epstein
481 <eepstein@sophia.cygnus.com> as part of a project to merge in
482 changes by HP; HP did not create ChangeLog entries.
483
484 * hppa.h (completer_chars): list of chars to not put a space
485 after.
486
487Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
488
489 * i386.h (i386_optab): Permit w suffix on processor control and
490 status word instructions.
491
4921998-11-30 Doug Evans <devans@casey.cygnus.com>
493
494 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
495 (struct cgen_keyword_entry): Ditto.
496 (struct cgen_operand): Ditto.
497 (CGEN_IFLD): New typedef, with associated access macros.
498 (CGEN_IFMT): New typedef, with associated access macros.
499 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
500 (CGEN_IVALUE): New typedef.
501 (struct cgen_insn): Delete const on syntax,attrs members.
502 `format' now points to format data. Type of `value' is now
503 CGEN_IVALUE.
504 (struct cgen_opcode_table): New member ifld_table.
505
5061998-11-18 Doug Evans <devans@casey.cygnus.com>
507
508 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
509 (CGEN_OPERAND_INSTANCE): New member `attrs'.
510 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
511 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
512 (cgen_opcode_table): Update type of dis_hash fn.
513 (extract_operand): Update type of `insn_value' arg.
514
515Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
516
517 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
518
519Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
520
521 * mips.h (INSN_MULT): Added.
522
523Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
524
525 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
526
527Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
528
529 * cgen.h (CGEN_INSN_INT): New typedef.
530 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
531 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
532 (CGEN_INSN_BYTES_PTR): New typedef.
533 (CGEN_EXTRACT_INFO): New typedef.
534 (cgen_insert_fn,cgen_extract_fn): Update.
535 (cgen_opcode_table): New member `insn_endian'.
536 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
537 (insert_operand,extract_operand): Update.
538 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
539
540Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
541
542 * cgen.h (CGEN_ATTR_BOOLS): New macro.
543 (struct CGEN_HW_ENTRY): New member `attrs'.
544 (CGEN_HW_ATTR): New macro.
545 (struct CGEN_OPERAND_INSTANCE): New member `name'.
546 (CGEN_INSN_INVALID_P): New macro.
547
548Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
549
550 * hppa.h: Add "fid".
551
552Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
553
554 From Robert Andrew Dale <rob@nb.net>
555 * i386.h (i386_optab): Add AMD 3DNow! instructions.
556 (AMD_3DNOW_OPCODE): Define.
557
558Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
559
560 * d30v.h (EITHER_BUT_PREFER_MU): Define.
561
562Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
563
564 * cgen.h (cgen_insn): #if 0 out element `cdx'.
565
566Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
567
568 Move all global state data into opcode table struct, and treat
569 opcode table as something that is "opened/closed".
570 * cgen.h (CGEN_OPCODE_DESC): New type.
571 (all fns): New first arg of opcode table descriptor.
572 (cgen_set_parse_operand_fn): Add prototype.
573 (cgen_current_machine,cgen_current_endian): Delete.
574 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
575 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
576 dis_hash_table,dis_hash_table_entries.
577 (opcode_open,opcode_close): Add prototypes.
578
579 * cgen.h (cgen_insn): New element `cdx'.
580
581Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
582
583 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
584
585Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
586
587 * mn10300.h: Add "no_match_operands" field for instructions.
588 (MN10300_MAX_OPERANDS): Define.
589
590Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
591
592 * cgen.h (cgen_macro_insn_count): Declare.
593
594Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
595
596 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
597 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
598 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
599 set_{int,vma}_operand.
600
601Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
602
603 * mn10300.h: Add "machine" field for instructions.
604 (MN103, AM30): Define machine types.
605
606Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
607
608 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
609
6101998-06-18 Ulrich Drepper <drepper@cygnus.com>
611
612 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
613
614Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
615
616 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
617 and ud2b.
618 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
619 those that happen to be implemented on pentiums.
620
621Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
622
623 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
624 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
625 with Size16|IgnoreSize or Size32|IgnoreSize.
626
627Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
628
629 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
630 (REPE): Rename to REPE_PREFIX_OPCODE.
631 (i386_regtab_end): Remove.
632 (i386_prefixtab, i386_prefixtab_end): Remove.
633 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
634 of md_begin.
635 (MAX_OPCODE_SIZE): Define.
636 (i386_optab_end): Remove.
637 (sl_Suf): Define.
638 (sl_FP): Use sl_Suf.
639
640 * i386.h (i386_optab): Allow 16 bit displacement for `mov
641 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
642 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
643 data32, dword, and adword prefixes.
644 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
645 regs.
646
647Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
648
649 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
650
651 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
652 register operands, because this is a common idiom. Flag them with
653 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
654 fdivrp because gcc erroneously generates them. Also flag with a
655 warning.
656
657 * i386.h: Add suffix modifiers to most insns, and tighter operand
658 checks in some cases. Fix a number of UnixWare compatibility
659 issues with float insns. Merge some floating point opcodes, using
660 new FloatMF modifier.
661 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
662 consistency.
663
664 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
665 IgnoreDataSize where appropriate.
666
667Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
668
669 * i386.h: (one_byte_segment_defaults): Remove.
670 (two_byte_segment_defaults): Remove.
671 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
672
673Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
674
675 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
676 (cgen_hw_lookup_by_num): Declare.
677
678Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
679
680 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
681 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
682
683Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
684
685 * cgen.h (cgen_asm_init_parse): Delete.
686 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
687 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
688
689Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
690
691 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
692 (cgen_asm_finish_insn): Update prototype.
693 (cgen_insn): New members num, data.
694 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
695 dis_hash, dis_hash_table_size moved to ...
696 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
697 All uses updated. New members asm_hash_p, dis_hash_p.
698 (CGEN_MINSN_EXPANSION): New struct.
699 (cgen_expand_macro_insn): Declare.
700 (cgen_macro_insn_count): Declare.
701 (get_insn_operands): Update prototype.
702 (lookup_get_insn_operands): Declare.
703
704Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
705
706 * i386.h (i386_optab): Change iclrKludge and imulKludge to
707 regKludge. Add operands types for string instructions.
708
709Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
710
711 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
712 table.
713
714Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
715
716 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
717 for `gettext'.
718
719Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
720
721 * i386.h: Remove NoModrm flag from all insns: it's never checked.
722 Add IsString flag to string instructions.
723 (IS_STRING): Don't define.
724 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
725 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
726 (SS_PREFIX_OPCODE): Define.
727
728Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
729
730 * i386.h: Revert March 24 patch; no more LinearAddress.
731
732Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
733
734 * i386.h (i386_optab): Remove fwait (9b) from all floating point
735 instructions, and instead add FWait opcode modifier. Add short
736 form of fldenv and fstenv.
737 (FWAIT_OPCODE): Define.
738
739 * i386.h (i386_optab): Change second operand constraint of `mov
740 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
741 allow legal instructions such as `movl %gs,%esi'
742
743Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
744
745 * h8300.h: Various changes to fully bracket initializers.
746
747Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
748
749 * i386.h: Set LinearAddress for lidt and lgdt.
750
751Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
752
753 * cgen.h (CGEN_BOOL_ATTR): New macro.
754
755Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
756
757 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
758
759Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
760
761 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
762 (cgen_insn): Record syntax and format entries here, rather than
763 separately.
764
765Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
766
767 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
768
769Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
770
771 * cgen.h (cgen_insert_fn): Change type of result to const char *.
772 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
773 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
774
775Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
776
777 * cgen.h (lookup_insn): New argument alias_p.
778
779Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
780
781Fix rac to accept only a0:
782 * d10v.h (OPERAND_ACC): Split into:
783 (OPERAND_ACC0, OPERAND_ACC1) .
784 (OPERAND_GPR): Define.
785
786Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
787
788 * cgen.h (CGEN_FIELDS): Define here.
789 (CGEN_HW_ENTRY): New member `type'.
790 (hw_list): Delete decl.
791 (enum cgen_mode): Declare.
792 (CGEN_OPERAND): New member `hw'.
793 (enum cgen_operand_instance_type): Declare.
794 (CGEN_OPERAND_INSTANCE): New type.
795 (CGEN_INSN): New member `operands'.
796 (CGEN_OPCODE_DATA): Make hw_list const.
797 (get_insn_operands,lookup_insn): Add prototypes for.
798
799Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
800
801 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
802 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
803 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
804 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
805
806Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
807
808 * cgen.h: Correct typo in comment end marker.
809
810Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
811
812 * tic30.h: New file.
813
814Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
815
816 * cgen.h: Add prototypes for cgen_save_fixups(),
817 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
818 of cgen_asm_finish_insn() to return a char *.
819
820Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
821
822 * cgen.h: Formatting changes to improve readability.
823
824Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
825
826 * cgen.h (*): Clean up pass over `struct foo' usage.
827 (CGEN_ATTR): Make unsigned char.
828 (CGEN_ATTR_TYPE): Update.
829 (CGEN_ATTR_{ENTRY,TABLE}): New types.
830 (cgen_base): Move member `attrs' to cgen_insn.
831 (CGEN_KEYWORD): New member `null_entry'.
832 (CGEN_{SYNTAX,FORMAT}): New types.
833 (cgen_insn): Format and syntax separated from each other.
834
835Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
836
837 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
838 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
839 flags_{used,set} long.
840 (d30v_operand): Make flags field long.
841
842Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
843
844 * m68k.h: Fix comment describing operand types.
845
846Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
847
848 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
849 everything else after down.
850
851Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
852
853 * d10v.h (OPERAND_FLAG): Split into:
854 (OPERAND_FFLAG, OPERAND_CFLAG) .
855
856Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
857
858 * mips.h (struct mips_opcode): Changed comments to reflect new
859 field usage.
860
861Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
862
863 * mips.h: Added to comments a quick-ref list of all assigned
864 operand type characters.
865 (OP_{MASK,SH}_PERFREG): New macros.
866
867Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
868
869 * sparc.h: Add '_' and '/' for v9a asr's.
870 Patch from David Miller <davem@vger.rutgers.edu>
871
872Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
873
874 * h8300.h: Bit ops with absolute addresses not in the 8 bit
875 area are not available in the base model (H8/300).
876
877Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
878
879 * m68k.h: Remove documentation of ` operand specifier.
880
881Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
882
883 * m68k.h: Document q and v operand specifiers.
884
885Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
886
887 * v850.h (struct v850_opcode): Add processors field.
888 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
889 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
890 (PROCESSOR_V850EA): New bit constants.
891
892Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
893
894 Merge changes from Martin Hunt:
895
896 * d30v.h: Allow up to 64 control registers. Add
897 SHORT_A5S format.
898
899 * d30v.h (LONG_Db): New form for delayed branches.
900
901 * d30v.h: (LONG_Db): New form for repeati.
902
903 * d30v.h (SHORT_D2B): New form.
904
905 * d30v.h (SHORT_A2): New form.
906
907 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
908 registers are used. Needed for VLIW optimization.
909
910Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
911
912 * cgen.h: Move assembler interface section
913 up so cgen_parse_operand_result is defined for cgen_parse_address.
914 (cgen_parse_address): Update prototype.
915
916Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
917
918 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
919
920Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
921
922 * i386.h (two_byte_segment_defaults): Correct base register 5 in
923 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
924 <paubert@iram.es>.
925
926 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
927 <paubert@iram.es>.
928
929 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
930 <paubert@iram.es>.
931
932 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
933 (JUMP_ON_ECX_ZERO): Remove commented out macro.
934
935Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
936
937 * v850.h (V850_NOT_R0): New flag.
938
939Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
940
941 * v850.h (struct v850_opcode): Remove flags field.
942
943Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
944
945 * v850.h (struct v850_opcode): Add flags field.
946 (struct v850_operand): Extend meaning of 'bits' and 'shift'
947 fields.
948 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
949 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
950
951Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
952
953 * arc.h: New file.
954
955Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
956
957 * sparc.h (sparc_opcodes): Declare as const.
958
959Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
960
961 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
962 uses single or double precision floating point resources.
963 (INSN_NO_ISA, INSN_ISA1): Define.
964 (cpu specific INSN macros): Tweak into bitmasks outside the range
965 of INSN_ISA field.
966
967Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
968
969 * i386.h: Fix pand opcode.
970
971Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
972
973 * mips.h: Widen INSN_ISA and move it to a more convenient
974 bit position. Add INSN_3900.
975
976Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
977
978 * mips.h (struct mips_opcode): added new field membership.
979
980Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
981
982 * i386.h (movd): only Reg32 is allowed.
983
984 * i386.h: add fcomp and ud2. From Wayne Scott
985 <wscott@ichips.intel.com>.
986
987Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
988
989 * i386.h: Add MMX instructions.
990
991Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
992
993 * i386.h: Remove W modifier from conditional move instructions.
994
995Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
996
997 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
998 with no arguments to match that generated by the UnixWare
999 assembler.
1000
1001Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1002
1003 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1004 (cgen_parse_operand_fn): Declare.
1005 (cgen_init_parse_operand): Declare.
1006 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1007 new argument `want'.
1008 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1009 (enum cgen_parse_operand_type): New enum.
1010
1011Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1012
1013 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1014
1015Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1016
1017 * cgen.h: New file.
1018
1019Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1020
1021 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1022 fdivrp.
1023
1024Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1025
1026 * v850.h (extract): Make unsigned.
1027
1028Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1029
1030 * i386.h: Add iclr.
1031
1032Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1033
1034 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1035 take a direction bit.
1036
1037Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1038
1039 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1040
1041Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1042
1043 * sparc.h: Include <ansidecl.h>. Update function declarations to
1044 use prototypes, and to use const when appropriate.
1045
1046Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1047
1048 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1049
1050Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1051
1052 * d10v.h: Change pre_defined_registers to
1053 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1054
1055Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1056
1057 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1058 Change mips_opcodes from const array to a pointer,
1059 and change bfd_mips_num_opcodes from const int to int,
1060 so that we can increase the size of the mips opcodes table
1061 dynamically.
1062
1063Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1064
1065 * d30v.h (FLAG_X): Remove unused flag.
1066
1067Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1068
1069 * d30v.h: New file.
1070
1071Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1072
1073 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1074 (PDS_VALUE): Macro to access value field of predefined symbols.
1075 (tic80_next_predefined_symbol): Add prototype.
1076
1077Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1078
1079 * tic80.h (tic80_symbol_to_value): Change prototype to match
1080 change in function, added class parameter.
1081
1082Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1083
1084 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1085 endmask fields, which are somewhat weird in that 0 and 32 are
1086 treated exactly the same.
1087
1088Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1089
1090 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1091 rather than a constant that is 2**X. Reorder them to put bits for
1092 operands that have symbolic names in the upper bits, so they can
1093 be packed into an int where the lower bits contain the value that
1094 corresponds to that symbolic name.
1095 (predefined_symbo): Add struct.
1096 (tic80_predefined_symbols): Declare array of translations.
1097 (tic80_num_predefined_symbols): Declare size of that array.
1098 (tic80_value_to_symbol): Declare function.
1099 (tic80_symbol_to_value): Declare function.
1100
1101Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1102
1103 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1104
1105Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1106
1107 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1108 be the destination register.
1109
1110Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1111
1112 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1113 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1114 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1115 that the opcode can have two vector instructions in a single
1116 32 bit word and we have to encode/decode both.
1117
1118Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1119
1120 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1121 TIC80_OPERAND_RELATIVE for PC relative.
1122 (TIC80_OPERAND_BASEREL): New flag bit for register
1123 base relative.
1124
1125Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1126
1127 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1128
1129Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1130
1131 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1132 ":s" modifier for scaling.
1133
1134Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1135
1136 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1137 (TIC80_OPERAND_M_LI): Ditto
1138
1139Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1140
1141 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1142 (TIC80_OPERAND_CC): New define for condition code operand.
1143 (TIC80_OPERAND_CR): New define for control register operand.
1144
1145Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1146
1147 * tic80.h (struct tic80_opcode): Name changed.
1148 (struct tic80_opcode): Remove format field.
1149 (struct tic80_operand): Add insertion and extraction functions.
1150 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1151 correct ones.
1152 (FMT_*): Ditto.
1153
1154Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1155
1156 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1157 type IV instruction offsets.
1158
1159Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1160
1161 * tic80.h: New file.
1162
1163Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1164
1165 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1166
1167Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1168
1169 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1170 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1171 * v850.h: Fix comment, v850_operand not powerpc_operand.
1172
1173Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1174
1175 * mn10200.h: Flesh out structures and definitions needed by
1176 the mn10200 assembler & disassembler.
1177
1178Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1179
1180 * mips.h: Add mips16 definitions.
1181
1182Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1183
1184 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1185
1186Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1187
1188 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1189 (MN10300_OPERAND_MEMADDR): Define.
1190
1191Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1192
1193 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1194
1195Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1196
1197 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1198
1199Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1200
1201 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1202
1203Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1204
1205 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1206
1207Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1208
1209 * alpha.h: Don't include "bfd.h"; private relocation types are now
1210 negative to minimize problems with shared libraries. Organize
1211 instruction subsets by AMASK extensions and PALcode
1212 implementation.
1213 (struct alpha_operand): Move flags slot for better packing.
1214
1215Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1216
1217 * v850.h (V850_OPERAND_RELAX): New operand flag.
1218
1219Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1220
1221 * mn10300.h (FMT_*): Move operand format definitions
1222 here.
1223
1224Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1225
1226 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1227
1228Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1229
1230 * mn10300.h (mn10300_opcode): Add "format" field.
1231 (MN10300_OPERAND_*): Define.
1232
1233Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1234
1235 * mn10x00.h: Delete.
1236 * mn10200.h, mn10300.h: New files.
1237
1238Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1239
1240 * mn10x00.h: New file.
1241
1242Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1243
1244 * v850.h: Add new flag to indicate this instruction uses a PC
1245 displacement.
1246
1247Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1248
1249 * h8300.h (stmac): Add missing instruction.
1250
1251Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1252
1253 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1254 field.
1255
1256Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1257
1258 * v850.h (V850_OPERAND_EP): Define.
1259
1260 * v850.h (v850_opcode): Add size field.
1261
1262Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1263
1264 * v850.h (v850_operands): Add insert and extract fields, pointers
1265 to functions used to handle unusual operand encoding.
1266 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1267 V850_OPERAND_SIGNED): Defined.
1268
1269Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1270
1271 * v850.h (v850_operands): Add flags field.
1272 (OPERAND_REG, OPERAND_NUM): Defined.
1273
1274Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1275
1276 * v850.h: New file.
1277
1278Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1279
1280 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1281 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1282 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1283 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1284 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1285 Defined.
1286
1287Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1288
1289 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1290 a 3 bit space id instead of a 2 bit space id.
1291
1292Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1293
1294 * d10v.h: Add some additional defines to support the
1295 assembler in determining which operations can be done in parallel.
1296
1297Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1298
1299 * h8300.h (SN): Define.
1300 (eepmov.b): Renamed from "eepmov"
1301 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1302 with them.
1303
1304Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1305
1306 * d10v.h (OPERAND_SHIFT): New operand flag.
1307
1308Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1309
1310 * d10v.h: Changes for divs, parallel-only instructions, and
1311 signed numbers.
1312
1313Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1314
1315 * d10v.h (pd_reg): Define. Putting the definition here allows
1316 the assembler and disassembler to share the same struct.
1317
1318Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1319
1320 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1321 Williams <steve@icarus.com>.
1322
1323Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1324
1325 * d10v.h: New file.
1326
1327Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1328
1329 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1330
1331Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1332
1333 * m68k.h (mcf5200): New macro.
1334 Document names of coldfire control registers.
1335
1336Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1337
1338 * h8300.h (SRC_IN_DST): Define.
1339
1340 * h8300.h (UNOP3): Mark the register operand in this insn
1341 as a source operand, not a destination operand.
1342 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1343 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1344 register operand with SRC_IN_DST.
1345
1346Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1347
1348 * alpha.h: New file.
1349
1350Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1351
1352 * rs6k.h: Remove obsolete file.
1353
1354Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1355
1356 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1357 fdivp, and fdivrp. Add ffreep.
1358
1359Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1360
1361 * h8300.h: Reorder various #defines for readability.
1362 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1363 (BITOP): Accept additional (unused) argument. All callers changed.
1364 (EBITOP): Likewise.
1365 (O_LAST): Bump.
1366 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1367
1368 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1369 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1370 (BITOP, EBITOP): Handle new H8/S addressing modes for
1371 bit insns.
1372 (UNOP3): Handle new shift/rotate insns on the H8/S.
1373 (insns using exr): New instructions.
1374 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1375
1376Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1377
1378 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1379 was incorrect.
1380
1381Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1382
1383 * h8300.h (START): Remove.
1384 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1385 and mov.l insns that can be relaxed.
1386
1387Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1388
1389 * i386.h: Remove Abs32 from lcall.
1390
1391Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1392
1393 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1394 (SLCPOP): New macro.
1395 Mark X,Y opcode letters as in use.
1396
1397Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1398
1399 * sparc.h (F_FLOAT, F_FBR): Define.
1400
1401Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1402
1403 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1404 from all insns.
1405 (ABS8SRC,ABS8DST): Add ABS8MEM.
1406 (add.l): Fix reg+reg variant.
1407 (eepmov.w): Renamed from eepmovw.
1408 (ldc,stc): Fix many cases.
1409
1410Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1411
1412 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1413
1414Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1415
1416 * sparc.h (O): Mark operand letter as in use.
1417
1418Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1419
1420 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1421 Mark operand letters uU as in use.
1422
1423Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1424
1425 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1426 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1427 (SPARC_OPCODE_SUPPORTED): New macro.
1428 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1429 (F_NOTV9): Delete.
1430
1431Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1432
1433 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1434 declaration consistent with return type in definition.
1435
1436Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1437
1438 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1439
1440Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1441
1442 * i386.h (i386_regtab): Add 80486 test registers.
1443
1444Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1445
1446 * i960.h (I_HX): Define.
1447 (i960_opcodes): Add HX instruction.
1448
1449Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1450
1451 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1452 and fclex.
1453
1454Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1455
1456 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1457 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1458 (bfd_* defines): Delete.
1459 (sparc_opcode_archs): Replaces architecture_pname.
1460 (sparc_opcode_lookup_arch): Declare.
1461 (NUMOPCODES): Delete.
1462
1463Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1464
1465 * sparc.h (enum sparc_architecture): Add v9a.
1466 (ARCHITECTURES_CONFLICT_P): Update.
1467
1468Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1469
1470 * i386.h: Added Pentium Pro instructions.
1471
1472Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1473
1474 * m68k.h: Document new 'W' operand place.
1475
1476Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1477
1478 * hppa.h: Add lci and syncdma instructions.
1479
1480Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1481
1482 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1483 instructions.
1484
1485Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1486
1487 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1488 assembler's -mcom and -many switches.
1489
1490Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1491
1492 * i386.h: Fix cmpxchg8b extension opcode description.
1493
1494Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1495
1496 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1497 and register cr4.
1498
1499Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1500
1501 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1502
1503Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1504
1505 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1506
1507Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1508
1509 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1510
1511Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1512
1513 * m68kmri.h: Remove.
1514
1515 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1516 declarations. Remove F_ALIAS and flag field of struct
1517 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1518 int. Make name and args fields of struct m68k_opcode const.
1519
1520Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1521
1522 * sparc.h (F_NOTV9): Define.
1523
1524Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1525
1526 * mips.h (INSN_4010): Define.
1527
1528Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1529
1530 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1531
1532 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1533 * m68k.h: Fix argument descriptions of coprocessor
1534 instructions to allow only alterable operands where appropriate.
1535 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1536 (m68k_opcode_aliases): Add more aliases.
1537
1538Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1539
1540 * m68k.h: Added explcitly short-sized conditional branches, and a
1541 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1542 svr4-based configurations.
1543
1544Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1545
1546 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1547 * i386.h: added missing Data16/Data32 flags to a few instructions.
1548
1549Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1550
1551 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1552 (OP_MASK_BCC, OP_SH_BCC): Define.
1553 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1554 (OP_MASK_CCC, OP_SH_CCC): Define.
1555 (INSN_READ_FPR_R): Define.
1556 (INSN_RFE): Delete.
1557
1558Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1559
1560 * m68k.h (enum m68k_architecture): Deleted.
1561 (struct m68k_opcode_alias): New type.
1562 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1563 matching constraints, values and flags. As a side effect of this,
1564 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1565 as I know were never used, now may need re-examining.
1566 (numopcodes): Now const.
1567 (m68k_opcode_aliases, numaliases): New variables.
1568 (endop): Deleted.
1569 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1570 m68k_opcode_aliases; update declaration of m68k_opcodes.
1571
1572Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1573
1574 * hppa.h (delay_type): Delete unused enumeration.
1575 (pa_opcode): Replace unused delayed field with an architecture
1576 field.
1577 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1578
1579Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1580
1581 * mips.h (INSN_ISA4): Define.
1582
1583Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1584
1585 * mips.h (M_DLA_AB, M_DLI): Define.
1586
1587Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1588
1589 * hppa.h (fstwx): Fix single-bit error.
1590
1591Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1592
1593 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1594
1595Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1596
1597 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1598 debug registers. From Charles Hannum (mycroft@netbsd.org).
1599
1600Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1601
1602 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1603 i386 support:
1604 * i386.h (MOV_AX_DISP32): New macro.
1605 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1606 of several call/return instructions.
1607 (ADDR_PREFIX_OPCODE): New macro.
1608
1609Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1610
1611 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1612
1613 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1614 it pointer to const char;
1615 (struct vot, field `name'): ditto.
1616
1617Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1618
1619 * vax.h: Supply and properly group all values in end sentinel.
1620
1621Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1622
1623 * mips.h (INSN_ISA, INSN_4650): Define.
1624
1625Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1626
1627 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1628 systems with a separate instruction and data cache, such as the
1629 29040, these instructions take an optional argument.
1630
1631Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1632
1633 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1634 INSN_TRAP.
1635
1636Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1637
1638 * mips.h (INSN_STORE_MEMORY): Define.
1639
1640Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1641
1642 * sparc.h: Document new operand type 'x'.
1643
1644Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1645
1646 * i960.h (I_CX2): New instruction category. It includes
1647 instructions available on Cx and Jx processors.
1648 (I_JX): New instruction category, for JX-only instructions.
1649 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1650 Jx-only instructions, in I_JX category.
1651
1652Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1653
1654 * ns32k.h (endop): Made pointer const too.
1655
1656Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1657
1658 * ns32k.h: Drop Q operand type as there is no correct use
1659 for it. Add I and Z operand types which allow better checking.
1660
1661Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1662
1663 * h8300.h (xor.l) :fix bit pattern.
1664 (L_2): New size of operand.
1665 (trapa): Use it.
1666
1667Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1668
1669 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1670
1671Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1672
1673 * sparc.h: Include v9 definitions.
1674
1675Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1676
1677 * m68k.h (m68060): Defined.
1678 (m68040up, mfloat, mmmu): Include it.
1679 (struct m68k_opcode): Widen `arch' field.
1680 (m68k_opcodes): Updated for M68060. Removed comments that were
1681 instructions commented out by "JF" years ago.
1682
1683Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1684
1685 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1686 add a one-bit `flags' field.
1687 (F_ALIAS): New macro.
1688
1689Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1690
1691 * h8300.h (dec, inc): Get encoding right.
1692
1693Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1694
1695 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1696 a flag instead.
1697 (PPC_OPERAND_SIGNED): Define.
1698 (PPC_OPERAND_SIGNOPT): Define.
1699
1700Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1701
1702 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1703 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1704
1705Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1706
1707 * i386.h: Reverse last change. It'll be handled in gas instead.
1708
1709Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1710
1711 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1712 slower on the 486 and used the implicit shift count despite the
1713 explicit operand. The one-operand form is still available to get
1714 the shorter form with the implicit shift count.
1715
1716Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1717
1718 * hppa.h: Fix typo in fstws arg string.
1719
1720Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1721
1722 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1723
1724Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1725
1726 * ppc.h (PPC_OPCODE_601): Define.
1727
1728Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1729
1730 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1731 (so we can determine valid completers for both addb and addb[tf].)
1732
1733 * hppa.h (xmpyu): No floating point format specifier for the
1734 xmpyu instruction.
1735
1736Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1737
1738 * ppc.h (PPC_OPERAND_NEXT): Define.
1739 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1740 (struct powerpc_macro): Define.
1741 (powerpc_macros, powerpc_num_macros): Declare.
1742
1743Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1744
1745 * ppc.h: New file. Header file for PowerPC opcode table.
1746
1747Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1748
1749 * hppa.h: More minor template fixes for sfu and copr (to allow
1750 for easier disassembly).
1751
1752 * hppa.h: Fix templates for all the sfu and copr instructions.
1753
1754Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1755
1756 * i386.h (push): Permit Imm16 operand too.
1757
1758Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1759
1760 * h8300.h (andc): Exists in base arch.
1761
1762Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1763
1764 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1765 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1766
1767Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1768
1769 * hppa.h: Add FP quadword store instructions.
1770
1771Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1772
1773 * mips.h: (M_J_A): Added.
1774 (M_LA): Removed.
1775
1776Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1777
1778 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1779 <mellon@pepper.ncd.com>.
1780
1781Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1782
1783 * hppa.h: Immediate field in probei instructions is unsigned,
1784 not low-sign extended.
1785
1786Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1787
1788 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1789
1790Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1791
1792 * i386.h: Add "fxch" without operand.
1793
1794Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1795
1796 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1797
1798Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1799
1800 * hppa.h: Add gfw and gfr to the opcode table.
1801
1802Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1803
1804 * m88k.h: extended to handle m88110.
1805
1806Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1807
1808 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1809 addresses.
1810
1811Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1812
1813 * i960.h (i960_opcodes): Properly bracket initializers.
1814
1815Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1816
1817 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1818
1819Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1820
1821 * m68k.h (two): Protect second argument with parentheses.
1822
1823Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1824
1825 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1826 Deleted old in/out instructions in "#if 0" section.
1827
1828Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1829
1830 * i386.h (i386_optab): Properly bracket initializers.
1831
1832Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1833
1834 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1835 Jeff Law, law@cs.utah.edu).
1836
1837Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1838
1839 * i386.h (lcall): Accept Imm32 operand also.
1840
1841Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1842
1843 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1844 (M_DABS): Added.
1845
1846Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1847
1848 * mips.h (INSN_*): Changed values. Removed unused definitions.
1849 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1850 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1851 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1852 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1853 (M_*): Added new values for r6000 and r4000 macros.
1854 (ANY_DELAY): Removed.
1855
1856Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1857
1858 * mips.h: Added M_LI_S and M_LI_SS.
1859
1860Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1861
1862 * h8300.h: Get some rare mov.bs correct.
1863
1864Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1865
1866 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1867 been included.
1868
1869Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1870
1871 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1872 jump instructions, for use in disassemblers.
1873
1874Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1875
1876 * m88k.h: Make bitfields just unsigned, not unsigned long or
1877 unsigned short.
1878
1879Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1880
1881 * hppa.h: New argument type 'y'. Use in various float instructions.
1882
1883Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1884
1885 * hppa.h (break): First immediate field is unsigned.
1886
1887 * hppa.h: Add rfir instruction.
1888
1889Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1890
1891 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1892
1893Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1894
1895 * mips.h: Reworked the hazard information somewhat, and fixed some
1896 bugs in the instruction hazard descriptions.
1897
1898Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1899
1900 * m88k.h: Corrected a couple of opcodes.
1901
1902Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1903
1904 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1905 new version includes instruction hazard information, but is
1906 otherwise reasonably similar.
1907
1908Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1909
1910 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1911
1912Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1913
1914 Patches from Jeff Law, law@cs.utah.edu:
1915 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1916 Make the tables be the same for the following instructions:
1917 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1918 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1919 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1920 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1921 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1922 "fcmp", and "ftest".
1923
1924 * hppa.h: Make new and old tables the same for "break", "mtctl",
1925 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1926 Fix typo in last patch. Collapse several #ifdefs into a
1927 single #ifdef.
1928
1929 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1930 of the comments up-to-date.
1931
1932 * hppa.h: Update "free list" of letters and update
1933 comments describing each letter's function.
1934
1935Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1936
1937 * h8300.h: checkpoint, includes H8/300-H opcodes.
1938
1939Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1940
1941 * Patches from Jeffrey Law <law@cs.utah.edu>.
1942 * hppa.h: Rework single precision FP
1943 instructions so that they correctly disassemble code
1944 PA1.1 code.
1945
1946Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1947
1948 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1949 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1950
1951Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1952
1953 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1954 gdb will define it for now.
1955
1956Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1957
1958 * sparc.h: Don't end enumerator list with comma.
1959
1960Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1961
1962 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1963 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1964 ("bc2t"): Correct typo.
1965 ("[ls]wc[023]"): Use T rather than t.
1966 ("c[0123]"): Define general coprocessor instructions.
1967
1968Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1969
1970 * m68k.h: Move split point for gcc compilation more towards
1971 middle.
1972
1973Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1974
1975 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1976 simply wrong, ics, rfi, & rfsvc were missing).
1977 Add "a" to opr_ext for "bb". Doc fix.
1978
1979Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1980
1981 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1982 * mips.h: Add casts, to suppress warnings about shifting too much.
1983 * m68k.h: Document the placement code '9'.
1984
1985Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1986
1987 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1988 allows callers to break up the large initialized struct full of
1989 opcodes into two half-sized ones. This permits GCC to compile
1990 this module, since it takes exponential space for initializers.
1991 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1992
1993Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1994
1995 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1996 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1997 initialized structs in it.
1998
1999Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2000
2001 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2002 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2003 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2004
2005Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2006
2007 * mips.h: document "i" and "j" operands correctly.
2008
2009Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2010
2011 * mips.h: Removed endianness dependency.
2012
2013Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2014
2015 * h8300.h: include info on number of cycles per instruction.
2016
2017Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2018
2019 * hppa.h: Move handy aliases to the front. Fix masks for extract
2020 and deposit instructions.
2021
2022Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2023
2024 * i386.h: accept shld and shrd both with and without the shift
2025 count argument, which is always %cl.
2026
2027Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2028
2029 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2030 (one_byte_segment_defaults, two_byte_segment_defaults,
2031 i386_prefixtab_end): Ditto.
2032
2033Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2034
2035 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2036 for operand 2; from John Carr, jfc@dsg.dec.com.
2037
2038Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2039
2040 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2041 always use 16-bit offsets. Makes calculated-size jump tables
2042 feasible.
2043
2044Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2045
2046 * i386.h: Fix one-operand forms of in* and out* patterns.
2047
2048Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2049
2050 * m68k.h: Added CPU32 support.
2051
2052Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2053
2054 * mips.h (break): Disassemble the argument. Patch from
2055 jonathan@cs.stanford.edu (Jonathan Stone).
2056
2057Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2058
2059 * m68k.h: merged Motorola and MIT syntax.
2060
2061Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2062
2063 * m68k.h (pmove): make the tests less strict, the 68k book is
2064 wrong.
2065
2066Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2067
2068 * m68k.h (m68ec030): Defined as alias for 68030.
2069 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2070 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2071 them. Tightened description of "fmovex" to distinguish it from
2072 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2073 up descriptions that claimed versions were available for chips not
2074 supporting them. Added "pmovefd".
2075
2076Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2077
2078 * m68k.h: fix where the . goes in divull
2079
2080Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2081
2082 * m68k.h: the cas2 instruction is supposed to be written with
2083 indirection on the last two operands, which can be either data or
2084 address registers. Added a new operand type 'r' which accepts
2085 either register type. Added new cases for cas2l and cas2w which
2086 use them. Corrected masks for cas2 which failed to recognize use
2087 of address register.
2088
2089Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2090
2091 * m68k.h: Merged in patches (mostly m68040-specific) from
2092 Colin Smith <colin@wrs.com>.
2093
2094 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2095 base). Also cleaned up duplicates, re-ordered instructions for
2096 the sake of dis-assembling (so aliases come after standard names).
2097 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2098
2099Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2100
2101 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2102 all missing .s
2103
2104Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2105
2106 * sparc.h: Moved tables to BFD library.
2107
2108 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2109
2110Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2111
2112 * h8300.h: Finish filling in all the holes in the opcode table,
2113 so that the Lucid C compiler can digest this as well...
2114
2115Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2116
2117 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2118 Fix opcodes on various sizes of fild/fist instructions
2119 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2120 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2121
2122Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2123
2124 * h8300.h: Fill in all the holes in the opcode table so that the
2125 losing HPUX C compiler can digest this...
2126
2127Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2128
2129 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2130 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2131
2132Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2133
2134 * sparc.h: Add new architecture variant sparclite; add its scan
2135 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2136
2137Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2138
2139 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2140 fy@lucid.com).
2141
2142Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2143
2144 * rs6k.h: New version from IBM (Metin).
2145
2146Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2147
2148 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2149 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2150
2151Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2152
2153 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2154
2155Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2156
2157 * m68k.h (one, two): Cast macro args to unsigned to suppress
2158 complaints from compiler and lint about integer overflow during
2159 shift.
2160
2161Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2162
2163 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2164
2165Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2166
2167 * mips.h: Make bitfield layout depend on the HOST compiler,
2168 not on the TARGET system.
2169
2170Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2171
2172 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2173 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2174 <TRANLE@INTELLICORP.COM>.
2175
2176Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2177
2178 * h8300.h: turned op_type enum into #define list
2179
2180Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2181
2182 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2183 similar instructions -- they've been renamed to "fitoq", etc.
2184 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2185 number of arguments.
2186 * h8300.h: Remove extra ; which produces compiler warning.
2187
2188Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2189
2190 * sparc.h: fix opcode for tsubcctv.
2191
2192Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2193
2194 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2195
2196Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2197
2198 * sparc.h (nop): Made the 'lose' field be even tighter,
2199 so only a standard 'nop' is disassembled as a nop.
2200
2201Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2202
2203 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2204 disassembled as a nop.
2205
2206Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2207
2208 * sparc.h: fix a typo.
2209
2210Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2211
2212 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2213 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2214 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2215
2216\f
2217Local Variables:
2218version-control: never
2219End:
GDB Binutils - Deliverables
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