* a29k-dis.c: Replace CONST with const.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
deec1734
CD
12002-05-30 Chris G. Demetriou <cgd@broadcom.com>
2
3 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
4 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
5 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
6 (INSN_MDMX): New constants, for MDMX support.
7 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
8
d172d4ba
NC
92002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
10
11 * dlx.h: New file.
12
b3f7d5fd
AM
132002-05-25 Alan Modra <amodra@bigpond.net.au>
14
15 * ia64.h: Use #include "" instead of <> for local header files.
16 * sparc.h: Likewise.
17
771c7ce4
TS
182002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
19
20 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
21
b9c9142c
AV
222002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
23
24 * h8300.h: Corrected defs of all control regs
25 and eepmov instr.
26
cd47f4f1
AM
272002-04-11 Alan Modra <amodra@bigpond.net.au>
28
29 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 30 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 31
1f25f5d3
CD
322002-03-15 Chris G. Demetriou <cgd@broadcom.com>
33
34 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
35 instructions.
36 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
37 may be passed along with the ISA bitmask.
38
e4b29ec6
AM
392002-03-05 Paul Koning <pkoning@equallogic.com>
40
41 * pdp11.h: Add format codes for float instruction formats.
42
eea5c83f
AM
432002-02-25 Alan Modra <amodra@bigpond.net.au>
44
45 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
46
5a8b245c
JH
47Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
48
49 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
50
85a33fe2
JH
51Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
52
53 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
54 (xchg): Fix.
55 (in, out): Disable 64bit operands.
56 (call, jmp): Avoid REX prefixes.
57 (jcxz): Prohibit in 64bit mode
58 (jrcxz, loop): Add 64bit variants.
59 (movq): Fix patterns.
60 (movmskps, pextrw, pinstrw): Add 64bit variants.
61
3b16e843
NC
622002-01-31 Ivan Guzvinec <ivang@opencores.org>
63
64 * or32.h: New file.
65
9a2e995d
GH
662002-01-22 Graydon Hoare <graydon@redhat.com>
67
68 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
69 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
70
7b45c6e1
AM
712002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
72
73 * h8300.h: Comment typo fix.
74
a09cf9bd
MG
752002-01-03 matthew green <mrg@redhat.com>
76
77 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
78 (PPC_OPCODE_BOOKE64): Likewise.
79
1befefea
JL
80Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
81
82 * hppa.h (call, ret): Move to end of table.
83 (addb, addib): PA2.0 variants should have been PA2.0W.
84 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
85 happy.
86 (fldw, fldd, fstw, fstd, bb): Likewise.
87 (short loads/stores): Tweak format specifier slightly to keep
88 disassembler happy.
89 (indexed loads/stores): Likewise.
90 (absolute loads/stores): Likewise.
91
124ddbb2
AO
922001-12-04 Alexandre Oliva <aoliva@redhat.com>
93
94 * d10v.h (OPERAND_NOSP): New macro.
95
9b21d49b
AO
962001-11-29 Alexandre Oliva <aoliva@redhat.com>
97
98 * d10v.h (OPERAND_SP): New macro.
99
802a735e
AM
1002001-11-15 Alan Modra <amodra@bigpond.net.au>
101
102 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
103
6e917903
TW
1042001-11-11 Timothy Wall <twall@alum.mit.edu>
105
106 * tic54x.h: Revise opcode layout; don't really need a separate
107 structure for parallel opcodes.
108
e5470cdc
AM
1092001-11-13 Zack Weinberg <zack@codesourcery.com>
110 Alan Modra <amodra@bigpond.net.au>
111
112 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
113 accept WordReg.
114
5d84d93f
CD
1152001-11-04 Chris Demetriou <cgd@broadcom.com>
116
117 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
118
3c3bdf30
NC
1192001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
120
121 * mmix.h: New file.
122
e4432525
CD
1232001-10-18 Chris Demetriou <cgd@broadcom.com>
124
125 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
126 of the expression, to make source code merging easier.
127
8ff529d8
CD
1282001-10-17 Chris Demetriou <cgd@broadcom.com>
129
130 * mips.h: Sort coprocessor instruction argument characters
131 in comment, add a few more words of description for "H".
132
2228315b
CD
1332001-10-17 Chris Demetriou <cgd@broadcom.com>
134
135 * mips.h (INSN_SB1): New cpu-specific instruction bit.
136 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
137 if cpu is CPU_SB1.
138
f5c120c5
MG
1392001-10-17 matthew green <mrg@redhat.com>
140
141 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
142
418c1742
MG
1432001-10-12 matthew green <mrg@redhat.com>
144
0716ce0d
MG
145 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
146 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
147 instructions, respectively.
418c1742 148
6ff2f2ba
NC
1492001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
150
151 * v850.h: Remove spurious comment.
152
015cf428
NC
1532001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
154
155 * h8300.h: Fix compile time warning messages
156
847b8b31
RH
1572001-09-04 Richard Henderson <rth@redhat.com>
158
159 * alpha.h (struct alpha_operand): Pack elements into bitfields.
160
a98b9439
EC
1612001-08-31 Eric Christopher <echristo@redhat.com>
162
163 * mips.h: Remove CPU_MIPS32_4K.
164
a6959011
AM
1652001-08-27 Torbjorn Granlund <tege@swox.com>
166
167 * ppc.h (PPC_OPERAND_DS): Define.
168
d83c6548
AJ
1692001-08-25 Andreas Jaeger <aj@suse.de>
170
171 * d30v.h: Fix declaration of reg_name_cnt.
172
173 * d10v.h: Fix declaration of d10v_reg_name_cnt.
174
175 * arc.h: Add prototypes from opcodes/arc-opc.c.
176
99c14723
TS
1772001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
178
179 * mips.h (INSN_10000): Define.
180 (OPCODE_IS_MEMBER): Check for INSN_10000.
181
11b37b7b
AM
1822001-08-10 Alan Modra <amodra@one.net.au>
183
184 * ppc.h: Revert 2001-08-08.
185
3b16e843
NC
1862001-08-10 Richard Sandiford <rsandifo@redhat.com>
187
188 * mips.h (INSN_GP32): Remove.
189 (OPCODE_IS_MEMBER): Remove gp32 parameter.
190 (M_MOVE): New macro identifier.
191
0f1bac05
AM
1922001-08-08 Alan Modra <amodra@one.net.au>
193
194 1999-10-25 Torbjorn Granlund <tege@swox.com>
195 * ppc.h (struct powerpc_operand): New field `reloc'.
196
3b16e843
NC
1972001-08-01 Aldy Hernandez <aldyh@redhat.com>
198
199 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
200
2012001-07-12 Jeff Johnston <jjohnstn@redhat.com>
202
203 * cgen.h (CGEN_INSN): Add regex support.
204 (build_insn_regex): Declare.
205
81f6038f
FCE
2062001-07-11 Frank Ch. Eigler <fche@redhat.com>
207
208 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
209 (cgen_cpu_desc): Ditto.
210
32cfffe3
BE
2112001-07-07 Ben Elliston <bje@redhat.com>
212
213 * m88k.h: Clean up and reformat. Remove unused code.
214
3e890047
GK
2152001-06-14 Geoffrey Keating <geoffk@redhat.com>
216
217 * cgen.h (cgen_keyword): Add nonalpha_chars field.
218
d1cf510e
NC
2192001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
220
221 * mips.h (CPU_R12000): Define.
222
e281c457
JH
2232001-05-23 John Healy <jhealy@redhat.com>
224
225 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 226
aa5f19f2
NC
2272001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
228
229 * mips.h (INSN_ISA_MASK): Define.
230
67d6227d
AM
2312001-05-12 Alan Modra <amodra@one.net.au>
232
233 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
234 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
235 and use InvMem as these insns must have register operands.
236
992aaec9
AM
2372001-05-04 Alan Modra <amodra@one.net.au>
238
239 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
240 and pextrw to swap reg/rm assignments.
241
4ef7f0bf
HPN
2422001-04-05 Hans-Peter Nilsson <hp@axis.com>
243
244 * cris.h (enum cris_insn_version_usage): Correct comment for
245 cris_ver_v3p.
246
0f17484f
AM
2472001-03-24 Alan Modra <alan@linuxcare.com.au>
248
249 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
250 Add InvMem to first operand of "maskmovdqu".
251
7ccb5238
HPN
2522001-03-22 Hans-Peter Nilsson <hp@axis.com>
253
254 * cris.h (ADD_PC_INCR_OPCODE): New macro.
255
361bfa20
KH
2562001-03-21 Kazu Hirata <kazu@hxi.com>
257
258 * h8300.h: Fix formatting.
259
87890af0
AM
2602001-03-22 Alan Modra <alan@linuxcare.com.au>
261
262 * i386.h (i386_optab): Add paddq, psubq.
263
2e98d2de
AM
2642001-03-19 Alan Modra <alan@linuxcare.com.au>
265
266 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
267
80a523c2
NC
2682001-02-28 Igor Shevlyakov <igor@windriver.com>
269
270 * m68k.h: new defines for Coldfire V4. Update mcf to know
271 about mcf5407.
272
e135f41b
NC
2732001-02-18 lars brinkhoff <lars@nocrew.org>
274
275 * pdp11.h: New file.
276
2772001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
278
279 * i386.h (i386_optab): SSE integer converison instructions have
280 64bit versions on x86-64.
281
8eaec934
NC
2822001-02-10 Nick Clifton <nickc@redhat.com>
283
284 * mips.h: Remove extraneous whitespace. Formating change to allow
285 for future contribution.
286
a85d7ed0
NC
2872001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
288
289 * s390.h: New file.
290
0715dc88
PM
2912001-02-02 Patrick Macdonald <patrickm@redhat.com>
292
293 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
294 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
295 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
296
296bc568
AM
2972001-01-24 Karsten Keil <kkeil@suse.de>
298
299 * i386.h (i386_optab): Fix swapgs
300
1328dc98
AM
3012001-01-14 Alan Modra <alan@linuxcare.com.au>
302
303 * hppa.h: Describe new '<' and '>' operand types, and tidy
304 existing comments.
305 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
306 Remove duplicate "ldw j(s,b),x". Sort some entries.
307
e135f41b 3082001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
309
310 * i386.h (i386_optab): Fix pusha and ret templates.
311
0d2bcfaf
NC
3122001-01-11 Peter Targett <peter.targett@arccores.com>
313
314 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
315 definitions for masking cpu type.
316 (arc_ext_operand_value) New structure for storing extended
317 operands.
318 (ARC_OPERAND_*) Flags for operand values.
319
3202001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
321
322 * i386.h (pinsrw): Add.
323 (pshufw): Remove.
324 (cvttpd2dq): Fix operands.
325 (cvttps2dq): Likewise.
326 (movq2q): Rename to movdq2q.
327
079966a8
AM
3282001-01-10 Richard Schaal <richard.schaal@intel.com>
329
330 * i386.h: Correct movnti instruction.
331
8c1f9e76
JJ
3322001-01-09 Jeff Johnston <jjohnstn@redhat.com>
333
334 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
335 of operands (unsigned char or unsigned short).
336 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
337 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
338
0d2bcfaf 3392001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
340
341 * i386.h (i386_optab): Make [sml]fence template to use immext field.
342
0d2bcfaf 3432001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
344
345 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
346 introduced by Pentium4
347
0d2bcfaf 3482000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
349
350 * i386.h (i386_optab): Add "rex*" instructions;
351 add swapgs; disable jmp/call far direct instructions for
352 64bit mode; add syscall and sysret; disable registers for 0xc6
353 template. Add 'q' suffixes to extendable instructions, disable
079966a8 354 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
355 (i386_regtab): Add extended registers.
356 (*Suf): Add No_qSuf.
357 (q_Suf, wlq_Suf, bwlq_Suf): New.
358
0d2bcfaf 3592000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
360
361 * i386.h (i386_optab): Replace "Imm" with "EncImm".
362 (i386_regtab): Add flags field.
d83c6548 363
bf40d919
NC
3642000-12-12 Nick Clifton <nickc@redhat.com>
365
366 * mips.h: Fix formatting.
367
4372b673
NC
3682000-12-01 Chris Demetriou <cgd@sibyte.com>
369
370 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
371 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
372 OP_*_SYSCALL definitions.
373 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
374 19 bit wait codes.
375 (MIPS operand specifier comments): Remove 'm', add 'U' and
376 'J', and update the meaning of 'B' so that it's more general.
377
e7af610e
NC
378 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
379 INSN_ISA5): Renumber, redefine to mean the ISA at which the
380 instruction was added.
381 (INSN_ISA32): New constant.
382 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
383 Renumber to avoid new and/or renumbered INSN_* constants.
384 (INSN_MIPS32): Delete.
385 (ISA_UNKNOWN): New constant to indicate unknown ISA.
386 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
387 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 388 constants available at that ISA level.
e7af610e
NC
389 (CPU_UNKNOWN): New constant to indicate unknown CPU.
390 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
391 define it with a unique value.
392 (OPCODE_IS_MEMBER): Update for new ISA membership-related
393 constant meanings.
394
84ea6cf2 395 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 396 definitions.
84ea6cf2 397
c6c98b38
NC
398 * mips.h (CPU_SB1): New constant.
399
19f7b010
JJ
4002000-10-20 Jakub Jelinek <jakub@redhat.com>
401
402 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
403 Note that '3' is used for siam operand.
404
139368c9
JW
4052000-09-22 Jim Wilson <wilson@cygnus.com>
406
407 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
408
156c2f8b 4092000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 410
156c2f8b
NC
411 * mips.h: Use defines instead of hard-coded processor numbers.
412 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 413 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
414 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
415 CPU_4KC, CPU_4KM, CPU_4KP): Define..
416 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 417 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 418 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
419 Add 'P' to used characters.
420 Use 'H' for coprocessor select field.
156c2f8b 421 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
422 Document new arg characters and add to used characters.
423 (INSN_MIPS32): New define for MIPS32 extensions.
424 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 425
3c5ce02e
AM
4262000-09-05 Alan Modra <alan@linuxcare.com.au>
427
428 * hppa.h: Mention cz completer.
429
50b81f19
JW
4302000-08-16 Jim Wilson <wilson@cygnus.com>
431
432 * ia64.h (IA64_OPCODE_POSTINC): New.
433
fc29466d
L
4342000-08-15 H.J. Lu <hjl@gnu.org>
435
436 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
437 IgnoreSize change.
438
4f1d9bd8
NC
4392000-08-08 Jason Eckhardt <jle@cygnus.com>
440
441 * i860.h: Small formatting adjustments.
442
45ee1401
DC
4432000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
444
445 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
446 Move related opcodes closer to each other.
447 Minor changes in comments, list undefined opcodes.
448
9d551405
DB
4492000-07-26 Dave Brolley <brolley@redhat.com>
450
451 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
452
4f1d9bd8
NC
4532000-07-22 Jason Eckhardt <jle@cygnus.com>
454
455 * i860.h (btne, bte, bla): Changed these opcodes
456 to use sbroff ('r') instead of split16 ('s').
457 (J, K, L, M): New operand types for 16-bit aligned fields.
458 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
459 use I, J, K, L, M instead of just I.
460 (T, U): New operand types for split 16-bit aligned fields.
461 (st.x): Changed these opcodes to use S, T, U instead of just S.
462 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
463 exist on the i860.
464 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
465 (pfeq.ss, pfeq.dd): New opcodes.
466 (st.s): Fixed incorrect mask bits.
467 (fmlow): Fixed incorrect mask bits.
468 (fzchkl, pfzchkl): Fixed incorrect mask bits.
469 (faddz, pfaddz): Fixed incorrect mask bits.
470 (form, pform): Fixed incorrect mask bits.
471 (pfld.l): Fixed incorrect mask bits.
472 (fst.q): Fixed incorrect mask bits.
473 (all floating point opcodes): Fixed incorrect mask bits for
474 handling of dual bit.
475
c8488617
HPN
4762000-07-20 Hans-Peter Nilsson <hp@axis.com>
477
478 cris.h: New file.
479
65aa24b6
NC
4802000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
481
482 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
483 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
484 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
485 (AVR_ISA_M83): Define for ATmega83, ATmega85.
486 (espm): Remove, because ESPM removed in databook update.
487 (eicall, eijmp): Move to the end of opcode table.
488
60bcf0fa
NC
4892000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
490
491 * m68hc11.h: New file for support of Motorola 68hc11.
492
60a2978a
DC
493Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
494
495 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
496
68ab2dd9
DC
497Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
498
499 * avr.h: New file with AVR opcodes.
500
f0662e27
DL
501Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
502
503 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
504
b722f2be
AM
5052000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
506
507 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
508
f9e0cf0b
AM
5092000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
510
511 * i386.h: Use sl_FP, not sl_Suf for fild.
512
f660ee8b
FCE
5132000-05-16 Frank Ch. Eigler <fche@redhat.com>
514
515 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
516 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
517 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
518 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
519
558b0a60
AM
5202000-05-13 Alan Modra <alan@linuxcare.com.au>,
521
522 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
523
e413e4e9
AM
5242000-05-13 Alan Modra <alan@linuxcare.com.au>,
525 Alexander Sokolov <robocop@netlink.ru>
526
527 * i386.h (i386_optab): Add cpu_flags for all instructions.
528
5292000-05-13 Alan Modra <alan@linuxcare.com.au>
530
531 From Gavin Romig-Koch <gavin@cygnus.com>
532 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
533
5c84d377
TW
5342000-05-04 Timothy Wall <twall@cygnus.com>
535
536 * tic54x.h: New.
537
966f959b
C
5382000-05-03 J.T. Conklin <jtc@redback.com>
539
540 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
541 (PPC_OPERAND_VR): New operand flag for vector registers.
542
c5d05dbb
JL
5432000-05-01 Kazu Hirata <kazu@hxi.com>
544
545 * h8300.h (EOP): Add missing initializer.
546
a7fba0e0
JL
547Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
548
549 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
550 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
551 New operand types l,y,&,fe,fE,fx added to support above forms.
552 (pa_opcodes): Replaced usage of 'x' as source/target for
553 floating point double-word loads/stores with 'fx'.
554
800eeca4
JW
555Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
556 David Mosberger <davidm@hpl.hp.com>
557 Timothy Wall <twall@cygnus.com>
558 Jim Wilson <wilson@cygnus.com>
559
560 * ia64.h: New file.
561
ba23e138
NC
5622000-03-27 Nick Clifton <nickc@cygnus.com>
563
564 * d30v.h (SHORT_A1): Fix value.
565 (SHORT_AR): Renumber so that it is at the end of the list of short
566 instructions, not the end of the list of long instructions.
567
d0b47220
AM
5682000-03-26 Alan Modra <alan@linuxcare.com>
569
570 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
571 problem isn't really specific to Unixware.
572 (OLDGCC_COMPAT): Define.
573 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
574 destination %st(0).
575 Fix lots of comments.
576
866afedc
NC
5772000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
578
579 * d30v.h:
580 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
581 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
582 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
583 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
584 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
585 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
586 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
587
cc5ca5ce
AM
5882000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
589
590 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
591 fistpd without suffix.
592
68e324a2
NC
5932000-02-24 Nick Clifton <nickc@cygnus.com>
594
595 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
596 'signed_overflow_ok_p'.
597 Delete prototypes for cgen_set_flags() and cgen_get_flags().
598
60f036a2
AH
5992000-02-24 Andrew Haley <aph@cygnus.com>
600
601 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
602 (CGEN_CPU_TABLE): flags: new field.
603 Add prototypes for new functions.
d83c6548 604
9b9b5cd4
AM
6052000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
606
607 * i386.h: Add some more UNIXWARE_COMPAT comments.
608
5b93d8bb
AM
6092000-02-23 Linas Vepstas <linas@linas.org>
610
611 * i370.h: New file.
612
4f1d9bd8
NC
6132000-02-22 Chandra Chavva <cchavva@cygnus.com>
614
615 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
616 cannot be combined in parallel with ADD/SUBppp.
617
87f398dd
AH
6182000-02-22 Andrew Haley <aph@cygnus.com>
619
620 * mips.h: (OPCODE_IS_MEMBER): Add comment.
621
367c01af
AH
6221999-12-30 Andrew Haley <aph@cygnus.com>
623
9a1e79ca
AH
624 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
625 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
626 insns.
367c01af 627
add0c677
AM
6282000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
629
630 * i386.h: Qualify intel mode far call and jmp with x_Suf.
631
3138f287
AM
6321999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
633
634 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
635 indirect jumps and calls. Add FF/3 call for intel mode.
636
ccecd07b
JL
637Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
638
639 * mn10300.h: Add new operand types. Add new instruction formats.
640
b37e19e9
JL
641Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
642
643 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
644 instruction.
645
5fce5ddf
GRK
6461999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
647
648 * mips.h (INSN_ISA5): New.
649
2bd7f1f3
GRK
6501999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
651
652 * mips.h (OPCODE_IS_MEMBER): New.
653
4df2b5c5
NC
6541999-10-29 Nick Clifton <nickc@cygnus.com>
655
656 * d30v.h (SHORT_AR): Define.
657
446a06c9
MM
6581999-10-18 Michael Meissner <meissner@cygnus.com>
659
660 * alpha.h (alpha_num_opcodes): Convert to unsigned.
661 (alpha_num_operands): Ditto.
662
eca04c6a
JL
663Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
664
665 * hppa.h (pa_opcodes): Add load and store cache control to
666 instructions. Add ordered access load and store.
667
668 * hppa.h (pa_opcode): Add new entries for addb and addib.
669
670 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
671
672 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
673
c43185de
DN
674Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
675
676 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
677
ec3533da
JL
678Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
679
390f858d
JL
680 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
681 and "be" using completer prefixes.
682
8c47ebd9
JL
683 * hppa.h (pa_opcodes): Add initializers to silence compiler.
684
ec3533da
JL
685 * hppa.h: Update comments about character usage.
686
18369bea
JL
687Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
688
689 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
690 up the new fstw & bve instructions.
691
c36efdd2
JL
692Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
693
d3ffb032
JL
694 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
695 instructions.
696
c49ec3da
JL
697 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
698
5d2e7ecc
JL
699 * hppa.h (pa_opcodes): Add long offset double word load/store
700 instructions.
701
6397d1a2
JL
702 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
703 stores.
704
142f0fe0
JL
705 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
706
f5a68b45
JL
707 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
708
8235801e
JL
709 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
710
35184366
JL
711 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
712
f0bfde5e
JL
713 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
714
27bbbb58
JL
715 * hppa.h (pa_opcodes): Add support for "b,l".
716
c36efdd2
JL
717 * hppa.h (pa_opcodes): Add support for "b,gate".
718
f2727d04
JL
719Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
720
9392fb11 721 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 722 in xmpyu.
9392fb11 723
e0c52e99
JL
724 * hppa.h (pa_opcodes): Fix mask for probe and probei.
725
f2727d04
JL
726 * hppa.h (pa_opcodes): Fix mask for depwi.
727
52d836e2
JL
728Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
729
730 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
731 an explicit output argument.
732
90765e3a
JL
733Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
734
735 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
736 Add a few PA2.0 loads and store variants.
737
8340b17f
ILT
7381999-09-04 Steve Chamberlain <sac@pobox.com>
739
740 * pj.h: New file.
741
5f47d35b
AM
7421999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
743
744 * i386.h (i386_regtab): Move %st to top of table, and split off
745 other fp reg entries.
746 (i386_float_regtab): To here.
747
1c143202
JL
748Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
749
7d8fdb64
JL
750 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
751 by 'f'.
752
90927b9c
JL
753 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
754 Add supporting args.
755
1d16bf9c
JL
756 * hppa.h: Document new completers and args.
757 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
758 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
759 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
760 pmenb and pmdis.
761
96226a68
JL
762 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
763 hshr, hsub, mixh, mixw, permh.
764
5d4ba527
JL
765 * hppa.h (pa_opcodes): Change completers in instructions to
766 use 'c' prefix.
767
e9fc28c6
JL
768 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
769 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
770
1c143202
JL
771 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
772 fnegabs to use 'I' instead of 'F'.
773
9e525108
AM
7741999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
775
776 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
777 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
778 Alphabetically sort PIII insns.
779
e8da1bf1
DE
780Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
781
782 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
783
7d627258
JL
784Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
785
5696871a
JL
786 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
787 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
788
7d627258
JL
789 * hppa.h: Document 64 bit condition completers.
790
c5e52916
JL
791Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
792
793 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
794
eecb386c
AM
7951999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
796
797 * i386.h (i386_optab): Add DefaultSize modifier to all insns
798 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
799 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
800
88a380f3
JL
801Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
802 Jeff Law <law@cygnus.com>
803
804 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
805
806 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 807
d83c6548 808 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
809 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
810
145cf1f0
AM
8111999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
812
813 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
814
73826640
JL
815Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
816
817 * hppa.h (struct pa_opcode): Add new field "flags".
818 (FLAGS_STRICT): Define.
819
b65db252
JL
820Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
821 Jeff Law <law@cygnus.com>
822
f7fc668b
JL
823 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
824
825 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 826
10084519
AM
8271999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
828
829 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
830 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
831 flag to fcomi and friends.
832
cd8a80ba
JL
833Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
834
835 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 836 integer logical instructions.
cd8a80ba 837
1fca749b
ILT
8381999-05-28 Linus Nordberg <linus.nordberg@canit.se>
839
840 * m68k.h: Document new formats `E', `G', `H' and new places `N',
841 `n', `o'.
842
843 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
844 and new places `m', `M', `h'.
845
aa008907
JL
846Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
847
848 * hppa.h (pa_opcodes): Add several processor specific system
849 instructions.
850
e26b85f0
JL
851Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
852
d83c6548 853 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
854 "addb", and "addib" to be used by the disassembler.
855
c608c12e
AM
8561999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
857
858 * i386.h (ReverseModrm): Remove all occurences.
859 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
860 movmskps, pextrw, pmovmskb, maskmovq.
861 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
862 ignore the data size prefix.
863
864 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
865 Mostly stolen from Doug Ledford <dledford@redhat.com>
866
45c18104
RH
867Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
868
869 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
870
252b5132
RH
8711999-04-14 Doug Evans <devans@casey.cygnus.com>
872
873 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
874 (CGEN_ATTR_TYPE): Update.
875 (CGEN_ATTR_MASK): Number booleans starting at 0.
876 (CGEN_ATTR_VALUE): Update.
877 (CGEN_INSN_ATTR): Update.
878
879Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
880
881 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
882 instructions.
883
884Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
885
886 * hppa.h (bb, bvb): Tweak opcode/mask.
887
888
8891999-03-22 Doug Evans <devans@casey.cygnus.com>
890
891 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
892 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
893 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
894 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
895 Delete member max_insn_size.
896 (enum cgen_cpu_open_arg): New enum.
897 (cpu_open): Update prototype.
898 (cpu_open_1): Declare.
899 (cgen_set_cpu): Delete.
900
9011999-03-11 Doug Evans <devans@casey.cygnus.com>
902
903 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
904 (CGEN_OPERAND_NIL): New macro.
905 (CGEN_OPERAND): New member `type'.
906 (@arch@_cgen_operand_table): Delete decl.
907 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
908 (CGEN_OPERAND_TABLE): New struct.
909 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
910 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
911 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
912 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
913 {get,set}_{int,vma}_operand.
914 (@arch@_cgen_cpu_open): New arg `isa'.
915 (cgen_set_cpu): Ditto.
916
917Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
918
919 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
920
9211999-02-25 Doug Evans <devans@casey.cygnus.com>
922
923 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
924 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
925 enum cgen_hw_type.
926 (CGEN_HW_TABLE): New struct.
927 (hw_table): Delete declaration.
928 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
929 to table entry to enum.
930 (CGEN_OPINST): Ditto.
931 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
932
933Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
934
935 * alpha.h (AXP_OPCODE_EV6): New.
936 (AXP_OPCODE_NOPAL): Include it.
937
9381999-02-09 Doug Evans <devans@casey.cygnus.com>
939
940 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
941 All uses updated. New members int_insn_p, max_insn_size,
942 parse_operand,insert_operand,extract_operand,print_operand,
943 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
944 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
945 extract_handlers,print_handlers.
946 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
947 (CGEN_ATTR_BOOL_OFFSET): New macro.
948 (CGEN_ATTR_MASK): Subtract it to compute bit number.
949 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
950 (cgen_opcode_handler): Renamed from cgen_base.
951 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
952 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
953 all uses updated.
954 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
955 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
956 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
957 (CGEN_OPCODE,CGEN_IBASE): New types.
958 (CGEN_INSN): Rewrite.
959 (CGEN_{ASM,DIS}_HASH*): Delete.
960 (init_opcode_table,init_ibld_table): Declare.
961 (CGEN_INSN_ATTR): New type.
962
963Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 964
252b5132
RH
965 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
966 (x_FP, d_FP, dls_FP, sldx_FP): Define.
967 Change *Suf definitions to include x and d suffixes.
968 (movsx): Use w_Suf and b_Suf.
969 (movzx): Likewise.
970 (movs): Use bwld_Suf.
971 (fld): Change ordering. Use sld_FP.
972 (fild): Add Intel Syntax equivalent of fildq.
973 (fst): Use sld_FP.
974 (fist): Use sld_FP.
975 (fstp): Use sld_FP. Add x_FP version.
976 (fistp): LLongMem version for Intel Syntax.
977 (fcom, fcomp): Use sld_FP.
978 (fadd, fiadd, fsub): Use sld_FP.
979 (fsubr): Use sld_FP.
980 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
981
9821999-01-27 Doug Evans <devans@casey.cygnus.com>
983
984 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
985 CGEN_MODE_UINT.
986
e135f41b 9871999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
988
989 * hppa.h (bv): Fix mask.
990
9911999-01-05 Doug Evans <devans@casey.cygnus.com>
992
993 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
994 (CGEN_ATTR): Use it.
995 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
996 (CGEN_ATTR_TABLE): New member dfault.
997
9981998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
999
1000 * mips.h (MIPS16_INSN_BRANCH): New.
1001
1002Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1003
1004 The following is part of a change made by Edith Epstein
d83c6548
AJ
1005 <eepstein@sophia.cygnus.com> as part of a project to merge in
1006 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1007
1008 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1009 after.
252b5132
RH
1010
1011Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1012
1013 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1014 status word instructions.
252b5132
RH
1015
10161998-11-30 Doug Evans <devans@casey.cygnus.com>
1017
1018 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1019 (struct cgen_keyword_entry): Ditto.
1020 (struct cgen_operand): Ditto.
1021 (CGEN_IFLD): New typedef, with associated access macros.
1022 (CGEN_IFMT): New typedef, with associated access macros.
1023 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1024 (CGEN_IVALUE): New typedef.
1025 (struct cgen_insn): Delete const on syntax,attrs members.
1026 `format' now points to format data. Type of `value' is now
1027 CGEN_IVALUE.
1028 (struct cgen_opcode_table): New member ifld_table.
1029
10301998-11-18 Doug Evans <devans@casey.cygnus.com>
1031
1032 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1033 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1034 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1035 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1036 (cgen_opcode_table): Update type of dis_hash fn.
1037 (extract_operand): Update type of `insn_value' arg.
1038
1039Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1040
1041 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1042
1043Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1044
1045 * mips.h (INSN_MULT): Added.
1046
1047Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1048
1049 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1050
1051Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1052
1053 * cgen.h (CGEN_INSN_INT): New typedef.
1054 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1055 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1056 (CGEN_INSN_BYTES_PTR): New typedef.
1057 (CGEN_EXTRACT_INFO): New typedef.
1058 (cgen_insert_fn,cgen_extract_fn): Update.
1059 (cgen_opcode_table): New member `insn_endian'.
1060 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1061 (insert_operand,extract_operand): Update.
1062 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1063
1064Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1065
1066 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1067 (struct CGEN_HW_ENTRY): New member `attrs'.
1068 (CGEN_HW_ATTR): New macro.
1069 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1070 (CGEN_INSN_INVALID_P): New macro.
1071
1072Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1073
1074 * hppa.h: Add "fid".
d83c6548 1075
252b5132
RH
1076Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1077
1078 From Robert Andrew Dale <rob@nb.net>
1079 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1080 (AMD_3DNOW_OPCODE): Define.
1081
1082Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1083
1084 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1085
1086Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1087
1088 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1089
1090Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1091
1092 Move all global state data into opcode table struct, and treat
1093 opcode table as something that is "opened/closed".
1094 * cgen.h (CGEN_OPCODE_DESC): New type.
1095 (all fns): New first arg of opcode table descriptor.
1096 (cgen_set_parse_operand_fn): Add prototype.
1097 (cgen_current_machine,cgen_current_endian): Delete.
1098 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1099 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1100 dis_hash_table,dis_hash_table_entries.
1101 (opcode_open,opcode_close): Add prototypes.
1102
1103 * cgen.h (cgen_insn): New element `cdx'.
1104
1105Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1106
1107 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1108
1109Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1110
1111 * mn10300.h: Add "no_match_operands" field for instructions.
1112 (MN10300_MAX_OPERANDS): Define.
1113
1114Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1115
1116 * cgen.h (cgen_macro_insn_count): Declare.
1117
1118Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1119
1120 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1121 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1122 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1123 set_{int,vma}_operand.
1124
1125Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1126
1127 * mn10300.h: Add "machine" field for instructions.
1128 (MN103, AM30): Define machine types.
d83c6548 1129
252b5132
RH
1130Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1131
1132 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1133
11341998-06-18 Ulrich Drepper <drepper@cygnus.com>
1135
1136 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1137
1138Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1139
1140 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1141 and ud2b.
1142 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1143 those that happen to be implemented on pentiums.
1144
1145Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1146
1147 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1148 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1149 with Size16|IgnoreSize or Size32|IgnoreSize.
1150
1151Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1152
1153 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1154 (REPE): Rename to REPE_PREFIX_OPCODE.
1155 (i386_regtab_end): Remove.
1156 (i386_prefixtab, i386_prefixtab_end): Remove.
1157 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1158 of md_begin.
1159 (MAX_OPCODE_SIZE): Define.
1160 (i386_optab_end): Remove.
1161 (sl_Suf): Define.
1162 (sl_FP): Use sl_Suf.
1163
1164 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1165 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1166 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1167 data32, dword, and adword prefixes.
1168 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1169 regs.
1170
1171Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1172
1173 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1174
1175 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1176 register operands, because this is a common idiom. Flag them with
1177 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1178 fdivrp because gcc erroneously generates them. Also flag with a
1179 warning.
1180
1181 * i386.h: Add suffix modifiers to most insns, and tighter operand
1182 checks in some cases. Fix a number of UnixWare compatibility
1183 issues with float insns. Merge some floating point opcodes, using
1184 new FloatMF modifier.
1185 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1186 consistency.
1187
1188 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1189 IgnoreDataSize where appropriate.
1190
1191Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1192
1193 * i386.h: (one_byte_segment_defaults): Remove.
1194 (two_byte_segment_defaults): Remove.
1195 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1196
1197Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1198
1199 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1200 (cgen_hw_lookup_by_num): Declare.
1201
1202Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1203
1204 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1205 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1206
1207Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1208
1209 * cgen.h (cgen_asm_init_parse): Delete.
1210 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1211 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1212
1213Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1214
1215 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1216 (cgen_asm_finish_insn): Update prototype.
1217 (cgen_insn): New members num, data.
1218 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1219 dis_hash, dis_hash_table_size moved to ...
1220 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1221 All uses updated. New members asm_hash_p, dis_hash_p.
1222 (CGEN_MINSN_EXPANSION): New struct.
1223 (cgen_expand_macro_insn): Declare.
1224 (cgen_macro_insn_count): Declare.
1225 (get_insn_operands): Update prototype.
1226 (lookup_get_insn_operands): Declare.
1227
1228Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1229
1230 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1231 regKludge. Add operands types for string instructions.
1232
1233Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1234
1235 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1236 table.
1237
1238Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1239
1240 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1241 for `gettext'.
1242
1243Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1244
1245 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1246 Add IsString flag to string instructions.
1247 (IS_STRING): Don't define.
1248 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1249 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1250 (SS_PREFIX_OPCODE): Define.
1251
1252Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1253
1254 * i386.h: Revert March 24 patch; no more LinearAddress.
1255
1256Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1257
1258 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1259 instructions, and instead add FWait opcode modifier. Add short
1260 form of fldenv and fstenv.
1261 (FWAIT_OPCODE): Define.
1262
1263 * i386.h (i386_optab): Change second operand constraint of `mov
1264 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1265 allow legal instructions such as `movl %gs,%esi'
1266
1267Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1268
1269 * h8300.h: Various changes to fully bracket initializers.
1270
1271Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1272
1273 * i386.h: Set LinearAddress for lidt and lgdt.
1274
1275Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1276
1277 * cgen.h (CGEN_BOOL_ATTR): New macro.
1278
1279Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1280
1281 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1282
1283Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1284
1285 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1286 (cgen_insn): Record syntax and format entries here, rather than
1287 separately.
1288
1289Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1290
1291 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1292
1293Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1294
1295 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1296 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1297 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1298
1299Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1300
1301 * cgen.h (lookup_insn): New argument alias_p.
1302
1303Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1304
1305Fix rac to accept only a0:
1306 * d10v.h (OPERAND_ACC): Split into:
1307 (OPERAND_ACC0, OPERAND_ACC1) .
1308 (OPERAND_GPR): Define.
1309
1310Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1311
1312 * cgen.h (CGEN_FIELDS): Define here.
1313 (CGEN_HW_ENTRY): New member `type'.
1314 (hw_list): Delete decl.
1315 (enum cgen_mode): Declare.
1316 (CGEN_OPERAND): New member `hw'.
1317 (enum cgen_operand_instance_type): Declare.
1318 (CGEN_OPERAND_INSTANCE): New type.
1319 (CGEN_INSN): New member `operands'.
1320 (CGEN_OPCODE_DATA): Make hw_list const.
1321 (get_insn_operands,lookup_insn): Add prototypes for.
1322
1323Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1324
1325 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1326 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1327 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1328 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1329
1330Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1331
1332 * cgen.h: Correct typo in comment end marker.
1333
1334Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1335
1336 * tic30.h: New file.
1337
5a109b67 1338Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1339
1340 * cgen.h: Add prototypes for cgen_save_fixups(),
1341 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1342 of cgen_asm_finish_insn() to return a char *.
1343
1344Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1345
1346 * cgen.h: Formatting changes to improve readability.
1347
1348Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1349
1350 * cgen.h (*): Clean up pass over `struct foo' usage.
1351 (CGEN_ATTR): Make unsigned char.
1352 (CGEN_ATTR_TYPE): Update.
1353 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1354 (cgen_base): Move member `attrs' to cgen_insn.
1355 (CGEN_KEYWORD): New member `null_entry'.
1356 (CGEN_{SYNTAX,FORMAT}): New types.
1357 (cgen_insn): Format and syntax separated from each other.
1358
1359Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1360
1361 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1362 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1363 flags_{used,set} long.
1364 (d30v_operand): Make flags field long.
1365
1366Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1367
1368 * m68k.h: Fix comment describing operand types.
1369
1370Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1371
1372 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1373 everything else after down.
1374
1375Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1376
1377 * d10v.h (OPERAND_FLAG): Split into:
1378 (OPERAND_FFLAG, OPERAND_CFLAG) .
1379
1380Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1381
1382 * mips.h (struct mips_opcode): Changed comments to reflect new
1383 field usage.
1384
1385Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1386
1387 * mips.h: Added to comments a quick-ref list of all assigned
1388 operand type characters.
1389 (OP_{MASK,SH}_PERFREG): New macros.
1390
1391Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1392
1393 * sparc.h: Add '_' and '/' for v9a asr's.
1394 Patch from David Miller <davem@vger.rutgers.edu>
1395
1396Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1397
1398 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1399 area are not available in the base model (H8/300).
1400
1401Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1402
1403 * m68k.h: Remove documentation of ` operand specifier.
1404
1405Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1406
1407 * m68k.h: Document q and v operand specifiers.
1408
1409Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1410
1411 * v850.h (struct v850_opcode): Add processors field.
1412 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1413 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1414 (PROCESSOR_V850EA): New bit constants.
1415
1416Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1417
1418 Merge changes from Martin Hunt:
1419
1420 * d30v.h: Allow up to 64 control registers. Add
1421 SHORT_A5S format.
1422
1423 * d30v.h (LONG_Db): New form for delayed branches.
1424
1425 * d30v.h: (LONG_Db): New form for repeati.
1426
1427 * d30v.h (SHORT_D2B): New form.
1428
1429 * d30v.h (SHORT_A2): New form.
1430
1431 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1432 registers are used. Needed for VLIW optimization.
1433
1434Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1435
1436 * cgen.h: Move assembler interface section
1437 up so cgen_parse_operand_result is defined for cgen_parse_address.
1438 (cgen_parse_address): Update prototype.
1439
1440Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1441
1442 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1443
1444Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1445
1446 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1447 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1448 <paubert@iram.es>.
1449
1450 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1451 <paubert@iram.es>.
1452
1453 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1454 <paubert@iram.es>.
1455
1456 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1457 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1458
1459Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1460
1461 * v850.h (V850_NOT_R0): New flag.
1462
1463Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1464
1465 * v850.h (struct v850_opcode): Remove flags field.
1466
1467Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1468
1469 * v850.h (struct v850_opcode): Add flags field.
1470 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1471 fields.
1472 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1473 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1474
1475Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1476
1477 * arc.h: New file.
1478
1479Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1480
1481 * sparc.h (sparc_opcodes): Declare as const.
1482
1483Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1484
1485 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1486 uses single or double precision floating point resources.
1487 (INSN_NO_ISA, INSN_ISA1): Define.
1488 (cpu specific INSN macros): Tweak into bitmasks outside the range
1489 of INSN_ISA field.
1490
1491Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1492
1493 * i386.h: Fix pand opcode.
1494
1495Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1496
1497 * mips.h: Widen INSN_ISA and move it to a more convenient
1498 bit position. Add INSN_3900.
1499
1500Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1501
1502 * mips.h (struct mips_opcode): added new field membership.
1503
1504Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1505
1506 * i386.h (movd): only Reg32 is allowed.
1507
1508 * i386.h: add fcomp and ud2. From Wayne Scott
1509 <wscott@ichips.intel.com>.
1510
1511Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1512
1513 * i386.h: Add MMX instructions.
1514
1515Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1516
1517 * i386.h: Remove W modifier from conditional move instructions.
1518
1519Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1520
1521 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1522 with no arguments to match that generated by the UnixWare
1523 assembler.
1524
1525Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1526
1527 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1528 (cgen_parse_operand_fn): Declare.
1529 (cgen_init_parse_operand): Declare.
1530 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1531 new argument `want'.
1532 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1533 (enum cgen_parse_operand_type): New enum.
1534
1535Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1538
1539Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1540
1541 * cgen.h: New file.
1542
1543Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1544
1545 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1546 fdivrp.
1547
1548Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1549
1550 * v850.h (extract): Make unsigned.
1551
1552Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1553
1554 * i386.h: Add iclr.
1555
1556Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1559 take a direction bit.
1560
1561Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1562
1563 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1564
1565Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1566
1567 * sparc.h: Include <ansidecl.h>. Update function declarations to
1568 use prototypes, and to use const when appropriate.
1569
1570Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1571
1572 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1573
1574Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1575
1576 * d10v.h: Change pre_defined_registers to
1577 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1578
1579Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1580
1581 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1582 Change mips_opcodes from const array to a pointer,
1583 and change bfd_mips_num_opcodes from const int to int,
1584 so that we can increase the size of the mips opcodes table
1585 dynamically.
1586
1587Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1588
1589 * d30v.h (FLAG_X): Remove unused flag.
1590
1591Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1592
1593 * d30v.h: New file.
1594
1595Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1596
1597 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1598 (PDS_VALUE): Macro to access value field of predefined symbols.
1599 (tic80_next_predefined_symbol): Add prototype.
1600
1601Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1602
1603 * tic80.h (tic80_symbol_to_value): Change prototype to match
1604 change in function, added class parameter.
1605
1606Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1607
1608 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1609 endmask fields, which are somewhat weird in that 0 and 32 are
1610 treated exactly the same.
1611
1612Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1613
1614 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1615 rather than a constant that is 2**X. Reorder them to put bits for
1616 operands that have symbolic names in the upper bits, so they can
1617 be packed into an int where the lower bits contain the value that
1618 corresponds to that symbolic name.
1619 (predefined_symbo): Add struct.
1620 (tic80_predefined_symbols): Declare array of translations.
1621 (tic80_num_predefined_symbols): Declare size of that array.
1622 (tic80_value_to_symbol): Declare function.
1623 (tic80_symbol_to_value): Declare function.
1624
1625Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1626
1627 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1628
1629Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1630
1631 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1632 be the destination register.
1633
1634Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1635
1636 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1637 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1638 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1639 that the opcode can have two vector instructions in a single
1640 32 bit word and we have to encode/decode both.
1641
1642Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1643
1644 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1645 TIC80_OPERAND_RELATIVE for PC relative.
1646 (TIC80_OPERAND_BASEREL): New flag bit for register
1647 base relative.
1648
1649Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1650
1651 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1652
1653Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1654
1655 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1656 ":s" modifier for scaling.
1657
1658Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1659
1660 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1661 (TIC80_OPERAND_M_LI): Ditto
1662
1663Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1664
1665 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1666 (TIC80_OPERAND_CC): New define for condition code operand.
1667 (TIC80_OPERAND_CR): New define for control register operand.
1668
1669Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1670
1671 * tic80.h (struct tic80_opcode): Name changed.
1672 (struct tic80_opcode): Remove format field.
1673 (struct tic80_operand): Add insertion and extraction functions.
1674 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1675 correct ones.
1676 (FMT_*): Ditto.
1677
1678Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1679
1680 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1681 type IV instruction offsets.
1682
1683Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1684
1685 * tic80.h: New file.
1686
1687Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1688
1689 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1690
1691Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1692
1693 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1694 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1695 * v850.h: Fix comment, v850_operand not powerpc_operand.
1696
1697Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1698
1699 * mn10200.h: Flesh out structures and definitions needed by
1700 the mn10200 assembler & disassembler.
1701
1702Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1703
1704 * mips.h: Add mips16 definitions.
1705
1706Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1707
1708 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1709
1710Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1711
1712 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1713 (MN10300_OPERAND_MEMADDR): Define.
1714
1715Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1716
1717 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1718
1719Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1720
1721 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1722
1723Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1724
1725 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1726
1727Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1728
1729 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1730
1731Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1732
1733 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1734 negative to minimize problems with shared libraries. Organize
1735 instruction subsets by AMASK extensions and PALcode
1736 implementation.
252b5132
RH
1737 (struct alpha_operand): Move flags slot for better packing.
1738
1739Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1740
1741 * v850.h (V850_OPERAND_RELAX): New operand flag.
1742
1743Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1744
1745 * mn10300.h (FMT_*): Move operand format definitions
1746 here.
1747
1748Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1749
1750 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1751
1752Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1753
1754 * mn10300.h (mn10300_opcode): Add "format" field.
1755 (MN10300_OPERAND_*): Define.
1756
1757Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1758
1759 * mn10x00.h: Delete.
1760 * mn10200.h, mn10300.h: New files.
1761
1762Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1763
1764 * mn10x00.h: New file.
1765
1766Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1767
1768 * v850.h: Add new flag to indicate this instruction uses a PC
1769 displacement.
1770
1771Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1772
1773 * h8300.h (stmac): Add missing instruction.
1774
1775Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1776
1777 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1778 field.
1779
1780Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1781
1782 * v850.h (V850_OPERAND_EP): Define.
1783
1784 * v850.h (v850_opcode): Add size field.
1785
1786Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1787
1788 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1789 to functions used to handle unusual operand encoding.
252b5132 1790 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1791 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1792
1793Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1794
1795 * v850.h (v850_operands): Add flags field.
1796 (OPERAND_REG, OPERAND_NUM): Defined.
1797
1798Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1799
1800 * v850.h: New file.
1801
1802Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1803
1804 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1805 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1806 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1807 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1808 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1809 Defined.
252b5132
RH
1810
1811Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1812
1813 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1814 a 3 bit space id instead of a 2 bit space id.
1815
1816Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1817
1818 * d10v.h: Add some additional defines to support the
d83c6548 1819 assembler in determining which operations can be done in parallel.
252b5132
RH
1820
1821Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1822
1823 * h8300.h (SN): Define.
1824 (eepmov.b): Renamed from "eepmov"
1825 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1826 with them.
1827
1828Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1829
1830 * d10v.h (OPERAND_SHIFT): New operand flag.
1831
1832Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1833
1834 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1835 signed numbers.
252b5132
RH
1836
1837Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1838
1839 * d10v.h (pd_reg): Define. Putting the definition here allows
1840 the assembler and disassembler to share the same struct.
1841
1842Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1843
1844 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1845 Williams <steve@icarus.com>.
1846
1847Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1848
1849 * d10v.h: New file.
1850
1851Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1852
1853 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1854
1855Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1856
d83c6548 1857 * m68k.h (mcf5200): New macro.
252b5132
RH
1858 Document names of coldfire control registers.
1859
1860Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1861
1862 * h8300.h (SRC_IN_DST): Define.
1863
1864 * h8300.h (UNOP3): Mark the register operand in this insn
1865 as a source operand, not a destination operand.
1866 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1867 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1868 register operand with SRC_IN_DST.
1869
1870Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1871
1872 * alpha.h: New file.
1873
1874Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1875
1876 * rs6k.h: Remove obsolete file.
1877
1878Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1879
1880 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1881 fdivp, and fdivrp. Add ffreep.
1882
1883Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1884
1885 * h8300.h: Reorder various #defines for readability.
1886 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1887 (BITOP): Accept additional (unused) argument. All callers changed.
1888 (EBITOP): Likewise.
1889 (O_LAST): Bump.
1890 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1891
1892 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1893 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1894 (BITOP, EBITOP): Handle new H8/S addressing modes for
1895 bit insns.
1896 (UNOP3): Handle new shift/rotate insns on the H8/S.
1897 (insns using exr): New instructions.
1898 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1899
1900Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1901
1902 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1903 was incorrect.
1904
1905Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1906
1907 * h8300.h (START): Remove.
1908 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1909 and mov.l insns that can be relaxed.
1910
1911Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1912
1913 * i386.h: Remove Abs32 from lcall.
1914
1915Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1916
1917 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1918 (SLCPOP): New macro.
1919 Mark X,Y opcode letters as in use.
1920
1921Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1922
1923 * sparc.h (F_FLOAT, F_FBR): Define.
1924
1925Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1926
1927 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1928 from all insns.
1929 (ABS8SRC,ABS8DST): Add ABS8MEM.
1930 (add.l): Fix reg+reg variant.
1931 (eepmov.w): Renamed from eepmovw.
1932 (ldc,stc): Fix many cases.
1933
1934Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1935
1936 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1937
1938Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1939
1940 * sparc.h (O): Mark operand letter as in use.
1941
1942Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1943
1944 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1945 Mark operand letters uU as in use.
1946
1947Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1948
1949 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1950 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1951 (SPARC_OPCODE_SUPPORTED): New macro.
1952 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1953 (F_NOTV9): Delete.
1954
1955Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1956
1957 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1958 declaration consistent with return type in definition.
1959
1960Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1961
1962 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1963
1964Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1965
1966 * i386.h (i386_regtab): Add 80486 test registers.
1967
1968Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1969
1970 * i960.h (I_HX): Define.
1971 (i960_opcodes): Add HX instruction.
1972
1973Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1974
1975 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1976 and fclex.
1977
1978Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1979
1980 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1981 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1982 (bfd_* defines): Delete.
1983 (sparc_opcode_archs): Replaces architecture_pname.
1984 (sparc_opcode_lookup_arch): Declare.
1985 (NUMOPCODES): Delete.
1986
1987Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1988
1989 * sparc.h (enum sparc_architecture): Add v9a.
1990 (ARCHITECTURES_CONFLICT_P): Update.
1991
1992Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1993
1994 * i386.h: Added Pentium Pro instructions.
1995
1996Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1997
1998 * m68k.h: Document new 'W' operand place.
1999
2000Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2001
2002 * hppa.h: Add lci and syncdma instructions.
2003
2004Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2005
2006 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2007 instructions.
252b5132
RH
2008
2009Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2010
2011 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2012 assembler's -mcom and -many switches.
2013
2014Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2015
2016 * i386.h: Fix cmpxchg8b extension opcode description.
2017
2018Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2019
2020 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2021 and register cr4.
2022
2023Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2024
2025 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2026
2027Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2028
2029 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2030
2031Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2032
2033 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2034
2035Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2036
2037 * m68kmri.h: Remove.
2038
2039 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2040 declarations. Remove F_ALIAS and flag field of struct
2041 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2042 int. Make name and args fields of struct m68k_opcode const.
2043
2044Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2045
2046 * sparc.h (F_NOTV9): Define.
2047
2048Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2049
2050 * mips.h (INSN_4010): Define.
2051
2052Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2053
2054 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2055
2056 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2057 * m68k.h: Fix argument descriptions of coprocessor
2058 instructions to allow only alterable operands where appropriate.
2059 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2060 (m68k_opcode_aliases): Add more aliases.
2061
2062Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2063
2064 * m68k.h: Added explcitly short-sized conditional branches, and a
2065 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2066 svr4-based configurations.
2067
2068Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2069
2070 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2071 * i386.h: added missing Data16/Data32 flags to a few instructions.
2072
2073Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2074
2075 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2076 (OP_MASK_BCC, OP_SH_BCC): Define.
2077 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2078 (OP_MASK_CCC, OP_SH_CCC): Define.
2079 (INSN_READ_FPR_R): Define.
2080 (INSN_RFE): Delete.
2081
2082Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2083
2084 * m68k.h (enum m68k_architecture): Deleted.
2085 (struct m68k_opcode_alias): New type.
2086 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2087 matching constraints, values and flags. As a side effect of this,
2088 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2089 as I know were never used, now may need re-examining.
2090 (numopcodes): Now const.
2091 (m68k_opcode_aliases, numaliases): New variables.
2092 (endop): Deleted.
2093 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2094 m68k_opcode_aliases; update declaration of m68k_opcodes.
2095
2096Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2097
2098 * hppa.h (delay_type): Delete unused enumeration.
2099 (pa_opcode): Replace unused delayed field with an architecture
2100 field.
2101 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2102
2103Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2104
2105 * mips.h (INSN_ISA4): Define.
2106
2107Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2108
2109 * mips.h (M_DLA_AB, M_DLI): Define.
2110
2111Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2112
2113 * hppa.h (fstwx): Fix single-bit error.
2114
2115Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2116
2117 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2118
2119Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2120
2121 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2122 debug registers. From Charles Hannum (mycroft@netbsd.org).
2123
2124Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2125
2126 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2127 i386 support:
2128 * i386.h (MOV_AX_DISP32): New macro.
2129 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2130 of several call/return instructions.
2131 (ADDR_PREFIX_OPCODE): New macro.
2132
2133Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2134
2135 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2136
4f1d9bd8
NC
2137 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2138 char.
252b5132
RH
2139 (struct vot, field `name'): ditto.
2140
2141Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2142
2143 * vax.h: Supply and properly group all values in end sentinel.
2144
2145Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2146
2147 * mips.h (INSN_ISA, INSN_4650): Define.
2148
2149Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2150
2151 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2152 systems with a separate instruction and data cache, such as the
2153 29040, these instructions take an optional argument.
2154
2155Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2156
2157 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2158 INSN_TRAP.
2159
2160Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2161
2162 * mips.h (INSN_STORE_MEMORY): Define.
2163
2164Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2165
2166 * sparc.h: Document new operand type 'x'.
2167
2168Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2169
2170 * i960.h (I_CX2): New instruction category. It includes
2171 instructions available on Cx and Jx processors.
2172 (I_JX): New instruction category, for JX-only instructions.
2173 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2174 Jx-only instructions, in I_JX category.
2175
2176Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2177
2178 * ns32k.h (endop): Made pointer const too.
2179
2180Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2181
2182 * ns32k.h: Drop Q operand type as there is no correct use
2183 for it. Add I and Z operand types which allow better checking.
2184
2185Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2186
2187 * h8300.h (xor.l) :fix bit pattern.
2188 (L_2): New size of operand.
2189 (trapa): Use it.
2190
2191Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2192
2193 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2194
2195Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2196
2197 * sparc.h: Include v9 definitions.
2198
2199Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2200
2201 * m68k.h (m68060): Defined.
2202 (m68040up, mfloat, mmmu): Include it.
2203 (struct m68k_opcode): Widen `arch' field.
2204 (m68k_opcodes): Updated for M68060. Removed comments that were
2205 instructions commented out by "JF" years ago.
2206
2207Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2208
2209 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2210 add a one-bit `flags' field.
2211 (F_ALIAS): New macro.
2212
2213Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2214
2215 * h8300.h (dec, inc): Get encoding right.
2216
2217Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2218
2219 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2220 a flag instead.
2221 (PPC_OPERAND_SIGNED): Define.
2222 (PPC_OPERAND_SIGNOPT): Define.
2223
2224Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2225
2226 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2227 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2228
2229Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2230
2231 * i386.h: Reverse last change. It'll be handled in gas instead.
2232
2233Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2234
2235 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2236 slower on the 486 and used the implicit shift count despite the
2237 explicit operand. The one-operand form is still available to get
2238 the shorter form with the implicit shift count.
2239
2240Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2241
2242 * hppa.h: Fix typo in fstws arg string.
2243
2244Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2245
2246 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2247
2248Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2249
2250 * ppc.h (PPC_OPCODE_601): Define.
2251
2252Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2253
2254 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2255 (so we can determine valid completers for both addb and addb[tf].)
2256
2257 * hppa.h (xmpyu): No floating point format specifier for the
2258 xmpyu instruction.
2259
2260Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2261
2262 * ppc.h (PPC_OPERAND_NEXT): Define.
2263 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2264 (struct powerpc_macro): Define.
2265 (powerpc_macros, powerpc_num_macros): Declare.
2266
2267Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2268
2269 * ppc.h: New file. Header file for PowerPC opcode table.
2270
2271Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2272
2273 * hppa.h: More minor template fixes for sfu and copr (to allow
2274 for easier disassembly).
2275
2276 * hppa.h: Fix templates for all the sfu and copr instructions.
2277
2278Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2279
2280 * i386.h (push): Permit Imm16 operand too.
2281
2282Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2283
2284 * h8300.h (andc): Exists in base arch.
2285
2286Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2287
2288 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2289 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2290
2291Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2292
2293 * hppa.h: Add FP quadword store instructions.
2294
2295Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2296
2297 * mips.h: (M_J_A): Added.
2298 (M_LA): Removed.
2299
2300Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2301
2302 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2303 <mellon@pepper.ncd.com>.
2304
2305Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2306
2307 * hppa.h: Immediate field in probei instructions is unsigned,
2308 not low-sign extended.
2309
2310Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2311
2312 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2313
2314Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2315
2316 * i386.h: Add "fxch" without operand.
2317
2318Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2319
2320 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2321
2322Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2323
2324 * hppa.h: Add gfw and gfr to the opcode table.
2325
2326Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2327
2328 * m88k.h: extended to handle m88110.
2329
2330Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2331
2332 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2333 addresses.
2334
2335Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2336
2337 * i960.h (i960_opcodes): Properly bracket initializers.
2338
2339Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2340
2341 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2342
2343Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2344
2345 * m68k.h (two): Protect second argument with parentheses.
2346
2347Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2348
2349 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2350 Deleted old in/out instructions in "#if 0" section.
2351
2352Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2353
2354 * i386.h (i386_optab): Properly bracket initializers.
2355
2356Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2357
2358 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2359 Jeff Law, law@cs.utah.edu).
2360
2361Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2362
2363 * i386.h (lcall): Accept Imm32 operand also.
2364
2365Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2366
2367 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2368 (M_DABS): Added.
2369
2370Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2371
2372 * mips.h (INSN_*): Changed values. Removed unused definitions.
2373 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2374 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2375 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2376 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2377 (M_*): Added new values for r6000 and r4000 macros.
2378 (ANY_DELAY): Removed.
2379
2380Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2381
2382 * mips.h: Added M_LI_S and M_LI_SS.
2383
2384Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2385
2386 * h8300.h: Get some rare mov.bs correct.
2387
2388Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2389
2390 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2391 been included.
2392
2393Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2394
2395 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2396 jump instructions, for use in disassemblers.
2397
2398Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2399
2400 * m88k.h: Make bitfields just unsigned, not unsigned long or
2401 unsigned short.
2402
2403Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2404
2405 * hppa.h: New argument type 'y'. Use in various float instructions.
2406
2407Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2408
2409 * hppa.h (break): First immediate field is unsigned.
2410
2411 * hppa.h: Add rfir instruction.
2412
2413Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2414
2415 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2416
2417Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2418
2419 * mips.h: Reworked the hazard information somewhat, and fixed some
2420 bugs in the instruction hazard descriptions.
2421
2422Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2423
2424 * m88k.h: Corrected a couple of opcodes.
2425
2426Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2427
2428 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2429 new version includes instruction hazard information, but is
2430 otherwise reasonably similar.
2431
2432Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2433
2434 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2435
2436Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2437
2438 Patches from Jeff Law, law@cs.utah.edu:
2439 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2440 Make the tables be the same for the following instructions:
2441 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2442 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2443 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2444 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2445 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2446 "fcmp", and "ftest".
2447
2448 * hppa.h: Make new and old tables the same for "break", "mtctl",
2449 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2450 Fix typo in last patch. Collapse several #ifdefs into a
2451 single #ifdef.
2452
2453 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2454 of the comments up-to-date.
2455
2456 * hppa.h: Update "free list" of letters and update
2457 comments describing each letter's function.
2458
4f1d9bd8
NC
2459Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2460
2461 * h8300.h: Lots of little fixes for the h8/300h.
2462
2463Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2464
2465 Support for H8/300-H
2466 * h8300.h: Lots of new opcodes.
2467
252b5132
RH
2468Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2469
2470 * h8300.h: checkpoint, includes H8/300-H opcodes.
2471
2472Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2473
2474 * Patches from Jeffrey Law <law@cs.utah.edu>.
2475 * hppa.h: Rework single precision FP
2476 instructions so that they correctly disassemble code
2477 PA1.1 code.
2478
2479Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2480
2481 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2482 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2483
2484Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2485
2486 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2487 gdb will define it for now.
2488
2489Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2490
2491 * sparc.h: Don't end enumerator list with comma.
2492
2493Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2494
2495 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2496 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2497 ("bc2t"): Correct typo.
2498 ("[ls]wc[023]"): Use T rather than t.
2499 ("c[0123]"): Define general coprocessor instructions.
2500
2501Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2502
2503 * m68k.h: Move split point for gcc compilation more towards
2504 middle.
2505
2506Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2507
2508 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2509 simply wrong, ics, rfi, & rfsvc were missing).
2510 Add "a" to opr_ext for "bb". Doc fix.
2511
2512Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2513
2514 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2515 * mips.h: Add casts, to suppress warnings about shifting too much.
2516 * m68k.h: Document the placement code '9'.
2517
2518Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2519
2520 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2521 allows callers to break up the large initialized struct full of
2522 opcodes into two half-sized ones. This permits GCC to compile
2523 this module, since it takes exponential space for initializers.
2524 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2525
2526Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2527
2528 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2529 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2530 initialized structs in it.
2531
2532Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2533
2534 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2535 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2536 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2537
2538Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2539
2540 * mips.h: document "i" and "j" operands correctly.
2541
2542Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2543
2544 * mips.h: Removed endianness dependency.
2545
2546Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2547
2548 * h8300.h: include info on number of cycles per instruction.
2549
2550Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2551
2552 * hppa.h: Move handy aliases to the front. Fix masks for extract
2553 and deposit instructions.
2554
2555Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2556
2557 * i386.h: accept shld and shrd both with and without the shift
2558 count argument, which is always %cl.
2559
2560Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2561
2562 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2563 (one_byte_segment_defaults, two_byte_segment_defaults,
2564 i386_prefixtab_end): Ditto.
2565
2566Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2567
2568 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2569 for operand 2; from John Carr, jfc@dsg.dec.com.
2570
2571Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2572
2573 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2574 always use 16-bit offsets. Makes calculated-size jump tables
2575 feasible.
2576
2577Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2578
2579 * i386.h: Fix one-operand forms of in* and out* patterns.
2580
2581Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2582
2583 * m68k.h: Added CPU32 support.
2584
2585Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2586
2587 * mips.h (break): Disassemble the argument. Patch from
2588 jonathan@cs.stanford.edu (Jonathan Stone).
2589
2590Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2591
2592 * m68k.h: merged Motorola and MIT syntax.
2593
2594Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2595
2596 * m68k.h (pmove): make the tests less strict, the 68k book is
2597 wrong.
2598
2599Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2600
2601 * m68k.h (m68ec030): Defined as alias for 68030.
2602 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2603 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2604 them. Tightened description of "fmovex" to distinguish it from
2605 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2606 up descriptions that claimed versions were available for chips not
2607 supporting them. Added "pmovefd".
2608
2609Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2610
2611 * m68k.h: fix where the . goes in divull
2612
2613Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2614
2615 * m68k.h: the cas2 instruction is supposed to be written with
2616 indirection on the last two operands, which can be either data or
2617 address registers. Added a new operand type 'r' which accepts
2618 either register type. Added new cases for cas2l and cas2w which
2619 use them. Corrected masks for cas2 which failed to recognize use
2620 of address register.
2621
2622Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2623
2624 * m68k.h: Merged in patches (mostly m68040-specific) from
2625 Colin Smith <colin@wrs.com>.
2626
2627 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2628 base). Also cleaned up duplicates, re-ordered instructions for
2629 the sake of dis-assembling (so aliases come after standard names).
2630 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2631
2632Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2633
2634 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2635 all missing .s
2636
2637Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2638
2639 * sparc.h: Moved tables to BFD library.
2640
2641 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2642
2643Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2644
2645 * h8300.h: Finish filling in all the holes in the opcode table,
2646 so that the Lucid C compiler can digest this as well...
2647
2648Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2649
2650 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2651 Fix opcodes on various sizes of fild/fist instructions
2652 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2653 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2654
2655Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2656
2657 * h8300.h: Fill in all the holes in the opcode table so that the
2658 losing HPUX C compiler can digest this...
2659
2660Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2661
2662 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2663 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2664
2665Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2666
2667 * sparc.h: Add new architecture variant sparclite; add its scan
2668 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2669
2670Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2671
2672 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2673 fy@lucid.com).
2674
2675Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2676
2677 * rs6k.h: New version from IBM (Metin).
2678
2679Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2680
2681 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2682 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2683
2684Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2685
2686 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2687
2688Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2689
2690 * m68k.h (one, two): Cast macro args to unsigned to suppress
2691 complaints from compiler and lint about integer overflow during
2692 shift.
2693
2694Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2695
2696 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2697
2698Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2699
2700 * mips.h: Make bitfield layout depend on the HOST compiler,
2701 not on the TARGET system.
2702
2703Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2704
2705 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2706 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2707 <TRANLE@INTELLICORP.COM>.
2708
2709Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2710
2711 * h8300.h: turned op_type enum into #define list
2712
2713Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2714
2715 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2716 similar instructions -- they've been renamed to "fitoq", etc.
2717 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2718 number of arguments.
2719 * h8300.h: Remove extra ; which produces compiler warning.
2720
2721Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2722
2723 * sparc.h: fix opcode for tsubcctv.
2724
2725Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2726
2727 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2728
2729Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2730
2731 * sparc.h (nop): Made the 'lose' field be even tighter,
2732 so only a standard 'nop' is disassembled as a nop.
2733
2734Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2735
2736 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2737 disassembled as a nop.
2738
4f1d9bd8
NC
2739Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2740
2741 * m68k.h, sparc.h: ANSIfy enums.
2742
252b5132
RH
2743Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2744
2745 * sparc.h: fix a typo.
2746
2747Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2748
2749 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2750 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2751 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2752
2753\f
2754Local Variables:
2755version-control: never
2756End:
This page took 0.240287 seconds and 4 git commands to generate.