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Add IBM 370 support.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
5b93d8bb
AM		 12000-02-23 Linas Vepstas <linas@linas.org>
2
3 * i370.h: New file.
4
87f398dd
AH		 52000-02-22 Andrew Haley <aph@cygnus.com>
6
7 * mips.h: (OPCODE_IS_MEMBER): Add comment.
8
367c01af
AH		 91999-12-30 Andrew Haley <aph@cygnus.com>
10
9a1e79ca
AH		 11 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
12 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
13 insns.
367c01af 14
add0c677
AM		 152000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
16
17 * i386.h: Qualify intel mode far call and jmp with x_Suf.
18
3138f287
AM		 191999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
20
21 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
22 indirect jumps and calls. Add FF/3 call for intel mode.
23
ccecd07b
JL		 24Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
25
26 * mn10300.h: Add new operand types. Add new instruction formats.
27
b37e19e9
JL		 28Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
29
30 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
31 instruction.
32
5fce5ddf
GRK		 331999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
34
35 * mips.h (INSN_ISA5): New.
36
2bd7f1f3
GRK		 371999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
38
39 * mips.h (OPCODE_IS_MEMBER): New.
40
4df2b5c5
NC		 411999-10-29 Nick Clifton <nickc@cygnus.com>
42
43 * d30v.h (SHORT_AR): Define.
44
446a06c9
MM		 451999-10-18 Michael Meissner <meissner@cygnus.com>
46
47 * alpha.h (alpha_num_opcodes): Convert to unsigned.
48 (alpha_num_operands): Ditto.
49
eca04c6a
JL		 50Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
51
52 * hppa.h (pa_opcodes): Add load and store cache control to
53 instructions. Add ordered access load and store.
54
55 * hppa.h (pa_opcode): Add new entries for addb and addib.
56
57 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
58
59 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
60
c43185de
DN		 61Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
62
63 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
64
ec3533da
JL		 65Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
66
390f858d
JL		 67 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
68 and "be" using completer prefixes.
69
8c47ebd9
JL		 70 * hppa.h (pa_opcodes): Add initializers to silence compiler.
71
ec3533da
JL		 72 * hppa.h: Update comments about character usage.
73
18369bea
JL		 74Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
75
76 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
77 up the new fstw & bve instructions.
78
c36efdd2
JL		 79Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
80
d3ffb032
JL		 81 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
82 instructions.
83
c49ec3da
JL		 84 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
85
5d2e7ecc
JL		 86 * hppa.h (pa_opcodes): Add long offset double word load/store
87 instructions.
88
6397d1a2
JL		 89 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
90 stores.
91
142f0fe0
JL		 92 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
93
f5a68b45
JL		 94 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
95
8235801e
JL		 96 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
97
35184366
JL		 98 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
99
f0bfde5e
JL		 100 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
101
27bbbb58
JL		 102 * hppa.h (pa_opcodes): Add support for "b,l".
103
c36efdd2
JL		 104 * hppa.h (pa_opcodes): Add support for "b,gate".
105
f2727d04
JL		 106Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
107
9392fb11
JL		 108 * hppa.h (pa_opcodes): Use 'fX' for first register operand
109 in xmpyu.
110
e0c52e99
JL		 111 * hppa.h (pa_opcodes): Fix mask for probe and probei.
112
f2727d04
JL		 113 * hppa.h (pa_opcodes): Fix mask for depwi.
114
52d836e2
JL		 115Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
116
117 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
118 an explicit output argument.
119
90765e3a
JL		 120Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
121
122 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
123 Add a few PA2.0 loads and store variants.
124
8340b17f
ILT		 1251999-09-04 Steve Chamberlain <sac@pobox.com>
126
127 * pj.h: New file.
128
5f47d35b
AM		 1291999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
130
131 * i386.h (i386_regtab): Move %st to top of table, and split off
132 other fp reg entries.
133 (i386_float_regtab): To here.
134
1c143202
JL		 135Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
136
7d8fdb64
JL		 137 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
138 by 'f'.
139
90927b9c
JL		 140 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
141 Add supporting args.
142
1d16bf9c
JL		 143 * hppa.h: Document new completers and args.
144 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
145 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
146 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
147 pmenb and pmdis.
148
96226a68
JL		 149 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
150 hshr, hsub, mixh, mixw, permh.
151
5d4ba527
JL		 152 * hppa.h (pa_opcodes): Change completers in instructions to
153 use 'c' prefix.
154
e9fc28c6
JL		 155 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
156 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
157
1c143202
JL		 158 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
159 fnegabs to use 'I' instead of 'F'.
160
9e525108
AM		 1611999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
162
163 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
164 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
165 Alphabetically sort PIII insns.
166
e8da1bf1
DE		 167Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
168
169 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
170
7d627258
JL		 171Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
172
5696871a
JL		 173 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
174 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
175
7d627258
JL		 176 * hppa.h: Document 64 bit condition completers.
177
c5e52916
JL		 178Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
179
180 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
181
eecb386c
AM		 1821999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
183
184 * i386.h (i386_optab): Add DefaultSize modifier to all insns
185 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
186 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
187
88a380f3
JL		 188Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
189 Jeff Law <law@cygnus.com>
190
191 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
192
193 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 194
195 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
196 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
197
145cf1f0
AM		 1981999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
199
200 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
201
73826640
JL		 202Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
203
204 * hppa.h (struct pa_opcode): Add new field "flags".
205 (FLAGS_STRICT): Define.
206
b65db252
JL		 207Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
208 Jeff Law <law@cygnus.com>
209
f7fc668b
JL		 210 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
211
212 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 213
10084519
AM		 2141999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
215
216 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
217 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
218 flag to fcomi and friends.
219
cd8a80ba
JL		 220Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
221
222 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
223 integer logical instructions.
224
1fca749b
ILT		 2251999-05-28 Linus Nordberg <linus.nordberg@canit.se>
226
227 * m68k.h: Document new formats `E', `G', `H' and new places `N',
228 `n', `o'.
229
230 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
231 and new places `m', `M', `h'.
232
aa008907
JL		 233Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
234
235 * hppa.h (pa_opcodes): Add several processor specific system
236 instructions.
237
e26b85f0
JL		 238Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
239
240 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
241 "addb", and "addib" to be used by the disassembler.
242
c608c12e
AM		 2431999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
244
245 * i386.h (ReverseModrm): Remove all occurences.
246 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
247 movmskps, pextrw, pmovmskb, maskmovq.
248 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
249 ignore the data size prefix.
250
251 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
252 Mostly stolen from Doug Ledford <dledford@redhat.com>
253
45c18104
RH		 254Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
255
256 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
257
252b5132
RH		 2581999-04-14 Doug Evans <devans@casey.cygnus.com>
259
260 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
261 (CGEN_ATTR_TYPE): Update.
262 (CGEN_ATTR_MASK): Number booleans starting at 0.
263 (CGEN_ATTR_VALUE): Update.
264 (CGEN_INSN_ATTR): Update.
265
266Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
267
268 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
269 instructions.
270
271Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
272
273 * hppa.h (bb, bvb): Tweak opcode/mask.
274
275
2761999-03-22 Doug Evans <devans@casey.cygnus.com>
277
278 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
279 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
280 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
281 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
282 Delete member max_insn_size.
283 (enum cgen_cpu_open_arg): New enum.
284 (cpu_open): Update prototype.
285 (cpu_open_1): Declare.
286 (cgen_set_cpu): Delete.
287
2881999-03-11 Doug Evans <devans@casey.cygnus.com>
289
290 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
291 (CGEN_OPERAND_NIL): New macro.
292 (CGEN_OPERAND): New member `type'.
293 (@arch@_cgen_operand_table): Delete decl.
294 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
295 (CGEN_OPERAND_TABLE): New struct.
296 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
297 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
298 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
299 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
300 {get,set}_{int,vma}_operand.
301 (@arch@_cgen_cpu_open): New arg `isa'.
302 (cgen_set_cpu): Ditto.
303
304Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
305
306 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
307
3081999-02-25 Doug Evans <devans@casey.cygnus.com>
309
310 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
311 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
312 enum cgen_hw_type.
313 (CGEN_HW_TABLE): New struct.
314 (hw_table): Delete declaration.
315 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
316 to table entry to enum.
317 (CGEN_OPINST): Ditto.
318 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
319
320Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
321
322 * alpha.h (AXP_OPCODE_EV6): New.
323 (AXP_OPCODE_NOPAL): Include it.
324
3251999-02-09 Doug Evans <devans@casey.cygnus.com>
326
327 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
328 All uses updated. New members int_insn_p, max_insn_size,
329 parse_operand,insert_operand,extract_operand,print_operand,
330 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
331 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
332 extract_handlers,print_handlers.
333 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
334 (CGEN_ATTR_BOOL_OFFSET): New macro.
335 (CGEN_ATTR_MASK): Subtract it to compute bit number.
336 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
337 (cgen_opcode_handler): Renamed from cgen_base.
338 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
339 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
340 all uses updated.
341 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
342 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
343 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
344 (CGEN_OPCODE,CGEN_IBASE): New types.
345 (CGEN_INSN): Rewrite.
346 (CGEN_{ASM,DIS}_HASH*): Delete.
347 (init_opcode_table,init_ibld_table): Declare.
348 (CGEN_INSN_ATTR): New type.
349
350Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
351
352 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
353 (x_FP, d_FP, dls_FP, sldx_FP): Define.
354 Change *Suf definitions to include x and d suffixes.
355 (movsx): Use w_Suf and b_Suf.
356 (movzx): Likewise.
357 (movs): Use bwld_Suf.
358 (fld): Change ordering. Use sld_FP.
359 (fild): Add Intel Syntax equivalent of fildq.
360 (fst): Use sld_FP.
361 (fist): Use sld_FP.
362 (fstp): Use sld_FP. Add x_FP version.
363 (fistp): LLongMem version for Intel Syntax.
364 (fcom, fcomp): Use sld_FP.
365 (fadd, fiadd, fsub): Use sld_FP.
366 (fsubr): Use sld_FP.
367 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
368
3691999-01-27 Doug Evans <devans@casey.cygnus.com>
370
371 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
372 CGEN_MODE_UINT.
373
374Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
375
376 * hppa.h (bv): Fix mask.
377
3781999-01-05 Doug Evans <devans@casey.cygnus.com>
379
380 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
381 (CGEN_ATTR): Use it.
382 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
383 (CGEN_ATTR_TABLE): New member dfault.
384
3851998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
386
387 * mips.h (MIPS16_INSN_BRANCH): New.
388
389Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
390
391 The following is part of a change made by Edith Epstein
392 <eepstein@sophia.cygnus.com> as part of a project to merge in
393 changes by HP; HP did not create ChangeLog entries.
394
395 * hppa.h (completer_chars): list of chars to not put a space
396 after.
397
398Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
399
400 * i386.h (i386_optab): Permit w suffix on processor control and
401 status word instructions.
402
4031998-11-30 Doug Evans <devans@casey.cygnus.com>
404
405 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
406 (struct cgen_keyword_entry): Ditto.
407 (struct cgen_operand): Ditto.
408 (CGEN_IFLD): New typedef, with associated access macros.
409 (CGEN_IFMT): New typedef, with associated access macros.
410 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
411 (CGEN_IVALUE): New typedef.
412 (struct cgen_insn): Delete const on syntax,attrs members.
413 `format' now points to format data. Type of `value' is now
414 CGEN_IVALUE.
415 (struct cgen_opcode_table): New member ifld_table.
416
4171998-11-18 Doug Evans <devans@casey.cygnus.com>
418
419 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
420 (CGEN_OPERAND_INSTANCE): New member `attrs'.
421 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
422 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
423 (cgen_opcode_table): Update type of dis_hash fn.
424 (extract_operand): Update type of `insn_value' arg.
425
426Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
427
428 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
429
430Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
431
432 * mips.h (INSN_MULT): Added.
433
434Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
435
436 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
437
438Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
439
440 * cgen.h (CGEN_INSN_INT): New typedef.
441 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
442 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
443 (CGEN_INSN_BYTES_PTR): New typedef.
444 (CGEN_EXTRACT_INFO): New typedef.
445 (cgen_insert_fn,cgen_extract_fn): Update.
446 (cgen_opcode_table): New member `insn_endian'.
447 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
448 (insert_operand,extract_operand): Update.
449 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
450
451Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
452
453 * cgen.h (CGEN_ATTR_BOOLS): New macro.
454 (struct CGEN_HW_ENTRY): New member `attrs'.
455 (CGEN_HW_ATTR): New macro.
456 (struct CGEN_OPERAND_INSTANCE): New member `name'.
457 (CGEN_INSN_INVALID_P): New macro.
458
459Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
460
461 * hppa.h: Add "fid".
462
463Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
464
465 From Robert Andrew Dale <rob@nb.net>
466 * i386.h (i386_optab): Add AMD 3DNow! instructions.
467 (AMD_3DNOW_OPCODE): Define.
468
469Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
470
471 * d30v.h (EITHER_BUT_PREFER_MU): Define.
472
473Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
474
475 * cgen.h (cgen_insn): #if 0 out element `cdx'.
476
477Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
478
479 Move all global state data into opcode table struct, and treat
480 opcode table as something that is "opened/closed".
481 * cgen.h (CGEN_OPCODE_DESC): New type.
482 (all fns): New first arg of opcode table descriptor.
483 (cgen_set_parse_operand_fn): Add prototype.
484 (cgen_current_machine,cgen_current_endian): Delete.
485 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
486 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
487 dis_hash_table,dis_hash_table_entries.
488 (opcode_open,opcode_close): Add prototypes.
489
490 * cgen.h (cgen_insn): New element `cdx'.
491
492Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
493
494 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
495
496Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
497
498 * mn10300.h: Add "no_match_operands" field for instructions.
499 (MN10300_MAX_OPERANDS): Define.
500
501Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
502
503 * cgen.h (cgen_macro_insn_count): Declare.
504
505Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
506
507 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
508 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
509 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
510 set_{int,vma}_operand.
511
512Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
513
514 * mn10300.h: Add "machine" field for instructions.
515 (MN103, AM30): Define machine types.
516
517Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
518
519 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
520
5211998-06-18 Ulrich Drepper <drepper@cygnus.com>
522
523 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
524
525Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
526
527 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
528 and ud2b.
529 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
530 those that happen to be implemented on pentiums.
531
532Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
533
534 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
535 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
536 with Size16|IgnoreSize or Size32|IgnoreSize.
537
538Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
539
540 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
541 (REPE): Rename to REPE_PREFIX_OPCODE.
542 (i386_regtab_end): Remove.
543 (i386_prefixtab, i386_prefixtab_end): Remove.
544 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
545 of md_begin.
546 (MAX_OPCODE_SIZE): Define.
547 (i386_optab_end): Remove.
548 (sl_Suf): Define.
549 (sl_FP): Use sl_Suf.
550
551 * i386.h (i386_optab): Allow 16 bit displacement for `mov
552 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
553 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
554 data32, dword, and adword prefixes.
555 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
556 regs.
557
558Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
559
560 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
561
562 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
563 register operands, because this is a common idiom. Flag them with
564 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
565 fdivrp because gcc erroneously generates them. Also flag with a
566 warning.
567
568 * i386.h: Add suffix modifiers to most insns, and tighter operand
569 checks in some cases. Fix a number of UnixWare compatibility
570 issues with float insns. Merge some floating point opcodes, using
571 new FloatMF modifier.
572 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
573 consistency.
574
575 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
576 IgnoreDataSize where appropriate.
577
578Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
579
580 * i386.h: (one_byte_segment_defaults): Remove.
581 (two_byte_segment_defaults): Remove.
582 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
583
584Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
585
586 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
587 (cgen_hw_lookup_by_num): Declare.
588
589Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
590
591 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
592 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
593
594Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
595
596 * cgen.h (cgen_asm_init_parse): Delete.
597 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
598 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
599
600Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
601
602 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
603 (cgen_asm_finish_insn): Update prototype.
604 (cgen_insn): New members num, data.
605 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
606 dis_hash, dis_hash_table_size moved to ...
607 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
608 All uses updated. New members asm_hash_p, dis_hash_p.
609 (CGEN_MINSN_EXPANSION): New struct.
610 (cgen_expand_macro_insn): Declare.
611 (cgen_macro_insn_count): Declare.
612 (get_insn_operands): Update prototype.
613 (lookup_get_insn_operands): Declare.
614
615Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
616
617 * i386.h (i386_optab): Change iclrKludge and imulKludge to
618 regKludge. Add operands types for string instructions.
619
620Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
621
622 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
623 table.
624
625Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
626
627 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
628 for `gettext'.
629
630Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
631
632 * i386.h: Remove NoModrm flag from all insns: it's never checked.
633 Add IsString flag to string instructions.
634 (IS_STRING): Don't define.
635 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
636 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
637 (SS_PREFIX_OPCODE): Define.
638
639Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
640
641 * i386.h: Revert March 24 patch; no more LinearAddress.
642
643Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
644
645 * i386.h (i386_optab): Remove fwait (9b) from all floating point
646 instructions, and instead add FWait opcode modifier. Add short
647 form of fldenv and fstenv.
648 (FWAIT_OPCODE): Define.
649
650 * i386.h (i386_optab): Change second operand constraint of `mov
651 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
652 allow legal instructions such as `movl %gs,%esi'
653
654Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
655
656 * h8300.h: Various changes to fully bracket initializers.
657
658Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
659
660 * i386.h: Set LinearAddress for lidt and lgdt.
661
662Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
663
664 * cgen.h (CGEN_BOOL_ATTR): New macro.
665
666Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
667
668 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
669
670Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
671
672 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
673 (cgen_insn): Record syntax and format entries here, rather than
674 separately.
675
676Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
677
678 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
679
680Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
681
682 * cgen.h (cgen_insert_fn): Change type of result to const char *.
683 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
684 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
685
686Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
687
688 * cgen.h (lookup_insn): New argument alias_p.
689
690Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
691
692Fix rac to accept only a0:
693 * d10v.h (OPERAND_ACC): Split into:
694 (OPERAND_ACC0, OPERAND_ACC1) .
695 (OPERAND_GPR): Define.
696
697Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
698
699 * cgen.h (CGEN_FIELDS): Define here.
700 (CGEN_HW_ENTRY): New member `type'.
701 (hw_list): Delete decl.
702 (enum cgen_mode): Declare.
703 (CGEN_OPERAND): New member `hw'.
704 (enum cgen_operand_instance_type): Declare.
705 (CGEN_OPERAND_INSTANCE): New type.
706 (CGEN_INSN): New member `operands'.
707 (CGEN_OPCODE_DATA): Make hw_list const.
708 (get_insn_operands,lookup_insn): Add prototypes for.
709
710Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
711
712 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
713 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
714 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
715 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
716
717Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
718
719 * cgen.h: Correct typo in comment end marker.
720
721Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
722
723 * tic30.h: New file.
724
725Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
726
727 * cgen.h: Add prototypes for cgen_save_fixups(),
728 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
729 of cgen_asm_finish_insn() to return a char *.
730
731Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
732
733 * cgen.h: Formatting changes to improve readability.
734
735Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
736
737 * cgen.h (*): Clean up pass over `struct foo' usage.
738 (CGEN_ATTR): Make unsigned char.
739 (CGEN_ATTR_TYPE): Update.
740 (CGEN_ATTR_{ENTRY,TABLE}): New types.
741 (cgen_base): Move member `attrs' to cgen_insn.
742 (CGEN_KEYWORD): New member `null_entry'.
743 (CGEN_{SYNTAX,FORMAT}): New types.
744 (cgen_insn): Format and syntax separated from each other.
745
746Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
747
748 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
749 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
750 flags_{used,set} long.
751 (d30v_operand): Make flags field long.
752
753Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
754
755 * m68k.h: Fix comment describing operand types.
756
757Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
758
759 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
760 everything else after down.
761
762Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
763
764 * d10v.h (OPERAND_FLAG): Split into:
765 (OPERAND_FFLAG, OPERAND_CFLAG) .
766
767Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
768
769 * mips.h (struct mips_opcode): Changed comments to reflect new
770 field usage.
771
772Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
773
774 * mips.h: Added to comments a quick-ref list of all assigned
775 operand type characters.
776 (OP_{MASK,SH}_PERFREG): New macros.
777
778Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
779
780 * sparc.h: Add '_' and '/' for v9a asr's.
781 Patch from David Miller <davem@vger.rutgers.edu>
782
783Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
784
785 * h8300.h: Bit ops with absolute addresses not in the 8 bit
786 area are not available in the base model (H8/300).
787
788Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
789
790 * m68k.h: Remove documentation of ` operand specifier.
791
792Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
793
794 * m68k.h: Document q and v operand specifiers.
795
796Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
797
798 * v850.h (struct v850_opcode): Add processors field.
799 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
800 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
801 (PROCESSOR_V850EA): New bit constants.
802
803Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
804
805 Merge changes from Martin Hunt:
806
807 * d30v.h: Allow up to 64 control registers. Add
808 SHORT_A5S format.
809
810 * d30v.h (LONG_Db): New form for delayed branches.
811
812 * d30v.h: (LONG_Db): New form for repeati.
813
814 * d30v.h (SHORT_D2B): New form.
815
816 * d30v.h (SHORT_A2): New form.
817
818 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
819 registers are used. Needed for VLIW optimization.
820
821Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
822
823 * cgen.h: Move assembler interface section
824 up so cgen_parse_operand_result is defined for cgen_parse_address.
825 (cgen_parse_address): Update prototype.
826
827Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
828
829 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
830
831Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
832
833 * i386.h (two_byte_segment_defaults): Correct base register 5 in
834 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
835 <paubert@iram.es>.
836
837 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
838 <paubert@iram.es>.
839
840 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
841 <paubert@iram.es>.
842
843 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
844 (JUMP_ON_ECX_ZERO): Remove commented out macro.
845
846Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
847
848 * v850.h (V850_NOT_R0): New flag.
849
850Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
851
852 * v850.h (struct v850_opcode): Remove flags field.
853
854Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
855
856 * v850.h (struct v850_opcode): Add flags field.
857 (struct v850_operand): Extend meaning of 'bits' and 'shift'
858 fields.
859 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
860 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
861
862Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
863
864 * arc.h: New file.
865
866Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
867
868 * sparc.h (sparc_opcodes): Declare as const.
869
870Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
871
872 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
873 uses single or double precision floating point resources.
874 (INSN_NO_ISA, INSN_ISA1): Define.
875 (cpu specific INSN macros): Tweak into bitmasks outside the range
876 of INSN_ISA field.
877
878Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
879
880 * i386.h: Fix pand opcode.
881
882Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
883
884 * mips.h: Widen INSN_ISA and move it to a more convenient
885 bit position. Add INSN_3900.
886
887Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
888
889 * mips.h (struct mips_opcode): added new field membership.
890
891Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
892
893 * i386.h (movd): only Reg32 is allowed.
894
895 * i386.h: add fcomp and ud2. From Wayne Scott
896 <wscott@ichips.intel.com>.
897
898Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
899
900 * i386.h: Add MMX instructions.
901
902Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
903
904 * i386.h: Remove W modifier from conditional move instructions.
905
906Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
907
908 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
909 with no arguments to match that generated by the UnixWare
910 assembler.
911
912Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
913
914 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
915 (cgen_parse_operand_fn): Declare.
916 (cgen_init_parse_operand): Declare.
917 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
918 new argument `want'.
919 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
920 (enum cgen_parse_operand_type): New enum.
921
922Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
923
924 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
925
926Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
927
928 * cgen.h: New file.
929
930Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
931
932 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
933 fdivrp.
934
935Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
936
937 * v850.h (extract): Make unsigned.
938
939Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
940
941 * i386.h: Add iclr.
942
943Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
944
945 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
946 take a direction bit.
947
948Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
949
950 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
951
952Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
953
954 * sparc.h: Include <ansidecl.h>. Update function declarations to
955 use prototypes, and to use const when appropriate.
956
957Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
958
959 * mn10300.h (MN10300_OPERAND_RELAX): Define.
960
961Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
962
963 * d10v.h: Change pre_defined_registers to
964 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
965
966Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
967
968 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
969 Change mips_opcodes from const array to a pointer,
970 and change bfd_mips_num_opcodes from const int to int,
971 so that we can increase the size of the mips opcodes table
972 dynamically.
973
974Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
975
976 * d30v.h (FLAG_X): Remove unused flag.
977
978Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
979
980 * d30v.h: New file.
981
982Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
983
984 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
985 (PDS_VALUE): Macro to access value field of predefined symbols.
986 (tic80_next_predefined_symbol): Add prototype.
987
988Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
989
990 * tic80.h (tic80_symbol_to_value): Change prototype to match
991 change in function, added class parameter.
992
993Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
994
995 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
996 endmask fields, which are somewhat weird in that 0 and 32 are
997 treated exactly the same.
998
999Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1000
1001 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1002 rather than a constant that is 2**X. Reorder them to put bits for
1003 operands that have symbolic names in the upper bits, so they can
1004 be packed into an int where the lower bits contain the value that
1005 corresponds to that symbolic name.
1006 (predefined_symbo): Add struct.
1007 (tic80_predefined_symbols): Declare array of translations.
1008 (tic80_num_predefined_symbols): Declare size of that array.
1009 (tic80_value_to_symbol): Declare function.
1010 (tic80_symbol_to_value): Declare function.
1011
1012Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1013
1014 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1015
1016Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1017
1018 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1019 be the destination register.
1020
1021Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1022
1023 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1024 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1025 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1026 that the opcode can have two vector instructions in a single
1027 32 bit word and we have to encode/decode both.
1028
1029Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1030
1031 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1032 TIC80_OPERAND_RELATIVE for PC relative.
1033 (TIC80_OPERAND_BASEREL): New flag bit for register
1034 base relative.
1035
1036Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1037
1038 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1039
1040Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1041
1042 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1043 ":s" modifier for scaling.
1044
1045Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1046
1047 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1048 (TIC80_OPERAND_M_LI): Ditto
1049
1050Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1051
1052 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1053 (TIC80_OPERAND_CC): New define for condition code operand.
1054 (TIC80_OPERAND_CR): New define for control register operand.
1055
1056Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1057
1058 * tic80.h (struct tic80_opcode): Name changed.
1059 (struct tic80_opcode): Remove format field.
1060 (struct tic80_operand): Add insertion and extraction functions.
1061 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1062 correct ones.
1063 (FMT_*): Ditto.
1064
1065Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1066
1067 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1068 type IV instruction offsets.
1069
1070Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1071
1072 * tic80.h: New file.
1073
1074Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1075
1076 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1077
1078Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1079
1080 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1081 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1082 * v850.h: Fix comment, v850_operand not powerpc_operand.
1083
1084Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1085
1086 * mn10200.h: Flesh out structures and definitions needed by
1087 the mn10200 assembler & disassembler.
1088
1089Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1090
1091 * mips.h: Add mips16 definitions.
1092
1093Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1094
1095 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1096
1097Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1098
1099 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1100 (MN10300_OPERAND_MEMADDR): Define.
1101
1102Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1103
1104 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1105
1106Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1107
1108 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1109
1110Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1111
1112 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1113
1114Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1115
1116 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1117
1118Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1119
1120 * alpha.h: Don't include "bfd.h"; private relocation types are now
1121 negative to minimize problems with shared libraries. Organize
1122 instruction subsets by AMASK extensions and PALcode
1123 implementation.
1124 (struct alpha_operand): Move flags slot for better packing.
1125
1126Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1127
1128 * v850.h (V850_OPERAND_RELAX): New operand flag.
1129
1130Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1131
1132 * mn10300.h (FMT_*): Move operand format definitions
1133 here.
1134
1135Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1136
1137 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1138
1139Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1140
1141 * mn10300.h (mn10300_opcode): Add "format" field.
1142 (MN10300_OPERAND_*): Define.
1143
1144Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1145
1146 * mn10x00.h: Delete.
1147 * mn10200.h, mn10300.h: New files.
1148
1149Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1150
1151 * mn10x00.h: New file.
1152
1153Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1154
1155 * v850.h: Add new flag to indicate this instruction uses a PC
1156 displacement.
1157
1158Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1159
1160 * h8300.h (stmac): Add missing instruction.
1161
1162Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1163
1164 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1165 field.
1166
1167Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1168
1169 * v850.h (V850_OPERAND_EP): Define.
1170
1171 * v850.h (v850_opcode): Add size field.
1172
1173Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1174
1175 * v850.h (v850_operands): Add insert and extract fields, pointers
1176 to functions used to handle unusual operand encoding.
1177 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1178 V850_OPERAND_SIGNED): Defined.
1179
1180Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1181
1182 * v850.h (v850_operands): Add flags field.
1183 (OPERAND_REG, OPERAND_NUM): Defined.
1184
1185Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1186
1187 * v850.h: New file.
1188
1189Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1190
1191 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1192 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1193 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1194 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1195 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1196 Defined.
1197
1198Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1199
1200 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1201 a 3 bit space id instead of a 2 bit space id.
1202
1203Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1204
1205 * d10v.h: Add some additional defines to support the
1206 assembler in determining which operations can be done in parallel.
1207
1208Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1209
1210 * h8300.h (SN): Define.
1211 (eepmov.b): Renamed from "eepmov"
1212 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1213 with them.
1214
1215Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1216
1217 * d10v.h (OPERAND_SHIFT): New operand flag.
1218
1219Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1220
1221 * d10v.h: Changes for divs, parallel-only instructions, and
1222 signed numbers.
1223
1224Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1225
1226 * d10v.h (pd_reg): Define. Putting the definition here allows
1227 the assembler and disassembler to share the same struct.
1228
1229Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1230
1231 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1232 Williams <steve@icarus.com>.
1233
1234Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1235
1236 * d10v.h: New file.
1237
1238Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1239
1240 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1241
1242Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1243
1244 * m68k.h (mcf5200): New macro.
1245 Document names of coldfire control registers.
1246
1247Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1248
1249 * h8300.h (SRC_IN_DST): Define.
1250
1251 * h8300.h (UNOP3): Mark the register operand in this insn
1252 as a source operand, not a destination operand.
1253 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1254 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1255 register operand with SRC_IN_DST.
1256
1257Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1258
1259 * alpha.h: New file.
1260
1261Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1262
1263 * rs6k.h: Remove obsolete file.
1264
1265Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1266
1267 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1268 fdivp, and fdivrp. Add ffreep.
1269
1270Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1271
1272 * h8300.h: Reorder various #defines for readability.
1273 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1274 (BITOP): Accept additional (unused) argument. All callers changed.
1275 (EBITOP): Likewise.
1276 (O_LAST): Bump.
1277 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1278
1279 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1280 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1281 (BITOP, EBITOP): Handle new H8/S addressing modes for
1282 bit insns.
1283 (UNOP3): Handle new shift/rotate insns on the H8/S.
1284 (insns using exr): New instructions.
1285 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1286
1287Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1288
1289 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1290 was incorrect.
1291
1292Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1293
1294 * h8300.h (START): Remove.
1295 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1296 and mov.l insns that can be relaxed.
1297
1298Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1299
1300 * i386.h: Remove Abs32 from lcall.
1301
1302Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1303
1304 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1305 (SLCPOP): New macro.
1306 Mark X,Y opcode letters as in use.
1307
1308Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1309
1310 * sparc.h (F_FLOAT, F_FBR): Define.
1311
1312Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1313
1314 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1315 from all insns.
1316 (ABS8SRC,ABS8DST): Add ABS8MEM.
1317 (add.l): Fix reg+reg variant.
1318 (eepmov.w): Renamed from eepmovw.
1319 (ldc,stc): Fix many cases.
1320
1321Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1322
1323 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1324
1325Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1326
1327 * sparc.h (O): Mark operand letter as in use.
1328
1329Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1330
1331 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1332 Mark operand letters uU as in use.
1333
1334Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1335
1336 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1337 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1338 (SPARC_OPCODE_SUPPORTED): New macro.
1339 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1340 (F_NOTV9): Delete.
1341
1342Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1343
1344 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1345 declaration consistent with return type in definition.
1346
1347Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1348
1349 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1350
1351Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1352
1353 * i386.h (i386_regtab): Add 80486 test registers.
1354
1355Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1356
1357 * i960.h (I_HX): Define.
1358 (i960_opcodes): Add HX instruction.
1359
1360Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1361
1362 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1363 and fclex.
1364
1365Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1366
1367 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1368 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1369 (bfd_* defines): Delete.
1370 (sparc_opcode_archs): Replaces architecture_pname.
1371 (sparc_opcode_lookup_arch): Declare.
1372 (NUMOPCODES): Delete.
1373
1374Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1375
1376 * sparc.h (enum sparc_architecture): Add v9a.
1377 (ARCHITECTURES_CONFLICT_P): Update.
1378
1379Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1380
1381 * i386.h: Added Pentium Pro instructions.
1382
1383Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1384
1385 * m68k.h: Document new 'W' operand place.
1386
1387Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1388
1389 * hppa.h: Add lci and syncdma instructions.
1390
1391Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1392
1393 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1394 instructions.
1395
1396Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1397
1398 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1399 assembler's -mcom and -many switches.
1400
1401Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1402
1403 * i386.h: Fix cmpxchg8b extension opcode description.
1404
1405Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1406
1407 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1408 and register cr4.
1409
1410Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1411
1412 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1413
1414Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1415
1416 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1417
1418Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1419
1420 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1421
1422Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1423
1424 * m68kmri.h: Remove.
1425
1426 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1427 declarations. Remove F_ALIAS and flag field of struct
1428 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1429 int. Make name and args fields of struct m68k_opcode const.
1430
1431Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1432
1433 * sparc.h (F_NOTV9): Define.
1434
1435Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1436
1437 * mips.h (INSN_4010): Define.
1438
1439Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1440
1441 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1442
1443 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1444 * m68k.h: Fix argument descriptions of coprocessor
1445 instructions to allow only alterable operands where appropriate.
1446 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1447 (m68k_opcode_aliases): Add more aliases.
1448
1449Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1450
1451 * m68k.h: Added explcitly short-sized conditional branches, and a
1452 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1453 svr4-based configurations.
1454
1455Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1456
1457 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1458 * i386.h: added missing Data16/Data32 flags to a few instructions.
1459
1460Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1461
1462 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1463 (OP_MASK_BCC, OP_SH_BCC): Define.
1464 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1465 (OP_MASK_CCC, OP_SH_CCC): Define.
1466 (INSN_READ_FPR_R): Define.
1467 (INSN_RFE): Delete.
1468
1469Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1470
1471 * m68k.h (enum m68k_architecture): Deleted.
1472 (struct m68k_opcode_alias): New type.
1473 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1474 matching constraints, values and flags. As a side effect of this,
1475 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1476 as I know were never used, now may need re-examining.
1477 (numopcodes): Now const.
1478 (m68k_opcode_aliases, numaliases): New variables.
1479 (endop): Deleted.
1480 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1481 m68k_opcode_aliases; update declaration of m68k_opcodes.
1482
1483Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1484
1485 * hppa.h (delay_type): Delete unused enumeration.
1486 (pa_opcode): Replace unused delayed field with an architecture
1487 field.
1488 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1489
1490Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1491
1492 * mips.h (INSN_ISA4): Define.
1493
1494Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1495
1496 * mips.h (M_DLA_AB, M_DLI): Define.
1497
1498Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1499
1500 * hppa.h (fstwx): Fix single-bit error.
1501
1502Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1503
1504 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1505
1506Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1507
1508 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1509 debug registers. From Charles Hannum (mycroft@netbsd.org).
1510
1511Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1512
1513 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1514 i386 support:
1515 * i386.h (MOV_AX_DISP32): New macro.
1516 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1517 of several call/return instructions.
1518 (ADDR_PREFIX_OPCODE): New macro.
1519
1520Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1521
1522 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1523
1524 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1525 it pointer to const char;
1526 (struct vot, field `name'): ditto.
1527
1528Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1529
1530 * vax.h: Supply and properly group all values in end sentinel.
1531
1532Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1533
1534 * mips.h (INSN_ISA, INSN_4650): Define.
1535
1536Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1537
1538 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1539 systems with a separate instruction and data cache, such as the
1540 29040, these instructions take an optional argument.
1541
1542Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1543
1544 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1545 INSN_TRAP.
1546
1547Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1548
1549 * mips.h (INSN_STORE_MEMORY): Define.
1550
1551Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1552
1553 * sparc.h: Document new operand type 'x'.
1554
1555Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1556
1557 * i960.h (I_CX2): New instruction category. It includes
1558 instructions available on Cx and Jx processors.
1559 (I_JX): New instruction category, for JX-only instructions.
1560 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1561 Jx-only instructions, in I_JX category.
1562
1563Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1564
1565 * ns32k.h (endop): Made pointer const too.
1566
1567Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1568
1569 * ns32k.h: Drop Q operand type as there is no correct use
1570 for it. Add I and Z operand types which allow better checking.
1571
1572Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1573
1574 * h8300.h (xor.l) :fix bit pattern.
1575 (L_2): New size of operand.
1576 (trapa): Use it.
1577
1578Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1579
1580 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1581
1582Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1583
1584 * sparc.h: Include v9 definitions.
1585
1586Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1587
1588 * m68k.h (m68060): Defined.
1589 (m68040up, mfloat, mmmu): Include it.
1590 (struct m68k_opcode): Widen `arch' field.
1591 (m68k_opcodes): Updated for M68060. Removed comments that were
1592 instructions commented out by "JF" years ago.
1593
1594Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1595
1596 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1597 add a one-bit `flags' field.
1598 (F_ALIAS): New macro.
1599
1600Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1601
1602 * h8300.h (dec, inc): Get encoding right.
1603
1604Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1605
1606 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1607 a flag instead.
1608 (PPC_OPERAND_SIGNED): Define.
1609 (PPC_OPERAND_SIGNOPT): Define.
1610
1611Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1612
1613 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1614 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1615
1616Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1617
1618 * i386.h: Reverse last change. It'll be handled in gas instead.
1619
1620Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1621
1622 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1623 slower on the 486 and used the implicit shift count despite the
1624 explicit operand. The one-operand form is still available to get
1625 the shorter form with the implicit shift count.
1626
1627Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1628
1629 * hppa.h: Fix typo in fstws arg string.
1630
1631Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1632
1633 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1634
1635Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1636
1637 * ppc.h (PPC_OPCODE_601): Define.
1638
1639Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1640
1641 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1642 (so we can determine valid completers for both addb and addb[tf].)
1643
1644 * hppa.h (xmpyu): No floating point format specifier for the
1645 xmpyu instruction.
1646
1647Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1648
1649 * ppc.h (PPC_OPERAND_NEXT): Define.
1650 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1651 (struct powerpc_macro): Define.
1652 (powerpc_macros, powerpc_num_macros): Declare.
1653
1654Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1655
1656 * ppc.h: New file. Header file for PowerPC opcode table.
1657
1658Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1659
1660 * hppa.h: More minor template fixes for sfu and copr (to allow
1661 for easier disassembly).
1662
1663 * hppa.h: Fix templates for all the sfu and copr instructions.
1664
1665Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1666
1667 * i386.h (push): Permit Imm16 operand too.
1668
1669Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1670
1671 * h8300.h (andc): Exists in base arch.
1672
1673Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1674
1675 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1676 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1677
1678Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1679
1680 * hppa.h: Add FP quadword store instructions.
1681
1682Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1683
1684 * mips.h: (M_J_A): Added.
1685 (M_LA): Removed.
1686
1687Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1688
1689 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1690 <mellon@pepper.ncd.com>.
1691
1692Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1693
1694 * hppa.h: Immediate field in probei instructions is unsigned,
1695 not low-sign extended.
1696
1697Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1698
1699 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1700
1701Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1702
1703 * i386.h: Add "fxch" without operand.
1704
1705Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1706
1707 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1708
1709Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1710
1711 * hppa.h: Add gfw and gfr to the opcode table.
1712
1713Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1714
1715 * m88k.h: extended to handle m88110.
1716
1717Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1718
1719 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1720 addresses.
1721
1722Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1723
1724 * i960.h (i960_opcodes): Properly bracket initializers.
1725
1726Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1727
1728 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1729
1730Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1731
1732 * m68k.h (two): Protect second argument with parentheses.
1733
1734Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1735
1736 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1737 Deleted old in/out instructions in "#if 0" section.
1738
1739Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1740
1741 * i386.h (i386_optab): Properly bracket initializers.
1742
1743Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1744
1745 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1746 Jeff Law, law@cs.utah.edu).
1747
1748Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1749
1750 * i386.h (lcall): Accept Imm32 operand also.
1751
1752Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1753
1754 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1755 (M_DABS): Added.
1756
1757Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1758
1759 * mips.h (INSN_*): Changed values. Removed unused definitions.
1760 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1761 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1762 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1763 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1764 (M_*): Added new values for r6000 and r4000 macros.
1765 (ANY_DELAY): Removed.
1766
1767Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1768
1769 * mips.h: Added M_LI_S and M_LI_SS.
1770
1771Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1772
1773 * h8300.h: Get some rare mov.bs correct.
1774
1775Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1776
1777 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1778 been included.
1779
1780Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1781
1782 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1783 jump instructions, for use in disassemblers.
1784
1785Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1786
1787 * m88k.h: Make bitfields just unsigned, not unsigned long or
1788 unsigned short.
1789
1790Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1791
1792 * hppa.h: New argument type 'y'. Use in various float instructions.
1793
1794Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1795
1796 * hppa.h (break): First immediate field is unsigned.
1797
1798 * hppa.h: Add rfir instruction.
1799
1800Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1801
1802 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1803
1804Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1805
1806 * mips.h: Reworked the hazard information somewhat, and fixed some
1807 bugs in the instruction hazard descriptions.
1808
1809Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1810
1811 * m88k.h: Corrected a couple of opcodes.
1812
1813Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1814
1815 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1816 new version includes instruction hazard information, but is
1817 otherwise reasonably similar.
1818
1819Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1820
1821 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1822
1823Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1824
1825 Patches from Jeff Law, law@cs.utah.edu:
1826 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1827 Make the tables be the same for the following instructions:
1828 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1829 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1830 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1831 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1832 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1833 "fcmp", and "ftest".
1834
1835 * hppa.h: Make new and old tables the same for "break", "mtctl",
1836 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1837 Fix typo in last patch. Collapse several #ifdefs into a
1838 single #ifdef.
1839
1840 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1841 of the comments up-to-date.
1842
1843 * hppa.h: Update "free list" of letters and update
1844 comments describing each letter's function.
1845
1846Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1847
1848 * h8300.h: checkpoint, includes H8/300-H opcodes.
1849
1850Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1851
1852 * Patches from Jeffrey Law <law@cs.utah.edu>.
1853 * hppa.h: Rework single precision FP
1854 instructions so that they correctly disassemble code
1855 PA1.1 code.
1856
1857Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1858
1859 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1860 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1861
1862Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1863
1864 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1865 gdb will define it for now.
1866
1867Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1868
1869 * sparc.h: Don't end enumerator list with comma.
1870
1871Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1872
1873 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1874 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1875 ("bc2t"): Correct typo.
1876 ("[ls]wc[023]"): Use T rather than t.
1877 ("c[0123]"): Define general coprocessor instructions.
1878
1879Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1880
1881 * m68k.h: Move split point for gcc compilation more towards
1882 middle.
1883
1884Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1885
1886 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1887 simply wrong, ics, rfi, & rfsvc were missing).
1888 Add "a" to opr_ext for "bb". Doc fix.
1889
1890Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1891
1892 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1893 * mips.h: Add casts, to suppress warnings about shifting too much.
1894 * m68k.h: Document the placement code '9'.
1895
1896Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1897
1898 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1899 allows callers to break up the large initialized struct full of
1900 opcodes into two half-sized ones. This permits GCC to compile
1901 this module, since it takes exponential space for initializers.
1902 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1903
1904Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1905
1906 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1907 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1908 initialized structs in it.
1909
1910Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1911
1912 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1913 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1914 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1915
1916Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1917
1918 * mips.h: document "i" and "j" operands correctly.
1919
1920Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1921
1922 * mips.h: Removed endianness dependency.
1923
1924Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1925
1926 * h8300.h: include info on number of cycles per instruction.
1927
1928Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1929
1930 * hppa.h: Move handy aliases to the front. Fix masks for extract
1931 and deposit instructions.
1932
1933Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1934
1935 * i386.h: accept shld and shrd both with and without the shift
1936 count argument, which is always %cl.
1937
1938Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1939
1940 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1941 (one_byte_segment_defaults, two_byte_segment_defaults,
1942 i386_prefixtab_end): Ditto.
1943
1944Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1945
1946 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1947 for operand 2; from John Carr, jfc@dsg.dec.com.
1948
1949Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1950
1951 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1952 always use 16-bit offsets. Makes calculated-size jump tables
1953 feasible.
1954
1955Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1956
1957 * i386.h: Fix one-operand forms of in* and out* patterns.
1958
1959Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1960
1961 * m68k.h: Added CPU32 support.
1962
1963Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1964
1965 * mips.h (break): Disassemble the argument. Patch from
1966 jonathan@cs.stanford.edu (Jonathan Stone).
1967
1968Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1969
1970 * m68k.h: merged Motorola and MIT syntax.
1971
1972Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1973
1974 * m68k.h (pmove): make the tests less strict, the 68k book is
1975 wrong.
1976
1977Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1978
1979 * m68k.h (m68ec030): Defined as alias for 68030.
1980 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1981 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1982 them. Tightened description of "fmovex" to distinguish it from
1983 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1984 up descriptions that claimed versions were available for chips not
1985 supporting them. Added "pmovefd".
1986
1987Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1988
1989 * m68k.h: fix where the . goes in divull
1990
1991Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1992
1993 * m68k.h: the cas2 instruction is supposed to be written with
1994 indirection on the last two operands, which can be either data or
1995 address registers. Added a new operand type 'r' which accepts
1996 either register type. Added new cases for cas2l and cas2w which
1997 use them. Corrected masks for cas2 which failed to recognize use
1998 of address register.
1999
2000Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2001
2002 * m68k.h: Merged in patches (mostly m68040-specific) from
2003 Colin Smith <colin@wrs.com>.
2004
2005 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2006 base). Also cleaned up duplicates, re-ordered instructions for
2007 the sake of dis-assembling (so aliases come after standard names).
2008 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2009
2010Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2011
2012 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2013 all missing .s
2014
2015Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2016
2017 * sparc.h: Moved tables to BFD library.
2018
2019 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2020
2021Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2022
2023 * h8300.h: Finish filling in all the holes in the opcode table,
2024 so that the Lucid C compiler can digest this as well...
2025
2026Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2027
2028 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2029 Fix opcodes on various sizes of fild/fist instructions
2030 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2031 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2032
2033Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2034
2035 * h8300.h: Fill in all the holes in the opcode table so that the
2036 losing HPUX C compiler can digest this...
2037
2038Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2039
2040 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2041 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2042
2043Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2044
2045 * sparc.h: Add new architecture variant sparclite; add its scan
2046 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2047
2048Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2049
2050 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2051 fy@lucid.com).
2052
2053Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2054
2055 * rs6k.h: New version from IBM (Metin).
2056
2057Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2058
2059 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2060 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2061
2062Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2063
2064 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2065
2066Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2067
2068 * m68k.h (one, two): Cast macro args to unsigned to suppress
2069 complaints from compiler and lint about integer overflow during
2070 shift.
2071
2072Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2073
2074 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2075
2076Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2077
2078 * mips.h: Make bitfield layout depend on the HOST compiler,
2079 not on the TARGET system.
2080
2081Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2082
2083 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2084 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2085 <TRANLE@INTELLICORP.COM>.
2086
2087Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2088
2089 * h8300.h: turned op_type enum into #define list
2090
2091Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2092
2093 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2094 similar instructions -- they've been renamed to "fitoq", etc.
2095 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2096 number of arguments.
2097 * h8300.h: Remove extra ; which produces compiler warning.
2098
2099Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2100
2101 * sparc.h: fix opcode for tsubcctv.
2102
2103Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2104
2105 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2106
2107Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2108
2109 * sparc.h (nop): Made the 'lose' field be even tighter,
2110 so only a standard 'nop' is disassembled as a nop.
2111
2112Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2113
2114 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2115 disassembled as a nop.
2116
2117Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2118
2119 * sparc.h: fix a typo.
2120
2121Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2122
2123 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2124 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2125 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2126
2127\f
2128Local Variables:
2129version-control: never
2130End:
GDB Binutils - Deliverables
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