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2000-05-12 H.J. Lu <hjl@gnu.org>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
5c84d377
TW		 12000-05-04 Timothy Wall <twall@cygnus.com>
2
3 * tic54x.h: New.
4
966f959b
C		 52000-05-03 J.T. Conklin <jtc@redback.com>
6
7 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
8 (PPC_OPERAND_VR): New operand flag for vector registers.
9
c5d05dbb
JL		 102000-05-01 Kazu Hirata <kazu@hxi.com>
11
12 * h8300.h (EOP): Add missing initializer.
13
a7fba0e0
JL		 14Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
15
16 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
17 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
18 New operand types l,y,&,fe,fE,fx added to support above forms.
19 (pa_opcodes): Replaced usage of 'x' as source/target for
20 floating point double-word loads/stores with 'fx'.
21
800eeca4
JW		 22Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
23 David Mosberger <davidm@hpl.hp.com>
24 Timothy Wall <twall@cygnus.com>
25 Jim Wilson <wilson@cygnus.com>
26
27 * ia64.h: New file.
28
ba23e138
NC		 292000-03-27 Nick Clifton <nickc@cygnus.com>
30
31 * d30v.h (SHORT_A1): Fix value.
32 (SHORT_AR): Renumber so that it is at the end of the list of short
33 instructions, not the end of the list of long instructions.
34
d0b47220
AM		 352000-03-26 Alan Modra <alan@linuxcare.com>
36
37 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
38 problem isn't really specific to Unixware.
39 (OLDGCC_COMPAT): Define.
40 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
41 destination %st(0).
42 Fix lots of comments.
43
866afedc
NC		 442000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
45
46 * d30v.h:
47 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
48 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
49 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
50 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
51 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
52 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
53 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
54
cc5ca5ce
AM		 552000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
56
57 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
58 fistpd without suffix.
59
68e324a2
NC		 602000-02-24 Nick Clifton <nickc@cygnus.com>
61
62 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
63 'signed_overflow_ok_p'.
64 Delete prototypes for cgen_set_flags() and cgen_get_flags().
65
60f036a2
AH		 662000-02-24 Andrew Haley <aph@cygnus.com>
67
68 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
69 (CGEN_CPU_TABLE): flags: new field.
70 Add prototypes for new functions.
71
9b9b5cd4
AM		 722000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
73
74 * i386.h: Add some more UNIXWARE_COMPAT comments.
75
5b93d8bb
AM		 762000-02-23 Linas Vepstas <linas@linas.org>
77
78 * i370.h: New file.
79
87f398dd
AH		 802000-02-22 Andrew Haley <aph@cygnus.com>
81
82 * mips.h: (OPCODE_IS_MEMBER): Add comment.
83
367c01af
AH		 841999-12-30 Andrew Haley <aph@cygnus.com>
85
9a1e79ca
AH		 86 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
87 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
88 insns.
367c01af 89
add0c677
AM		 902000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
91
92 * i386.h: Qualify intel mode far call and jmp with x_Suf.
93
3138f287
AM		 941999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
95
96 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
97 indirect jumps and calls. Add FF/3 call for intel mode.
98
ccecd07b
JL		 99Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
100
101 * mn10300.h: Add new operand types. Add new instruction formats.
102
b37e19e9
JL		 103Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
104
105 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
106 instruction.
107
5fce5ddf
GRK		 1081999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
109
110 * mips.h (INSN_ISA5): New.
111
2bd7f1f3
GRK		 1121999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
113
114 * mips.h (OPCODE_IS_MEMBER): New.
115
4df2b5c5
NC		 1161999-10-29 Nick Clifton <nickc@cygnus.com>
117
118 * d30v.h (SHORT_AR): Define.
119
446a06c9
MM		 1201999-10-18 Michael Meissner <meissner@cygnus.com>
121
122 * alpha.h (alpha_num_opcodes): Convert to unsigned.
123 (alpha_num_operands): Ditto.
124
eca04c6a
JL		 125Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
126
127 * hppa.h (pa_opcodes): Add load and store cache control to
128 instructions. Add ordered access load and store.
129
130 * hppa.h (pa_opcode): Add new entries for addb and addib.
131
132 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
133
134 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
135
c43185de
DN		 136Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
137
138 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
139
ec3533da
JL		 140Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
141
390f858d
JL		 142 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
143 and "be" using completer prefixes.
144
8c47ebd9
JL		 145 * hppa.h (pa_opcodes): Add initializers to silence compiler.
146
ec3533da
JL		 147 * hppa.h: Update comments about character usage.
148
18369bea
JL		 149Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
150
151 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
152 up the new fstw & bve instructions.
153
c36efdd2
JL		 154Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
155
d3ffb032
JL		 156 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
157 instructions.
158
c49ec3da
JL		 159 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
160
5d2e7ecc
JL		 161 * hppa.h (pa_opcodes): Add long offset double word load/store
162 instructions.
163
6397d1a2
JL		 164 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
165 stores.
166
142f0fe0
JL		 167 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
168
f5a68b45
JL		 169 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
170
8235801e
JL		 171 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
172
35184366
JL		 173 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
174
f0bfde5e
JL		 175 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
176
27bbbb58
JL		 177 * hppa.h (pa_opcodes): Add support for "b,l".
178
c36efdd2
JL		 179 * hppa.h (pa_opcodes): Add support for "b,gate".
180
f2727d04
JL		 181Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
182
9392fb11
JL		 183 * hppa.h (pa_opcodes): Use 'fX' for first register operand
184 in xmpyu.
185
e0c52e99
JL		 186 * hppa.h (pa_opcodes): Fix mask for probe and probei.
187
f2727d04
JL		 188 * hppa.h (pa_opcodes): Fix mask for depwi.
189
52d836e2
JL		 190Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
191
192 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
193 an explicit output argument.
194
90765e3a
JL		 195Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
196
197 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
198 Add a few PA2.0 loads and store variants.
199
8340b17f
ILT		 2001999-09-04 Steve Chamberlain <sac@pobox.com>
201
202 * pj.h: New file.
203
5f47d35b
AM		 2041999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
205
206 * i386.h (i386_regtab): Move %st to top of table, and split off
207 other fp reg entries.
208 (i386_float_regtab): To here.
209
1c143202
JL		 210Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
211
7d8fdb64
JL		 212 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
213 by 'f'.
214
90927b9c
JL		 215 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
216 Add supporting args.
217
1d16bf9c
JL		 218 * hppa.h: Document new completers and args.
219 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
220 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
221 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
222 pmenb and pmdis.
223
96226a68
JL		 224 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
225 hshr, hsub, mixh, mixw, permh.
226
5d4ba527
JL		 227 * hppa.h (pa_opcodes): Change completers in instructions to
228 use 'c' prefix.
229
e9fc28c6
JL		 230 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
231 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
232
1c143202
JL		 233 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
234 fnegabs to use 'I' instead of 'F'.
235
9e525108
AM		 2361999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
237
238 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
239 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
240 Alphabetically sort PIII insns.
241
e8da1bf1
DE		 242Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
243
244 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
245
7d627258
JL		 246Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
247
5696871a
JL		 248 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
249 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
250
7d627258
JL		 251 * hppa.h: Document 64 bit condition completers.
252
c5e52916
JL		 253Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
254
255 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
256
eecb386c
AM		 2571999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
258
259 * i386.h (i386_optab): Add DefaultSize modifier to all insns
260 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
261 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
262
88a380f3
JL		 263Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
264 Jeff Law <law@cygnus.com>
265
266 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
267
268 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 269
270 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
271 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
272
145cf1f0
AM		 2731999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
274
275 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
276
73826640
JL		 277Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
278
279 * hppa.h (struct pa_opcode): Add new field "flags".
280 (FLAGS_STRICT): Define.
281
b65db252
JL		 282Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
283 Jeff Law <law@cygnus.com>
284
f7fc668b
JL		 285 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
286
287 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 288
10084519
AM		 2891999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
290
291 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
292 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
293 flag to fcomi and friends.
294
cd8a80ba
JL		 295Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
296
297 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
298 integer logical instructions.
299
1fca749b
ILT		 3001999-05-28 Linus Nordberg <linus.nordberg@canit.se>
301
302 * m68k.h: Document new formats `E', `G', `H' and new places `N',
303 `n', `o'.
304
305 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
306 and new places `m', `M', `h'.
307
aa008907
JL		 308Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
309
310 * hppa.h (pa_opcodes): Add several processor specific system
311 instructions.
312
e26b85f0
JL		 313Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
314
315 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
316 "addb", and "addib" to be used by the disassembler.
317
c608c12e
AM		 3181999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
319
320 * i386.h (ReverseModrm): Remove all occurences.
321 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
322 movmskps, pextrw, pmovmskb, maskmovq.
323 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
324 ignore the data size prefix.
325
326 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
327 Mostly stolen from Doug Ledford <dledford@redhat.com>
328
45c18104
RH		 329Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
330
331 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
332
252b5132
RH		 3331999-04-14 Doug Evans <devans@casey.cygnus.com>
334
335 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
336 (CGEN_ATTR_TYPE): Update.
337 (CGEN_ATTR_MASK): Number booleans starting at 0.
338 (CGEN_ATTR_VALUE): Update.
339 (CGEN_INSN_ATTR): Update.
340
341Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
342
343 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
344 instructions.
345
346Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
347
348 * hppa.h (bb, bvb): Tweak opcode/mask.
349
350
3511999-03-22 Doug Evans <devans@casey.cygnus.com>
352
353 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
354 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
355 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
356 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
357 Delete member max_insn_size.
358 (enum cgen_cpu_open_arg): New enum.
359 (cpu_open): Update prototype.
360 (cpu_open_1): Declare.
361 (cgen_set_cpu): Delete.
362
3631999-03-11 Doug Evans <devans@casey.cygnus.com>
364
365 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
366 (CGEN_OPERAND_NIL): New macro.
367 (CGEN_OPERAND): New member `type'.
368 (@arch@_cgen_operand_table): Delete decl.
369 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
370 (CGEN_OPERAND_TABLE): New struct.
371 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
372 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
373 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
374 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
375 {get,set}_{int,vma}_operand.
376 (@arch@_cgen_cpu_open): New arg `isa'.
377 (cgen_set_cpu): Ditto.
378
379Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
380
381 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
382
3831999-02-25 Doug Evans <devans@casey.cygnus.com>
384
385 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
386 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
387 enum cgen_hw_type.
388 (CGEN_HW_TABLE): New struct.
389 (hw_table): Delete declaration.
390 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
391 to table entry to enum.
392 (CGEN_OPINST): Ditto.
393 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
394
395Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
396
397 * alpha.h (AXP_OPCODE_EV6): New.
398 (AXP_OPCODE_NOPAL): Include it.
399
4001999-02-09 Doug Evans <devans@casey.cygnus.com>
401
402 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
403 All uses updated. New members int_insn_p, max_insn_size,
404 parse_operand,insert_operand,extract_operand,print_operand,
405 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
406 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
407 extract_handlers,print_handlers.
408 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
409 (CGEN_ATTR_BOOL_OFFSET): New macro.
410 (CGEN_ATTR_MASK): Subtract it to compute bit number.
411 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
412 (cgen_opcode_handler): Renamed from cgen_base.
413 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
414 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
415 all uses updated.
416 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
417 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
418 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
419 (CGEN_OPCODE,CGEN_IBASE): New types.
420 (CGEN_INSN): Rewrite.
421 (CGEN_{ASM,DIS}_HASH*): Delete.
422 (init_opcode_table,init_ibld_table): Declare.
423 (CGEN_INSN_ATTR): New type.
424
425Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
426
427 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
428 (x_FP, d_FP, dls_FP, sldx_FP): Define.
429 Change *Suf definitions to include x and d suffixes.
430 (movsx): Use w_Suf and b_Suf.
431 (movzx): Likewise.
432 (movs): Use bwld_Suf.
433 (fld): Change ordering. Use sld_FP.
434 (fild): Add Intel Syntax equivalent of fildq.
435 (fst): Use sld_FP.
436 (fist): Use sld_FP.
437 (fstp): Use sld_FP. Add x_FP version.
438 (fistp): LLongMem version for Intel Syntax.
439 (fcom, fcomp): Use sld_FP.
440 (fadd, fiadd, fsub): Use sld_FP.
441 (fsubr): Use sld_FP.
442 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
443
4441999-01-27 Doug Evans <devans@casey.cygnus.com>
445
446 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
447 CGEN_MODE_UINT.
448
449Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
450
451 * hppa.h (bv): Fix mask.
452
4531999-01-05 Doug Evans <devans@casey.cygnus.com>
454
455 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
456 (CGEN_ATTR): Use it.
457 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
458 (CGEN_ATTR_TABLE): New member dfault.
459
4601998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
461
462 * mips.h (MIPS16_INSN_BRANCH): New.
463
464Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
465
466 The following is part of a change made by Edith Epstein
467 <eepstein@sophia.cygnus.com> as part of a project to merge in
468 changes by HP; HP did not create ChangeLog entries.
469
470 * hppa.h (completer_chars): list of chars to not put a space
471 after.
472
473Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
474
475 * i386.h (i386_optab): Permit w suffix on processor control and
476 status word instructions.
477
4781998-11-30 Doug Evans <devans@casey.cygnus.com>
479
480 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
481 (struct cgen_keyword_entry): Ditto.
482 (struct cgen_operand): Ditto.
483 (CGEN_IFLD): New typedef, with associated access macros.
484 (CGEN_IFMT): New typedef, with associated access macros.
485 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
486 (CGEN_IVALUE): New typedef.
487 (struct cgen_insn): Delete const on syntax,attrs members.
488 `format' now points to format data. Type of `value' is now
489 CGEN_IVALUE.
490 (struct cgen_opcode_table): New member ifld_table.
491
4921998-11-18 Doug Evans <devans@casey.cygnus.com>
493
494 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
495 (CGEN_OPERAND_INSTANCE): New member `attrs'.
496 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
497 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
498 (cgen_opcode_table): Update type of dis_hash fn.
499 (extract_operand): Update type of `insn_value' arg.
500
501Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
502
503 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
504
505Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
506
507 * mips.h (INSN_MULT): Added.
508
509Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
510
511 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
512
513Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
514
515 * cgen.h (CGEN_INSN_INT): New typedef.
516 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
517 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
518 (CGEN_INSN_BYTES_PTR): New typedef.
519 (CGEN_EXTRACT_INFO): New typedef.
520 (cgen_insert_fn,cgen_extract_fn): Update.
521 (cgen_opcode_table): New member `insn_endian'.
522 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
523 (insert_operand,extract_operand): Update.
524 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
525
526Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
527
528 * cgen.h (CGEN_ATTR_BOOLS): New macro.
529 (struct CGEN_HW_ENTRY): New member `attrs'.
530 (CGEN_HW_ATTR): New macro.
531 (struct CGEN_OPERAND_INSTANCE): New member `name'.
532 (CGEN_INSN_INVALID_P): New macro.
533
534Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
535
536 * hppa.h: Add "fid".
537
538Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
539
540 From Robert Andrew Dale <rob@nb.net>
541 * i386.h (i386_optab): Add AMD 3DNow! instructions.
542 (AMD_3DNOW_OPCODE): Define.
543
544Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
545
546 * d30v.h (EITHER_BUT_PREFER_MU): Define.
547
548Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
549
550 * cgen.h (cgen_insn): #if 0 out element `cdx'.
551
552Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
553
554 Move all global state data into opcode table struct, and treat
555 opcode table as something that is "opened/closed".
556 * cgen.h (CGEN_OPCODE_DESC): New type.
557 (all fns): New first arg of opcode table descriptor.
558 (cgen_set_parse_operand_fn): Add prototype.
559 (cgen_current_machine,cgen_current_endian): Delete.
560 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
561 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
562 dis_hash_table,dis_hash_table_entries.
563 (opcode_open,opcode_close): Add prototypes.
564
565 * cgen.h (cgen_insn): New element `cdx'.
566
567Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
568
569 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
570
571Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
572
573 * mn10300.h: Add "no_match_operands" field for instructions.
574 (MN10300_MAX_OPERANDS): Define.
575
576Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
577
578 * cgen.h (cgen_macro_insn_count): Declare.
579
580Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
581
582 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
583 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
584 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
585 set_{int,vma}_operand.
586
587Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
588
589 * mn10300.h: Add "machine" field for instructions.
590 (MN103, AM30): Define machine types.
591
592Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
593
594 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
595
5961998-06-18 Ulrich Drepper <drepper@cygnus.com>
597
598 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
599
600Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
601
602 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
603 and ud2b.
604 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
605 those that happen to be implemented on pentiums.
606
607Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
608
609 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
610 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
611 with Size16|IgnoreSize or Size32|IgnoreSize.
612
613Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
614
615 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
616 (REPE): Rename to REPE_PREFIX_OPCODE.
617 (i386_regtab_end): Remove.
618 (i386_prefixtab, i386_prefixtab_end): Remove.
619 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
620 of md_begin.
621 (MAX_OPCODE_SIZE): Define.
622 (i386_optab_end): Remove.
623 (sl_Suf): Define.
624 (sl_FP): Use sl_Suf.
625
626 * i386.h (i386_optab): Allow 16 bit displacement for `mov
627 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
628 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
629 data32, dword, and adword prefixes.
630 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
631 regs.
632
633Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
634
635 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
636
637 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
638 register operands, because this is a common idiom. Flag them with
639 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
640 fdivrp because gcc erroneously generates them. Also flag with a
641 warning.
642
643 * i386.h: Add suffix modifiers to most insns, and tighter operand
644 checks in some cases. Fix a number of UnixWare compatibility
645 issues with float insns. Merge some floating point opcodes, using
646 new FloatMF modifier.
647 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
648 consistency.
649
650 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
651 IgnoreDataSize where appropriate.
652
653Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
654
655 * i386.h: (one_byte_segment_defaults): Remove.
656 (two_byte_segment_defaults): Remove.
657 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
658
659Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
660
661 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
662 (cgen_hw_lookup_by_num): Declare.
663
664Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
665
666 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
667 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
668
669Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
670
671 * cgen.h (cgen_asm_init_parse): Delete.
672 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
673 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
674
675Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
676
677 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
678 (cgen_asm_finish_insn): Update prototype.
679 (cgen_insn): New members num, data.
680 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
681 dis_hash, dis_hash_table_size moved to ...
682 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
683 All uses updated. New members asm_hash_p, dis_hash_p.
684 (CGEN_MINSN_EXPANSION): New struct.
685 (cgen_expand_macro_insn): Declare.
686 (cgen_macro_insn_count): Declare.
687 (get_insn_operands): Update prototype.
688 (lookup_get_insn_operands): Declare.
689
690Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
691
692 * i386.h (i386_optab): Change iclrKludge and imulKludge to
693 regKludge. Add operands types for string instructions.
694
695Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
696
697 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
698 table.
699
700Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
701
702 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
703 for `gettext'.
704
705Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
706
707 * i386.h: Remove NoModrm flag from all insns: it's never checked.
708 Add IsString flag to string instructions.
709 (IS_STRING): Don't define.
710 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
711 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
712 (SS_PREFIX_OPCODE): Define.
713
714Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
715
716 * i386.h: Revert March 24 patch; no more LinearAddress.
717
718Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
719
720 * i386.h (i386_optab): Remove fwait (9b) from all floating point
721 instructions, and instead add FWait opcode modifier. Add short
722 form of fldenv and fstenv.
723 (FWAIT_OPCODE): Define.
724
725 * i386.h (i386_optab): Change second operand constraint of `mov
726 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
727 allow legal instructions such as `movl %gs,%esi'
728
729Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
730
731 * h8300.h: Various changes to fully bracket initializers.
732
733Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
734
735 * i386.h: Set LinearAddress for lidt and lgdt.
736
737Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
738
739 * cgen.h (CGEN_BOOL_ATTR): New macro.
740
741Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
742
743 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
744
745Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
746
747 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
748 (cgen_insn): Record syntax and format entries here, rather than
749 separately.
750
751Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
752
753 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
754
755Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
756
757 * cgen.h (cgen_insert_fn): Change type of result to const char *.
758 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
759 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
760
761Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
762
763 * cgen.h (lookup_insn): New argument alias_p.
764
765Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
766
767Fix rac to accept only a0:
768 * d10v.h (OPERAND_ACC): Split into:
769 (OPERAND_ACC0, OPERAND_ACC1) .
770 (OPERAND_GPR): Define.
771
772Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
773
774 * cgen.h (CGEN_FIELDS): Define here.
775 (CGEN_HW_ENTRY): New member `type'.
776 (hw_list): Delete decl.
777 (enum cgen_mode): Declare.
778 (CGEN_OPERAND): New member `hw'.
779 (enum cgen_operand_instance_type): Declare.
780 (CGEN_OPERAND_INSTANCE): New type.
781 (CGEN_INSN): New member `operands'.
782 (CGEN_OPCODE_DATA): Make hw_list const.
783 (get_insn_operands,lookup_insn): Add prototypes for.
784
785Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
786
787 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
788 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
789 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
790 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
791
792Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
793
794 * cgen.h: Correct typo in comment end marker.
795
796Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
797
798 * tic30.h: New file.
799
800Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
801
802 * cgen.h: Add prototypes for cgen_save_fixups(),
803 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
804 of cgen_asm_finish_insn() to return a char *.
805
806Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
807
808 * cgen.h: Formatting changes to improve readability.
809
810Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
811
812 * cgen.h (*): Clean up pass over `struct foo' usage.
813 (CGEN_ATTR): Make unsigned char.
814 (CGEN_ATTR_TYPE): Update.
815 (CGEN_ATTR_{ENTRY,TABLE}): New types.
816 (cgen_base): Move member `attrs' to cgen_insn.
817 (CGEN_KEYWORD): New member `null_entry'.
818 (CGEN_{SYNTAX,FORMAT}): New types.
819 (cgen_insn): Format and syntax separated from each other.
820
821Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
822
823 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
824 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
825 flags_{used,set} long.
826 (d30v_operand): Make flags field long.
827
828Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
829
830 * m68k.h: Fix comment describing operand types.
831
832Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
833
834 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
835 everything else after down.
836
837Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
838
839 * d10v.h (OPERAND_FLAG): Split into:
840 (OPERAND_FFLAG, OPERAND_CFLAG) .
841
842Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
843
844 * mips.h (struct mips_opcode): Changed comments to reflect new
845 field usage.
846
847Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
848
849 * mips.h: Added to comments a quick-ref list of all assigned
850 operand type characters.
851 (OP_{MASK,SH}_PERFREG): New macros.
852
853Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
854
855 * sparc.h: Add '_' and '/' for v9a asr's.
856 Patch from David Miller <davem@vger.rutgers.edu>
857
858Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
859
860 * h8300.h: Bit ops with absolute addresses not in the 8 bit
861 area are not available in the base model (H8/300).
862
863Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
864
865 * m68k.h: Remove documentation of ` operand specifier.
866
867Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
868
869 * m68k.h: Document q and v operand specifiers.
870
871Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
872
873 * v850.h (struct v850_opcode): Add processors field.
874 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
875 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
876 (PROCESSOR_V850EA): New bit constants.
877
878Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
879
880 Merge changes from Martin Hunt:
881
882 * d30v.h: Allow up to 64 control registers. Add
883 SHORT_A5S format.
884
885 * d30v.h (LONG_Db): New form for delayed branches.
886
887 * d30v.h: (LONG_Db): New form for repeati.
888
889 * d30v.h (SHORT_D2B): New form.
890
891 * d30v.h (SHORT_A2): New form.
892
893 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
894 registers are used. Needed for VLIW optimization.
895
896Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
897
898 * cgen.h: Move assembler interface section
899 up so cgen_parse_operand_result is defined for cgen_parse_address.
900 (cgen_parse_address): Update prototype.
901
902Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
903
904 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
905
906Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
907
908 * i386.h (two_byte_segment_defaults): Correct base register 5 in
909 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
910 <paubert@iram.es>.
911
912 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
913 <paubert@iram.es>.
914
915 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
916 <paubert@iram.es>.
917
918 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
919 (JUMP_ON_ECX_ZERO): Remove commented out macro.
920
921Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
922
923 * v850.h (V850_NOT_R0): New flag.
924
925Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
926
927 * v850.h (struct v850_opcode): Remove flags field.
928
929Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
930
931 * v850.h (struct v850_opcode): Add flags field.
932 (struct v850_operand): Extend meaning of 'bits' and 'shift'
933 fields.
934 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
935 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
936
937Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
938
939 * arc.h: New file.
940
941Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
942
943 * sparc.h (sparc_opcodes): Declare as const.
944
945Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
946
947 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
948 uses single or double precision floating point resources.
949 (INSN_NO_ISA, INSN_ISA1): Define.
950 (cpu specific INSN macros): Tweak into bitmasks outside the range
951 of INSN_ISA field.
952
953Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
954
955 * i386.h: Fix pand opcode.
956
957Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
958
959 * mips.h: Widen INSN_ISA and move it to a more convenient
960 bit position. Add INSN_3900.
961
962Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
963
964 * mips.h (struct mips_opcode): added new field membership.
965
966Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
967
968 * i386.h (movd): only Reg32 is allowed.
969
970 * i386.h: add fcomp and ud2. From Wayne Scott
971 <wscott@ichips.intel.com>.
972
973Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
974
975 * i386.h: Add MMX instructions.
976
977Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
978
979 * i386.h: Remove W modifier from conditional move instructions.
980
981Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
982
983 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
984 with no arguments to match that generated by the UnixWare
985 assembler.
986
987Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
988
989 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
990 (cgen_parse_operand_fn): Declare.
991 (cgen_init_parse_operand): Declare.
992 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
993 new argument `want'.
994 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
995 (enum cgen_parse_operand_type): New enum.
996
997Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
998
999 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1000
1001Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1002
1003 * cgen.h: New file.
1004
1005Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1006
1007 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1008 fdivrp.
1009
1010Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1011
1012 * v850.h (extract): Make unsigned.
1013
1014Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1015
1016 * i386.h: Add iclr.
1017
1018Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1019
1020 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1021 take a direction bit.
1022
1023Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1024
1025 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1026
1027Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1028
1029 * sparc.h: Include <ansidecl.h>. Update function declarations to
1030 use prototypes, and to use const when appropriate.
1031
1032Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1033
1034 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1035
1036Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1037
1038 * d10v.h: Change pre_defined_registers to
1039 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1040
1041Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1042
1043 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1044 Change mips_opcodes from const array to a pointer,
1045 and change bfd_mips_num_opcodes from const int to int,
1046 so that we can increase the size of the mips opcodes table
1047 dynamically.
1048
1049Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1050
1051 * d30v.h (FLAG_X): Remove unused flag.
1052
1053Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1054
1055 * d30v.h: New file.
1056
1057Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1058
1059 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1060 (PDS_VALUE): Macro to access value field of predefined symbols.
1061 (tic80_next_predefined_symbol): Add prototype.
1062
1063Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1064
1065 * tic80.h (tic80_symbol_to_value): Change prototype to match
1066 change in function, added class parameter.
1067
1068Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1069
1070 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1071 endmask fields, which are somewhat weird in that 0 and 32 are
1072 treated exactly the same.
1073
1074Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1075
1076 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1077 rather than a constant that is 2**X. Reorder them to put bits for
1078 operands that have symbolic names in the upper bits, so they can
1079 be packed into an int where the lower bits contain the value that
1080 corresponds to that symbolic name.
1081 (predefined_symbo): Add struct.
1082 (tic80_predefined_symbols): Declare array of translations.
1083 (tic80_num_predefined_symbols): Declare size of that array.
1084 (tic80_value_to_symbol): Declare function.
1085 (tic80_symbol_to_value): Declare function.
1086
1087Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1088
1089 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1090
1091Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1092
1093 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1094 be the destination register.
1095
1096Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1097
1098 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1099 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1100 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1101 that the opcode can have two vector instructions in a single
1102 32 bit word and we have to encode/decode both.
1103
1104Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1105
1106 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1107 TIC80_OPERAND_RELATIVE for PC relative.
1108 (TIC80_OPERAND_BASEREL): New flag bit for register
1109 base relative.
1110
1111Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1112
1113 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1114
1115Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1116
1117 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1118 ":s" modifier for scaling.
1119
1120Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1121
1122 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1123 (TIC80_OPERAND_M_LI): Ditto
1124
1125Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1126
1127 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1128 (TIC80_OPERAND_CC): New define for condition code operand.
1129 (TIC80_OPERAND_CR): New define for control register operand.
1130
1131Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1132
1133 * tic80.h (struct tic80_opcode): Name changed.
1134 (struct tic80_opcode): Remove format field.
1135 (struct tic80_operand): Add insertion and extraction functions.
1136 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1137 correct ones.
1138 (FMT_*): Ditto.
1139
1140Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1141
1142 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1143 type IV instruction offsets.
1144
1145Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1146
1147 * tic80.h: New file.
1148
1149Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1150
1151 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1152
1153Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1154
1155 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1156 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1157 * v850.h: Fix comment, v850_operand not powerpc_operand.
1158
1159Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1160
1161 * mn10200.h: Flesh out structures and definitions needed by
1162 the mn10200 assembler & disassembler.
1163
1164Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1165
1166 * mips.h: Add mips16 definitions.
1167
1168Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1169
1170 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1171
1172Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1173
1174 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1175 (MN10300_OPERAND_MEMADDR): Define.
1176
1177Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1178
1179 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1180
1181Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1182
1183 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1184
1185Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1186
1187 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1188
1189Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1190
1191 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1192
1193Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1194
1195 * alpha.h: Don't include "bfd.h"; private relocation types are now
1196 negative to minimize problems with shared libraries. Organize
1197 instruction subsets by AMASK extensions and PALcode
1198 implementation.
1199 (struct alpha_operand): Move flags slot for better packing.
1200
1201Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1202
1203 * v850.h (V850_OPERAND_RELAX): New operand flag.
1204
1205Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1206
1207 * mn10300.h (FMT_*): Move operand format definitions
1208 here.
1209
1210Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1211
1212 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1213
1214Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1215
1216 * mn10300.h (mn10300_opcode): Add "format" field.
1217 (MN10300_OPERAND_*): Define.
1218
1219Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1220
1221 * mn10x00.h: Delete.
1222 * mn10200.h, mn10300.h: New files.
1223
1224Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1225
1226 * mn10x00.h: New file.
1227
1228Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1229
1230 * v850.h: Add new flag to indicate this instruction uses a PC
1231 displacement.
1232
1233Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1234
1235 * h8300.h (stmac): Add missing instruction.
1236
1237Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1238
1239 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1240 field.
1241
1242Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1243
1244 * v850.h (V850_OPERAND_EP): Define.
1245
1246 * v850.h (v850_opcode): Add size field.
1247
1248Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1249
1250 * v850.h (v850_operands): Add insert and extract fields, pointers
1251 to functions used to handle unusual operand encoding.
1252 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1253 V850_OPERAND_SIGNED): Defined.
1254
1255Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1256
1257 * v850.h (v850_operands): Add flags field.
1258 (OPERAND_REG, OPERAND_NUM): Defined.
1259
1260Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1261
1262 * v850.h: New file.
1263
1264Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1265
1266 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1267 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1268 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1269 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1270 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1271 Defined.
1272
1273Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1274
1275 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1276 a 3 bit space id instead of a 2 bit space id.
1277
1278Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1279
1280 * d10v.h: Add some additional defines to support the
1281 assembler in determining which operations can be done in parallel.
1282
1283Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1284
1285 * h8300.h (SN): Define.
1286 (eepmov.b): Renamed from "eepmov"
1287 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1288 with them.
1289
1290Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1291
1292 * d10v.h (OPERAND_SHIFT): New operand flag.
1293
1294Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1295
1296 * d10v.h: Changes for divs, parallel-only instructions, and
1297 signed numbers.
1298
1299Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1300
1301 * d10v.h (pd_reg): Define. Putting the definition here allows
1302 the assembler and disassembler to share the same struct.
1303
1304Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1305
1306 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1307 Williams <steve@icarus.com>.
1308
1309Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1310
1311 * d10v.h: New file.
1312
1313Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1314
1315 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1316
1317Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1318
1319 * m68k.h (mcf5200): New macro.
1320 Document names of coldfire control registers.
1321
1322Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1323
1324 * h8300.h (SRC_IN_DST): Define.
1325
1326 * h8300.h (UNOP3): Mark the register operand in this insn
1327 as a source operand, not a destination operand.
1328 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1329 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1330 register operand with SRC_IN_DST.
1331
1332Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1333
1334 * alpha.h: New file.
1335
1336Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1337
1338 * rs6k.h: Remove obsolete file.
1339
1340Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1341
1342 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1343 fdivp, and fdivrp. Add ffreep.
1344
1345Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1346
1347 * h8300.h: Reorder various #defines for readability.
1348 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1349 (BITOP): Accept additional (unused) argument. All callers changed.
1350 (EBITOP): Likewise.
1351 (O_LAST): Bump.
1352 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1353
1354 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1355 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1356 (BITOP, EBITOP): Handle new H8/S addressing modes for
1357 bit insns.
1358 (UNOP3): Handle new shift/rotate insns on the H8/S.
1359 (insns using exr): New instructions.
1360 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1361
1362Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1363
1364 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1365 was incorrect.
1366
1367Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1368
1369 * h8300.h (START): Remove.
1370 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1371 and mov.l insns that can be relaxed.
1372
1373Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1374
1375 * i386.h: Remove Abs32 from lcall.
1376
1377Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1378
1379 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1380 (SLCPOP): New macro.
1381 Mark X,Y opcode letters as in use.
1382
1383Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1384
1385 * sparc.h (F_FLOAT, F_FBR): Define.
1386
1387Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1388
1389 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1390 from all insns.
1391 (ABS8SRC,ABS8DST): Add ABS8MEM.
1392 (add.l): Fix reg+reg variant.
1393 (eepmov.w): Renamed from eepmovw.
1394 (ldc,stc): Fix many cases.
1395
1396Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1397
1398 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1399
1400Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1401
1402 * sparc.h (O): Mark operand letter as in use.
1403
1404Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1405
1406 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1407 Mark operand letters uU as in use.
1408
1409Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1410
1411 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1412 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1413 (SPARC_OPCODE_SUPPORTED): New macro.
1414 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1415 (F_NOTV9): Delete.
1416
1417Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1418
1419 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1420 declaration consistent with return type in definition.
1421
1422Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1423
1424 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1425
1426Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1427
1428 * i386.h (i386_regtab): Add 80486 test registers.
1429
1430Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1431
1432 * i960.h (I_HX): Define.
1433 (i960_opcodes): Add HX instruction.
1434
1435Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1436
1437 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1438 and fclex.
1439
1440Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1441
1442 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1443 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1444 (bfd_* defines): Delete.
1445 (sparc_opcode_archs): Replaces architecture_pname.
1446 (sparc_opcode_lookup_arch): Declare.
1447 (NUMOPCODES): Delete.
1448
1449Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1450
1451 * sparc.h (enum sparc_architecture): Add v9a.
1452 (ARCHITECTURES_CONFLICT_P): Update.
1453
1454Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1455
1456 * i386.h: Added Pentium Pro instructions.
1457
1458Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1459
1460 * m68k.h: Document new 'W' operand place.
1461
1462Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1463
1464 * hppa.h: Add lci and syncdma instructions.
1465
1466Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1467
1468 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1469 instructions.
1470
1471Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1472
1473 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1474 assembler's -mcom and -many switches.
1475
1476Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1477
1478 * i386.h: Fix cmpxchg8b extension opcode description.
1479
1480Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1481
1482 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1483 and register cr4.
1484
1485Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1486
1487 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1488
1489Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1490
1491 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1492
1493Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1494
1495 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1496
1497Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1498
1499 * m68kmri.h: Remove.
1500
1501 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1502 declarations. Remove F_ALIAS and flag field of struct
1503 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1504 int. Make name and args fields of struct m68k_opcode const.
1505
1506Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1507
1508 * sparc.h (F_NOTV9): Define.
1509
1510Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1511
1512 * mips.h (INSN_4010): Define.
1513
1514Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1515
1516 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1517
1518 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1519 * m68k.h: Fix argument descriptions of coprocessor
1520 instructions to allow only alterable operands where appropriate.
1521 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1522 (m68k_opcode_aliases): Add more aliases.
1523
1524Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1525
1526 * m68k.h: Added explcitly short-sized conditional branches, and a
1527 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1528 svr4-based configurations.
1529
1530Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1531
1532 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1533 * i386.h: added missing Data16/Data32 flags to a few instructions.
1534
1535Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1538 (OP_MASK_BCC, OP_SH_BCC): Define.
1539 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1540 (OP_MASK_CCC, OP_SH_CCC): Define.
1541 (INSN_READ_FPR_R): Define.
1542 (INSN_RFE): Delete.
1543
1544Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1545
1546 * m68k.h (enum m68k_architecture): Deleted.
1547 (struct m68k_opcode_alias): New type.
1548 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1549 matching constraints, values and flags. As a side effect of this,
1550 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1551 as I know were never used, now may need re-examining.
1552 (numopcodes): Now const.
1553 (m68k_opcode_aliases, numaliases): New variables.
1554 (endop): Deleted.
1555 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1556 m68k_opcode_aliases; update declaration of m68k_opcodes.
1557
1558Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1559
1560 * hppa.h (delay_type): Delete unused enumeration.
1561 (pa_opcode): Replace unused delayed field with an architecture
1562 field.
1563 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1564
1565Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1566
1567 * mips.h (INSN_ISA4): Define.
1568
1569Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1570
1571 * mips.h (M_DLA_AB, M_DLI): Define.
1572
1573Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1574
1575 * hppa.h (fstwx): Fix single-bit error.
1576
1577Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1578
1579 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1580
1581Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1582
1583 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1584 debug registers. From Charles Hannum (mycroft@netbsd.org).
1585
1586Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1587
1588 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1589 i386 support:
1590 * i386.h (MOV_AX_DISP32): New macro.
1591 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1592 of several call/return instructions.
1593 (ADDR_PREFIX_OPCODE): New macro.
1594
1595Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1596
1597 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1598
1599 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1600 it pointer to const char;
1601 (struct vot, field `name'): ditto.
1602
1603Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1604
1605 * vax.h: Supply and properly group all values in end sentinel.
1606
1607Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1608
1609 * mips.h (INSN_ISA, INSN_4650): Define.
1610
1611Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1612
1613 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1614 systems with a separate instruction and data cache, such as the
1615 29040, these instructions take an optional argument.
1616
1617Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1618
1619 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1620 INSN_TRAP.
1621
1622Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1623
1624 * mips.h (INSN_STORE_MEMORY): Define.
1625
1626Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1627
1628 * sparc.h: Document new operand type 'x'.
1629
1630Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1631
1632 * i960.h (I_CX2): New instruction category. It includes
1633 instructions available on Cx and Jx processors.
1634 (I_JX): New instruction category, for JX-only instructions.
1635 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1636 Jx-only instructions, in I_JX category.
1637
1638Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1639
1640 * ns32k.h (endop): Made pointer const too.
1641
1642Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1643
1644 * ns32k.h: Drop Q operand type as there is no correct use
1645 for it. Add I and Z operand types which allow better checking.
1646
1647Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1648
1649 * h8300.h (xor.l) :fix bit pattern.
1650 (L_2): New size of operand.
1651 (trapa): Use it.
1652
1653Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1654
1655 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1656
1657Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1658
1659 * sparc.h: Include v9 definitions.
1660
1661Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1662
1663 * m68k.h (m68060): Defined.
1664 (m68040up, mfloat, mmmu): Include it.
1665 (struct m68k_opcode): Widen `arch' field.
1666 (m68k_opcodes): Updated for M68060. Removed comments that were
1667 instructions commented out by "JF" years ago.
1668
1669Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1670
1671 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1672 add a one-bit `flags' field.
1673 (F_ALIAS): New macro.
1674
1675Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1676
1677 * h8300.h (dec, inc): Get encoding right.
1678
1679Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1680
1681 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1682 a flag instead.
1683 (PPC_OPERAND_SIGNED): Define.
1684 (PPC_OPERAND_SIGNOPT): Define.
1685
1686Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1687
1688 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1689 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1690
1691Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1692
1693 * i386.h: Reverse last change. It'll be handled in gas instead.
1694
1695Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1696
1697 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1698 slower on the 486 and used the implicit shift count despite the
1699 explicit operand. The one-operand form is still available to get
1700 the shorter form with the implicit shift count.
1701
1702Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1703
1704 * hppa.h: Fix typo in fstws arg string.
1705
1706Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1707
1708 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1709
1710Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1711
1712 * ppc.h (PPC_OPCODE_601): Define.
1713
1714Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1715
1716 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1717 (so we can determine valid completers for both addb and addb[tf].)
1718
1719 * hppa.h (xmpyu): No floating point format specifier for the
1720 xmpyu instruction.
1721
1722Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1723
1724 * ppc.h (PPC_OPERAND_NEXT): Define.
1725 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1726 (struct powerpc_macro): Define.
1727 (powerpc_macros, powerpc_num_macros): Declare.
1728
1729Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1730
1731 * ppc.h: New file. Header file for PowerPC opcode table.
1732
1733Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1734
1735 * hppa.h: More minor template fixes for sfu and copr (to allow
1736 for easier disassembly).
1737
1738 * hppa.h: Fix templates for all the sfu and copr instructions.
1739
1740Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1741
1742 * i386.h (push): Permit Imm16 operand too.
1743
1744Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1745
1746 * h8300.h (andc): Exists in base arch.
1747
1748Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1749
1750 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1751 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1752
1753Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1754
1755 * hppa.h: Add FP quadword store instructions.
1756
1757Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1758
1759 * mips.h: (M_J_A): Added.
1760 (M_LA): Removed.
1761
1762Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1763
1764 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1765 <mellon@pepper.ncd.com>.
1766
1767Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1768
1769 * hppa.h: Immediate field in probei instructions is unsigned,
1770 not low-sign extended.
1771
1772Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1773
1774 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1775
1776Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1777
1778 * i386.h: Add "fxch" without operand.
1779
1780Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1781
1782 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1783
1784Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1785
1786 * hppa.h: Add gfw and gfr to the opcode table.
1787
1788Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1789
1790 * m88k.h: extended to handle m88110.
1791
1792Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1793
1794 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1795 addresses.
1796
1797Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1798
1799 * i960.h (i960_opcodes): Properly bracket initializers.
1800
1801Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1802
1803 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1804
1805Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1806
1807 * m68k.h (two): Protect second argument with parentheses.
1808
1809Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1810
1811 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1812 Deleted old in/out instructions in "#if 0" section.
1813
1814Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1815
1816 * i386.h (i386_optab): Properly bracket initializers.
1817
1818Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1819
1820 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1821 Jeff Law, law@cs.utah.edu).
1822
1823Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1824
1825 * i386.h (lcall): Accept Imm32 operand also.
1826
1827Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1828
1829 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1830 (M_DABS): Added.
1831
1832Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1833
1834 * mips.h (INSN_*): Changed values. Removed unused definitions.
1835 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1836 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1837 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1838 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1839 (M_*): Added new values for r6000 and r4000 macros.
1840 (ANY_DELAY): Removed.
1841
1842Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1843
1844 * mips.h: Added M_LI_S and M_LI_SS.
1845
1846Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1847
1848 * h8300.h: Get some rare mov.bs correct.
1849
1850Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1851
1852 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1853 been included.
1854
1855Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1856
1857 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1858 jump instructions, for use in disassemblers.
1859
1860Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1861
1862 * m88k.h: Make bitfields just unsigned, not unsigned long or
1863 unsigned short.
1864
1865Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1866
1867 * hppa.h: New argument type 'y'. Use in various float instructions.
1868
1869Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1870
1871 * hppa.h (break): First immediate field is unsigned.
1872
1873 * hppa.h: Add rfir instruction.
1874
1875Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1876
1877 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1878
1879Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1880
1881 * mips.h: Reworked the hazard information somewhat, and fixed some
1882 bugs in the instruction hazard descriptions.
1883
1884Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1885
1886 * m88k.h: Corrected a couple of opcodes.
1887
1888Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1889
1890 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1891 new version includes instruction hazard information, but is
1892 otherwise reasonably similar.
1893
1894Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1895
1896 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1897
1898Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1899
1900 Patches from Jeff Law, law@cs.utah.edu:
1901 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1902 Make the tables be the same for the following instructions:
1903 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1904 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1905 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1906 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1907 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1908 "fcmp", and "ftest".
1909
1910 * hppa.h: Make new and old tables the same for "break", "mtctl",
1911 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1912 Fix typo in last patch. Collapse several #ifdefs into a
1913 single #ifdef.
1914
1915 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1916 of the comments up-to-date.
1917
1918 * hppa.h: Update "free list" of letters and update
1919 comments describing each letter's function.
1920
1921Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1922
1923 * h8300.h: checkpoint, includes H8/300-H opcodes.
1924
1925Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1926
1927 * Patches from Jeffrey Law <law@cs.utah.edu>.
1928 * hppa.h: Rework single precision FP
1929 instructions so that they correctly disassemble code
1930 PA1.1 code.
1931
1932Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1933
1934 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1935 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1936
1937Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1938
1939 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1940 gdb will define it for now.
1941
1942Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1943
1944 * sparc.h: Don't end enumerator list with comma.
1945
1946Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1947
1948 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1949 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1950 ("bc2t"): Correct typo.
1951 ("[ls]wc[023]"): Use T rather than t.
1952 ("c[0123]"): Define general coprocessor instructions.
1953
1954Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1955
1956 * m68k.h: Move split point for gcc compilation more towards
1957 middle.
1958
1959Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1960
1961 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1962 simply wrong, ics, rfi, & rfsvc were missing).
1963 Add "a" to opr_ext for "bb". Doc fix.
1964
1965Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1966
1967 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1968 * mips.h: Add casts, to suppress warnings about shifting too much.
1969 * m68k.h: Document the placement code '9'.
1970
1971Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1972
1973 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1974 allows callers to break up the large initialized struct full of
1975 opcodes into two half-sized ones. This permits GCC to compile
1976 this module, since it takes exponential space for initializers.
1977 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1978
1979Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1980
1981 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1982 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1983 initialized structs in it.
1984
1985Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1986
1987 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1988 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1989 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1990
1991Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1992
1993 * mips.h: document "i" and "j" operands correctly.
1994
1995Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1996
1997 * mips.h: Removed endianness dependency.
1998
1999Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2000
2001 * h8300.h: include info on number of cycles per instruction.
2002
2003Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2004
2005 * hppa.h: Move handy aliases to the front. Fix masks for extract
2006 and deposit instructions.
2007
2008Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2009
2010 * i386.h: accept shld and shrd both with and without the shift
2011 count argument, which is always %cl.
2012
2013Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2014
2015 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2016 (one_byte_segment_defaults, two_byte_segment_defaults,
2017 i386_prefixtab_end): Ditto.
2018
2019Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2020
2021 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2022 for operand 2; from John Carr, jfc@dsg.dec.com.
2023
2024Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2025
2026 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2027 always use 16-bit offsets. Makes calculated-size jump tables
2028 feasible.
2029
2030Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2031
2032 * i386.h: Fix one-operand forms of in* and out* patterns.
2033
2034Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2035
2036 * m68k.h: Added CPU32 support.
2037
2038Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2039
2040 * mips.h (break): Disassemble the argument. Patch from
2041 jonathan@cs.stanford.edu (Jonathan Stone).
2042
2043Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2044
2045 * m68k.h: merged Motorola and MIT syntax.
2046
2047Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2048
2049 * m68k.h (pmove): make the tests less strict, the 68k book is
2050 wrong.
2051
2052Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2053
2054 * m68k.h (m68ec030): Defined as alias for 68030.
2055 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2056 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2057 them. Tightened description of "fmovex" to distinguish it from
2058 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2059 up descriptions that claimed versions were available for chips not
2060 supporting them. Added "pmovefd".
2061
2062Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2063
2064 * m68k.h: fix where the . goes in divull
2065
2066Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2067
2068 * m68k.h: the cas2 instruction is supposed to be written with
2069 indirection on the last two operands, which can be either data or
2070 address registers. Added a new operand type 'r' which accepts
2071 either register type. Added new cases for cas2l and cas2w which
2072 use them. Corrected masks for cas2 which failed to recognize use
2073 of address register.
2074
2075Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2076
2077 * m68k.h: Merged in patches (mostly m68040-specific) from
2078 Colin Smith <colin@wrs.com>.
2079
2080 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2081 base). Also cleaned up duplicates, re-ordered instructions for
2082 the sake of dis-assembling (so aliases come after standard names).
2083 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2084
2085Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2086
2087 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2088 all missing .s
2089
2090Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2091
2092 * sparc.h: Moved tables to BFD library.
2093
2094 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2095
2096Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2097
2098 * h8300.h: Finish filling in all the holes in the opcode table,
2099 so that the Lucid C compiler can digest this as well...
2100
2101Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2102
2103 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2104 Fix opcodes on various sizes of fild/fist instructions
2105 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2106 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2107
2108Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2109
2110 * h8300.h: Fill in all the holes in the opcode table so that the
2111 losing HPUX C compiler can digest this...
2112
2113Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2114
2115 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2116 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2117
2118Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2119
2120 * sparc.h: Add new architecture variant sparclite; add its scan
2121 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2122
2123Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2124
2125 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2126 fy@lucid.com).
2127
2128Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2129
2130 * rs6k.h: New version from IBM (Metin).
2131
2132Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2133
2134 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2135 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2136
2137Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2138
2139 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2140
2141Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2142
2143 * m68k.h (one, two): Cast macro args to unsigned to suppress
2144 complaints from compiler and lint about integer overflow during
2145 shift.
2146
2147Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2148
2149 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2150
2151Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2152
2153 * mips.h: Make bitfield layout depend on the HOST compiler,
2154 not on the TARGET system.
2155
2156Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2157
2158 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2159 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2160 <TRANLE@INTELLICORP.COM>.
2161
2162Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2163
2164 * h8300.h: turned op_type enum into #define list
2165
2166Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2167
2168 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2169 similar instructions -- they've been renamed to "fitoq", etc.
2170 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2171 number of arguments.
2172 * h8300.h: Remove extra ; which produces compiler warning.
2173
2174Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2175
2176 * sparc.h: fix opcode for tsubcctv.
2177
2178Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2179
2180 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2181
2182Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2183
2184 * sparc.h (nop): Made the 'lose' field be even tighter,
2185 so only a standard 'nop' is disassembled as a nop.
2186
2187Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2188
2189 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2190 disassembled as a nop.
2191
2192Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2193
2194 * sparc.h: fix a typo.
2195
2196Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2197
2198 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2199 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2200 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2201
2202\f
2203Local Variables:
2204version-control: never
2205End:
GDB Binutils - Deliverables
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