2003-01-07 Chris Demetriou <cgd@broadcom.com>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
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12003-01-07 Chris Demetriou <cgd@broadcom.com>
2
3 * mips.h: Fix missing space in comment.
4 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
5 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
6 by four bits.
7
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82003-01-02 Chris Demetriou <cgd@broadcom.com>
9
10 * mips.h: Update copyright years to include 2002 (which had
11 been missed previously) and 2003. Make comments about "+A",
12 "+B", and "+C" operand types more descriptive.
13
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142002-12-31 Chris Demetriou <cgd@broadcom.com>
15
16 * mips.h: Note that the "+D" operand type name is now used.
17
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182002-12-30 Chris Demetriou <cgd@broadcom.com>
19
20 * mips.h: Document "+" as the start of two-character operand
21 type names, and add new "K", "+A", "+B", and "+C" operand types.
22 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
23 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
24 defines.
25
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262002-12-24 Dmitry Diky <diwil@mail.ru>
27
28 * msp430.h: New file. Defines msp430 opcodes.
29
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302002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
31
32 * h8300.h: Added some more pseudo opcodes for system call
33 processing.
34
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352002-12-19 Chris Demetriou <cgd@broadcom.com>
36
37 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
38 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
39 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
40 (OP_OP_SDC2, OP_OP_SDC3): Define.
41
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422002-12-16 Alan Modra <amodra@bigpond.net.au>
43
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44 * hppa.h (completer_chars): #if 0 out.
45
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46 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
47 "default_args".
48 (struct not_wot): Constify "args".
49 (struct not): Constify "name".
50 (numopcodes): Delete.
51 (endop): Delete.
52
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532002-12-13 Alan Modra <amodra@bigpond.net.au>
54
55 * pj.h (pj_opc_info_t): Add union.
56
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572002-12-04 David Mosberger <davidm@hpl.hp.com>
58
59 * ia64.h: Fix copyright message.
60 (IA64_OPND_AR_CSD): New operand kind.
61
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622002-12-03 Richard Henderson <rth@redhat.com>
63
64 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
65
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662002-12-03 Alan Modra <amodra@bigpond.net.au>
67
68 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
69 Constify "leaf" and "multi".
70
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712002-11-19 Klee Dienes <kdienes@apple.com>
72
73 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
74 fields.
75 (h8_opcodes). Modify initializer and initializer macros to no
76 longer initialize the removed fields.
77
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782002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
79
80 * tic4x.h (c4x_insts): Fixed LDHI constraint
81
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822002-11-18 Klee Dienes <kdienes@apple.com>
83
84 * h8300.h (h8_opcode): Remove 'length' field.
85 (h8_opcodes): Mark as 'const' (both the declaration and
86 definition). Modify initializer and initializer macros to no
87 longer initialize the length field.
88
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892002-11-18 Klee Dienes <kdienes@apple.com>
90
91 * arc.h (arc_ext_opcodes): Declare as extern.
92 (arc_ext_operands): Declare as extern.
93 * i860.h (i860_opcodes): Declare as const.
94
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952002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
96
97 * tic4x.h: File reordering. Added enhanced opcodes.
98
992002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
100
101 * tic4x.h: Major rewrite of entire file. Define instruction
102 classes, and put each instruction into a class.
103
1042002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
105
106 * tic4x.h: Added new opcodes and corrected some bugs. Add support
107 for new DSP types.
108
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1092002-10-14 Alan Modra <amodra@bigpond.net.au>
110
111 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
112
701b80cd 1132002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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114 Ken Raeburn <raeburn@cygnus.com>
115 Aldy Hernandez <aldyh@redhat.com>
116 Eric Christopher <echristo@redhat.com>
117 Richard Sandiford <rsandifo@redhat.com>
118
119 * mips.h: Update comment for new opcodes.
120 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
121 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
122 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
123 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
124 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
125 Don't match CPU_R4111 with INSN_4100.
126
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1272002-08-19 Elena Zannoni <ezannoni@redhat.com>
128
129 From matthew green <mrg@redhat.com>
130
131 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
132 instructions.
133 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
134 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
135 e500x2 Integer select, branch locking, performance monitor,
136 cache locking and machine check APUs, respectively.
137 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
138 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
139
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1402002-08-13 Stephane Carrez <stcarrez@nerim.fr>
141
142 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
143 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
144 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
145 memory banks.
146 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
147
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1482002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
149
150 * mips.h (INSN_MIPS16): New define.
151
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1522002-07-08 Alan Modra <amodra@bigpond.net.au>
153
154 * i386.h: Remove IgnoreSize from movsx and movzx.
155
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1562002-06-08 Alan Modra <amodra@bigpond.net.au>
157
158 * a29k.h: Replace CONST with const.
159 (CONST): Don't define.
160 * convex.h: Replace CONST with const.
161 (CONST): Don't define.
162 * dlx.h: Replace CONST with const.
163 * or32.h (CONST): Don't define.
164
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1652002-05-30 Chris G. Demetriou <cgd@broadcom.com>
166
167 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
168 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
169 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
170 (INSN_MDMX): New constants, for MDMX support.
171 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
172
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1732002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
174
175 * dlx.h: New file.
176
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1772002-05-25 Alan Modra <amodra@bigpond.net.au>
178
179 * ia64.h: Use #include "" instead of <> for local header files.
180 * sparc.h: Likewise.
181
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1822002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
183
184 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
185
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1862002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
187
188 * h8300.h: Corrected defs of all control regs
189 and eepmov instr.
190
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1912002-04-11 Alan Modra <amodra@bigpond.net.au>
192
193 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 194 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 195
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1962002-03-15 Chris G. Demetriou <cgd@broadcom.com>
197
198 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
199 instructions.
200 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
201 may be passed along with the ISA bitmask.
202
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2032002-03-05 Paul Koning <pkoning@equallogic.com>
204
205 * pdp11.h: Add format codes for float instruction formats.
206
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2072002-02-25 Alan Modra <amodra@bigpond.net.au>
208
209 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
210
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211Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
212
213 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
214
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215Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
216
217 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
218 (xchg): Fix.
219 (in, out): Disable 64bit operands.
220 (call, jmp): Avoid REX prefixes.
221 (jcxz): Prohibit in 64bit mode
222 (jrcxz, loop): Add 64bit variants.
223 (movq): Fix patterns.
224 (movmskps, pextrw, pinstrw): Add 64bit variants.
225
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2262002-01-31 Ivan Guzvinec <ivang@opencores.org>
227
228 * or32.h: New file.
229
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2302002-01-22 Graydon Hoare <graydon@redhat.com>
231
232 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
233 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
234
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2352002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
236
237 * h8300.h: Comment typo fix.
238
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2392002-01-03 matthew green <mrg@redhat.com>
240
241 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
242 (PPC_OPCODE_BOOKE64): Likewise.
243
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244Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
245
246 * hppa.h (call, ret): Move to end of table.
247 (addb, addib): PA2.0 variants should have been PA2.0W.
248 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
249 happy.
250 (fldw, fldd, fstw, fstd, bb): Likewise.
251 (short loads/stores): Tweak format specifier slightly to keep
252 disassembler happy.
253 (indexed loads/stores): Likewise.
254 (absolute loads/stores): Likewise.
255
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2562001-12-04 Alexandre Oliva <aoliva@redhat.com>
257
258 * d10v.h (OPERAND_NOSP): New macro.
259
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2602001-11-29 Alexandre Oliva <aoliva@redhat.com>
261
262 * d10v.h (OPERAND_SP): New macro.
263
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2642001-11-15 Alan Modra <amodra@bigpond.net.au>
265
266 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
267
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2682001-11-11 Timothy Wall <twall@alum.mit.edu>
269
270 * tic54x.h: Revise opcode layout; don't really need a separate
271 structure for parallel opcodes.
272
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2732001-11-13 Zack Weinberg <zack@codesourcery.com>
274 Alan Modra <amodra@bigpond.net.au>
275
276 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
277 accept WordReg.
278
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2792001-11-04 Chris Demetriou <cgd@broadcom.com>
280
281 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
282
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2832001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
284
285 * mmix.h: New file.
286
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2872001-10-18 Chris Demetriou <cgd@broadcom.com>
288
289 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
290 of the expression, to make source code merging easier.
291
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2922001-10-17 Chris Demetriou <cgd@broadcom.com>
293
294 * mips.h: Sort coprocessor instruction argument characters
295 in comment, add a few more words of description for "H".
296
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2972001-10-17 Chris Demetriou <cgd@broadcom.com>
298
299 * mips.h (INSN_SB1): New cpu-specific instruction bit.
300 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
301 if cpu is CPU_SB1.
302
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3032001-10-17 matthew green <mrg@redhat.com>
304
305 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
306
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3072001-10-12 matthew green <mrg@redhat.com>
308
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309 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
310 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
311 instructions, respectively.
418c1742 312
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3132001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
314
315 * v850.h: Remove spurious comment.
316
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3172001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
318
319 * h8300.h: Fix compile time warning messages
320
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3212001-09-04 Richard Henderson <rth@redhat.com>
322
323 * alpha.h (struct alpha_operand): Pack elements into bitfields.
324
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3252001-08-31 Eric Christopher <echristo@redhat.com>
326
327 * mips.h: Remove CPU_MIPS32_4K.
328
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3292001-08-27 Torbjorn Granlund <tege@swox.com>
330
331 * ppc.h (PPC_OPERAND_DS): Define.
332
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3332001-08-25 Andreas Jaeger <aj@suse.de>
334
335 * d30v.h: Fix declaration of reg_name_cnt.
336
337 * d10v.h: Fix declaration of d10v_reg_name_cnt.
338
339 * arc.h: Add prototypes from opcodes/arc-opc.c.
340
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3412001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
342
343 * mips.h (INSN_10000): Define.
344 (OPCODE_IS_MEMBER): Check for INSN_10000.
345
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3462001-08-10 Alan Modra <amodra@one.net.au>
347
348 * ppc.h: Revert 2001-08-08.
349
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3502001-08-10 Richard Sandiford <rsandifo@redhat.com>
351
352 * mips.h (INSN_GP32): Remove.
353 (OPCODE_IS_MEMBER): Remove gp32 parameter.
354 (M_MOVE): New macro identifier.
355
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3562001-08-08 Alan Modra <amodra@one.net.au>
357
358 1999-10-25 Torbjorn Granlund <tege@swox.com>
359 * ppc.h (struct powerpc_operand): New field `reloc'.
360
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3612001-08-01 Aldy Hernandez <aldyh@redhat.com>
362
363 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
364
3652001-07-12 Jeff Johnston <jjohnstn@redhat.com>
366
367 * cgen.h (CGEN_INSN): Add regex support.
368 (build_insn_regex): Declare.
369
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3702001-07-11 Frank Ch. Eigler <fche@redhat.com>
371
372 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
373 (cgen_cpu_desc): Ditto.
374
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3752001-07-07 Ben Elliston <bje@redhat.com>
376
377 * m88k.h: Clean up and reformat. Remove unused code.
378
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3792001-06-14 Geoffrey Keating <geoffk@redhat.com>
380
381 * cgen.h (cgen_keyword): Add nonalpha_chars field.
382
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3832001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
384
385 * mips.h (CPU_R12000): Define.
386
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3872001-05-23 John Healy <jhealy@redhat.com>
388
389 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 390
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3912001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
392
393 * mips.h (INSN_ISA_MASK): Define.
394
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3952001-05-12 Alan Modra <amodra@one.net.au>
396
397 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
398 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
399 and use InvMem as these insns must have register operands.
400
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4012001-05-04 Alan Modra <amodra@one.net.au>
402
403 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
404 and pextrw to swap reg/rm assignments.
405
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4062001-04-05 Hans-Peter Nilsson <hp@axis.com>
407
408 * cris.h (enum cris_insn_version_usage): Correct comment for
409 cris_ver_v3p.
410
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4112001-03-24 Alan Modra <alan@linuxcare.com.au>
412
413 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
414 Add InvMem to first operand of "maskmovdqu".
415
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4162001-03-22 Hans-Peter Nilsson <hp@axis.com>
417
418 * cris.h (ADD_PC_INCR_OPCODE): New macro.
419
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4202001-03-21 Kazu Hirata <kazu@hxi.com>
421
422 * h8300.h: Fix formatting.
423
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4242001-03-22 Alan Modra <alan@linuxcare.com.au>
425
426 * i386.h (i386_optab): Add paddq, psubq.
427
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4282001-03-19 Alan Modra <alan@linuxcare.com.au>
429
430 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
431
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4322001-02-28 Igor Shevlyakov <igor@windriver.com>
433
434 * m68k.h: new defines for Coldfire V4. Update mcf to know
435 about mcf5407.
436
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4372001-02-18 lars brinkhoff <lars@nocrew.org>
438
439 * pdp11.h: New file.
440
4412001-02-12 Jan Hubicka <jh@suse.cz>
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442
443 * i386.h (i386_optab): SSE integer converison instructions have
444 64bit versions on x86-64.
445
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4462001-02-10 Nick Clifton <nickc@redhat.com>
447
448 * mips.h: Remove extraneous whitespace. Formating change to allow
449 for future contribution.
450
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4512001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
452
453 * s390.h: New file.
454
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4552001-02-02 Patrick Macdonald <patrickm@redhat.com>
456
457 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
458 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
459 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
460
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4612001-01-24 Karsten Keil <kkeil@suse.de>
462
463 * i386.h (i386_optab): Fix swapgs
464
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4652001-01-14 Alan Modra <alan@linuxcare.com.au>
466
467 * hppa.h: Describe new '<' and '>' operand types, and tidy
468 existing comments.
469 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
470 Remove duplicate "ldw j(s,b),x". Sort some entries.
471
e135f41b 4722001-01-13 Jan Hubicka <jh@suse.cz>
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473
474 * i386.h (i386_optab): Fix pusha and ret templates.
475
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4762001-01-11 Peter Targett <peter.targett@arccores.com>
477
478 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
479 definitions for masking cpu type.
480 (arc_ext_operand_value) New structure for storing extended
481 operands.
482 (ARC_OPERAND_*) Flags for operand values.
483
4842001-01-10 Jan Hubicka <jh@suse.cz>
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485
486 * i386.h (pinsrw): Add.
487 (pshufw): Remove.
488 (cvttpd2dq): Fix operands.
489 (cvttps2dq): Likewise.
490 (movq2q): Rename to movdq2q.
491
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4922001-01-10 Richard Schaal <richard.schaal@intel.com>
493
494 * i386.h: Correct movnti instruction.
495
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4962001-01-09 Jeff Johnston <jjohnstn@redhat.com>
497
498 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
499 of operands (unsigned char or unsigned short).
500 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
501 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
502
0d2bcfaf 5032001-01-05 Jan Hubicka <jh@suse.cz>
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504
505 * i386.h (i386_optab): Make [sml]fence template to use immext field.
506
0d2bcfaf 5072001-01-03 Jan Hubicka <jh@suse.cz>
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JH
508
509 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
510 introduced by Pentium4
511
0d2bcfaf 5122000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
513
514 * i386.h (i386_optab): Add "rex*" instructions;
515 add swapgs; disable jmp/call far direct instructions for
516 64bit mode; add syscall and sysret; disable registers for 0xc6
517 template. Add 'q' suffixes to extendable instructions, disable
079966a8 518 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
519 (i386_regtab): Add extended registers.
520 (*Suf): Add No_qSuf.
521 (q_Suf, wlq_Suf, bwlq_Suf): New.
522
0d2bcfaf 5232000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
524
525 * i386.h (i386_optab): Replace "Imm" with "EncImm".
526 (i386_regtab): Add flags field.
d83c6548 527
bf40d919
NC
5282000-12-12 Nick Clifton <nickc@redhat.com>
529
530 * mips.h: Fix formatting.
531
4372b673
NC
5322000-12-01 Chris Demetriou <cgd@sibyte.com>
533
534 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
535 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
536 OP_*_SYSCALL definitions.
537 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
538 19 bit wait codes.
539 (MIPS operand specifier comments): Remove 'm', add 'U' and
540 'J', and update the meaning of 'B' so that it's more general.
541
e7af610e
NC
542 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
543 INSN_ISA5): Renumber, redefine to mean the ISA at which the
544 instruction was added.
545 (INSN_ISA32): New constant.
546 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
547 Renumber to avoid new and/or renumbered INSN_* constants.
548 (INSN_MIPS32): Delete.
549 (ISA_UNKNOWN): New constant to indicate unknown ISA.
550 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
551 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 552 constants available at that ISA level.
e7af610e
NC
553 (CPU_UNKNOWN): New constant to indicate unknown CPU.
554 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
555 define it with a unique value.
556 (OPCODE_IS_MEMBER): Update for new ISA membership-related
557 constant meanings.
558
84ea6cf2 559 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 560 definitions.
84ea6cf2 561
c6c98b38
NC
562 * mips.h (CPU_SB1): New constant.
563
19f7b010
JJ
5642000-10-20 Jakub Jelinek <jakub@redhat.com>
565
566 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
567 Note that '3' is used for siam operand.
568
139368c9
JW
5692000-09-22 Jim Wilson <wilson@cygnus.com>
570
571 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
572
156c2f8b 5732000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 574
156c2f8b
NC
575 * mips.h: Use defines instead of hard-coded processor numbers.
576 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 577 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
578 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
579 CPU_4KC, CPU_4KM, CPU_4KP): Define..
580 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 581 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 582 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
583 Add 'P' to used characters.
584 Use 'H' for coprocessor select field.
156c2f8b 585 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
586 Document new arg characters and add to used characters.
587 (INSN_MIPS32): New define for MIPS32 extensions.
588 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 589
3c5ce02e
AM
5902000-09-05 Alan Modra <alan@linuxcare.com.au>
591
592 * hppa.h: Mention cz completer.
593
50b81f19
JW
5942000-08-16 Jim Wilson <wilson@cygnus.com>
595
596 * ia64.h (IA64_OPCODE_POSTINC): New.
597
fc29466d
L
5982000-08-15 H.J. Lu <hjl@gnu.org>
599
600 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
601 IgnoreSize change.
602
4f1d9bd8
NC
6032000-08-08 Jason Eckhardt <jle@cygnus.com>
604
605 * i860.h: Small formatting adjustments.
606
45ee1401
DC
6072000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
608
609 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
610 Move related opcodes closer to each other.
611 Minor changes in comments, list undefined opcodes.
612
9d551405
DB
6132000-07-26 Dave Brolley <brolley@redhat.com>
614
615 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
616
4f1d9bd8
NC
6172000-07-22 Jason Eckhardt <jle@cygnus.com>
618
619 * i860.h (btne, bte, bla): Changed these opcodes
620 to use sbroff ('r') instead of split16 ('s').
621 (J, K, L, M): New operand types for 16-bit aligned fields.
622 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
623 use I, J, K, L, M instead of just I.
624 (T, U): New operand types for split 16-bit aligned fields.
625 (st.x): Changed these opcodes to use S, T, U instead of just S.
626 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
627 exist on the i860.
628 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
629 (pfeq.ss, pfeq.dd): New opcodes.
630 (st.s): Fixed incorrect mask bits.
631 (fmlow): Fixed incorrect mask bits.
632 (fzchkl, pfzchkl): Fixed incorrect mask bits.
633 (faddz, pfaddz): Fixed incorrect mask bits.
634 (form, pform): Fixed incorrect mask bits.
635 (pfld.l): Fixed incorrect mask bits.
636 (fst.q): Fixed incorrect mask bits.
637 (all floating point opcodes): Fixed incorrect mask bits for
638 handling of dual bit.
639
c8488617
HPN
6402000-07-20 Hans-Peter Nilsson <hp@axis.com>
641
642 cris.h: New file.
643
65aa24b6
NC
6442000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
645
646 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
647 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
648 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
649 (AVR_ISA_M83): Define for ATmega83, ATmega85.
650 (espm): Remove, because ESPM removed in databook update.
651 (eicall, eijmp): Move to the end of opcode table.
652
60bcf0fa
NC
6532000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
654
655 * m68hc11.h: New file for support of Motorola 68hc11.
656
60a2978a
DC
657Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
658
659 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
660
68ab2dd9
DC
661Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
662
663 * avr.h: New file with AVR opcodes.
664
f0662e27
DL
665Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
666
667 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
668
b722f2be
AM
6692000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
670
671 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
672
f9e0cf0b
AM
6732000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
674
675 * i386.h: Use sl_FP, not sl_Suf for fild.
676
f660ee8b
FCE
6772000-05-16 Frank Ch. Eigler <fche@redhat.com>
678
679 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
680 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
681 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
682 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
683
558b0a60
AM
6842000-05-13 Alan Modra <alan@linuxcare.com.au>,
685
686 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
687
e413e4e9
AM
6882000-05-13 Alan Modra <alan@linuxcare.com.au>,
689 Alexander Sokolov <robocop@netlink.ru>
690
691 * i386.h (i386_optab): Add cpu_flags for all instructions.
692
6932000-05-13 Alan Modra <alan@linuxcare.com.au>
694
695 From Gavin Romig-Koch <gavin@cygnus.com>
696 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
697
5c84d377
TW
6982000-05-04 Timothy Wall <twall@cygnus.com>
699
700 * tic54x.h: New.
701
966f959b
C
7022000-05-03 J.T. Conklin <jtc@redback.com>
703
704 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
705 (PPC_OPERAND_VR): New operand flag for vector registers.
706
c5d05dbb
JL
7072000-05-01 Kazu Hirata <kazu@hxi.com>
708
709 * h8300.h (EOP): Add missing initializer.
710
a7fba0e0
JL
711Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
712
713 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
714 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
715 New operand types l,y,&,fe,fE,fx added to support above forms.
716 (pa_opcodes): Replaced usage of 'x' as source/target for
717 floating point double-word loads/stores with 'fx'.
718
800eeca4
JW
719Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
720 David Mosberger <davidm@hpl.hp.com>
721 Timothy Wall <twall@cygnus.com>
722 Jim Wilson <wilson@cygnus.com>
723
724 * ia64.h: New file.
725
ba23e138
NC
7262000-03-27 Nick Clifton <nickc@cygnus.com>
727
728 * d30v.h (SHORT_A1): Fix value.
729 (SHORT_AR): Renumber so that it is at the end of the list of short
730 instructions, not the end of the list of long instructions.
731
d0b47220
AM
7322000-03-26 Alan Modra <alan@linuxcare.com>
733
734 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
735 problem isn't really specific to Unixware.
736 (OLDGCC_COMPAT): Define.
737 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
738 destination %st(0).
739 Fix lots of comments.
740
866afedc
NC
7412000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
742
743 * d30v.h:
744 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
745 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
746 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
747 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
748 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
749 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
750 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
751
cc5ca5ce
AM
7522000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
753
754 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
755 fistpd without suffix.
756
68e324a2
NC
7572000-02-24 Nick Clifton <nickc@cygnus.com>
758
759 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
760 'signed_overflow_ok_p'.
761 Delete prototypes for cgen_set_flags() and cgen_get_flags().
762
60f036a2
AH
7632000-02-24 Andrew Haley <aph@cygnus.com>
764
765 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
766 (CGEN_CPU_TABLE): flags: new field.
767 Add prototypes for new functions.
d83c6548 768
9b9b5cd4
AM
7692000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
770
771 * i386.h: Add some more UNIXWARE_COMPAT comments.
772
5b93d8bb
AM
7732000-02-23 Linas Vepstas <linas@linas.org>
774
775 * i370.h: New file.
776
4f1d9bd8
NC
7772000-02-22 Chandra Chavva <cchavva@cygnus.com>
778
779 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
780 cannot be combined in parallel with ADD/SUBppp.
781
87f398dd
AH
7822000-02-22 Andrew Haley <aph@cygnus.com>
783
784 * mips.h: (OPCODE_IS_MEMBER): Add comment.
785
367c01af
AH
7861999-12-30 Andrew Haley <aph@cygnus.com>
787
9a1e79ca
AH
788 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
789 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
790 insns.
367c01af 791
add0c677
AM
7922000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
793
794 * i386.h: Qualify intel mode far call and jmp with x_Suf.
795
3138f287
AM
7961999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
797
798 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
799 indirect jumps and calls. Add FF/3 call for intel mode.
800
ccecd07b
JL
801Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
802
803 * mn10300.h: Add new operand types. Add new instruction formats.
804
b37e19e9
JL
805Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
806
807 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
808 instruction.
809
5fce5ddf
GRK
8101999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
811
812 * mips.h (INSN_ISA5): New.
813
2bd7f1f3
GRK
8141999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
815
816 * mips.h (OPCODE_IS_MEMBER): New.
817
4df2b5c5
NC
8181999-10-29 Nick Clifton <nickc@cygnus.com>
819
820 * d30v.h (SHORT_AR): Define.
821
446a06c9
MM
8221999-10-18 Michael Meissner <meissner@cygnus.com>
823
824 * alpha.h (alpha_num_opcodes): Convert to unsigned.
825 (alpha_num_operands): Ditto.
826
eca04c6a
JL
827Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
828
829 * hppa.h (pa_opcodes): Add load and store cache control to
830 instructions. Add ordered access load and store.
831
832 * hppa.h (pa_opcode): Add new entries for addb and addib.
833
834 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
835
836 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
837
c43185de
DN
838Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
839
840 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
841
ec3533da
JL
842Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
843
390f858d
JL
844 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
845 and "be" using completer prefixes.
846
8c47ebd9
JL
847 * hppa.h (pa_opcodes): Add initializers to silence compiler.
848
ec3533da
JL
849 * hppa.h: Update comments about character usage.
850
18369bea
JL
851Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
852
853 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
854 up the new fstw & bve instructions.
855
c36efdd2
JL
856Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
857
d3ffb032
JL
858 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
859 instructions.
860
c49ec3da
JL
861 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
862
5d2e7ecc
JL
863 * hppa.h (pa_opcodes): Add long offset double word load/store
864 instructions.
865
6397d1a2
JL
866 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
867 stores.
868
142f0fe0
JL
869 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
870
f5a68b45
JL
871 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
872
8235801e
JL
873 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
874
35184366
JL
875 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
876
f0bfde5e
JL
877 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
878
27bbbb58
JL
879 * hppa.h (pa_opcodes): Add support for "b,l".
880
c36efdd2
JL
881 * hppa.h (pa_opcodes): Add support for "b,gate".
882
f2727d04
JL
883Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
884
9392fb11 885 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 886 in xmpyu.
9392fb11 887
e0c52e99
JL
888 * hppa.h (pa_opcodes): Fix mask for probe and probei.
889
f2727d04
JL
890 * hppa.h (pa_opcodes): Fix mask for depwi.
891
52d836e2
JL
892Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
893
894 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
895 an explicit output argument.
896
90765e3a
JL
897Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
898
899 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
900 Add a few PA2.0 loads and store variants.
901
8340b17f
ILT
9021999-09-04 Steve Chamberlain <sac@pobox.com>
903
904 * pj.h: New file.
905
5f47d35b
AM
9061999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
907
908 * i386.h (i386_regtab): Move %st to top of table, and split off
909 other fp reg entries.
910 (i386_float_regtab): To here.
911
1c143202
JL
912Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
913
7d8fdb64
JL
914 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
915 by 'f'.
916
90927b9c
JL
917 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
918 Add supporting args.
919
1d16bf9c
JL
920 * hppa.h: Document new completers and args.
921 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
922 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
923 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
924 pmenb and pmdis.
925
96226a68
JL
926 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
927 hshr, hsub, mixh, mixw, permh.
928
5d4ba527
JL
929 * hppa.h (pa_opcodes): Change completers in instructions to
930 use 'c' prefix.
931
e9fc28c6
JL
932 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
933 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
934
1c143202
JL
935 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
936 fnegabs to use 'I' instead of 'F'.
937
9e525108
AM
9381999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
939
940 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
941 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
942 Alphabetically sort PIII insns.
943
e8da1bf1
DE
944Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
945
946 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
947
7d627258
JL
948Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
949
5696871a
JL
950 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
951 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
952
7d627258
JL
953 * hppa.h: Document 64 bit condition completers.
954
c5e52916
JL
955Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
956
957 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
958
eecb386c
AM
9591999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
960
961 * i386.h (i386_optab): Add DefaultSize modifier to all insns
962 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
963 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
964
88a380f3
JL
965Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
966 Jeff Law <law@cygnus.com>
967
968 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
969
970 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 971
d83c6548 972 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
973 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
974
145cf1f0
AM
9751999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
976
977 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
978
73826640
JL
979Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
980
981 * hppa.h (struct pa_opcode): Add new field "flags".
982 (FLAGS_STRICT): Define.
983
b65db252
JL
984Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
985 Jeff Law <law@cygnus.com>
986
f7fc668b
JL
987 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
988
989 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 990
10084519
AM
9911999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
992
993 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
994 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
995 flag to fcomi and friends.
996
cd8a80ba
JL
997Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
998
999 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 1000 integer logical instructions.
cd8a80ba 1001
1fca749b
ILT
10021999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1003
1004 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1005 `n', `o'.
1006
1007 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1008 and new places `m', `M', `h'.
1009
aa008907
JL
1010Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1011
1012 * hppa.h (pa_opcodes): Add several processor specific system
1013 instructions.
1014
e26b85f0
JL
1015Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1016
d83c6548 1017 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
1018 "addb", and "addib" to be used by the disassembler.
1019
c608c12e
AM
10201999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1021
1022 * i386.h (ReverseModrm): Remove all occurences.
1023 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1024 movmskps, pextrw, pmovmskb, maskmovq.
1025 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1026 ignore the data size prefix.
1027
1028 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1029 Mostly stolen from Doug Ledford <dledford@redhat.com>
1030
45c18104
RH
1031Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1032
1033 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1034
252b5132
RH
10351999-04-14 Doug Evans <devans@casey.cygnus.com>
1036
1037 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1038 (CGEN_ATTR_TYPE): Update.
1039 (CGEN_ATTR_MASK): Number booleans starting at 0.
1040 (CGEN_ATTR_VALUE): Update.
1041 (CGEN_INSN_ATTR): Update.
1042
1043Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1044
1045 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1046 instructions.
1047
1048Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1049
1050 * hppa.h (bb, bvb): Tweak opcode/mask.
1051
1052
10531999-03-22 Doug Evans <devans@casey.cygnus.com>
1054
1055 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1056 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1057 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1058 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1059 Delete member max_insn_size.
1060 (enum cgen_cpu_open_arg): New enum.
1061 (cpu_open): Update prototype.
1062 (cpu_open_1): Declare.
1063 (cgen_set_cpu): Delete.
1064
10651999-03-11 Doug Evans <devans@casey.cygnus.com>
1066
1067 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1068 (CGEN_OPERAND_NIL): New macro.
1069 (CGEN_OPERAND): New member `type'.
1070 (@arch@_cgen_operand_table): Delete decl.
1071 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1072 (CGEN_OPERAND_TABLE): New struct.
1073 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1074 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1075 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1076 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1077 {get,set}_{int,vma}_operand.
1078 (@arch@_cgen_cpu_open): New arg `isa'.
1079 (cgen_set_cpu): Ditto.
1080
1081Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1082
1083 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1084
10851999-02-25 Doug Evans <devans@casey.cygnus.com>
1086
1087 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1088 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1089 enum cgen_hw_type.
1090 (CGEN_HW_TABLE): New struct.
1091 (hw_table): Delete declaration.
1092 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1093 to table entry to enum.
1094 (CGEN_OPINST): Ditto.
1095 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1096
1097Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1098
1099 * alpha.h (AXP_OPCODE_EV6): New.
1100 (AXP_OPCODE_NOPAL): Include it.
1101
11021999-02-09 Doug Evans <devans@casey.cygnus.com>
1103
1104 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1105 All uses updated. New members int_insn_p, max_insn_size,
1106 parse_operand,insert_operand,extract_operand,print_operand,
1107 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1108 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1109 extract_handlers,print_handlers.
1110 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1111 (CGEN_ATTR_BOOL_OFFSET): New macro.
1112 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1113 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1114 (cgen_opcode_handler): Renamed from cgen_base.
1115 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1116 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1117 all uses updated.
1118 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1119 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1120 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1121 (CGEN_OPCODE,CGEN_IBASE): New types.
1122 (CGEN_INSN): Rewrite.
1123 (CGEN_{ASM,DIS}_HASH*): Delete.
1124 (init_opcode_table,init_ibld_table): Declare.
1125 (CGEN_INSN_ATTR): New type.
1126
1127Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1128
252b5132
RH
1129 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1130 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1131 Change *Suf definitions to include x and d suffixes.
1132 (movsx): Use w_Suf and b_Suf.
1133 (movzx): Likewise.
1134 (movs): Use bwld_Suf.
1135 (fld): Change ordering. Use sld_FP.
1136 (fild): Add Intel Syntax equivalent of fildq.
1137 (fst): Use sld_FP.
1138 (fist): Use sld_FP.
1139 (fstp): Use sld_FP. Add x_FP version.
1140 (fistp): LLongMem version for Intel Syntax.
1141 (fcom, fcomp): Use sld_FP.
1142 (fadd, fiadd, fsub): Use sld_FP.
1143 (fsubr): Use sld_FP.
1144 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1145
11461999-01-27 Doug Evans <devans@casey.cygnus.com>
1147
1148 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1149 CGEN_MODE_UINT.
1150
e135f41b 11511999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1152
1153 * hppa.h (bv): Fix mask.
1154
11551999-01-05 Doug Evans <devans@casey.cygnus.com>
1156
1157 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1158 (CGEN_ATTR): Use it.
1159 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1160 (CGEN_ATTR_TABLE): New member dfault.
1161
11621998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1163
1164 * mips.h (MIPS16_INSN_BRANCH): New.
1165
1166Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1167
1168 The following is part of a change made by Edith Epstein
d83c6548
AJ
1169 <eepstein@sophia.cygnus.com> as part of a project to merge in
1170 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1171
1172 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1173 after.
252b5132
RH
1174
1175Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1176
1177 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1178 status word instructions.
252b5132
RH
1179
11801998-11-30 Doug Evans <devans@casey.cygnus.com>
1181
1182 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1183 (struct cgen_keyword_entry): Ditto.
1184 (struct cgen_operand): Ditto.
1185 (CGEN_IFLD): New typedef, with associated access macros.
1186 (CGEN_IFMT): New typedef, with associated access macros.
1187 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1188 (CGEN_IVALUE): New typedef.
1189 (struct cgen_insn): Delete const on syntax,attrs members.
1190 `format' now points to format data. Type of `value' is now
1191 CGEN_IVALUE.
1192 (struct cgen_opcode_table): New member ifld_table.
1193
11941998-11-18 Doug Evans <devans@casey.cygnus.com>
1195
1196 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1197 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1198 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1199 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1200 (cgen_opcode_table): Update type of dis_hash fn.
1201 (extract_operand): Update type of `insn_value' arg.
1202
1203Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1204
1205 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1206
1207Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1208
1209 * mips.h (INSN_MULT): Added.
1210
1211Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1212
1213 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1214
1215Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1216
1217 * cgen.h (CGEN_INSN_INT): New typedef.
1218 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1219 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1220 (CGEN_INSN_BYTES_PTR): New typedef.
1221 (CGEN_EXTRACT_INFO): New typedef.
1222 (cgen_insert_fn,cgen_extract_fn): Update.
1223 (cgen_opcode_table): New member `insn_endian'.
1224 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1225 (insert_operand,extract_operand): Update.
1226 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1227
1228Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1229
1230 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1231 (struct CGEN_HW_ENTRY): New member `attrs'.
1232 (CGEN_HW_ATTR): New macro.
1233 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1234 (CGEN_INSN_INVALID_P): New macro.
1235
1236Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1237
1238 * hppa.h: Add "fid".
d83c6548 1239
252b5132
RH
1240Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1241
1242 From Robert Andrew Dale <rob@nb.net>
1243 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1244 (AMD_3DNOW_OPCODE): Define.
1245
1246Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1247
1248 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1249
1250Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1251
1252 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1253
1254Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1255
1256 Move all global state data into opcode table struct, and treat
1257 opcode table as something that is "opened/closed".
1258 * cgen.h (CGEN_OPCODE_DESC): New type.
1259 (all fns): New first arg of opcode table descriptor.
1260 (cgen_set_parse_operand_fn): Add prototype.
1261 (cgen_current_machine,cgen_current_endian): Delete.
1262 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1263 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1264 dis_hash_table,dis_hash_table_entries.
1265 (opcode_open,opcode_close): Add prototypes.
1266
1267 * cgen.h (cgen_insn): New element `cdx'.
1268
1269Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1270
1271 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1272
1273Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1274
1275 * mn10300.h: Add "no_match_operands" field for instructions.
1276 (MN10300_MAX_OPERANDS): Define.
1277
1278Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1279
1280 * cgen.h (cgen_macro_insn_count): Declare.
1281
1282Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1283
1284 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1285 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1286 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1287 set_{int,vma}_operand.
1288
1289Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1290
1291 * mn10300.h: Add "machine" field for instructions.
1292 (MN103, AM30): Define machine types.
d83c6548 1293
252b5132
RH
1294Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1295
1296 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1297
12981998-06-18 Ulrich Drepper <drepper@cygnus.com>
1299
1300 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1301
1302Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1303
1304 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1305 and ud2b.
1306 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1307 those that happen to be implemented on pentiums.
1308
1309Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1310
1311 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1312 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1313 with Size16|IgnoreSize or Size32|IgnoreSize.
1314
1315Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1316
1317 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1318 (REPE): Rename to REPE_PREFIX_OPCODE.
1319 (i386_regtab_end): Remove.
1320 (i386_prefixtab, i386_prefixtab_end): Remove.
1321 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1322 of md_begin.
1323 (MAX_OPCODE_SIZE): Define.
1324 (i386_optab_end): Remove.
1325 (sl_Suf): Define.
1326 (sl_FP): Use sl_Suf.
1327
1328 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1329 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1330 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1331 data32, dword, and adword prefixes.
1332 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1333 regs.
1334
1335Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1336
1337 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1338
1339 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1340 register operands, because this is a common idiom. Flag them with
1341 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1342 fdivrp because gcc erroneously generates them. Also flag with a
1343 warning.
1344
1345 * i386.h: Add suffix modifiers to most insns, and tighter operand
1346 checks in some cases. Fix a number of UnixWare compatibility
1347 issues with float insns. Merge some floating point opcodes, using
1348 new FloatMF modifier.
1349 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1350 consistency.
1351
1352 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1353 IgnoreDataSize where appropriate.
1354
1355Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1356
1357 * i386.h: (one_byte_segment_defaults): Remove.
1358 (two_byte_segment_defaults): Remove.
1359 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1360
1361Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1362
1363 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1364 (cgen_hw_lookup_by_num): Declare.
1365
1366Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1367
1368 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1369 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1370
1371Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1372
1373 * cgen.h (cgen_asm_init_parse): Delete.
1374 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1375 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1376
1377Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1378
1379 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1380 (cgen_asm_finish_insn): Update prototype.
1381 (cgen_insn): New members num, data.
1382 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1383 dis_hash, dis_hash_table_size moved to ...
1384 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1385 All uses updated. New members asm_hash_p, dis_hash_p.
1386 (CGEN_MINSN_EXPANSION): New struct.
1387 (cgen_expand_macro_insn): Declare.
1388 (cgen_macro_insn_count): Declare.
1389 (get_insn_operands): Update prototype.
1390 (lookup_get_insn_operands): Declare.
1391
1392Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1393
1394 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1395 regKludge. Add operands types for string instructions.
1396
1397Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1398
1399 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1400 table.
1401
1402Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1403
1404 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1405 for `gettext'.
1406
1407Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1408
1409 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1410 Add IsString flag to string instructions.
1411 (IS_STRING): Don't define.
1412 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1413 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1414 (SS_PREFIX_OPCODE): Define.
1415
1416Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1417
1418 * i386.h: Revert March 24 patch; no more LinearAddress.
1419
1420Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1421
1422 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1423 instructions, and instead add FWait opcode modifier. Add short
1424 form of fldenv and fstenv.
1425 (FWAIT_OPCODE): Define.
1426
1427 * i386.h (i386_optab): Change second operand constraint of `mov
1428 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1429 allow legal instructions such as `movl %gs,%esi'
1430
1431Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1432
1433 * h8300.h: Various changes to fully bracket initializers.
1434
1435Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1436
1437 * i386.h: Set LinearAddress for lidt and lgdt.
1438
1439Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1440
1441 * cgen.h (CGEN_BOOL_ATTR): New macro.
1442
1443Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1444
1445 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1446
1447Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1448
1449 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1450 (cgen_insn): Record syntax and format entries here, rather than
1451 separately.
1452
1453Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1454
1455 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1456
1457Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1458
1459 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1460 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1461 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1462
1463Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1464
1465 * cgen.h (lookup_insn): New argument alias_p.
1466
1467Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1468
1469Fix rac to accept only a0:
1470 * d10v.h (OPERAND_ACC): Split into:
1471 (OPERAND_ACC0, OPERAND_ACC1) .
1472 (OPERAND_GPR): Define.
1473
1474Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1475
1476 * cgen.h (CGEN_FIELDS): Define here.
1477 (CGEN_HW_ENTRY): New member `type'.
1478 (hw_list): Delete decl.
1479 (enum cgen_mode): Declare.
1480 (CGEN_OPERAND): New member `hw'.
1481 (enum cgen_operand_instance_type): Declare.
1482 (CGEN_OPERAND_INSTANCE): New type.
1483 (CGEN_INSN): New member `operands'.
1484 (CGEN_OPCODE_DATA): Make hw_list const.
1485 (get_insn_operands,lookup_insn): Add prototypes for.
1486
1487Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1488
1489 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1490 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1491 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1492 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1493
1494Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1495
1496 * cgen.h: Correct typo in comment end marker.
1497
1498Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1499
1500 * tic30.h: New file.
1501
5a109b67 1502Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1503
1504 * cgen.h: Add prototypes for cgen_save_fixups(),
1505 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1506 of cgen_asm_finish_insn() to return a char *.
1507
1508Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1509
1510 * cgen.h: Formatting changes to improve readability.
1511
1512Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1513
1514 * cgen.h (*): Clean up pass over `struct foo' usage.
1515 (CGEN_ATTR): Make unsigned char.
1516 (CGEN_ATTR_TYPE): Update.
1517 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1518 (cgen_base): Move member `attrs' to cgen_insn.
1519 (CGEN_KEYWORD): New member `null_entry'.
1520 (CGEN_{SYNTAX,FORMAT}): New types.
1521 (cgen_insn): Format and syntax separated from each other.
1522
1523Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1524
1525 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1526 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1527 flags_{used,set} long.
1528 (d30v_operand): Make flags field long.
1529
1530Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1531
1532 * m68k.h: Fix comment describing operand types.
1533
1534Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1535
1536 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1537 everything else after down.
1538
1539Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1540
1541 * d10v.h (OPERAND_FLAG): Split into:
1542 (OPERAND_FFLAG, OPERAND_CFLAG) .
1543
1544Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1545
1546 * mips.h (struct mips_opcode): Changed comments to reflect new
1547 field usage.
1548
1549Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1550
1551 * mips.h: Added to comments a quick-ref list of all assigned
1552 operand type characters.
1553 (OP_{MASK,SH}_PERFREG): New macros.
1554
1555Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1556
1557 * sparc.h: Add '_' and '/' for v9a asr's.
1558 Patch from David Miller <davem@vger.rutgers.edu>
1559
1560Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1561
1562 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1563 area are not available in the base model (H8/300).
1564
1565Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1566
1567 * m68k.h: Remove documentation of ` operand specifier.
1568
1569Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1570
1571 * m68k.h: Document q and v operand specifiers.
1572
1573Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1574
1575 * v850.h (struct v850_opcode): Add processors field.
1576 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1577 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1578 (PROCESSOR_V850EA): New bit constants.
1579
1580Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1581
1582 Merge changes from Martin Hunt:
1583
1584 * d30v.h: Allow up to 64 control registers. Add
1585 SHORT_A5S format.
1586
1587 * d30v.h (LONG_Db): New form for delayed branches.
1588
1589 * d30v.h: (LONG_Db): New form for repeati.
1590
1591 * d30v.h (SHORT_D2B): New form.
1592
1593 * d30v.h (SHORT_A2): New form.
1594
1595 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1596 registers are used. Needed for VLIW optimization.
1597
1598Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1599
1600 * cgen.h: Move assembler interface section
1601 up so cgen_parse_operand_result is defined for cgen_parse_address.
1602 (cgen_parse_address): Update prototype.
1603
1604Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1605
1606 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1607
1608Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1609
1610 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1611 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1612 <paubert@iram.es>.
1613
1614 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1615 <paubert@iram.es>.
1616
1617 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1618 <paubert@iram.es>.
1619
1620 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1621 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1622
1623Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1624
1625 * v850.h (V850_NOT_R0): New flag.
1626
1627Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1628
1629 * v850.h (struct v850_opcode): Remove flags field.
1630
1631Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1632
1633 * v850.h (struct v850_opcode): Add flags field.
1634 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1635 fields.
1636 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1637 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1638
1639Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1640
1641 * arc.h: New file.
1642
1643Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1644
1645 * sparc.h (sparc_opcodes): Declare as const.
1646
1647Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1648
1649 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1650 uses single or double precision floating point resources.
1651 (INSN_NO_ISA, INSN_ISA1): Define.
1652 (cpu specific INSN macros): Tweak into bitmasks outside the range
1653 of INSN_ISA field.
1654
1655Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1656
1657 * i386.h: Fix pand opcode.
1658
1659Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1660
1661 * mips.h: Widen INSN_ISA and move it to a more convenient
1662 bit position. Add INSN_3900.
1663
1664Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1665
1666 * mips.h (struct mips_opcode): added new field membership.
1667
1668Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1669
1670 * i386.h (movd): only Reg32 is allowed.
1671
1672 * i386.h: add fcomp and ud2. From Wayne Scott
1673 <wscott@ichips.intel.com>.
1674
1675Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1676
1677 * i386.h: Add MMX instructions.
1678
1679Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1680
1681 * i386.h: Remove W modifier from conditional move instructions.
1682
1683Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1684
1685 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1686 with no arguments to match that generated by the UnixWare
1687 assembler.
1688
1689Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1690
1691 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1692 (cgen_parse_operand_fn): Declare.
1693 (cgen_init_parse_operand): Declare.
1694 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1695 new argument `want'.
1696 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1697 (enum cgen_parse_operand_type): New enum.
1698
1699Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1700
1701 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1702
1703Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1704
1705 * cgen.h: New file.
1706
1707Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1708
1709 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1710 fdivrp.
1711
1712Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1713
1714 * v850.h (extract): Make unsigned.
1715
1716Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1717
1718 * i386.h: Add iclr.
1719
1720Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1721
1722 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1723 take a direction bit.
1724
1725Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1726
1727 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1728
1729Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1730
1731 * sparc.h: Include <ansidecl.h>. Update function declarations to
1732 use prototypes, and to use const when appropriate.
1733
1734Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1735
1736 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1737
1738Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1739
1740 * d10v.h: Change pre_defined_registers to
1741 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1742
1743Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1744
1745 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1746 Change mips_opcodes from const array to a pointer,
1747 and change bfd_mips_num_opcodes from const int to int,
1748 so that we can increase the size of the mips opcodes table
1749 dynamically.
1750
1751Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1752
1753 * d30v.h (FLAG_X): Remove unused flag.
1754
1755Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1756
1757 * d30v.h: New file.
1758
1759Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1760
1761 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1762 (PDS_VALUE): Macro to access value field of predefined symbols.
1763 (tic80_next_predefined_symbol): Add prototype.
1764
1765Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1766
1767 * tic80.h (tic80_symbol_to_value): Change prototype to match
1768 change in function, added class parameter.
1769
1770Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1771
1772 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1773 endmask fields, which are somewhat weird in that 0 and 32 are
1774 treated exactly the same.
1775
1776Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1777
1778 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1779 rather than a constant that is 2**X. Reorder them to put bits for
1780 operands that have symbolic names in the upper bits, so they can
1781 be packed into an int where the lower bits contain the value that
1782 corresponds to that symbolic name.
1783 (predefined_symbo): Add struct.
1784 (tic80_predefined_symbols): Declare array of translations.
1785 (tic80_num_predefined_symbols): Declare size of that array.
1786 (tic80_value_to_symbol): Declare function.
1787 (tic80_symbol_to_value): Declare function.
1788
1789Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1790
1791 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1792
1793Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1794
1795 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1796 be the destination register.
1797
1798Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1799
1800 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1801 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1802 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1803 that the opcode can have two vector instructions in a single
1804 32 bit word and we have to encode/decode both.
1805
1806Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1807
1808 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1809 TIC80_OPERAND_RELATIVE for PC relative.
1810 (TIC80_OPERAND_BASEREL): New flag bit for register
1811 base relative.
1812
1813Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1814
1815 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1816
1817Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1818
1819 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1820 ":s" modifier for scaling.
1821
1822Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1823
1824 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1825 (TIC80_OPERAND_M_LI): Ditto
1826
1827Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1828
1829 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1830 (TIC80_OPERAND_CC): New define for condition code operand.
1831 (TIC80_OPERAND_CR): New define for control register operand.
1832
1833Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1834
1835 * tic80.h (struct tic80_opcode): Name changed.
1836 (struct tic80_opcode): Remove format field.
1837 (struct tic80_operand): Add insertion and extraction functions.
1838 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1839 correct ones.
1840 (FMT_*): Ditto.
1841
1842Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1843
1844 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1845 type IV instruction offsets.
1846
1847Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1848
1849 * tic80.h: New file.
1850
1851Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1852
1853 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1854
1855Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1856
1857 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1858 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1859 * v850.h: Fix comment, v850_operand not powerpc_operand.
1860
1861Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1862
1863 * mn10200.h: Flesh out structures and definitions needed by
1864 the mn10200 assembler & disassembler.
1865
1866Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1867
1868 * mips.h: Add mips16 definitions.
1869
1870Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1871
1872 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1873
1874Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1875
1876 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1877 (MN10300_OPERAND_MEMADDR): Define.
1878
1879Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1880
1881 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1882
1883Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1884
1885 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1886
1887Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1888
1889 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1890
1891Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1892
1893 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1894
1895Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1896
1897 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1898 negative to minimize problems with shared libraries. Organize
1899 instruction subsets by AMASK extensions and PALcode
1900 implementation.
252b5132
RH
1901 (struct alpha_operand): Move flags slot for better packing.
1902
1903Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1904
1905 * v850.h (V850_OPERAND_RELAX): New operand flag.
1906
1907Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1908
1909 * mn10300.h (FMT_*): Move operand format definitions
1910 here.
1911
1912Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1913
1914 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1915
1916Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1917
1918 * mn10300.h (mn10300_opcode): Add "format" field.
1919 (MN10300_OPERAND_*): Define.
1920
1921Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1922
1923 * mn10x00.h: Delete.
1924 * mn10200.h, mn10300.h: New files.
1925
1926Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1927
1928 * mn10x00.h: New file.
1929
1930Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1931
1932 * v850.h: Add new flag to indicate this instruction uses a PC
1933 displacement.
1934
1935Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1936
1937 * h8300.h (stmac): Add missing instruction.
1938
1939Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1940
1941 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1942 field.
1943
1944Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1945
1946 * v850.h (V850_OPERAND_EP): Define.
1947
1948 * v850.h (v850_opcode): Add size field.
1949
1950Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1951
1952 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1953 to functions used to handle unusual operand encoding.
252b5132 1954 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1955 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1956
1957Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1958
1959 * v850.h (v850_operands): Add flags field.
1960 (OPERAND_REG, OPERAND_NUM): Defined.
1961
1962Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1963
1964 * v850.h: New file.
1965
1966Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1967
1968 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1969 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1970 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1971 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1972 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1973 Defined.
252b5132
RH
1974
1975Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1976
1977 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1978 a 3 bit space id instead of a 2 bit space id.
1979
1980Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1981
1982 * d10v.h: Add some additional defines to support the
d83c6548 1983 assembler in determining which operations can be done in parallel.
252b5132
RH
1984
1985Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1986
1987 * h8300.h (SN): Define.
1988 (eepmov.b): Renamed from "eepmov"
1989 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1990 with them.
1991
1992Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1993
1994 * d10v.h (OPERAND_SHIFT): New operand flag.
1995
1996Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1997
1998 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1999 signed numbers.
252b5132
RH
2000
2001Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2002
2003 * d10v.h (pd_reg): Define. Putting the definition here allows
2004 the assembler and disassembler to share the same struct.
2005
2006Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2007
2008 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2009 Williams <steve@icarus.com>.
2010
2011Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2012
2013 * d10v.h: New file.
2014
2015Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2016
2017 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2018
2019Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2020
d83c6548 2021 * m68k.h (mcf5200): New macro.
252b5132
RH
2022 Document names of coldfire control registers.
2023
2024Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2025
2026 * h8300.h (SRC_IN_DST): Define.
2027
2028 * h8300.h (UNOP3): Mark the register operand in this insn
2029 as a source operand, not a destination operand.
2030 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2031 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2032 register operand with SRC_IN_DST.
2033
2034Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2035
2036 * alpha.h: New file.
2037
2038Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2039
2040 * rs6k.h: Remove obsolete file.
2041
2042Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2043
2044 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2045 fdivp, and fdivrp. Add ffreep.
2046
2047Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2048
2049 * h8300.h: Reorder various #defines for readability.
2050 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2051 (BITOP): Accept additional (unused) argument. All callers changed.
2052 (EBITOP): Likewise.
2053 (O_LAST): Bump.
2054 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2055
2056 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2057 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2058 (BITOP, EBITOP): Handle new H8/S addressing modes for
2059 bit insns.
2060 (UNOP3): Handle new shift/rotate insns on the H8/S.
2061 (insns using exr): New instructions.
2062 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2063
2064Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2065
2066 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2067 was incorrect.
2068
2069Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2070
2071 * h8300.h (START): Remove.
2072 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2073 and mov.l insns that can be relaxed.
2074
2075Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2076
2077 * i386.h: Remove Abs32 from lcall.
2078
2079Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2080
2081 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2082 (SLCPOP): New macro.
2083 Mark X,Y opcode letters as in use.
2084
2085Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2086
2087 * sparc.h (F_FLOAT, F_FBR): Define.
2088
2089Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2090
2091 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2092 from all insns.
2093 (ABS8SRC,ABS8DST): Add ABS8MEM.
2094 (add.l): Fix reg+reg variant.
2095 (eepmov.w): Renamed from eepmovw.
2096 (ldc,stc): Fix many cases.
2097
2098Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2099
2100 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2101
2102Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2103
2104 * sparc.h (O): Mark operand letter as in use.
2105
2106Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2107
2108 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2109 Mark operand letters uU as in use.
2110
2111Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2112
2113 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2114 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2115 (SPARC_OPCODE_SUPPORTED): New macro.
2116 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2117 (F_NOTV9): Delete.
2118
2119Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2120
2121 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2122 declaration consistent with return type in definition.
2123
2124Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2125
2126 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2127
2128Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2129
2130 * i386.h (i386_regtab): Add 80486 test registers.
2131
2132Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2133
2134 * i960.h (I_HX): Define.
2135 (i960_opcodes): Add HX instruction.
2136
2137Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2138
2139 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2140 and fclex.
2141
2142Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2143
2144 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2145 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2146 (bfd_* defines): Delete.
2147 (sparc_opcode_archs): Replaces architecture_pname.
2148 (sparc_opcode_lookup_arch): Declare.
2149 (NUMOPCODES): Delete.
2150
2151Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2152
2153 * sparc.h (enum sparc_architecture): Add v9a.
2154 (ARCHITECTURES_CONFLICT_P): Update.
2155
2156Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2157
2158 * i386.h: Added Pentium Pro instructions.
2159
2160Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2161
2162 * m68k.h: Document new 'W' operand place.
2163
2164Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2165
2166 * hppa.h: Add lci and syncdma instructions.
2167
2168Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2169
2170 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2171 instructions.
252b5132
RH
2172
2173Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2174
2175 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2176 assembler's -mcom and -many switches.
2177
2178Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2179
2180 * i386.h: Fix cmpxchg8b extension opcode description.
2181
2182Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2183
2184 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2185 and register cr4.
2186
2187Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2188
2189 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2190
2191Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2192
2193 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2194
2195Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2196
2197 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2198
2199Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2200
2201 * m68kmri.h: Remove.
2202
2203 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2204 declarations. Remove F_ALIAS and flag field of struct
2205 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2206 int. Make name and args fields of struct m68k_opcode const.
2207
2208Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2209
2210 * sparc.h (F_NOTV9): Define.
2211
2212Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2213
2214 * mips.h (INSN_4010): Define.
2215
2216Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2217
2218 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2219
2220 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2221 * m68k.h: Fix argument descriptions of coprocessor
2222 instructions to allow only alterable operands where appropriate.
2223 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2224 (m68k_opcode_aliases): Add more aliases.
2225
2226Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2227
2228 * m68k.h: Added explcitly short-sized conditional branches, and a
2229 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2230 svr4-based configurations.
2231
2232Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2233
2234 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2235 * i386.h: added missing Data16/Data32 flags to a few instructions.
2236
2237Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2238
2239 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2240 (OP_MASK_BCC, OP_SH_BCC): Define.
2241 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2242 (OP_MASK_CCC, OP_SH_CCC): Define.
2243 (INSN_READ_FPR_R): Define.
2244 (INSN_RFE): Delete.
2245
2246Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2247
2248 * m68k.h (enum m68k_architecture): Deleted.
2249 (struct m68k_opcode_alias): New type.
2250 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2251 matching constraints, values and flags. As a side effect of this,
2252 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2253 as I know were never used, now may need re-examining.
2254 (numopcodes): Now const.
2255 (m68k_opcode_aliases, numaliases): New variables.
2256 (endop): Deleted.
2257 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2258 m68k_opcode_aliases; update declaration of m68k_opcodes.
2259
2260Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2261
2262 * hppa.h (delay_type): Delete unused enumeration.
2263 (pa_opcode): Replace unused delayed field with an architecture
2264 field.
2265 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2266
2267Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2268
2269 * mips.h (INSN_ISA4): Define.
2270
2271Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2272
2273 * mips.h (M_DLA_AB, M_DLI): Define.
2274
2275Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2276
2277 * hppa.h (fstwx): Fix single-bit error.
2278
2279Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2280
2281 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2282
2283Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2284
2285 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2286 debug registers. From Charles Hannum (mycroft@netbsd.org).
2287
2288Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2289
2290 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2291 i386 support:
2292 * i386.h (MOV_AX_DISP32): New macro.
2293 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2294 of several call/return instructions.
2295 (ADDR_PREFIX_OPCODE): New macro.
2296
2297Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2298
2299 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2300
4f1d9bd8
NC
2301 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2302 char.
252b5132
RH
2303 (struct vot, field `name'): ditto.
2304
2305Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2306
2307 * vax.h: Supply and properly group all values in end sentinel.
2308
2309Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2310
2311 * mips.h (INSN_ISA, INSN_4650): Define.
2312
2313Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2314
2315 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2316 systems with a separate instruction and data cache, such as the
2317 29040, these instructions take an optional argument.
2318
2319Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2320
2321 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2322 INSN_TRAP.
2323
2324Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2325
2326 * mips.h (INSN_STORE_MEMORY): Define.
2327
2328Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2329
2330 * sparc.h: Document new operand type 'x'.
2331
2332Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2333
2334 * i960.h (I_CX2): New instruction category. It includes
2335 instructions available on Cx and Jx processors.
2336 (I_JX): New instruction category, for JX-only instructions.
2337 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2338 Jx-only instructions, in I_JX category.
2339
2340Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2341
2342 * ns32k.h (endop): Made pointer const too.
2343
2344Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2345
2346 * ns32k.h: Drop Q operand type as there is no correct use
2347 for it. Add I and Z operand types which allow better checking.
2348
2349Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2350
2351 * h8300.h (xor.l) :fix bit pattern.
2352 (L_2): New size of operand.
2353 (trapa): Use it.
2354
2355Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2356
2357 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2358
2359Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2360
2361 * sparc.h: Include v9 definitions.
2362
2363Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2364
2365 * m68k.h (m68060): Defined.
2366 (m68040up, mfloat, mmmu): Include it.
2367 (struct m68k_opcode): Widen `arch' field.
2368 (m68k_opcodes): Updated for M68060. Removed comments that were
2369 instructions commented out by "JF" years ago.
2370
2371Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2372
2373 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2374 add a one-bit `flags' field.
2375 (F_ALIAS): New macro.
2376
2377Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2378
2379 * h8300.h (dec, inc): Get encoding right.
2380
2381Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2382
2383 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2384 a flag instead.
2385 (PPC_OPERAND_SIGNED): Define.
2386 (PPC_OPERAND_SIGNOPT): Define.
2387
2388Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2389
2390 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2391 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2392
2393Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2394
2395 * i386.h: Reverse last change. It'll be handled in gas instead.
2396
2397Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2398
2399 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2400 slower on the 486 and used the implicit shift count despite the
2401 explicit operand. The one-operand form is still available to get
2402 the shorter form with the implicit shift count.
2403
2404Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2405
2406 * hppa.h: Fix typo in fstws arg string.
2407
2408Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2409
2410 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2411
2412Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2413
2414 * ppc.h (PPC_OPCODE_601): Define.
2415
2416Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2417
2418 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2419 (so we can determine valid completers for both addb and addb[tf].)
2420
2421 * hppa.h (xmpyu): No floating point format specifier for the
2422 xmpyu instruction.
2423
2424Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2425
2426 * ppc.h (PPC_OPERAND_NEXT): Define.
2427 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2428 (struct powerpc_macro): Define.
2429 (powerpc_macros, powerpc_num_macros): Declare.
2430
2431Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2432
2433 * ppc.h: New file. Header file for PowerPC opcode table.
2434
2435Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2436
2437 * hppa.h: More minor template fixes for sfu and copr (to allow
2438 for easier disassembly).
2439
2440 * hppa.h: Fix templates for all the sfu and copr instructions.
2441
2442Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2443
2444 * i386.h (push): Permit Imm16 operand too.
2445
2446Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2447
2448 * h8300.h (andc): Exists in base arch.
2449
2450Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2451
2452 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2453 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2454
2455Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2456
2457 * hppa.h: Add FP quadword store instructions.
2458
2459Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2460
2461 * mips.h: (M_J_A): Added.
2462 (M_LA): Removed.
2463
2464Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2465
2466 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2467 <mellon@pepper.ncd.com>.
2468
2469Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2470
2471 * hppa.h: Immediate field in probei instructions is unsigned,
2472 not low-sign extended.
2473
2474Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2475
2476 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2477
2478Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2479
2480 * i386.h: Add "fxch" without operand.
2481
2482Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2483
2484 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2485
2486Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2487
2488 * hppa.h: Add gfw and gfr to the opcode table.
2489
2490Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2491
2492 * m88k.h: extended to handle m88110.
2493
2494Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2495
2496 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2497 addresses.
2498
2499Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2500
2501 * i960.h (i960_opcodes): Properly bracket initializers.
2502
2503Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2504
2505 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2506
2507Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2508
2509 * m68k.h (two): Protect second argument with parentheses.
2510
2511Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2512
2513 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2514 Deleted old in/out instructions in "#if 0" section.
2515
2516Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2517
2518 * i386.h (i386_optab): Properly bracket initializers.
2519
2520Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2521
2522 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2523 Jeff Law, law@cs.utah.edu).
2524
2525Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2526
2527 * i386.h (lcall): Accept Imm32 operand also.
2528
2529Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2530
2531 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2532 (M_DABS): Added.
2533
2534Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2535
2536 * mips.h (INSN_*): Changed values. Removed unused definitions.
2537 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2538 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2539 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2540 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2541 (M_*): Added new values for r6000 and r4000 macros.
2542 (ANY_DELAY): Removed.
2543
2544Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2545
2546 * mips.h: Added M_LI_S and M_LI_SS.
2547
2548Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2549
2550 * h8300.h: Get some rare mov.bs correct.
2551
2552Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2553
2554 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2555 been included.
2556
2557Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2558
2559 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2560 jump instructions, for use in disassemblers.
2561
2562Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2563
2564 * m88k.h: Make bitfields just unsigned, not unsigned long or
2565 unsigned short.
2566
2567Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2568
2569 * hppa.h: New argument type 'y'. Use in various float instructions.
2570
2571Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2572
2573 * hppa.h (break): First immediate field is unsigned.
2574
2575 * hppa.h: Add rfir instruction.
2576
2577Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2578
2579 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2580
2581Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2582
2583 * mips.h: Reworked the hazard information somewhat, and fixed some
2584 bugs in the instruction hazard descriptions.
2585
2586Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2587
2588 * m88k.h: Corrected a couple of opcodes.
2589
2590Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2591
2592 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2593 new version includes instruction hazard information, but is
2594 otherwise reasonably similar.
2595
2596Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2597
2598 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2599
2600Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2601
2602 Patches from Jeff Law, law@cs.utah.edu:
2603 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2604 Make the tables be the same for the following instructions:
2605 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2606 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2607 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2608 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2609 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2610 "fcmp", and "ftest".
2611
2612 * hppa.h: Make new and old tables the same for "break", "mtctl",
2613 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2614 Fix typo in last patch. Collapse several #ifdefs into a
2615 single #ifdef.
2616
2617 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2618 of the comments up-to-date.
2619
2620 * hppa.h: Update "free list" of letters and update
2621 comments describing each letter's function.
2622
4f1d9bd8
NC
2623Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2624
2625 * h8300.h: Lots of little fixes for the h8/300h.
2626
2627Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2628
2629 Support for H8/300-H
2630 * h8300.h: Lots of new opcodes.
2631
252b5132
RH
2632Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2633
2634 * h8300.h: checkpoint, includes H8/300-H opcodes.
2635
2636Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2637
2638 * Patches from Jeffrey Law <law@cs.utah.edu>.
2639 * hppa.h: Rework single precision FP
2640 instructions so that they correctly disassemble code
2641 PA1.1 code.
2642
2643Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2644
2645 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2646 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2647
2648Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2649
2650 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2651 gdb will define it for now.
2652
2653Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2654
2655 * sparc.h: Don't end enumerator list with comma.
2656
2657Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2658
2659 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2660 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2661 ("bc2t"): Correct typo.
2662 ("[ls]wc[023]"): Use T rather than t.
2663 ("c[0123]"): Define general coprocessor instructions.
2664
2665Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2666
2667 * m68k.h: Move split point for gcc compilation more towards
2668 middle.
2669
2670Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2671
2672 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2673 simply wrong, ics, rfi, & rfsvc were missing).
2674 Add "a" to opr_ext for "bb". Doc fix.
2675
2676Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2677
2678 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2679 * mips.h: Add casts, to suppress warnings about shifting too much.
2680 * m68k.h: Document the placement code '9'.
2681
2682Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2683
2684 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2685 allows callers to break up the large initialized struct full of
2686 opcodes into two half-sized ones. This permits GCC to compile
2687 this module, since it takes exponential space for initializers.
2688 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2689
2690Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2691
2692 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2693 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2694 initialized structs in it.
2695
2696Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2697
2698 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2699 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2700 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2701
2702Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2703
2704 * mips.h: document "i" and "j" operands correctly.
2705
2706Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2707
2708 * mips.h: Removed endianness dependency.
2709
2710Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2711
2712 * h8300.h: include info on number of cycles per instruction.
2713
2714Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2715
2716 * hppa.h: Move handy aliases to the front. Fix masks for extract
2717 and deposit instructions.
2718
2719Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2720
2721 * i386.h: accept shld and shrd both with and without the shift
2722 count argument, which is always %cl.
2723
2724Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2725
2726 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2727 (one_byte_segment_defaults, two_byte_segment_defaults,
2728 i386_prefixtab_end): Ditto.
2729
2730Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2731
2732 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2733 for operand 2; from John Carr, jfc@dsg.dec.com.
2734
2735Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2736
2737 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2738 always use 16-bit offsets. Makes calculated-size jump tables
2739 feasible.
2740
2741Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2742
2743 * i386.h: Fix one-operand forms of in* and out* patterns.
2744
2745Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2746
2747 * m68k.h: Added CPU32 support.
2748
2749Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2750
2751 * mips.h (break): Disassemble the argument. Patch from
2752 jonathan@cs.stanford.edu (Jonathan Stone).
2753
2754Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2755
2756 * m68k.h: merged Motorola and MIT syntax.
2757
2758Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2759
2760 * m68k.h (pmove): make the tests less strict, the 68k book is
2761 wrong.
2762
2763Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2764
2765 * m68k.h (m68ec030): Defined as alias for 68030.
2766 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2767 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2768 them. Tightened description of "fmovex" to distinguish it from
2769 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2770 up descriptions that claimed versions were available for chips not
2771 supporting them. Added "pmovefd".
2772
2773Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2774
2775 * m68k.h: fix where the . goes in divull
2776
2777Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2778
2779 * m68k.h: the cas2 instruction is supposed to be written with
2780 indirection on the last two operands, which can be either data or
2781 address registers. Added a new operand type 'r' which accepts
2782 either register type. Added new cases for cas2l and cas2w which
2783 use them. Corrected masks for cas2 which failed to recognize use
2784 of address register.
2785
2786Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2787
2788 * m68k.h: Merged in patches (mostly m68040-specific) from
2789 Colin Smith <colin@wrs.com>.
2790
2791 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2792 base). Also cleaned up duplicates, re-ordered instructions for
2793 the sake of dis-assembling (so aliases come after standard names).
2794 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2795
2796Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2797
2798 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2799 all missing .s
2800
2801Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2802
2803 * sparc.h: Moved tables to BFD library.
2804
2805 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2806
2807Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2808
2809 * h8300.h: Finish filling in all the holes in the opcode table,
2810 so that the Lucid C compiler can digest this as well...
2811
2812Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2813
2814 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2815 Fix opcodes on various sizes of fild/fist instructions
2816 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2817 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2818
2819Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2820
2821 * h8300.h: Fill in all the holes in the opcode table so that the
2822 losing HPUX C compiler can digest this...
2823
2824Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2825
2826 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2827 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2828
2829Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2830
2831 * sparc.h: Add new architecture variant sparclite; add its scan
2832 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2833
2834Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2835
2836 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2837 fy@lucid.com).
2838
2839Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2840
2841 * rs6k.h: New version from IBM (Metin).
2842
2843Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2844
2845 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2846 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2847
2848Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2849
2850 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2851
2852Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2853
2854 * m68k.h (one, two): Cast macro args to unsigned to suppress
2855 complaints from compiler and lint about integer overflow during
2856 shift.
2857
2858Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2859
2860 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2861
2862Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2863
2864 * mips.h: Make bitfield layout depend on the HOST compiler,
2865 not on the TARGET system.
2866
2867Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2868
2869 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2870 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2871 <TRANLE@INTELLICORP.COM>.
2872
2873Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2874
2875 * h8300.h: turned op_type enum into #define list
2876
2877Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2878
2879 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2880 similar instructions -- they've been renamed to "fitoq", etc.
2881 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2882 number of arguments.
2883 * h8300.h: Remove extra ; which produces compiler warning.
2884
2885Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2886
2887 * sparc.h: fix opcode for tsubcctv.
2888
2889Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2890
2891 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2892
2893Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2894
2895 * sparc.h (nop): Made the 'lose' field be even tighter,
2896 so only a standard 'nop' is disassembled as a nop.
2897
2898Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2899
2900 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2901 disassembled as a nop.
2902
4f1d9bd8
NC
2903Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2904
2905 * m68k.h, sparc.h: ANSIfy enums.
2906
252b5132
RH
2907Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2908
2909 * sparc.h: fix a typo.
2910
2911Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2912
2913 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2914 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2915 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2916
2917\f
2918Local Variables:
2919version-control: never
2920End:
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