[ binutils/ChangeLog ]
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
640c0ccd
CD
12002-12-19 Chris Demetriou <cgd@broadcom.com>
2
3 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
4 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
5 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
6 (OP_OP_SDC2, OP_OP_SDC3): Define.
7
9bd1915f
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82002-12-16 Alan Modra <amodra@bigpond.net.au>
9
3f2a9fb7
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10 * hppa.h (completer_chars): #if 0 out.
11
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12 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
13 "default_args".
14 (struct not_wot): Constify "args".
15 (struct not): Constify "name".
16 (numopcodes): Delete.
17 (endop): Delete.
18
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AM
192002-12-13 Alan Modra <amodra@bigpond.net.au>
20
21 * pj.h (pj_opc_info_t): Add union.
22
c10d9d8f
JW
232002-12-04 David Mosberger <davidm@hpl.hp.com>
24
25 * ia64.h: Fix copyright message.
26 (IA64_OPND_AR_CSD): New operand kind.
27
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RH
282002-12-03 Richard Henderson <rth@redhat.com>
29
30 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
31
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AM
322002-12-03 Alan Modra <amodra@bigpond.net.au>
33
34 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
35 Constify "leaf" and "multi".
36
53cc2791
KD
372002-11-19 Klee Dienes <kdienes@apple.com>
38
39 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
40 fields.
41 (h8_opcodes). Modify initializer and initializer macros to no
42 longer initialize the removed fields.
43
5dec9182
SS
442002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
45
46 * tic4x.h (c4x_insts): Fixed LDHI constraint
47
a3e64b75
KD
482002-11-18 Klee Dienes <kdienes@apple.com>
49
50 * h8300.h (h8_opcode): Remove 'length' field.
51 (h8_opcodes): Mark as 'const' (both the declaration and
52 definition). Modify initializer and initializer macros to no
53 longer initialize the length field.
54
84037f8c
KD
552002-11-18 Klee Dienes <kdienes@apple.com>
56
57 * arc.h (arc_ext_opcodes): Declare as extern.
58 (arc_ext_operands): Declare as extern.
59 * i860.h (i860_opcodes): Declare as const.
60
eb128449
SS
612002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
62
63 * tic4x.h: File reordering. Added enhanced opcodes.
64
652002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
66
67 * tic4x.h: Major rewrite of entire file. Define instruction
68 classes, and put each instruction into a class.
69
702002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
71
72 * tic4x.h: Added new opcodes and corrected some bugs. Add support
73 for new DSP types.
74
ea6a213a
AM
752002-10-14 Alan Modra <amodra@bigpond.net.au>
76
77 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
78
701b80cd 792002-09-30 Gavin Romig-Koch <gavin@redhat.com>
9752cf1b
RS
80 Ken Raeburn <raeburn@cygnus.com>
81 Aldy Hernandez <aldyh@redhat.com>
82 Eric Christopher <echristo@redhat.com>
83 Richard Sandiford <rsandifo@redhat.com>
84
85 * mips.h: Update comment for new opcodes.
86 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
87 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
88 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
89 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
90 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
91 Don't match CPU_R4111 with INSN_4100.
92
0449635d
EZ
932002-08-19 Elena Zannoni <ezannoni@redhat.com>
94
95 From matthew green <mrg@redhat.com>
96
97 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
98 instructions.
99 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
100 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
101 e500x2 Integer select, branch locking, performance monitor,
102 cache locking and machine check APUs, respectively.
103 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
104 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
105
030ad53b
SC
1062002-08-13 Stephane Carrez <stcarrez@nerim.fr>
107
108 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
109 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
110 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
111 memory banks.
112 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
113
aec421e0
TS
1142002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
115
116 * mips.h (INSN_MIPS16): New define.
117
cd61ebfe
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1182002-07-08 Alan Modra <amodra@bigpond.net.au>
119
120 * i386.h: Remove IgnoreSize from movsx and movzx.
121
92007e40
AM
1222002-06-08 Alan Modra <amodra@bigpond.net.au>
123
124 * a29k.h: Replace CONST with const.
125 (CONST): Don't define.
126 * convex.h: Replace CONST with const.
127 (CONST): Don't define.
128 * dlx.h: Replace CONST with const.
129 * or32.h (CONST): Don't define.
130
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CD
1312002-05-30 Chris G. Demetriou <cgd@broadcom.com>
132
133 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
134 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
135 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
136 (INSN_MDMX): New constants, for MDMX support.
137 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
138
d172d4ba
NC
1392002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
140
141 * dlx.h: New file.
142
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AM
1432002-05-25 Alan Modra <amodra@bigpond.net.au>
144
145 * ia64.h: Use #include "" instead of <> for local header files.
146 * sparc.h: Likewise.
147
771c7ce4
TS
1482002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
149
150 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
151
b9c9142c
AV
1522002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
153
154 * h8300.h: Corrected defs of all control regs
155 and eepmov instr.
156
cd47f4f1
AM
1572002-04-11 Alan Modra <amodra@bigpond.net.au>
158
159 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 160 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 161
1f25f5d3
CD
1622002-03-15 Chris G. Demetriou <cgd@broadcom.com>
163
164 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
165 instructions.
166 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
167 may be passed along with the ISA bitmask.
168
e4b29ec6
AM
1692002-03-05 Paul Koning <pkoning@equallogic.com>
170
171 * pdp11.h: Add format codes for float instruction formats.
172
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AM
1732002-02-25 Alan Modra <amodra@bigpond.net.au>
174
175 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
176
5a8b245c
JH
177Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
178
179 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
180
85a33fe2
JH
181Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
182
183 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
184 (xchg): Fix.
185 (in, out): Disable 64bit operands.
186 (call, jmp): Avoid REX prefixes.
187 (jcxz): Prohibit in 64bit mode
188 (jrcxz, loop): Add 64bit variants.
189 (movq): Fix patterns.
190 (movmskps, pextrw, pinstrw): Add 64bit variants.
191
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NC
1922002-01-31 Ivan Guzvinec <ivang@opencores.org>
193
194 * or32.h: New file.
195
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GH
1962002-01-22 Graydon Hoare <graydon@redhat.com>
197
198 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
199 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
200
7b45c6e1
AM
2012002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
202
203 * h8300.h: Comment typo fix.
204
a09cf9bd
MG
2052002-01-03 matthew green <mrg@redhat.com>
206
207 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
208 (PPC_OPCODE_BOOKE64): Likewise.
209
1befefea
JL
210Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
211
212 * hppa.h (call, ret): Move to end of table.
213 (addb, addib): PA2.0 variants should have been PA2.0W.
214 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
215 happy.
216 (fldw, fldd, fstw, fstd, bb): Likewise.
217 (short loads/stores): Tweak format specifier slightly to keep
218 disassembler happy.
219 (indexed loads/stores): Likewise.
220 (absolute loads/stores): Likewise.
221
124ddbb2
AO
2222001-12-04 Alexandre Oliva <aoliva@redhat.com>
223
224 * d10v.h (OPERAND_NOSP): New macro.
225
9b21d49b
AO
2262001-11-29 Alexandre Oliva <aoliva@redhat.com>
227
228 * d10v.h (OPERAND_SP): New macro.
229
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AM
2302001-11-15 Alan Modra <amodra@bigpond.net.au>
231
232 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
233
6e917903
TW
2342001-11-11 Timothy Wall <twall@alum.mit.edu>
235
236 * tic54x.h: Revise opcode layout; don't really need a separate
237 structure for parallel opcodes.
238
e5470cdc
AM
2392001-11-13 Zack Weinberg <zack@codesourcery.com>
240 Alan Modra <amodra@bigpond.net.au>
241
242 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
243 accept WordReg.
244
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CD
2452001-11-04 Chris Demetriou <cgd@broadcom.com>
246
247 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
248
3c3bdf30
NC
2492001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
250
251 * mmix.h: New file.
252
e4432525
CD
2532001-10-18 Chris Demetriou <cgd@broadcom.com>
254
255 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
256 of the expression, to make source code merging easier.
257
8ff529d8
CD
2582001-10-17 Chris Demetriou <cgd@broadcom.com>
259
260 * mips.h: Sort coprocessor instruction argument characters
261 in comment, add a few more words of description for "H".
262
2228315b
CD
2632001-10-17 Chris Demetriou <cgd@broadcom.com>
264
265 * mips.h (INSN_SB1): New cpu-specific instruction bit.
266 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
267 if cpu is CPU_SB1.
268
f5c120c5
MG
2692001-10-17 matthew green <mrg@redhat.com>
270
271 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
272
418c1742
MG
2732001-10-12 matthew green <mrg@redhat.com>
274
0716ce0d
MG
275 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
276 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
277 instructions, respectively.
418c1742 278
6ff2f2ba
NC
2792001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
280
281 * v850.h: Remove spurious comment.
282
015cf428
NC
2832001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
284
285 * h8300.h: Fix compile time warning messages
286
847b8b31
RH
2872001-09-04 Richard Henderson <rth@redhat.com>
288
289 * alpha.h (struct alpha_operand): Pack elements into bitfields.
290
a98b9439
EC
2912001-08-31 Eric Christopher <echristo@redhat.com>
292
293 * mips.h: Remove CPU_MIPS32_4K.
294
a6959011
AM
2952001-08-27 Torbjorn Granlund <tege@swox.com>
296
297 * ppc.h (PPC_OPERAND_DS): Define.
298
d83c6548
AJ
2992001-08-25 Andreas Jaeger <aj@suse.de>
300
301 * d30v.h: Fix declaration of reg_name_cnt.
302
303 * d10v.h: Fix declaration of d10v_reg_name_cnt.
304
305 * arc.h: Add prototypes from opcodes/arc-opc.c.
306
99c14723
TS
3072001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
308
309 * mips.h (INSN_10000): Define.
310 (OPCODE_IS_MEMBER): Check for INSN_10000.
311
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AM
3122001-08-10 Alan Modra <amodra@one.net.au>
313
314 * ppc.h: Revert 2001-08-08.
315
3b16e843
NC
3162001-08-10 Richard Sandiford <rsandifo@redhat.com>
317
318 * mips.h (INSN_GP32): Remove.
319 (OPCODE_IS_MEMBER): Remove gp32 parameter.
320 (M_MOVE): New macro identifier.
321
0f1bac05
AM
3222001-08-08 Alan Modra <amodra@one.net.au>
323
324 1999-10-25 Torbjorn Granlund <tege@swox.com>
325 * ppc.h (struct powerpc_operand): New field `reloc'.
326
3b16e843
NC
3272001-08-01 Aldy Hernandez <aldyh@redhat.com>
328
329 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
330
3312001-07-12 Jeff Johnston <jjohnstn@redhat.com>
332
333 * cgen.h (CGEN_INSN): Add regex support.
334 (build_insn_regex): Declare.
335
81f6038f
FCE
3362001-07-11 Frank Ch. Eigler <fche@redhat.com>
337
338 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
339 (cgen_cpu_desc): Ditto.
340
32cfffe3
BE
3412001-07-07 Ben Elliston <bje@redhat.com>
342
343 * m88k.h: Clean up and reformat. Remove unused code.
344
3e890047
GK
3452001-06-14 Geoffrey Keating <geoffk@redhat.com>
346
347 * cgen.h (cgen_keyword): Add nonalpha_chars field.
348
d1cf510e
NC
3492001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
350
351 * mips.h (CPU_R12000): Define.
352
e281c457
JH
3532001-05-23 John Healy <jhealy@redhat.com>
354
355 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 356
aa5f19f2
NC
3572001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
358
359 * mips.h (INSN_ISA_MASK): Define.
360
67d6227d
AM
3612001-05-12 Alan Modra <amodra@one.net.au>
362
363 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
364 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
365 and use InvMem as these insns must have register operands.
366
992aaec9
AM
3672001-05-04 Alan Modra <amodra@one.net.au>
368
369 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
370 and pextrw to swap reg/rm assignments.
371
4ef7f0bf
HPN
3722001-04-05 Hans-Peter Nilsson <hp@axis.com>
373
374 * cris.h (enum cris_insn_version_usage): Correct comment for
375 cris_ver_v3p.
376
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AM
3772001-03-24 Alan Modra <alan@linuxcare.com.au>
378
379 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
380 Add InvMem to first operand of "maskmovdqu".
381
7ccb5238
HPN
3822001-03-22 Hans-Peter Nilsson <hp@axis.com>
383
384 * cris.h (ADD_PC_INCR_OPCODE): New macro.
385
361bfa20
KH
3862001-03-21 Kazu Hirata <kazu@hxi.com>
387
388 * h8300.h: Fix formatting.
389
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AM
3902001-03-22 Alan Modra <alan@linuxcare.com.au>
391
392 * i386.h (i386_optab): Add paddq, psubq.
393
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AM
3942001-03-19 Alan Modra <alan@linuxcare.com.au>
395
396 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
397
80a523c2
NC
3982001-02-28 Igor Shevlyakov <igor@windriver.com>
399
400 * m68k.h: new defines for Coldfire V4. Update mcf to know
401 about mcf5407.
402
e135f41b
NC
4032001-02-18 lars brinkhoff <lars@nocrew.org>
404
405 * pdp11.h: New file.
406
4072001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
408
409 * i386.h (i386_optab): SSE integer converison instructions have
410 64bit versions on x86-64.
411
8eaec934
NC
4122001-02-10 Nick Clifton <nickc@redhat.com>
413
414 * mips.h: Remove extraneous whitespace. Formating change to allow
415 for future contribution.
416
a85d7ed0
NC
4172001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
418
419 * s390.h: New file.
420
0715dc88
PM
4212001-02-02 Patrick Macdonald <patrickm@redhat.com>
422
423 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
424 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
425 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
426
296bc568
AM
4272001-01-24 Karsten Keil <kkeil@suse.de>
428
429 * i386.h (i386_optab): Fix swapgs
430
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AM
4312001-01-14 Alan Modra <alan@linuxcare.com.au>
432
433 * hppa.h: Describe new '<' and '>' operand types, and tidy
434 existing comments.
435 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
436 Remove duplicate "ldw j(s,b),x". Sort some entries.
437
e135f41b 4382001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
439
440 * i386.h (i386_optab): Fix pusha and ret templates.
441
0d2bcfaf
NC
4422001-01-11 Peter Targett <peter.targett@arccores.com>
443
444 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
445 definitions for masking cpu type.
446 (arc_ext_operand_value) New structure for storing extended
447 operands.
448 (ARC_OPERAND_*) Flags for operand values.
449
4502001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
451
452 * i386.h (pinsrw): Add.
453 (pshufw): Remove.
454 (cvttpd2dq): Fix operands.
455 (cvttps2dq): Likewise.
456 (movq2q): Rename to movdq2q.
457
079966a8
AM
4582001-01-10 Richard Schaal <richard.schaal@intel.com>
459
460 * i386.h: Correct movnti instruction.
461
8c1f9e76
JJ
4622001-01-09 Jeff Johnston <jjohnstn@redhat.com>
463
464 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
465 of operands (unsigned char or unsigned short).
466 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
467 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
468
0d2bcfaf 4692001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
470
471 * i386.h (i386_optab): Make [sml]fence template to use immext field.
472
0d2bcfaf 4732001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
474
475 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
476 introduced by Pentium4
477
0d2bcfaf 4782000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
479
480 * i386.h (i386_optab): Add "rex*" instructions;
481 add swapgs; disable jmp/call far direct instructions for
482 64bit mode; add syscall and sysret; disable registers for 0xc6
483 template. Add 'q' suffixes to extendable instructions, disable
079966a8 484 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
485 (i386_regtab): Add extended registers.
486 (*Suf): Add No_qSuf.
487 (q_Suf, wlq_Suf, bwlq_Suf): New.
488
0d2bcfaf 4892000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
490
491 * i386.h (i386_optab): Replace "Imm" with "EncImm".
492 (i386_regtab): Add flags field.
d83c6548 493
bf40d919
NC
4942000-12-12 Nick Clifton <nickc@redhat.com>
495
496 * mips.h: Fix formatting.
497
4372b673
NC
4982000-12-01 Chris Demetriou <cgd@sibyte.com>
499
500 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
501 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
502 OP_*_SYSCALL definitions.
503 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
504 19 bit wait codes.
505 (MIPS operand specifier comments): Remove 'm', add 'U' and
506 'J', and update the meaning of 'B' so that it's more general.
507
e7af610e
NC
508 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
509 INSN_ISA5): Renumber, redefine to mean the ISA at which the
510 instruction was added.
511 (INSN_ISA32): New constant.
512 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
513 Renumber to avoid new and/or renumbered INSN_* constants.
514 (INSN_MIPS32): Delete.
515 (ISA_UNKNOWN): New constant to indicate unknown ISA.
516 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
517 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 518 constants available at that ISA level.
e7af610e
NC
519 (CPU_UNKNOWN): New constant to indicate unknown CPU.
520 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
521 define it with a unique value.
522 (OPCODE_IS_MEMBER): Update for new ISA membership-related
523 constant meanings.
524
84ea6cf2 525 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 526 definitions.
84ea6cf2 527
c6c98b38
NC
528 * mips.h (CPU_SB1): New constant.
529
19f7b010
JJ
5302000-10-20 Jakub Jelinek <jakub@redhat.com>
531
532 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
533 Note that '3' is used for siam operand.
534
139368c9
JW
5352000-09-22 Jim Wilson <wilson@cygnus.com>
536
537 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
538
156c2f8b 5392000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 540
156c2f8b
NC
541 * mips.h: Use defines instead of hard-coded processor numbers.
542 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 543 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
544 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
545 CPU_4KC, CPU_4KM, CPU_4KP): Define..
546 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 547 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 548 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
549 Add 'P' to used characters.
550 Use 'H' for coprocessor select field.
156c2f8b 551 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
552 Document new arg characters and add to used characters.
553 (INSN_MIPS32): New define for MIPS32 extensions.
554 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 555
3c5ce02e
AM
5562000-09-05 Alan Modra <alan@linuxcare.com.au>
557
558 * hppa.h: Mention cz completer.
559
50b81f19
JW
5602000-08-16 Jim Wilson <wilson@cygnus.com>
561
562 * ia64.h (IA64_OPCODE_POSTINC): New.
563
fc29466d
L
5642000-08-15 H.J. Lu <hjl@gnu.org>
565
566 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
567 IgnoreSize change.
568
4f1d9bd8
NC
5692000-08-08 Jason Eckhardt <jle@cygnus.com>
570
571 * i860.h: Small formatting adjustments.
572
45ee1401
DC
5732000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
574
575 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
576 Move related opcodes closer to each other.
577 Minor changes in comments, list undefined opcodes.
578
9d551405
DB
5792000-07-26 Dave Brolley <brolley@redhat.com>
580
581 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
582
4f1d9bd8
NC
5832000-07-22 Jason Eckhardt <jle@cygnus.com>
584
585 * i860.h (btne, bte, bla): Changed these opcodes
586 to use sbroff ('r') instead of split16 ('s').
587 (J, K, L, M): New operand types for 16-bit aligned fields.
588 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
589 use I, J, K, L, M instead of just I.
590 (T, U): New operand types for split 16-bit aligned fields.
591 (st.x): Changed these opcodes to use S, T, U instead of just S.
592 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
593 exist on the i860.
594 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
595 (pfeq.ss, pfeq.dd): New opcodes.
596 (st.s): Fixed incorrect mask bits.
597 (fmlow): Fixed incorrect mask bits.
598 (fzchkl, pfzchkl): Fixed incorrect mask bits.
599 (faddz, pfaddz): Fixed incorrect mask bits.
600 (form, pform): Fixed incorrect mask bits.
601 (pfld.l): Fixed incorrect mask bits.
602 (fst.q): Fixed incorrect mask bits.
603 (all floating point opcodes): Fixed incorrect mask bits for
604 handling of dual bit.
605
c8488617
HPN
6062000-07-20 Hans-Peter Nilsson <hp@axis.com>
607
608 cris.h: New file.
609
65aa24b6
NC
6102000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
611
612 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
613 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
614 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
615 (AVR_ISA_M83): Define for ATmega83, ATmega85.
616 (espm): Remove, because ESPM removed in databook update.
617 (eicall, eijmp): Move to the end of opcode table.
618
60bcf0fa
NC
6192000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
620
621 * m68hc11.h: New file for support of Motorola 68hc11.
622
60a2978a
DC
623Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
624
625 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
626
68ab2dd9
DC
627Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
628
629 * avr.h: New file with AVR opcodes.
630
f0662e27
DL
631Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
632
633 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
634
b722f2be
AM
6352000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
636
637 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
638
f9e0cf0b
AM
6392000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
640
641 * i386.h: Use sl_FP, not sl_Suf for fild.
642
f660ee8b
FCE
6432000-05-16 Frank Ch. Eigler <fche@redhat.com>
644
645 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
646 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
647 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
648 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
649
558b0a60
AM
6502000-05-13 Alan Modra <alan@linuxcare.com.au>,
651
652 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
653
e413e4e9
AM
6542000-05-13 Alan Modra <alan@linuxcare.com.au>,
655 Alexander Sokolov <robocop@netlink.ru>
656
657 * i386.h (i386_optab): Add cpu_flags for all instructions.
658
6592000-05-13 Alan Modra <alan@linuxcare.com.au>
660
661 From Gavin Romig-Koch <gavin@cygnus.com>
662 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
663
5c84d377
TW
6642000-05-04 Timothy Wall <twall@cygnus.com>
665
666 * tic54x.h: New.
667
966f959b
C
6682000-05-03 J.T. Conklin <jtc@redback.com>
669
670 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
671 (PPC_OPERAND_VR): New operand flag for vector registers.
672
c5d05dbb
JL
6732000-05-01 Kazu Hirata <kazu@hxi.com>
674
675 * h8300.h (EOP): Add missing initializer.
676
a7fba0e0
JL
677Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
678
679 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
680 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
681 New operand types l,y,&,fe,fE,fx added to support above forms.
682 (pa_opcodes): Replaced usage of 'x' as source/target for
683 floating point double-word loads/stores with 'fx'.
684
800eeca4
JW
685Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
686 David Mosberger <davidm@hpl.hp.com>
687 Timothy Wall <twall@cygnus.com>
688 Jim Wilson <wilson@cygnus.com>
689
690 * ia64.h: New file.
691
ba23e138
NC
6922000-03-27 Nick Clifton <nickc@cygnus.com>
693
694 * d30v.h (SHORT_A1): Fix value.
695 (SHORT_AR): Renumber so that it is at the end of the list of short
696 instructions, not the end of the list of long instructions.
697
d0b47220
AM
6982000-03-26 Alan Modra <alan@linuxcare.com>
699
700 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
701 problem isn't really specific to Unixware.
702 (OLDGCC_COMPAT): Define.
703 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
704 destination %st(0).
705 Fix lots of comments.
706
866afedc
NC
7072000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
708
709 * d30v.h:
710 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
711 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
712 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
713 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
714 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
715 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
716 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
717
cc5ca5ce
AM
7182000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
719
720 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
721 fistpd without suffix.
722
68e324a2
NC
7232000-02-24 Nick Clifton <nickc@cygnus.com>
724
725 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
726 'signed_overflow_ok_p'.
727 Delete prototypes for cgen_set_flags() and cgen_get_flags().
728
60f036a2
AH
7292000-02-24 Andrew Haley <aph@cygnus.com>
730
731 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
732 (CGEN_CPU_TABLE): flags: new field.
733 Add prototypes for new functions.
d83c6548 734
9b9b5cd4
AM
7352000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
736
737 * i386.h: Add some more UNIXWARE_COMPAT comments.
738
5b93d8bb
AM
7392000-02-23 Linas Vepstas <linas@linas.org>
740
741 * i370.h: New file.
742
4f1d9bd8
NC
7432000-02-22 Chandra Chavva <cchavva@cygnus.com>
744
745 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
746 cannot be combined in parallel with ADD/SUBppp.
747
87f398dd
AH
7482000-02-22 Andrew Haley <aph@cygnus.com>
749
750 * mips.h: (OPCODE_IS_MEMBER): Add comment.
751
367c01af
AH
7521999-12-30 Andrew Haley <aph@cygnus.com>
753
9a1e79ca
AH
754 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
755 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
756 insns.
367c01af 757
add0c677
AM
7582000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
759
760 * i386.h: Qualify intel mode far call and jmp with x_Suf.
761
3138f287
AM
7621999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
763
764 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
765 indirect jumps and calls. Add FF/3 call for intel mode.
766
ccecd07b
JL
767Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
768
769 * mn10300.h: Add new operand types. Add new instruction formats.
770
b37e19e9
JL
771Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
772
773 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
774 instruction.
775
5fce5ddf
GRK
7761999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
777
778 * mips.h (INSN_ISA5): New.
779
2bd7f1f3
GRK
7801999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
781
782 * mips.h (OPCODE_IS_MEMBER): New.
783
4df2b5c5
NC
7841999-10-29 Nick Clifton <nickc@cygnus.com>
785
786 * d30v.h (SHORT_AR): Define.
787
446a06c9
MM
7881999-10-18 Michael Meissner <meissner@cygnus.com>
789
790 * alpha.h (alpha_num_opcodes): Convert to unsigned.
791 (alpha_num_operands): Ditto.
792
eca04c6a
JL
793Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
794
795 * hppa.h (pa_opcodes): Add load and store cache control to
796 instructions. Add ordered access load and store.
797
798 * hppa.h (pa_opcode): Add new entries for addb and addib.
799
800 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
801
802 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
803
c43185de
DN
804Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
805
806 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
807
ec3533da
JL
808Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
809
390f858d
JL
810 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
811 and "be" using completer prefixes.
812
8c47ebd9
JL
813 * hppa.h (pa_opcodes): Add initializers to silence compiler.
814
ec3533da
JL
815 * hppa.h: Update comments about character usage.
816
18369bea
JL
817Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
818
819 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
820 up the new fstw & bve instructions.
821
c36efdd2
JL
822Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
823
d3ffb032
JL
824 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
825 instructions.
826
c49ec3da
JL
827 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
828
5d2e7ecc
JL
829 * hppa.h (pa_opcodes): Add long offset double word load/store
830 instructions.
831
6397d1a2
JL
832 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
833 stores.
834
142f0fe0
JL
835 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
836
f5a68b45
JL
837 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
838
8235801e
JL
839 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
840
35184366
JL
841 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
842
f0bfde5e
JL
843 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
844
27bbbb58
JL
845 * hppa.h (pa_opcodes): Add support for "b,l".
846
c36efdd2
JL
847 * hppa.h (pa_opcodes): Add support for "b,gate".
848
f2727d04
JL
849Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
850
9392fb11 851 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 852 in xmpyu.
9392fb11 853
e0c52e99
JL
854 * hppa.h (pa_opcodes): Fix mask for probe and probei.
855
f2727d04
JL
856 * hppa.h (pa_opcodes): Fix mask for depwi.
857
52d836e2
JL
858Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
859
860 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
861 an explicit output argument.
862
90765e3a
JL
863Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
864
865 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
866 Add a few PA2.0 loads and store variants.
867
8340b17f
ILT
8681999-09-04 Steve Chamberlain <sac@pobox.com>
869
870 * pj.h: New file.
871
5f47d35b
AM
8721999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
873
874 * i386.h (i386_regtab): Move %st to top of table, and split off
875 other fp reg entries.
876 (i386_float_regtab): To here.
877
1c143202
JL
878Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
879
7d8fdb64
JL
880 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
881 by 'f'.
882
90927b9c
JL
883 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
884 Add supporting args.
885
1d16bf9c
JL
886 * hppa.h: Document new completers and args.
887 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
888 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
889 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
890 pmenb and pmdis.
891
96226a68
JL
892 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
893 hshr, hsub, mixh, mixw, permh.
894
5d4ba527
JL
895 * hppa.h (pa_opcodes): Change completers in instructions to
896 use 'c' prefix.
897
e9fc28c6
JL
898 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
899 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
900
1c143202
JL
901 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
902 fnegabs to use 'I' instead of 'F'.
903
9e525108
AM
9041999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
905
906 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
907 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
908 Alphabetically sort PIII insns.
909
e8da1bf1
DE
910Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
911
912 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
913
7d627258
JL
914Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
915
5696871a
JL
916 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
917 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
918
7d627258
JL
919 * hppa.h: Document 64 bit condition completers.
920
c5e52916
JL
921Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
922
923 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
924
eecb386c
AM
9251999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
926
927 * i386.h (i386_optab): Add DefaultSize modifier to all insns
928 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
929 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
930
88a380f3
JL
931Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
932 Jeff Law <law@cygnus.com>
933
934 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
935
936 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 937
d83c6548 938 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
939 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
940
145cf1f0
AM
9411999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
942
943 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
944
73826640
JL
945Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
946
947 * hppa.h (struct pa_opcode): Add new field "flags".
948 (FLAGS_STRICT): Define.
949
b65db252
JL
950Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
951 Jeff Law <law@cygnus.com>
952
f7fc668b
JL
953 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
954
955 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 956
10084519
AM
9571999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
958
959 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
960 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
961 flag to fcomi and friends.
962
cd8a80ba
JL
963Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
964
965 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 966 integer logical instructions.
cd8a80ba 967
1fca749b
ILT
9681999-05-28 Linus Nordberg <linus.nordberg@canit.se>
969
970 * m68k.h: Document new formats `E', `G', `H' and new places `N',
971 `n', `o'.
972
973 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
974 and new places `m', `M', `h'.
975
aa008907
JL
976Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
977
978 * hppa.h (pa_opcodes): Add several processor specific system
979 instructions.
980
e26b85f0
JL
981Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
982
d83c6548 983 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
984 "addb", and "addib" to be used by the disassembler.
985
c608c12e
AM
9861999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
987
988 * i386.h (ReverseModrm): Remove all occurences.
989 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
990 movmskps, pextrw, pmovmskb, maskmovq.
991 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
992 ignore the data size prefix.
993
994 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
995 Mostly stolen from Doug Ledford <dledford@redhat.com>
996
45c18104
RH
997Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
998
999 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1000
252b5132
RH
10011999-04-14 Doug Evans <devans@casey.cygnus.com>
1002
1003 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1004 (CGEN_ATTR_TYPE): Update.
1005 (CGEN_ATTR_MASK): Number booleans starting at 0.
1006 (CGEN_ATTR_VALUE): Update.
1007 (CGEN_INSN_ATTR): Update.
1008
1009Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1010
1011 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1012 instructions.
1013
1014Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1015
1016 * hppa.h (bb, bvb): Tweak opcode/mask.
1017
1018
10191999-03-22 Doug Evans <devans@casey.cygnus.com>
1020
1021 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1022 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1023 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1024 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1025 Delete member max_insn_size.
1026 (enum cgen_cpu_open_arg): New enum.
1027 (cpu_open): Update prototype.
1028 (cpu_open_1): Declare.
1029 (cgen_set_cpu): Delete.
1030
10311999-03-11 Doug Evans <devans@casey.cygnus.com>
1032
1033 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1034 (CGEN_OPERAND_NIL): New macro.
1035 (CGEN_OPERAND): New member `type'.
1036 (@arch@_cgen_operand_table): Delete decl.
1037 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1038 (CGEN_OPERAND_TABLE): New struct.
1039 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1040 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1041 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1042 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1043 {get,set}_{int,vma}_operand.
1044 (@arch@_cgen_cpu_open): New arg `isa'.
1045 (cgen_set_cpu): Ditto.
1046
1047Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1048
1049 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1050
10511999-02-25 Doug Evans <devans@casey.cygnus.com>
1052
1053 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1054 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1055 enum cgen_hw_type.
1056 (CGEN_HW_TABLE): New struct.
1057 (hw_table): Delete declaration.
1058 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1059 to table entry to enum.
1060 (CGEN_OPINST): Ditto.
1061 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1062
1063Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1064
1065 * alpha.h (AXP_OPCODE_EV6): New.
1066 (AXP_OPCODE_NOPAL): Include it.
1067
10681999-02-09 Doug Evans <devans@casey.cygnus.com>
1069
1070 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1071 All uses updated. New members int_insn_p, max_insn_size,
1072 parse_operand,insert_operand,extract_operand,print_operand,
1073 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1074 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1075 extract_handlers,print_handlers.
1076 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1077 (CGEN_ATTR_BOOL_OFFSET): New macro.
1078 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1079 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1080 (cgen_opcode_handler): Renamed from cgen_base.
1081 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1082 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1083 all uses updated.
1084 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1085 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1086 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1087 (CGEN_OPCODE,CGEN_IBASE): New types.
1088 (CGEN_INSN): Rewrite.
1089 (CGEN_{ASM,DIS}_HASH*): Delete.
1090 (init_opcode_table,init_ibld_table): Declare.
1091 (CGEN_INSN_ATTR): New type.
1092
1093Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1094
252b5132
RH
1095 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1096 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1097 Change *Suf definitions to include x and d suffixes.
1098 (movsx): Use w_Suf and b_Suf.
1099 (movzx): Likewise.
1100 (movs): Use bwld_Suf.
1101 (fld): Change ordering. Use sld_FP.
1102 (fild): Add Intel Syntax equivalent of fildq.
1103 (fst): Use sld_FP.
1104 (fist): Use sld_FP.
1105 (fstp): Use sld_FP. Add x_FP version.
1106 (fistp): LLongMem version for Intel Syntax.
1107 (fcom, fcomp): Use sld_FP.
1108 (fadd, fiadd, fsub): Use sld_FP.
1109 (fsubr): Use sld_FP.
1110 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1111
11121999-01-27 Doug Evans <devans@casey.cygnus.com>
1113
1114 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1115 CGEN_MODE_UINT.
1116
e135f41b 11171999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1118
1119 * hppa.h (bv): Fix mask.
1120
11211999-01-05 Doug Evans <devans@casey.cygnus.com>
1122
1123 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1124 (CGEN_ATTR): Use it.
1125 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1126 (CGEN_ATTR_TABLE): New member dfault.
1127
11281998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1129
1130 * mips.h (MIPS16_INSN_BRANCH): New.
1131
1132Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1133
1134 The following is part of a change made by Edith Epstein
d83c6548
AJ
1135 <eepstein@sophia.cygnus.com> as part of a project to merge in
1136 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1137
1138 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1139 after.
252b5132
RH
1140
1141Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1142
1143 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1144 status word instructions.
252b5132
RH
1145
11461998-11-30 Doug Evans <devans@casey.cygnus.com>
1147
1148 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1149 (struct cgen_keyword_entry): Ditto.
1150 (struct cgen_operand): Ditto.
1151 (CGEN_IFLD): New typedef, with associated access macros.
1152 (CGEN_IFMT): New typedef, with associated access macros.
1153 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1154 (CGEN_IVALUE): New typedef.
1155 (struct cgen_insn): Delete const on syntax,attrs members.
1156 `format' now points to format data. Type of `value' is now
1157 CGEN_IVALUE.
1158 (struct cgen_opcode_table): New member ifld_table.
1159
11601998-11-18 Doug Evans <devans@casey.cygnus.com>
1161
1162 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1163 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1164 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1165 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1166 (cgen_opcode_table): Update type of dis_hash fn.
1167 (extract_operand): Update type of `insn_value' arg.
1168
1169Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1170
1171 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1172
1173Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1174
1175 * mips.h (INSN_MULT): Added.
1176
1177Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1178
1179 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1180
1181Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1182
1183 * cgen.h (CGEN_INSN_INT): New typedef.
1184 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1185 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1186 (CGEN_INSN_BYTES_PTR): New typedef.
1187 (CGEN_EXTRACT_INFO): New typedef.
1188 (cgen_insert_fn,cgen_extract_fn): Update.
1189 (cgen_opcode_table): New member `insn_endian'.
1190 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1191 (insert_operand,extract_operand): Update.
1192 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1193
1194Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1195
1196 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1197 (struct CGEN_HW_ENTRY): New member `attrs'.
1198 (CGEN_HW_ATTR): New macro.
1199 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1200 (CGEN_INSN_INVALID_P): New macro.
1201
1202Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1203
1204 * hppa.h: Add "fid".
d83c6548 1205
252b5132
RH
1206Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1207
1208 From Robert Andrew Dale <rob@nb.net>
1209 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1210 (AMD_3DNOW_OPCODE): Define.
1211
1212Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1213
1214 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1215
1216Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1217
1218 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1219
1220Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1221
1222 Move all global state data into opcode table struct, and treat
1223 opcode table as something that is "opened/closed".
1224 * cgen.h (CGEN_OPCODE_DESC): New type.
1225 (all fns): New first arg of opcode table descriptor.
1226 (cgen_set_parse_operand_fn): Add prototype.
1227 (cgen_current_machine,cgen_current_endian): Delete.
1228 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1229 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1230 dis_hash_table,dis_hash_table_entries.
1231 (opcode_open,opcode_close): Add prototypes.
1232
1233 * cgen.h (cgen_insn): New element `cdx'.
1234
1235Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1236
1237 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1238
1239Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1240
1241 * mn10300.h: Add "no_match_operands" field for instructions.
1242 (MN10300_MAX_OPERANDS): Define.
1243
1244Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1245
1246 * cgen.h (cgen_macro_insn_count): Declare.
1247
1248Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1249
1250 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1251 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1252 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1253 set_{int,vma}_operand.
1254
1255Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1256
1257 * mn10300.h: Add "machine" field for instructions.
1258 (MN103, AM30): Define machine types.
d83c6548 1259
252b5132
RH
1260Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1261
1262 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1263
12641998-06-18 Ulrich Drepper <drepper@cygnus.com>
1265
1266 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1267
1268Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1269
1270 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1271 and ud2b.
1272 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1273 those that happen to be implemented on pentiums.
1274
1275Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1276
1277 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1278 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1279 with Size16|IgnoreSize or Size32|IgnoreSize.
1280
1281Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1282
1283 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1284 (REPE): Rename to REPE_PREFIX_OPCODE.
1285 (i386_regtab_end): Remove.
1286 (i386_prefixtab, i386_prefixtab_end): Remove.
1287 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1288 of md_begin.
1289 (MAX_OPCODE_SIZE): Define.
1290 (i386_optab_end): Remove.
1291 (sl_Suf): Define.
1292 (sl_FP): Use sl_Suf.
1293
1294 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1295 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1296 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1297 data32, dword, and adword prefixes.
1298 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1299 regs.
1300
1301Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1302
1303 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1304
1305 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1306 register operands, because this is a common idiom. Flag them with
1307 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1308 fdivrp because gcc erroneously generates them. Also flag with a
1309 warning.
1310
1311 * i386.h: Add suffix modifiers to most insns, and tighter operand
1312 checks in some cases. Fix a number of UnixWare compatibility
1313 issues with float insns. Merge some floating point opcodes, using
1314 new FloatMF modifier.
1315 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1316 consistency.
1317
1318 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1319 IgnoreDataSize where appropriate.
1320
1321Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1322
1323 * i386.h: (one_byte_segment_defaults): Remove.
1324 (two_byte_segment_defaults): Remove.
1325 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1326
1327Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1328
1329 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1330 (cgen_hw_lookup_by_num): Declare.
1331
1332Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1333
1334 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1335 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1336
1337Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1338
1339 * cgen.h (cgen_asm_init_parse): Delete.
1340 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1341 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1342
1343Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1344
1345 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1346 (cgen_asm_finish_insn): Update prototype.
1347 (cgen_insn): New members num, data.
1348 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1349 dis_hash, dis_hash_table_size moved to ...
1350 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1351 All uses updated. New members asm_hash_p, dis_hash_p.
1352 (CGEN_MINSN_EXPANSION): New struct.
1353 (cgen_expand_macro_insn): Declare.
1354 (cgen_macro_insn_count): Declare.
1355 (get_insn_operands): Update prototype.
1356 (lookup_get_insn_operands): Declare.
1357
1358Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1359
1360 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1361 regKludge. Add operands types for string instructions.
1362
1363Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1364
1365 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1366 table.
1367
1368Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1369
1370 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1371 for `gettext'.
1372
1373Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1374
1375 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1376 Add IsString flag to string instructions.
1377 (IS_STRING): Don't define.
1378 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1379 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1380 (SS_PREFIX_OPCODE): Define.
1381
1382Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1383
1384 * i386.h: Revert March 24 patch; no more LinearAddress.
1385
1386Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1387
1388 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1389 instructions, and instead add FWait opcode modifier. Add short
1390 form of fldenv and fstenv.
1391 (FWAIT_OPCODE): Define.
1392
1393 * i386.h (i386_optab): Change second operand constraint of `mov
1394 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1395 allow legal instructions such as `movl %gs,%esi'
1396
1397Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1398
1399 * h8300.h: Various changes to fully bracket initializers.
1400
1401Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1402
1403 * i386.h: Set LinearAddress for lidt and lgdt.
1404
1405Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1406
1407 * cgen.h (CGEN_BOOL_ATTR): New macro.
1408
1409Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1410
1411 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1412
1413Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1414
1415 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1416 (cgen_insn): Record syntax and format entries here, rather than
1417 separately.
1418
1419Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1420
1421 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1422
1423Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1424
1425 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1426 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1427 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1428
1429Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1430
1431 * cgen.h (lookup_insn): New argument alias_p.
1432
1433Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1434
1435Fix rac to accept only a0:
1436 * d10v.h (OPERAND_ACC): Split into:
1437 (OPERAND_ACC0, OPERAND_ACC1) .
1438 (OPERAND_GPR): Define.
1439
1440Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1441
1442 * cgen.h (CGEN_FIELDS): Define here.
1443 (CGEN_HW_ENTRY): New member `type'.
1444 (hw_list): Delete decl.
1445 (enum cgen_mode): Declare.
1446 (CGEN_OPERAND): New member `hw'.
1447 (enum cgen_operand_instance_type): Declare.
1448 (CGEN_OPERAND_INSTANCE): New type.
1449 (CGEN_INSN): New member `operands'.
1450 (CGEN_OPCODE_DATA): Make hw_list const.
1451 (get_insn_operands,lookup_insn): Add prototypes for.
1452
1453Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1454
1455 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1456 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1457 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1458 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1459
1460Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1461
1462 * cgen.h: Correct typo in comment end marker.
1463
1464Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1465
1466 * tic30.h: New file.
1467
5a109b67 1468Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1469
1470 * cgen.h: Add prototypes for cgen_save_fixups(),
1471 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1472 of cgen_asm_finish_insn() to return a char *.
1473
1474Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1475
1476 * cgen.h: Formatting changes to improve readability.
1477
1478Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1479
1480 * cgen.h (*): Clean up pass over `struct foo' usage.
1481 (CGEN_ATTR): Make unsigned char.
1482 (CGEN_ATTR_TYPE): Update.
1483 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1484 (cgen_base): Move member `attrs' to cgen_insn.
1485 (CGEN_KEYWORD): New member `null_entry'.
1486 (CGEN_{SYNTAX,FORMAT}): New types.
1487 (cgen_insn): Format and syntax separated from each other.
1488
1489Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1490
1491 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1492 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1493 flags_{used,set} long.
1494 (d30v_operand): Make flags field long.
1495
1496Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1497
1498 * m68k.h: Fix comment describing operand types.
1499
1500Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1501
1502 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1503 everything else after down.
1504
1505Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1506
1507 * d10v.h (OPERAND_FLAG): Split into:
1508 (OPERAND_FFLAG, OPERAND_CFLAG) .
1509
1510Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1511
1512 * mips.h (struct mips_opcode): Changed comments to reflect new
1513 field usage.
1514
1515Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1516
1517 * mips.h: Added to comments a quick-ref list of all assigned
1518 operand type characters.
1519 (OP_{MASK,SH}_PERFREG): New macros.
1520
1521Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1522
1523 * sparc.h: Add '_' and '/' for v9a asr's.
1524 Patch from David Miller <davem@vger.rutgers.edu>
1525
1526Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1527
1528 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1529 area are not available in the base model (H8/300).
1530
1531Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1532
1533 * m68k.h: Remove documentation of ` operand specifier.
1534
1535Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * m68k.h: Document q and v operand specifiers.
1538
1539Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1540
1541 * v850.h (struct v850_opcode): Add processors field.
1542 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1543 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1544 (PROCESSOR_V850EA): New bit constants.
1545
1546Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1547
1548 Merge changes from Martin Hunt:
1549
1550 * d30v.h: Allow up to 64 control registers. Add
1551 SHORT_A5S format.
1552
1553 * d30v.h (LONG_Db): New form for delayed branches.
1554
1555 * d30v.h: (LONG_Db): New form for repeati.
1556
1557 * d30v.h (SHORT_D2B): New form.
1558
1559 * d30v.h (SHORT_A2): New form.
1560
1561 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1562 registers are used. Needed for VLIW optimization.
1563
1564Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1565
1566 * cgen.h: Move assembler interface section
1567 up so cgen_parse_operand_result is defined for cgen_parse_address.
1568 (cgen_parse_address): Update prototype.
1569
1570Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1571
1572 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1573
1574Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1575
1576 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1577 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1578 <paubert@iram.es>.
1579
1580 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1581 <paubert@iram.es>.
1582
1583 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1584 <paubert@iram.es>.
1585
1586 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1587 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1588
1589Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1590
1591 * v850.h (V850_NOT_R0): New flag.
1592
1593Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1594
1595 * v850.h (struct v850_opcode): Remove flags field.
1596
1597Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1598
1599 * v850.h (struct v850_opcode): Add flags field.
1600 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1601 fields.
1602 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1603 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1604
1605Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1606
1607 * arc.h: New file.
1608
1609Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1610
1611 * sparc.h (sparc_opcodes): Declare as const.
1612
1613Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1614
1615 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1616 uses single or double precision floating point resources.
1617 (INSN_NO_ISA, INSN_ISA1): Define.
1618 (cpu specific INSN macros): Tweak into bitmasks outside the range
1619 of INSN_ISA field.
1620
1621Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1622
1623 * i386.h: Fix pand opcode.
1624
1625Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1626
1627 * mips.h: Widen INSN_ISA and move it to a more convenient
1628 bit position. Add INSN_3900.
1629
1630Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1631
1632 * mips.h (struct mips_opcode): added new field membership.
1633
1634Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1635
1636 * i386.h (movd): only Reg32 is allowed.
1637
1638 * i386.h: add fcomp and ud2. From Wayne Scott
1639 <wscott@ichips.intel.com>.
1640
1641Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1642
1643 * i386.h: Add MMX instructions.
1644
1645Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1646
1647 * i386.h: Remove W modifier from conditional move instructions.
1648
1649Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1650
1651 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1652 with no arguments to match that generated by the UnixWare
1653 assembler.
1654
1655Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1656
1657 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1658 (cgen_parse_operand_fn): Declare.
1659 (cgen_init_parse_operand): Declare.
1660 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1661 new argument `want'.
1662 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1663 (enum cgen_parse_operand_type): New enum.
1664
1665Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1666
1667 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1668
1669Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1670
1671 * cgen.h: New file.
1672
1673Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1674
1675 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1676 fdivrp.
1677
1678Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1679
1680 * v850.h (extract): Make unsigned.
1681
1682Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1683
1684 * i386.h: Add iclr.
1685
1686Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1687
1688 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1689 take a direction bit.
1690
1691Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1692
1693 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1694
1695Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1696
1697 * sparc.h: Include <ansidecl.h>. Update function declarations to
1698 use prototypes, and to use const when appropriate.
1699
1700Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1701
1702 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1703
1704Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1705
1706 * d10v.h: Change pre_defined_registers to
1707 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1708
1709Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1710
1711 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1712 Change mips_opcodes from const array to a pointer,
1713 and change bfd_mips_num_opcodes from const int to int,
1714 so that we can increase the size of the mips opcodes table
1715 dynamically.
1716
1717Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1718
1719 * d30v.h (FLAG_X): Remove unused flag.
1720
1721Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1722
1723 * d30v.h: New file.
1724
1725Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1726
1727 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1728 (PDS_VALUE): Macro to access value field of predefined symbols.
1729 (tic80_next_predefined_symbol): Add prototype.
1730
1731Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1732
1733 * tic80.h (tic80_symbol_to_value): Change prototype to match
1734 change in function, added class parameter.
1735
1736Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1737
1738 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1739 endmask fields, which are somewhat weird in that 0 and 32 are
1740 treated exactly the same.
1741
1742Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1743
1744 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1745 rather than a constant that is 2**X. Reorder them to put bits for
1746 operands that have symbolic names in the upper bits, so they can
1747 be packed into an int where the lower bits contain the value that
1748 corresponds to that symbolic name.
1749 (predefined_symbo): Add struct.
1750 (tic80_predefined_symbols): Declare array of translations.
1751 (tic80_num_predefined_symbols): Declare size of that array.
1752 (tic80_value_to_symbol): Declare function.
1753 (tic80_symbol_to_value): Declare function.
1754
1755Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1756
1757 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1758
1759Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1760
1761 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1762 be the destination register.
1763
1764Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1765
1766 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1767 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1768 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1769 that the opcode can have two vector instructions in a single
1770 32 bit word and we have to encode/decode both.
1771
1772Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1773
1774 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1775 TIC80_OPERAND_RELATIVE for PC relative.
1776 (TIC80_OPERAND_BASEREL): New flag bit for register
1777 base relative.
1778
1779Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1780
1781 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1782
1783Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1784
1785 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1786 ":s" modifier for scaling.
1787
1788Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1789
1790 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1791 (TIC80_OPERAND_M_LI): Ditto
1792
1793Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1794
1795 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1796 (TIC80_OPERAND_CC): New define for condition code operand.
1797 (TIC80_OPERAND_CR): New define for control register operand.
1798
1799Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1800
1801 * tic80.h (struct tic80_opcode): Name changed.
1802 (struct tic80_opcode): Remove format field.
1803 (struct tic80_operand): Add insertion and extraction functions.
1804 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1805 correct ones.
1806 (FMT_*): Ditto.
1807
1808Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1809
1810 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1811 type IV instruction offsets.
1812
1813Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1814
1815 * tic80.h: New file.
1816
1817Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1818
1819 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1820
1821Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1822
1823 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1824 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1825 * v850.h: Fix comment, v850_operand not powerpc_operand.
1826
1827Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1828
1829 * mn10200.h: Flesh out structures and definitions needed by
1830 the mn10200 assembler & disassembler.
1831
1832Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1833
1834 * mips.h: Add mips16 definitions.
1835
1836Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1837
1838 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1839
1840Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1841
1842 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1843 (MN10300_OPERAND_MEMADDR): Define.
1844
1845Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1846
1847 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1848
1849Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1850
1851 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1852
1853Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1854
1855 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1856
1857Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1858
1859 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1860
1861Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1862
1863 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1864 negative to minimize problems with shared libraries. Organize
1865 instruction subsets by AMASK extensions and PALcode
1866 implementation.
252b5132
RH
1867 (struct alpha_operand): Move flags slot for better packing.
1868
1869Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1870
1871 * v850.h (V850_OPERAND_RELAX): New operand flag.
1872
1873Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1874
1875 * mn10300.h (FMT_*): Move operand format definitions
1876 here.
1877
1878Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1879
1880 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1881
1882Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1883
1884 * mn10300.h (mn10300_opcode): Add "format" field.
1885 (MN10300_OPERAND_*): Define.
1886
1887Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1888
1889 * mn10x00.h: Delete.
1890 * mn10200.h, mn10300.h: New files.
1891
1892Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1893
1894 * mn10x00.h: New file.
1895
1896Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1897
1898 * v850.h: Add new flag to indicate this instruction uses a PC
1899 displacement.
1900
1901Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1902
1903 * h8300.h (stmac): Add missing instruction.
1904
1905Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1906
1907 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1908 field.
1909
1910Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1911
1912 * v850.h (V850_OPERAND_EP): Define.
1913
1914 * v850.h (v850_opcode): Add size field.
1915
1916Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1917
1918 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1919 to functions used to handle unusual operand encoding.
252b5132 1920 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1921 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1922
1923Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1924
1925 * v850.h (v850_operands): Add flags field.
1926 (OPERAND_REG, OPERAND_NUM): Defined.
1927
1928Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1929
1930 * v850.h: New file.
1931
1932Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1933
1934 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1935 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1936 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1937 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1938 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1939 Defined.
252b5132
RH
1940
1941Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1942
1943 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1944 a 3 bit space id instead of a 2 bit space id.
1945
1946Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1947
1948 * d10v.h: Add some additional defines to support the
d83c6548 1949 assembler in determining which operations can be done in parallel.
252b5132
RH
1950
1951Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1952
1953 * h8300.h (SN): Define.
1954 (eepmov.b): Renamed from "eepmov"
1955 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1956 with them.
1957
1958Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1959
1960 * d10v.h (OPERAND_SHIFT): New operand flag.
1961
1962Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1963
1964 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1965 signed numbers.
252b5132
RH
1966
1967Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1968
1969 * d10v.h (pd_reg): Define. Putting the definition here allows
1970 the assembler and disassembler to share the same struct.
1971
1972Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1973
1974 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1975 Williams <steve@icarus.com>.
1976
1977Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1978
1979 * d10v.h: New file.
1980
1981Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1982
1983 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1984
1985Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1986
d83c6548 1987 * m68k.h (mcf5200): New macro.
252b5132
RH
1988 Document names of coldfire control registers.
1989
1990Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1991
1992 * h8300.h (SRC_IN_DST): Define.
1993
1994 * h8300.h (UNOP3): Mark the register operand in this insn
1995 as a source operand, not a destination operand.
1996 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1997 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1998 register operand with SRC_IN_DST.
1999
2000Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2001
2002 * alpha.h: New file.
2003
2004Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2005
2006 * rs6k.h: Remove obsolete file.
2007
2008Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2009
2010 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2011 fdivp, and fdivrp. Add ffreep.
2012
2013Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2014
2015 * h8300.h: Reorder various #defines for readability.
2016 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2017 (BITOP): Accept additional (unused) argument. All callers changed.
2018 (EBITOP): Likewise.
2019 (O_LAST): Bump.
2020 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2021
2022 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2023 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2024 (BITOP, EBITOP): Handle new H8/S addressing modes for
2025 bit insns.
2026 (UNOP3): Handle new shift/rotate insns on the H8/S.
2027 (insns using exr): New instructions.
2028 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2029
2030Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2031
2032 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2033 was incorrect.
2034
2035Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2036
2037 * h8300.h (START): Remove.
2038 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2039 and mov.l insns that can be relaxed.
2040
2041Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2042
2043 * i386.h: Remove Abs32 from lcall.
2044
2045Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2046
2047 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2048 (SLCPOP): New macro.
2049 Mark X,Y opcode letters as in use.
2050
2051Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2052
2053 * sparc.h (F_FLOAT, F_FBR): Define.
2054
2055Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2056
2057 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2058 from all insns.
2059 (ABS8SRC,ABS8DST): Add ABS8MEM.
2060 (add.l): Fix reg+reg variant.
2061 (eepmov.w): Renamed from eepmovw.
2062 (ldc,stc): Fix many cases.
2063
2064Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2065
2066 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2067
2068Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2069
2070 * sparc.h (O): Mark operand letter as in use.
2071
2072Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2073
2074 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2075 Mark operand letters uU as in use.
2076
2077Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2078
2079 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2080 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2081 (SPARC_OPCODE_SUPPORTED): New macro.
2082 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2083 (F_NOTV9): Delete.
2084
2085Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2086
2087 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2088 declaration consistent with return type in definition.
2089
2090Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2091
2092 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2093
2094Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2095
2096 * i386.h (i386_regtab): Add 80486 test registers.
2097
2098Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2099
2100 * i960.h (I_HX): Define.
2101 (i960_opcodes): Add HX instruction.
2102
2103Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2104
2105 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2106 and fclex.
2107
2108Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2109
2110 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2111 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2112 (bfd_* defines): Delete.
2113 (sparc_opcode_archs): Replaces architecture_pname.
2114 (sparc_opcode_lookup_arch): Declare.
2115 (NUMOPCODES): Delete.
2116
2117Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2118
2119 * sparc.h (enum sparc_architecture): Add v9a.
2120 (ARCHITECTURES_CONFLICT_P): Update.
2121
2122Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2123
2124 * i386.h: Added Pentium Pro instructions.
2125
2126Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2127
2128 * m68k.h: Document new 'W' operand place.
2129
2130Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2131
2132 * hppa.h: Add lci and syncdma instructions.
2133
2134Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2135
2136 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2137 instructions.
252b5132
RH
2138
2139Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2140
2141 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2142 assembler's -mcom and -many switches.
2143
2144Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2145
2146 * i386.h: Fix cmpxchg8b extension opcode description.
2147
2148Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2149
2150 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2151 and register cr4.
2152
2153Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2154
2155 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2156
2157Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2158
2159 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2160
2161Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2162
2163 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2164
2165Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2166
2167 * m68kmri.h: Remove.
2168
2169 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2170 declarations. Remove F_ALIAS and flag field of struct
2171 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2172 int. Make name and args fields of struct m68k_opcode const.
2173
2174Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2175
2176 * sparc.h (F_NOTV9): Define.
2177
2178Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2179
2180 * mips.h (INSN_4010): Define.
2181
2182Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2183
2184 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2185
2186 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2187 * m68k.h: Fix argument descriptions of coprocessor
2188 instructions to allow only alterable operands where appropriate.
2189 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2190 (m68k_opcode_aliases): Add more aliases.
2191
2192Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2193
2194 * m68k.h: Added explcitly short-sized conditional branches, and a
2195 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2196 svr4-based configurations.
2197
2198Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2199
2200 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2201 * i386.h: added missing Data16/Data32 flags to a few instructions.
2202
2203Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2204
2205 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2206 (OP_MASK_BCC, OP_SH_BCC): Define.
2207 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2208 (OP_MASK_CCC, OP_SH_CCC): Define.
2209 (INSN_READ_FPR_R): Define.
2210 (INSN_RFE): Delete.
2211
2212Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2213
2214 * m68k.h (enum m68k_architecture): Deleted.
2215 (struct m68k_opcode_alias): New type.
2216 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2217 matching constraints, values and flags. As a side effect of this,
2218 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2219 as I know were never used, now may need re-examining.
2220 (numopcodes): Now const.
2221 (m68k_opcode_aliases, numaliases): New variables.
2222 (endop): Deleted.
2223 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2224 m68k_opcode_aliases; update declaration of m68k_opcodes.
2225
2226Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2227
2228 * hppa.h (delay_type): Delete unused enumeration.
2229 (pa_opcode): Replace unused delayed field with an architecture
2230 field.
2231 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2232
2233Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2234
2235 * mips.h (INSN_ISA4): Define.
2236
2237Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2238
2239 * mips.h (M_DLA_AB, M_DLI): Define.
2240
2241Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2242
2243 * hppa.h (fstwx): Fix single-bit error.
2244
2245Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2246
2247 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2248
2249Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2250
2251 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2252 debug registers. From Charles Hannum (mycroft@netbsd.org).
2253
2254Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2255
2256 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2257 i386 support:
2258 * i386.h (MOV_AX_DISP32): New macro.
2259 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2260 of several call/return instructions.
2261 (ADDR_PREFIX_OPCODE): New macro.
2262
2263Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2264
2265 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2266
4f1d9bd8
NC
2267 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2268 char.
252b5132
RH
2269 (struct vot, field `name'): ditto.
2270
2271Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2272
2273 * vax.h: Supply and properly group all values in end sentinel.
2274
2275Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2276
2277 * mips.h (INSN_ISA, INSN_4650): Define.
2278
2279Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2280
2281 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2282 systems with a separate instruction and data cache, such as the
2283 29040, these instructions take an optional argument.
2284
2285Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2286
2287 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2288 INSN_TRAP.
2289
2290Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2291
2292 * mips.h (INSN_STORE_MEMORY): Define.
2293
2294Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2295
2296 * sparc.h: Document new operand type 'x'.
2297
2298Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2299
2300 * i960.h (I_CX2): New instruction category. It includes
2301 instructions available on Cx and Jx processors.
2302 (I_JX): New instruction category, for JX-only instructions.
2303 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2304 Jx-only instructions, in I_JX category.
2305
2306Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2307
2308 * ns32k.h (endop): Made pointer const too.
2309
2310Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2311
2312 * ns32k.h: Drop Q operand type as there is no correct use
2313 for it. Add I and Z operand types which allow better checking.
2314
2315Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2316
2317 * h8300.h (xor.l) :fix bit pattern.
2318 (L_2): New size of operand.
2319 (trapa): Use it.
2320
2321Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2322
2323 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2324
2325Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2326
2327 * sparc.h: Include v9 definitions.
2328
2329Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2330
2331 * m68k.h (m68060): Defined.
2332 (m68040up, mfloat, mmmu): Include it.
2333 (struct m68k_opcode): Widen `arch' field.
2334 (m68k_opcodes): Updated for M68060. Removed comments that were
2335 instructions commented out by "JF" years ago.
2336
2337Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2338
2339 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2340 add a one-bit `flags' field.
2341 (F_ALIAS): New macro.
2342
2343Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2344
2345 * h8300.h (dec, inc): Get encoding right.
2346
2347Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2348
2349 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2350 a flag instead.
2351 (PPC_OPERAND_SIGNED): Define.
2352 (PPC_OPERAND_SIGNOPT): Define.
2353
2354Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2355
2356 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2357 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2358
2359Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2360
2361 * i386.h: Reverse last change. It'll be handled in gas instead.
2362
2363Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2364
2365 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2366 slower on the 486 and used the implicit shift count despite the
2367 explicit operand. The one-operand form is still available to get
2368 the shorter form with the implicit shift count.
2369
2370Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2371
2372 * hppa.h: Fix typo in fstws arg string.
2373
2374Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2375
2376 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2377
2378Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2379
2380 * ppc.h (PPC_OPCODE_601): Define.
2381
2382Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2383
2384 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2385 (so we can determine valid completers for both addb and addb[tf].)
2386
2387 * hppa.h (xmpyu): No floating point format specifier for the
2388 xmpyu instruction.
2389
2390Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2391
2392 * ppc.h (PPC_OPERAND_NEXT): Define.
2393 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2394 (struct powerpc_macro): Define.
2395 (powerpc_macros, powerpc_num_macros): Declare.
2396
2397Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2398
2399 * ppc.h: New file. Header file for PowerPC opcode table.
2400
2401Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2402
2403 * hppa.h: More minor template fixes for sfu and copr (to allow
2404 for easier disassembly).
2405
2406 * hppa.h: Fix templates for all the sfu and copr instructions.
2407
2408Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2409
2410 * i386.h (push): Permit Imm16 operand too.
2411
2412Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2413
2414 * h8300.h (andc): Exists in base arch.
2415
2416Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2417
2418 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2419 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2420
2421Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2422
2423 * hppa.h: Add FP quadword store instructions.
2424
2425Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2426
2427 * mips.h: (M_J_A): Added.
2428 (M_LA): Removed.
2429
2430Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2431
2432 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2433 <mellon@pepper.ncd.com>.
2434
2435Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2436
2437 * hppa.h: Immediate field in probei instructions is unsigned,
2438 not low-sign extended.
2439
2440Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2441
2442 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2443
2444Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2445
2446 * i386.h: Add "fxch" without operand.
2447
2448Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2449
2450 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2451
2452Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2453
2454 * hppa.h: Add gfw and gfr to the opcode table.
2455
2456Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2457
2458 * m88k.h: extended to handle m88110.
2459
2460Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2461
2462 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2463 addresses.
2464
2465Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2466
2467 * i960.h (i960_opcodes): Properly bracket initializers.
2468
2469Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2470
2471 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2472
2473Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2474
2475 * m68k.h (two): Protect second argument with parentheses.
2476
2477Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2478
2479 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2480 Deleted old in/out instructions in "#if 0" section.
2481
2482Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2483
2484 * i386.h (i386_optab): Properly bracket initializers.
2485
2486Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2487
2488 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2489 Jeff Law, law@cs.utah.edu).
2490
2491Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2492
2493 * i386.h (lcall): Accept Imm32 operand also.
2494
2495Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2496
2497 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2498 (M_DABS): Added.
2499
2500Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2501
2502 * mips.h (INSN_*): Changed values. Removed unused definitions.
2503 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2504 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2505 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2506 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2507 (M_*): Added new values for r6000 and r4000 macros.
2508 (ANY_DELAY): Removed.
2509
2510Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2511
2512 * mips.h: Added M_LI_S and M_LI_SS.
2513
2514Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2515
2516 * h8300.h: Get some rare mov.bs correct.
2517
2518Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2519
2520 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2521 been included.
2522
2523Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2524
2525 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2526 jump instructions, for use in disassemblers.
2527
2528Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2529
2530 * m88k.h: Make bitfields just unsigned, not unsigned long or
2531 unsigned short.
2532
2533Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2534
2535 * hppa.h: New argument type 'y'. Use in various float instructions.
2536
2537Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2538
2539 * hppa.h (break): First immediate field is unsigned.
2540
2541 * hppa.h: Add rfir instruction.
2542
2543Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2544
2545 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2546
2547Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2548
2549 * mips.h: Reworked the hazard information somewhat, and fixed some
2550 bugs in the instruction hazard descriptions.
2551
2552Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2553
2554 * m88k.h: Corrected a couple of opcodes.
2555
2556Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2557
2558 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2559 new version includes instruction hazard information, but is
2560 otherwise reasonably similar.
2561
2562Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2563
2564 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2565
2566Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2567
2568 Patches from Jeff Law, law@cs.utah.edu:
2569 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2570 Make the tables be the same for the following instructions:
2571 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2572 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2573 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2574 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2575 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2576 "fcmp", and "ftest".
2577
2578 * hppa.h: Make new and old tables the same for "break", "mtctl",
2579 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2580 Fix typo in last patch. Collapse several #ifdefs into a
2581 single #ifdef.
2582
2583 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2584 of the comments up-to-date.
2585
2586 * hppa.h: Update "free list" of letters and update
2587 comments describing each letter's function.
2588
4f1d9bd8
NC
2589Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2590
2591 * h8300.h: Lots of little fixes for the h8/300h.
2592
2593Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2594
2595 Support for H8/300-H
2596 * h8300.h: Lots of new opcodes.
2597
252b5132
RH
2598Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2599
2600 * h8300.h: checkpoint, includes H8/300-H opcodes.
2601
2602Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2603
2604 * Patches from Jeffrey Law <law@cs.utah.edu>.
2605 * hppa.h: Rework single precision FP
2606 instructions so that they correctly disassemble code
2607 PA1.1 code.
2608
2609Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2610
2611 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2612 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2613
2614Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2615
2616 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2617 gdb will define it for now.
2618
2619Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2620
2621 * sparc.h: Don't end enumerator list with comma.
2622
2623Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2624
2625 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2626 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2627 ("bc2t"): Correct typo.
2628 ("[ls]wc[023]"): Use T rather than t.
2629 ("c[0123]"): Define general coprocessor instructions.
2630
2631Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2632
2633 * m68k.h: Move split point for gcc compilation more towards
2634 middle.
2635
2636Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2637
2638 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2639 simply wrong, ics, rfi, & rfsvc were missing).
2640 Add "a" to opr_ext for "bb". Doc fix.
2641
2642Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2643
2644 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2645 * mips.h: Add casts, to suppress warnings about shifting too much.
2646 * m68k.h: Document the placement code '9'.
2647
2648Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2649
2650 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2651 allows callers to break up the large initialized struct full of
2652 opcodes into two half-sized ones. This permits GCC to compile
2653 this module, since it takes exponential space for initializers.
2654 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2655
2656Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2657
2658 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2659 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2660 initialized structs in it.
2661
2662Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2663
2664 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2665 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2666 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2667
2668Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2669
2670 * mips.h: document "i" and "j" operands correctly.
2671
2672Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2673
2674 * mips.h: Removed endianness dependency.
2675
2676Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2677
2678 * h8300.h: include info on number of cycles per instruction.
2679
2680Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2681
2682 * hppa.h: Move handy aliases to the front. Fix masks for extract
2683 and deposit instructions.
2684
2685Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2686
2687 * i386.h: accept shld and shrd both with and without the shift
2688 count argument, which is always %cl.
2689
2690Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2691
2692 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2693 (one_byte_segment_defaults, two_byte_segment_defaults,
2694 i386_prefixtab_end): Ditto.
2695
2696Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2697
2698 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2699 for operand 2; from John Carr, jfc@dsg.dec.com.
2700
2701Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2702
2703 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2704 always use 16-bit offsets. Makes calculated-size jump tables
2705 feasible.
2706
2707Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2708
2709 * i386.h: Fix one-operand forms of in* and out* patterns.
2710
2711Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2712
2713 * m68k.h: Added CPU32 support.
2714
2715Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2716
2717 * mips.h (break): Disassemble the argument. Patch from
2718 jonathan@cs.stanford.edu (Jonathan Stone).
2719
2720Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2721
2722 * m68k.h: merged Motorola and MIT syntax.
2723
2724Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2725
2726 * m68k.h (pmove): make the tests less strict, the 68k book is
2727 wrong.
2728
2729Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2730
2731 * m68k.h (m68ec030): Defined as alias for 68030.
2732 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2733 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2734 them. Tightened description of "fmovex" to distinguish it from
2735 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2736 up descriptions that claimed versions were available for chips not
2737 supporting them. Added "pmovefd".
2738
2739Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2740
2741 * m68k.h: fix where the . goes in divull
2742
2743Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2744
2745 * m68k.h: the cas2 instruction is supposed to be written with
2746 indirection on the last two operands, which can be either data or
2747 address registers. Added a new operand type 'r' which accepts
2748 either register type. Added new cases for cas2l and cas2w which
2749 use them. Corrected masks for cas2 which failed to recognize use
2750 of address register.
2751
2752Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2753
2754 * m68k.h: Merged in patches (mostly m68040-specific) from
2755 Colin Smith <colin@wrs.com>.
2756
2757 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2758 base). Also cleaned up duplicates, re-ordered instructions for
2759 the sake of dis-assembling (so aliases come after standard names).
2760 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2761
2762Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2763
2764 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2765 all missing .s
2766
2767Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2768
2769 * sparc.h: Moved tables to BFD library.
2770
2771 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2772
2773Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2774
2775 * h8300.h: Finish filling in all the holes in the opcode table,
2776 so that the Lucid C compiler can digest this as well...
2777
2778Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2779
2780 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2781 Fix opcodes on various sizes of fild/fist instructions
2782 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2783 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2784
2785Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2786
2787 * h8300.h: Fill in all the holes in the opcode table so that the
2788 losing HPUX C compiler can digest this...
2789
2790Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2791
2792 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2793 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2794
2795Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2796
2797 * sparc.h: Add new architecture variant sparclite; add its scan
2798 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2799
2800Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2801
2802 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2803 fy@lucid.com).
2804
2805Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2806
2807 * rs6k.h: New version from IBM (Metin).
2808
2809Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2810
2811 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2812 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2813
2814Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2815
2816 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2817
2818Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2819
2820 * m68k.h (one, two): Cast macro args to unsigned to suppress
2821 complaints from compiler and lint about integer overflow during
2822 shift.
2823
2824Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2825
2826 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2827
2828Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2829
2830 * mips.h: Make bitfield layout depend on the HOST compiler,
2831 not on the TARGET system.
2832
2833Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2834
2835 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2836 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2837 <TRANLE@INTELLICORP.COM>.
2838
2839Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2840
2841 * h8300.h: turned op_type enum into #define list
2842
2843Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2844
2845 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2846 similar instructions -- they've been renamed to "fitoq", etc.
2847 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2848 number of arguments.
2849 * h8300.h: Remove extra ; which produces compiler warning.
2850
2851Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2852
2853 * sparc.h: fix opcode for tsubcctv.
2854
2855Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2856
2857 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2858
2859Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2860
2861 * sparc.h (nop): Made the 'lose' field be even tighter,
2862 so only a standard 'nop' is disassembled as a nop.
2863
2864Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2865
2866 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2867 disassembled as a nop.
2868
4f1d9bd8
NC
2869Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2870
2871 * m68k.h, sparc.h: ANSIfy enums.
2872
252b5132
RH
2873Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2874
2875 * sparc.h: fix a typo.
2876
2877Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2878
2879 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2880 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2881 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2882
2883\f
2884Local Variables:
2885version-control: never
2886End:
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