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Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR port.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
65aa24b6
NC		 12000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
2
3 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
4 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
5 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
6 (AVR_ISA_M83): Define for ATmega83, ATmega85.
7 (espm): Remove, because ESPM removed in databook update.
8 (eicall, eijmp): Move to the end of opcode table.
9
60bcf0fa
NC		 102000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
11
12 * m68hc11.h: New file for support of Motorola 68hc11.
13
60a2978a
DC		 14Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
15
16 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
17
68ab2dd9
DC		 18Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
19
20 * avr.h: New file with AVR opcodes.
21
f0662e27
DL		 22Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
23
24 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
25
b722f2be
AM		 262000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
27
28 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
29
f9e0cf0b
AM		 302000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
31
32 * i386.h: Use sl_FP, not sl_Suf for fild.
33
f660ee8b
FCE		 342000-05-16 Frank Ch. Eigler <fche@redhat.com>
35
36 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
37 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
38 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
39 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
40
558b0a60
AM		 412000-05-13 Alan Modra <alan@linuxcare.com.au>,
42
43 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
44
e413e4e9
AM		 452000-05-13 Alan Modra <alan@linuxcare.com.au>,
46 Alexander Sokolov <robocop@netlink.ru>
47
48 * i386.h (i386_optab): Add cpu_flags for all instructions.
49
502000-05-13 Alan Modra <alan@linuxcare.com.au>
51
52 From Gavin Romig-Koch <gavin@cygnus.com>
53 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
54
5c84d377
TW		 552000-05-04 Timothy Wall <twall@cygnus.com>
56
57 * tic54x.h: New.
58
966f959b
C		 592000-05-03 J.T. Conklin <jtc@redback.com>
60
61 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
62 (PPC_OPERAND_VR): New operand flag for vector registers.
63
c5d05dbb
JL		 642000-05-01 Kazu Hirata <kazu@hxi.com>
65
66 * h8300.h (EOP): Add missing initializer.
67
a7fba0e0
JL		 68Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
69
70 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
71 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
72 New operand types l,y,&,fe,fE,fx added to support above forms.
73 (pa_opcodes): Replaced usage of 'x' as source/target for
74 floating point double-word loads/stores with 'fx'.
75
800eeca4
JW		 76Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
77 David Mosberger <davidm@hpl.hp.com>
78 Timothy Wall <twall@cygnus.com>
79 Jim Wilson <wilson@cygnus.com>
80
81 * ia64.h: New file.
82
ba23e138
NC		 832000-03-27 Nick Clifton <nickc@cygnus.com>
84
85 * d30v.h (SHORT_A1): Fix value.
86 (SHORT_AR): Renumber so that it is at the end of the list of short
87 instructions, not the end of the list of long instructions.
88
d0b47220
AM		 892000-03-26 Alan Modra <alan@linuxcare.com>
90
91 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
92 problem isn't really specific to Unixware.
93 (OLDGCC_COMPAT): Define.
94 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
95 destination %st(0).
96 Fix lots of comments.
97
866afedc
NC		 982000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
99
100 * d30v.h:
101 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
102 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
103 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
104 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
105 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
106 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
107 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
108
cc5ca5ce
AM		 1092000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
110
111 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
112 fistpd without suffix.
113
68e324a2
NC		 1142000-02-24 Nick Clifton <nickc@cygnus.com>
115
116 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
117 'signed_overflow_ok_p'.
118 Delete prototypes for cgen_set_flags() and cgen_get_flags().
119
60f036a2
AH		 1202000-02-24 Andrew Haley <aph@cygnus.com>
121
122 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
123 (CGEN_CPU_TABLE): flags: new field.
124 Add prototypes for new functions.
125
9b9b5cd4
AM		 1262000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
127
128 * i386.h: Add some more UNIXWARE_COMPAT comments.
129
5b93d8bb
AM		 1302000-02-23 Linas Vepstas <linas@linas.org>
131
132 * i370.h: New file.
133
87f398dd
AH		 1342000-02-22 Andrew Haley <aph@cygnus.com>
135
136 * mips.h: (OPCODE_IS_MEMBER): Add comment.
137
367c01af
AH		 1381999-12-30 Andrew Haley <aph@cygnus.com>
139
9a1e79ca
AH		 140 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
141 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
142 insns.
367c01af 143
add0c677
AM		 1442000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
145
146 * i386.h: Qualify intel mode far call and jmp with x_Suf.
147
3138f287
AM		 1481999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
149
150 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
151 indirect jumps and calls. Add FF/3 call for intel mode.
152
ccecd07b
JL		 153Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
154
155 * mn10300.h: Add new operand types. Add new instruction formats.
156
b37e19e9
JL		 157Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
158
159 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
160 instruction.
161
5fce5ddf
GRK		 1621999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
163
164 * mips.h (INSN_ISA5): New.
165
2bd7f1f3
GRK		 1661999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
167
168 * mips.h (OPCODE_IS_MEMBER): New.
169
4df2b5c5
NC		 1701999-10-29 Nick Clifton <nickc@cygnus.com>
171
172 * d30v.h (SHORT_AR): Define.
173
446a06c9
MM		 1741999-10-18 Michael Meissner <meissner@cygnus.com>
175
176 * alpha.h (alpha_num_opcodes): Convert to unsigned.
177 (alpha_num_operands): Ditto.
178
eca04c6a
JL		 179Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
180
181 * hppa.h (pa_opcodes): Add load and store cache control to
182 instructions. Add ordered access load and store.
183
184 * hppa.h (pa_opcode): Add new entries for addb and addib.
185
186 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
187
188 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
189
c43185de
DN		 190Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
191
192 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
193
ec3533da
JL		 194Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
195
390f858d
JL		 196 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
197 and "be" using completer prefixes.
198
8c47ebd9
JL		 199 * hppa.h (pa_opcodes): Add initializers to silence compiler.
200
ec3533da
JL		 201 * hppa.h: Update comments about character usage.
202
18369bea
JL		 203Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
204
205 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
206 up the new fstw & bve instructions.
207
c36efdd2
JL		 208Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
209
d3ffb032
JL		 210 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
211 instructions.
212
c49ec3da
JL		 213 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
214
5d2e7ecc
JL		 215 * hppa.h (pa_opcodes): Add long offset double word load/store
216 instructions.
217
6397d1a2
JL		 218 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
219 stores.
220
142f0fe0
JL		 221 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
222
f5a68b45
JL		 223 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
224
8235801e
JL		 225 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
226
35184366
JL		 227 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
228
f0bfde5e
JL		 229 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
230
27bbbb58
JL		 231 * hppa.h (pa_opcodes): Add support for "b,l".
232
c36efdd2
JL		 233 * hppa.h (pa_opcodes): Add support for "b,gate".
234
f2727d04
JL		 235Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
236
9392fb11
JL		 237 * hppa.h (pa_opcodes): Use 'fX' for first register operand
238 in xmpyu.
239
e0c52e99
JL		 240 * hppa.h (pa_opcodes): Fix mask for probe and probei.
241
f2727d04
JL		 242 * hppa.h (pa_opcodes): Fix mask for depwi.
243
52d836e2
JL		 244Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
245
246 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
247 an explicit output argument.
248
90765e3a
JL		 249Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
250
251 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
252 Add a few PA2.0 loads and store variants.
253
8340b17f
ILT		 2541999-09-04 Steve Chamberlain <sac@pobox.com>
255
256 * pj.h: New file.
257
5f47d35b
AM		 2581999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
259
260 * i386.h (i386_regtab): Move %st to top of table, and split off
261 other fp reg entries.
262 (i386_float_regtab): To here.
263
1c143202
JL		 264Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
265
7d8fdb64
JL		 266 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
267 by 'f'.
268
90927b9c
JL		 269 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
270 Add supporting args.
271
1d16bf9c
JL		 272 * hppa.h: Document new completers and args.
273 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
274 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
275 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
276 pmenb and pmdis.
277
96226a68
JL		 278 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
279 hshr, hsub, mixh, mixw, permh.
280
5d4ba527
JL		 281 * hppa.h (pa_opcodes): Change completers in instructions to
282 use 'c' prefix.
283
e9fc28c6
JL		 284 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
285 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
286
1c143202
JL		 287 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
288 fnegabs to use 'I' instead of 'F'.
289
9e525108
AM		 2901999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
291
292 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
293 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
294 Alphabetically sort PIII insns.
295
e8da1bf1
DE		 296Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
297
298 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
299
7d627258
JL		 300Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
301
5696871a
JL		 302 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
303 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
304
7d627258
JL		 305 * hppa.h: Document 64 bit condition completers.
306
c5e52916
JL		 307Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
308
309 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
310
eecb386c
AM		 3111999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
312
313 * i386.h (i386_optab): Add DefaultSize modifier to all insns
314 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
315 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
316
88a380f3
JL		 317Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
318 Jeff Law <law@cygnus.com>
319
320 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
321
322 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 323
324 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
325 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
326
145cf1f0
AM		 3271999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
328
329 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
330
73826640
JL		 331Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
332
333 * hppa.h (struct pa_opcode): Add new field "flags".
334 (FLAGS_STRICT): Define.
335
b65db252
JL		 336Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
337 Jeff Law <law@cygnus.com>
338
f7fc668b
JL		 339 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
340
341 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 342
10084519
AM		 3431999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
344
345 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
346 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
347 flag to fcomi and friends.
348
cd8a80ba
JL		 349Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
350
351 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
352 integer logical instructions.
353
1fca749b
ILT		 3541999-05-28 Linus Nordberg <linus.nordberg@canit.se>
355
356 * m68k.h: Document new formats `E', `G', `H' and new places `N',
357 `n', `o'.
358
359 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
360 and new places `m', `M', `h'.
361
aa008907
JL		 362Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
363
364 * hppa.h (pa_opcodes): Add several processor specific system
365 instructions.
366
e26b85f0
JL		 367Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
368
369 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
370 "addb", and "addib" to be used by the disassembler.
371
c608c12e
AM		 3721999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
373
374 * i386.h (ReverseModrm): Remove all occurences.
375 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
376 movmskps, pextrw, pmovmskb, maskmovq.
377 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
378 ignore the data size prefix.
379
380 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
381 Mostly stolen from Doug Ledford <dledford@redhat.com>
382
45c18104
RH		 383Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
384
385 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
386
252b5132
RH		 3871999-04-14 Doug Evans <devans@casey.cygnus.com>
388
389 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
390 (CGEN_ATTR_TYPE): Update.
391 (CGEN_ATTR_MASK): Number booleans starting at 0.
392 (CGEN_ATTR_VALUE): Update.
393 (CGEN_INSN_ATTR): Update.
394
395Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
396
397 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
398 instructions.
399
400Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
401
402 * hppa.h (bb, bvb): Tweak opcode/mask.
403
404
4051999-03-22 Doug Evans <devans@casey.cygnus.com>
406
407 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
408 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
409 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
410 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
411 Delete member max_insn_size.
412 (enum cgen_cpu_open_arg): New enum.
413 (cpu_open): Update prototype.
414 (cpu_open_1): Declare.
415 (cgen_set_cpu): Delete.
416
4171999-03-11 Doug Evans <devans@casey.cygnus.com>
418
419 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
420 (CGEN_OPERAND_NIL): New macro.
421 (CGEN_OPERAND): New member `type'.
422 (@arch@_cgen_operand_table): Delete decl.
423 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
424 (CGEN_OPERAND_TABLE): New struct.
425 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
426 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
427 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
428 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
429 {get,set}_{int,vma}_operand.
430 (@arch@_cgen_cpu_open): New arg `isa'.
431 (cgen_set_cpu): Ditto.
432
433Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
434
435 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
436
4371999-02-25 Doug Evans <devans@casey.cygnus.com>
438
439 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
440 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
441 enum cgen_hw_type.
442 (CGEN_HW_TABLE): New struct.
443 (hw_table): Delete declaration.
444 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
445 to table entry to enum.
446 (CGEN_OPINST): Ditto.
447 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
448
449Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
450
451 * alpha.h (AXP_OPCODE_EV6): New.
452 (AXP_OPCODE_NOPAL): Include it.
453
4541999-02-09 Doug Evans <devans@casey.cygnus.com>
455
456 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
457 All uses updated. New members int_insn_p, max_insn_size,
458 parse_operand,insert_operand,extract_operand,print_operand,
459 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
460 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
461 extract_handlers,print_handlers.
462 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
463 (CGEN_ATTR_BOOL_OFFSET): New macro.
464 (CGEN_ATTR_MASK): Subtract it to compute bit number.
465 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
466 (cgen_opcode_handler): Renamed from cgen_base.
467 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
468 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
469 all uses updated.
470 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
471 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
472 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
473 (CGEN_OPCODE,CGEN_IBASE): New types.
474 (CGEN_INSN): Rewrite.
475 (CGEN_{ASM,DIS}_HASH*): Delete.
476 (init_opcode_table,init_ibld_table): Declare.
477 (CGEN_INSN_ATTR): New type.
478
479Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
480
481 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
482 (x_FP, d_FP, dls_FP, sldx_FP): Define.
483 Change *Suf definitions to include x and d suffixes.
484 (movsx): Use w_Suf and b_Suf.
485 (movzx): Likewise.
486 (movs): Use bwld_Suf.
487 (fld): Change ordering. Use sld_FP.
488 (fild): Add Intel Syntax equivalent of fildq.
489 (fst): Use sld_FP.
490 (fist): Use sld_FP.
491 (fstp): Use sld_FP. Add x_FP version.
492 (fistp): LLongMem version for Intel Syntax.
493 (fcom, fcomp): Use sld_FP.
494 (fadd, fiadd, fsub): Use sld_FP.
495 (fsubr): Use sld_FP.
496 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
497
4981999-01-27 Doug Evans <devans@casey.cygnus.com>
499
500 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
501 CGEN_MODE_UINT.
502
503Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
504
505 * hppa.h (bv): Fix mask.
506
5071999-01-05 Doug Evans <devans@casey.cygnus.com>
508
509 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
510 (CGEN_ATTR): Use it.
511 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
512 (CGEN_ATTR_TABLE): New member dfault.
513
5141998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
515
516 * mips.h (MIPS16_INSN_BRANCH): New.
517
518Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
519
520 The following is part of a change made by Edith Epstein
521 <eepstein@sophia.cygnus.com> as part of a project to merge in
522 changes by HP; HP did not create ChangeLog entries.
523
524 * hppa.h (completer_chars): list of chars to not put a space
525 after.
526
527Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
528
529 * i386.h (i386_optab): Permit w suffix on processor control and
530 status word instructions.
531
5321998-11-30 Doug Evans <devans@casey.cygnus.com>
533
534 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
535 (struct cgen_keyword_entry): Ditto.
536 (struct cgen_operand): Ditto.
537 (CGEN_IFLD): New typedef, with associated access macros.
538 (CGEN_IFMT): New typedef, with associated access macros.
539 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
540 (CGEN_IVALUE): New typedef.
541 (struct cgen_insn): Delete const on syntax,attrs members.
542 `format' now points to format data. Type of `value' is now
543 CGEN_IVALUE.
544 (struct cgen_opcode_table): New member ifld_table.
545
5461998-11-18 Doug Evans <devans@casey.cygnus.com>
547
548 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
549 (CGEN_OPERAND_INSTANCE): New member `attrs'.
550 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
551 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
552 (cgen_opcode_table): Update type of dis_hash fn.
553 (extract_operand): Update type of `insn_value' arg.
554
555Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
556
557 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
558
559Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
560
561 * mips.h (INSN_MULT): Added.
562
563Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
564
565 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
566
567Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
568
569 * cgen.h (CGEN_INSN_INT): New typedef.
570 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
571 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
572 (CGEN_INSN_BYTES_PTR): New typedef.
573 (CGEN_EXTRACT_INFO): New typedef.
574 (cgen_insert_fn,cgen_extract_fn): Update.
575 (cgen_opcode_table): New member `insn_endian'.
576 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
577 (insert_operand,extract_operand): Update.
578 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
579
580Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
581
582 * cgen.h (CGEN_ATTR_BOOLS): New macro.
583 (struct CGEN_HW_ENTRY): New member `attrs'.
584 (CGEN_HW_ATTR): New macro.
585 (struct CGEN_OPERAND_INSTANCE): New member `name'.
586 (CGEN_INSN_INVALID_P): New macro.
587
588Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
589
590 * hppa.h: Add "fid".
591
592Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
593
594 From Robert Andrew Dale <rob@nb.net>
595 * i386.h (i386_optab): Add AMD 3DNow! instructions.
596 (AMD_3DNOW_OPCODE): Define.
597
598Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
599
600 * d30v.h (EITHER_BUT_PREFER_MU): Define.
601
602Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
603
604 * cgen.h (cgen_insn): #if 0 out element `cdx'.
605
606Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
607
608 Move all global state data into opcode table struct, and treat
609 opcode table as something that is "opened/closed".
610 * cgen.h (CGEN_OPCODE_DESC): New type.
611 (all fns): New first arg of opcode table descriptor.
612 (cgen_set_parse_operand_fn): Add prototype.
613 (cgen_current_machine,cgen_current_endian): Delete.
614 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
615 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
616 dis_hash_table,dis_hash_table_entries.
617 (opcode_open,opcode_close): Add prototypes.
618
619 * cgen.h (cgen_insn): New element `cdx'.
620
621Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
622
623 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
624
625Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
626
627 * mn10300.h: Add "no_match_operands" field for instructions.
628 (MN10300_MAX_OPERANDS): Define.
629
630Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
631
632 * cgen.h (cgen_macro_insn_count): Declare.
633
634Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
635
636 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
637 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
638 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
639 set_{int,vma}_operand.
640
641Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
642
643 * mn10300.h: Add "machine" field for instructions.
644 (MN103, AM30): Define machine types.
645
646Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
647
648 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
649
6501998-06-18 Ulrich Drepper <drepper@cygnus.com>
651
652 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
653
654Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
655
656 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
657 and ud2b.
658 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
659 those that happen to be implemented on pentiums.
660
661Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
662
663 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
664 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
665 with Size16|IgnoreSize or Size32|IgnoreSize.
666
667Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
668
669 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
670 (REPE): Rename to REPE_PREFIX_OPCODE.
671 (i386_regtab_end): Remove.
672 (i386_prefixtab, i386_prefixtab_end): Remove.
673 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
674 of md_begin.
675 (MAX_OPCODE_SIZE): Define.
676 (i386_optab_end): Remove.
677 (sl_Suf): Define.
678 (sl_FP): Use sl_Suf.
679
680 * i386.h (i386_optab): Allow 16 bit displacement for `mov
681 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
682 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
683 data32, dword, and adword prefixes.
684 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
685 regs.
686
687Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
688
689 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
690
691 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
692 register operands, because this is a common idiom. Flag them with
693 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
694 fdivrp because gcc erroneously generates them. Also flag with a
695 warning.
696
697 * i386.h: Add suffix modifiers to most insns, and tighter operand
698 checks in some cases. Fix a number of UnixWare compatibility
699 issues with float insns. Merge some floating point opcodes, using
700 new FloatMF modifier.
701 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
702 consistency.
703
704 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
705 IgnoreDataSize where appropriate.
706
707Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
708
709 * i386.h: (one_byte_segment_defaults): Remove.
710 (two_byte_segment_defaults): Remove.
711 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
712
713Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
714
715 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
716 (cgen_hw_lookup_by_num): Declare.
717
718Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
719
720 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
721 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
722
723Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
724
725 * cgen.h (cgen_asm_init_parse): Delete.
726 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
727 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
728
729Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
730
731 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
732 (cgen_asm_finish_insn): Update prototype.
733 (cgen_insn): New members num, data.
734 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
735 dis_hash, dis_hash_table_size moved to ...
736 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
737 All uses updated. New members asm_hash_p, dis_hash_p.
738 (CGEN_MINSN_EXPANSION): New struct.
739 (cgen_expand_macro_insn): Declare.
740 (cgen_macro_insn_count): Declare.
741 (get_insn_operands): Update prototype.
742 (lookup_get_insn_operands): Declare.
743
744Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
745
746 * i386.h (i386_optab): Change iclrKludge and imulKludge to
747 regKludge. Add operands types for string instructions.
748
749Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
750
751 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
752 table.
753
754Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
755
756 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
757 for `gettext'.
758
759Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
760
761 * i386.h: Remove NoModrm flag from all insns: it's never checked.
762 Add IsString flag to string instructions.
763 (IS_STRING): Don't define.
764 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
765 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
766 (SS_PREFIX_OPCODE): Define.
767
768Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
769
770 * i386.h: Revert March 24 patch; no more LinearAddress.
771
772Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
773
774 * i386.h (i386_optab): Remove fwait (9b) from all floating point
775 instructions, and instead add FWait opcode modifier. Add short
776 form of fldenv and fstenv.
777 (FWAIT_OPCODE): Define.
778
779 * i386.h (i386_optab): Change second operand constraint of `mov
780 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
781 allow legal instructions such as `movl %gs,%esi'
782
783Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
784
785 * h8300.h: Various changes to fully bracket initializers.
786
787Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
788
789 * i386.h: Set LinearAddress for lidt and lgdt.
790
791Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
792
793 * cgen.h (CGEN_BOOL_ATTR): New macro.
794
795Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
796
797 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
798
799Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
800
801 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
802 (cgen_insn): Record syntax and format entries here, rather than
803 separately.
804
805Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
806
807 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
808
809Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
810
811 * cgen.h (cgen_insert_fn): Change type of result to const char *.
812 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
813 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
814
815Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
816
817 * cgen.h (lookup_insn): New argument alias_p.
818
819Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
820
821Fix rac to accept only a0:
822 * d10v.h (OPERAND_ACC): Split into:
823 (OPERAND_ACC0, OPERAND_ACC1) .
824 (OPERAND_GPR): Define.
825
826Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
827
828 * cgen.h (CGEN_FIELDS): Define here.
829 (CGEN_HW_ENTRY): New member `type'.
830 (hw_list): Delete decl.
831 (enum cgen_mode): Declare.
832 (CGEN_OPERAND): New member `hw'.
833 (enum cgen_operand_instance_type): Declare.
834 (CGEN_OPERAND_INSTANCE): New type.
835 (CGEN_INSN): New member `operands'.
836 (CGEN_OPCODE_DATA): Make hw_list const.
837 (get_insn_operands,lookup_insn): Add prototypes for.
838
839Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
840
841 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
842 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
843 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
844 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
845
846Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
847
848 * cgen.h: Correct typo in comment end marker.
849
850Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
851
852 * tic30.h: New file.
853
854Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
855
856 * cgen.h: Add prototypes for cgen_save_fixups(),
857 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
858 of cgen_asm_finish_insn() to return a char *.
859
860Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
861
862 * cgen.h: Formatting changes to improve readability.
863
864Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
865
866 * cgen.h (*): Clean up pass over `struct foo' usage.
867 (CGEN_ATTR): Make unsigned char.
868 (CGEN_ATTR_TYPE): Update.
869 (CGEN_ATTR_{ENTRY,TABLE}): New types.
870 (cgen_base): Move member `attrs' to cgen_insn.
871 (CGEN_KEYWORD): New member `null_entry'.
872 (CGEN_{SYNTAX,FORMAT}): New types.
873 (cgen_insn): Format and syntax separated from each other.
874
875Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
876
877 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
878 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
879 flags_{used,set} long.
880 (d30v_operand): Make flags field long.
881
882Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
883
884 * m68k.h: Fix comment describing operand types.
885
886Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
887
888 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
889 everything else after down.
890
891Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
892
893 * d10v.h (OPERAND_FLAG): Split into:
894 (OPERAND_FFLAG, OPERAND_CFLAG) .
895
896Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
897
898 * mips.h (struct mips_opcode): Changed comments to reflect new
899 field usage.
900
901Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
902
903 * mips.h: Added to comments a quick-ref list of all assigned
904 operand type characters.
905 (OP_{MASK,SH}_PERFREG): New macros.
906
907Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
908
909 * sparc.h: Add '_' and '/' for v9a asr's.
910 Patch from David Miller <davem@vger.rutgers.edu>
911
912Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
913
914 * h8300.h: Bit ops with absolute addresses not in the 8 bit
915 area are not available in the base model (H8/300).
916
917Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
918
919 * m68k.h: Remove documentation of ` operand specifier.
920
921Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
922
923 * m68k.h: Document q and v operand specifiers.
924
925Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
926
927 * v850.h (struct v850_opcode): Add processors field.
928 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
929 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
930 (PROCESSOR_V850EA): New bit constants.
931
932Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
933
934 Merge changes from Martin Hunt:
935
936 * d30v.h: Allow up to 64 control registers. Add
937 SHORT_A5S format.
938
939 * d30v.h (LONG_Db): New form for delayed branches.
940
941 * d30v.h: (LONG_Db): New form for repeati.
942
943 * d30v.h (SHORT_D2B): New form.
944
945 * d30v.h (SHORT_A2): New form.
946
947 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
948 registers are used. Needed for VLIW optimization.
949
950Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
951
952 * cgen.h: Move assembler interface section
953 up so cgen_parse_operand_result is defined for cgen_parse_address.
954 (cgen_parse_address): Update prototype.
955
956Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
957
958 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
959
960Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
961
962 * i386.h (two_byte_segment_defaults): Correct base register 5 in
963 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
964 <paubert@iram.es>.
965
966 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
967 <paubert@iram.es>.
968
969 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
970 <paubert@iram.es>.
971
972 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
973 (JUMP_ON_ECX_ZERO): Remove commented out macro.
974
975Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
976
977 * v850.h (V850_NOT_R0): New flag.
978
979Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
980
981 * v850.h (struct v850_opcode): Remove flags field.
982
983Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
984
985 * v850.h (struct v850_opcode): Add flags field.
986 (struct v850_operand): Extend meaning of 'bits' and 'shift'
987 fields.
988 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
989 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
990
991Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
992
993 * arc.h: New file.
994
995Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
996
997 * sparc.h (sparc_opcodes): Declare as const.
998
999Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1000
1001 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1002 uses single or double precision floating point resources.
1003 (INSN_NO_ISA, INSN_ISA1): Define.
1004 (cpu specific INSN macros): Tweak into bitmasks outside the range
1005 of INSN_ISA field.
1006
1007Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1008
1009 * i386.h: Fix pand opcode.
1010
1011Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1012
1013 * mips.h: Widen INSN_ISA and move it to a more convenient
1014 bit position. Add INSN_3900.
1015
1016Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1017
1018 * mips.h (struct mips_opcode): added new field membership.
1019
1020Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1021
1022 * i386.h (movd): only Reg32 is allowed.
1023
1024 * i386.h: add fcomp and ud2. From Wayne Scott
1025 <wscott@ichips.intel.com>.
1026
1027Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1028
1029 * i386.h: Add MMX instructions.
1030
1031Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1032
1033 * i386.h: Remove W modifier from conditional move instructions.
1034
1035Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1036
1037 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1038 with no arguments to match that generated by the UnixWare
1039 assembler.
1040
1041Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1042
1043 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1044 (cgen_parse_operand_fn): Declare.
1045 (cgen_init_parse_operand): Declare.
1046 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1047 new argument `want'.
1048 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1049 (enum cgen_parse_operand_type): New enum.
1050
1051Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1052
1053 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1054
1055Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1056
1057 * cgen.h: New file.
1058
1059Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1060
1061 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1062 fdivrp.
1063
1064Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1065
1066 * v850.h (extract): Make unsigned.
1067
1068Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1069
1070 * i386.h: Add iclr.
1071
1072Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1073
1074 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1075 take a direction bit.
1076
1077Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1078
1079 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1080
1081Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1082
1083 * sparc.h: Include <ansidecl.h>. Update function declarations to
1084 use prototypes, and to use const when appropriate.
1085
1086Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1087
1088 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1089
1090Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1091
1092 * d10v.h: Change pre_defined_registers to
1093 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1094
1095Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1096
1097 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1098 Change mips_opcodes from const array to a pointer,
1099 and change bfd_mips_num_opcodes from const int to int,
1100 so that we can increase the size of the mips opcodes table
1101 dynamically.
1102
1103Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1104
1105 * d30v.h (FLAG_X): Remove unused flag.
1106
1107Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1108
1109 * d30v.h: New file.
1110
1111Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1112
1113 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1114 (PDS_VALUE): Macro to access value field of predefined symbols.
1115 (tic80_next_predefined_symbol): Add prototype.
1116
1117Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1118
1119 * tic80.h (tic80_symbol_to_value): Change prototype to match
1120 change in function, added class parameter.
1121
1122Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1123
1124 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1125 endmask fields, which are somewhat weird in that 0 and 32 are
1126 treated exactly the same.
1127
1128Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1129
1130 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1131 rather than a constant that is 2**X. Reorder them to put bits for
1132 operands that have symbolic names in the upper bits, so they can
1133 be packed into an int where the lower bits contain the value that
1134 corresponds to that symbolic name.
1135 (predefined_symbo): Add struct.
1136 (tic80_predefined_symbols): Declare array of translations.
1137 (tic80_num_predefined_symbols): Declare size of that array.
1138 (tic80_value_to_symbol): Declare function.
1139 (tic80_symbol_to_value): Declare function.
1140
1141Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1142
1143 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1144
1145Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1146
1147 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1148 be the destination register.
1149
1150Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1151
1152 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1153 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1154 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1155 that the opcode can have two vector instructions in a single
1156 32 bit word and we have to encode/decode both.
1157
1158Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1159
1160 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1161 TIC80_OPERAND_RELATIVE for PC relative.
1162 (TIC80_OPERAND_BASEREL): New flag bit for register
1163 base relative.
1164
1165Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1166
1167 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1168
1169Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1170
1171 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1172 ":s" modifier for scaling.
1173
1174Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1175
1176 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1177 (TIC80_OPERAND_M_LI): Ditto
1178
1179Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1180
1181 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1182 (TIC80_OPERAND_CC): New define for condition code operand.
1183 (TIC80_OPERAND_CR): New define for control register operand.
1184
1185Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1186
1187 * tic80.h (struct tic80_opcode): Name changed.
1188 (struct tic80_opcode): Remove format field.
1189 (struct tic80_operand): Add insertion and extraction functions.
1190 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1191 correct ones.
1192 (FMT_*): Ditto.
1193
1194Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1195
1196 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1197 type IV instruction offsets.
1198
1199Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1200
1201 * tic80.h: New file.
1202
1203Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1204
1205 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1206
1207Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1208
1209 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1210 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1211 * v850.h: Fix comment, v850_operand not powerpc_operand.
1212
1213Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1214
1215 * mn10200.h: Flesh out structures and definitions needed by
1216 the mn10200 assembler & disassembler.
1217
1218Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1219
1220 * mips.h: Add mips16 definitions.
1221
1222Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1223
1224 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1225
1226Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1227
1228 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1229 (MN10300_OPERAND_MEMADDR): Define.
1230
1231Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1232
1233 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1234
1235Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1236
1237 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1238
1239Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1240
1241 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1242
1243Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1244
1245 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1246
1247Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1248
1249 * alpha.h: Don't include "bfd.h"; private relocation types are now
1250 negative to minimize problems with shared libraries. Organize
1251 instruction subsets by AMASK extensions and PALcode
1252 implementation.
1253 (struct alpha_operand): Move flags slot for better packing.
1254
1255Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1256
1257 * v850.h (V850_OPERAND_RELAX): New operand flag.
1258
1259Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1260
1261 * mn10300.h (FMT_*): Move operand format definitions
1262 here.
1263
1264Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1265
1266 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1267
1268Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1269
1270 * mn10300.h (mn10300_opcode): Add "format" field.
1271 (MN10300_OPERAND_*): Define.
1272
1273Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1274
1275 * mn10x00.h: Delete.
1276 * mn10200.h, mn10300.h: New files.
1277
1278Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1279
1280 * mn10x00.h: New file.
1281
1282Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1283
1284 * v850.h: Add new flag to indicate this instruction uses a PC
1285 displacement.
1286
1287Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1288
1289 * h8300.h (stmac): Add missing instruction.
1290
1291Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1292
1293 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1294 field.
1295
1296Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1297
1298 * v850.h (V850_OPERAND_EP): Define.
1299
1300 * v850.h (v850_opcode): Add size field.
1301
1302Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1303
1304 * v850.h (v850_operands): Add insert and extract fields, pointers
1305 to functions used to handle unusual operand encoding.
1306 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1307 V850_OPERAND_SIGNED): Defined.
1308
1309Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1310
1311 * v850.h (v850_operands): Add flags field.
1312 (OPERAND_REG, OPERAND_NUM): Defined.
1313
1314Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1315
1316 * v850.h: New file.
1317
1318Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1319
1320 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1321 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1322 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1323 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1324 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1325 Defined.
1326
1327Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1328
1329 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1330 a 3 bit space id instead of a 2 bit space id.
1331
1332Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1333
1334 * d10v.h: Add some additional defines to support the
1335 assembler in determining which operations can be done in parallel.
1336
1337Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1338
1339 * h8300.h (SN): Define.
1340 (eepmov.b): Renamed from "eepmov"
1341 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1342 with them.
1343
1344Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1345
1346 * d10v.h (OPERAND_SHIFT): New operand flag.
1347
1348Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1349
1350 * d10v.h: Changes for divs, parallel-only instructions, and
1351 signed numbers.
1352
1353Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1354
1355 * d10v.h (pd_reg): Define. Putting the definition here allows
1356 the assembler and disassembler to share the same struct.
1357
1358Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1359
1360 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1361 Williams <steve@icarus.com>.
1362
1363Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1364
1365 * d10v.h: New file.
1366
1367Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1368
1369 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1370
1371Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1372
1373 * m68k.h (mcf5200): New macro.
1374 Document names of coldfire control registers.
1375
1376Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1377
1378 * h8300.h (SRC_IN_DST): Define.
1379
1380 * h8300.h (UNOP3): Mark the register operand in this insn
1381 as a source operand, not a destination operand.
1382 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1383 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1384 register operand with SRC_IN_DST.
1385
1386Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1387
1388 * alpha.h: New file.
1389
1390Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1391
1392 * rs6k.h: Remove obsolete file.
1393
1394Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1395
1396 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1397 fdivp, and fdivrp. Add ffreep.
1398
1399Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1400
1401 * h8300.h: Reorder various #defines for readability.
1402 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1403 (BITOP): Accept additional (unused) argument. All callers changed.
1404 (EBITOP): Likewise.
1405 (O_LAST): Bump.
1406 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1407
1408 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1409 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1410 (BITOP, EBITOP): Handle new H8/S addressing modes for
1411 bit insns.
1412 (UNOP3): Handle new shift/rotate insns on the H8/S.
1413 (insns using exr): New instructions.
1414 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1415
1416Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1417
1418 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1419 was incorrect.
1420
1421Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1422
1423 * h8300.h (START): Remove.
1424 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1425 and mov.l insns that can be relaxed.
1426
1427Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1428
1429 * i386.h: Remove Abs32 from lcall.
1430
1431Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1432
1433 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1434 (SLCPOP): New macro.
1435 Mark X,Y opcode letters as in use.
1436
1437Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1438
1439 * sparc.h (F_FLOAT, F_FBR): Define.
1440
1441Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1442
1443 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1444 from all insns.
1445 (ABS8SRC,ABS8DST): Add ABS8MEM.
1446 (add.l): Fix reg+reg variant.
1447 (eepmov.w): Renamed from eepmovw.
1448 (ldc,stc): Fix many cases.
1449
1450Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1451
1452 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1453
1454Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1455
1456 * sparc.h (O): Mark operand letter as in use.
1457
1458Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1459
1460 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1461 Mark operand letters uU as in use.
1462
1463Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1464
1465 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1466 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1467 (SPARC_OPCODE_SUPPORTED): New macro.
1468 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1469 (F_NOTV9): Delete.
1470
1471Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1472
1473 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1474 declaration consistent with return type in definition.
1475
1476Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1477
1478 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1479
1480Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1481
1482 * i386.h (i386_regtab): Add 80486 test registers.
1483
1484Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1485
1486 * i960.h (I_HX): Define.
1487 (i960_opcodes): Add HX instruction.
1488
1489Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1490
1491 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1492 and fclex.
1493
1494Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1495
1496 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1497 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1498 (bfd_* defines): Delete.
1499 (sparc_opcode_archs): Replaces architecture_pname.
1500 (sparc_opcode_lookup_arch): Declare.
1501 (NUMOPCODES): Delete.
1502
1503Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1504
1505 * sparc.h (enum sparc_architecture): Add v9a.
1506 (ARCHITECTURES_CONFLICT_P): Update.
1507
1508Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1509
1510 * i386.h: Added Pentium Pro instructions.
1511
1512Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1513
1514 * m68k.h: Document new 'W' operand place.
1515
1516Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1517
1518 * hppa.h: Add lci and syncdma instructions.
1519
1520Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1521
1522 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1523 instructions.
1524
1525Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1526
1527 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1528 assembler's -mcom and -many switches.
1529
1530Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1531
1532 * i386.h: Fix cmpxchg8b extension opcode description.
1533
1534Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1535
1536 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1537 and register cr4.
1538
1539Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1540
1541 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1542
1543Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1544
1545 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1546
1547Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1548
1549 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1550
1551Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1552
1553 * m68kmri.h: Remove.
1554
1555 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1556 declarations. Remove F_ALIAS and flag field of struct
1557 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1558 int. Make name and args fields of struct m68k_opcode const.
1559
1560Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1561
1562 * sparc.h (F_NOTV9): Define.
1563
1564Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1565
1566 * mips.h (INSN_4010): Define.
1567
1568Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1569
1570 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1571
1572 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1573 * m68k.h: Fix argument descriptions of coprocessor
1574 instructions to allow only alterable operands where appropriate.
1575 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1576 (m68k_opcode_aliases): Add more aliases.
1577
1578Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1579
1580 * m68k.h: Added explcitly short-sized conditional branches, and a
1581 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1582 svr4-based configurations.
1583
1584Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1585
1586 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1587 * i386.h: added missing Data16/Data32 flags to a few instructions.
1588
1589Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1590
1591 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1592 (OP_MASK_BCC, OP_SH_BCC): Define.
1593 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1594 (OP_MASK_CCC, OP_SH_CCC): Define.
1595 (INSN_READ_FPR_R): Define.
1596 (INSN_RFE): Delete.
1597
1598Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1599
1600 * m68k.h (enum m68k_architecture): Deleted.
1601 (struct m68k_opcode_alias): New type.
1602 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1603 matching constraints, values and flags. As a side effect of this,
1604 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1605 as I know were never used, now may need re-examining.
1606 (numopcodes): Now const.
1607 (m68k_opcode_aliases, numaliases): New variables.
1608 (endop): Deleted.
1609 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1610 m68k_opcode_aliases; update declaration of m68k_opcodes.
1611
1612Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1613
1614 * hppa.h (delay_type): Delete unused enumeration.
1615 (pa_opcode): Replace unused delayed field with an architecture
1616 field.
1617 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1618
1619Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1620
1621 * mips.h (INSN_ISA4): Define.
1622
1623Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1624
1625 * mips.h (M_DLA_AB, M_DLI): Define.
1626
1627Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1628
1629 * hppa.h (fstwx): Fix single-bit error.
1630
1631Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1632
1633 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1634
1635Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1636
1637 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1638 debug registers. From Charles Hannum (mycroft@netbsd.org).
1639
1640Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1641
1642 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1643 i386 support:
1644 * i386.h (MOV_AX_DISP32): New macro.
1645 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1646 of several call/return instructions.
1647 (ADDR_PREFIX_OPCODE): New macro.
1648
1649Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1650
1651 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1652
1653 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1654 it pointer to const char;
1655 (struct vot, field `name'): ditto.
1656
1657Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1658
1659 * vax.h: Supply and properly group all values in end sentinel.
1660
1661Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1662
1663 * mips.h (INSN_ISA, INSN_4650): Define.
1664
1665Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1666
1667 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1668 systems with a separate instruction and data cache, such as the
1669 29040, these instructions take an optional argument.
1670
1671Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1672
1673 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1674 INSN_TRAP.
1675
1676Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1677
1678 * mips.h (INSN_STORE_MEMORY): Define.
1679
1680Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1681
1682 * sparc.h: Document new operand type 'x'.
1683
1684Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1685
1686 * i960.h (I_CX2): New instruction category. It includes
1687 instructions available on Cx and Jx processors.
1688 (I_JX): New instruction category, for JX-only instructions.
1689 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1690 Jx-only instructions, in I_JX category.
1691
1692Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1693
1694 * ns32k.h (endop): Made pointer const too.
1695
1696Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1697
1698 * ns32k.h: Drop Q operand type as there is no correct use
1699 for it. Add I and Z operand types which allow better checking.
1700
1701Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1702
1703 * h8300.h (xor.l) :fix bit pattern.
1704 (L_2): New size of operand.
1705 (trapa): Use it.
1706
1707Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1708
1709 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1710
1711Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1712
1713 * sparc.h: Include v9 definitions.
1714
1715Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1716
1717 * m68k.h (m68060): Defined.
1718 (m68040up, mfloat, mmmu): Include it.
1719 (struct m68k_opcode): Widen `arch' field.
1720 (m68k_opcodes): Updated for M68060. Removed comments that were
1721 instructions commented out by "JF" years ago.
1722
1723Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1724
1725 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1726 add a one-bit `flags' field.
1727 (F_ALIAS): New macro.
1728
1729Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1730
1731 * h8300.h (dec, inc): Get encoding right.
1732
1733Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1734
1735 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1736 a flag instead.
1737 (PPC_OPERAND_SIGNED): Define.
1738 (PPC_OPERAND_SIGNOPT): Define.
1739
1740Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1741
1742 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1743 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1744
1745Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1746
1747 * i386.h: Reverse last change. It'll be handled in gas instead.
1748
1749Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1750
1751 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1752 slower on the 486 and used the implicit shift count despite the
1753 explicit operand. The one-operand form is still available to get
1754 the shorter form with the implicit shift count.
1755
1756Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1757
1758 * hppa.h: Fix typo in fstws arg string.
1759
1760Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1761
1762 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1763
1764Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1765
1766 * ppc.h (PPC_OPCODE_601): Define.
1767
1768Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1769
1770 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1771 (so we can determine valid completers for both addb and addb[tf].)
1772
1773 * hppa.h (xmpyu): No floating point format specifier for the
1774 xmpyu instruction.
1775
1776Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1777
1778 * ppc.h (PPC_OPERAND_NEXT): Define.
1779 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1780 (struct powerpc_macro): Define.
1781 (powerpc_macros, powerpc_num_macros): Declare.
1782
1783Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1784
1785 * ppc.h: New file. Header file for PowerPC opcode table.
1786
1787Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1788
1789 * hppa.h: More minor template fixes for sfu and copr (to allow
1790 for easier disassembly).
1791
1792 * hppa.h: Fix templates for all the sfu and copr instructions.
1793
1794Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1795
1796 * i386.h (push): Permit Imm16 operand too.
1797
1798Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1799
1800 * h8300.h (andc): Exists in base arch.
1801
1802Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1803
1804 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1805 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1806
1807Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1808
1809 * hppa.h: Add FP quadword store instructions.
1810
1811Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1812
1813 * mips.h: (M_J_A): Added.
1814 (M_LA): Removed.
1815
1816Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1817
1818 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1819 <mellon@pepper.ncd.com>.
1820
1821Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1822
1823 * hppa.h: Immediate field in probei instructions is unsigned,
1824 not low-sign extended.
1825
1826Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1827
1828 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1829
1830Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1831
1832 * i386.h: Add "fxch" without operand.
1833
1834Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1835
1836 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1837
1838Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1839
1840 * hppa.h: Add gfw and gfr to the opcode table.
1841
1842Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1843
1844 * m88k.h: extended to handle m88110.
1845
1846Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1847
1848 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1849 addresses.
1850
1851Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1852
1853 * i960.h (i960_opcodes): Properly bracket initializers.
1854
1855Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1856
1857 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1858
1859Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1860
1861 * m68k.h (two): Protect second argument with parentheses.
1862
1863Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1864
1865 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1866 Deleted old in/out instructions in "#if 0" section.
1867
1868Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1869
1870 * i386.h (i386_optab): Properly bracket initializers.
1871
1872Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1873
1874 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1875 Jeff Law, law@cs.utah.edu).
1876
1877Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1878
1879 * i386.h (lcall): Accept Imm32 operand also.
1880
1881Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1882
1883 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1884 (M_DABS): Added.
1885
1886Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1887
1888 * mips.h (INSN_*): Changed values. Removed unused definitions.
1889 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1890 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1891 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1892 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1893 (M_*): Added new values for r6000 and r4000 macros.
1894 (ANY_DELAY): Removed.
1895
1896Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1897
1898 * mips.h: Added M_LI_S and M_LI_SS.
1899
1900Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1901
1902 * h8300.h: Get some rare mov.bs correct.
1903
1904Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1905
1906 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1907 been included.
1908
1909Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1910
1911 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1912 jump instructions, for use in disassemblers.
1913
1914Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1915
1916 * m88k.h: Make bitfields just unsigned, not unsigned long or
1917 unsigned short.
1918
1919Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1920
1921 * hppa.h: New argument type 'y'. Use in various float instructions.
1922
1923Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1924
1925 * hppa.h (break): First immediate field is unsigned.
1926
1927 * hppa.h: Add rfir instruction.
1928
1929Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1930
1931 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1932
1933Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1934
1935 * mips.h: Reworked the hazard information somewhat, and fixed some
1936 bugs in the instruction hazard descriptions.
1937
1938Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1939
1940 * m88k.h: Corrected a couple of opcodes.
1941
1942Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1943
1944 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1945 new version includes instruction hazard information, but is
1946 otherwise reasonably similar.
1947
1948Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1949
1950 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1951
1952Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1953
1954 Patches from Jeff Law, law@cs.utah.edu:
1955 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1956 Make the tables be the same for the following instructions:
1957 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1958 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1959 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1960 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1961 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1962 "fcmp", and "ftest".
1963
1964 * hppa.h: Make new and old tables the same for "break", "mtctl",
1965 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1966 Fix typo in last patch. Collapse several #ifdefs into a
1967 single #ifdef.
1968
1969 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1970 of the comments up-to-date.
1971
1972 * hppa.h: Update "free list" of letters and update
1973 comments describing each letter's function.
1974
1975Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1976
1977 * h8300.h: checkpoint, includes H8/300-H opcodes.
1978
1979Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1980
1981 * Patches from Jeffrey Law <law@cs.utah.edu>.
1982 * hppa.h: Rework single precision FP
1983 instructions so that they correctly disassemble code
1984 PA1.1 code.
1985
1986Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1987
1988 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1989 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1990
1991Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1992
1993 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1994 gdb will define it for now.
1995
1996Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1997
1998 * sparc.h: Don't end enumerator list with comma.
1999
2000Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2001
2002 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2003 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2004 ("bc2t"): Correct typo.
2005 ("[ls]wc[023]"): Use T rather than t.
2006 ("c[0123]"): Define general coprocessor instructions.
2007
2008Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2009
2010 * m68k.h: Move split point for gcc compilation more towards
2011 middle.
2012
2013Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2014
2015 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2016 simply wrong, ics, rfi, & rfsvc were missing).
2017 Add "a" to opr_ext for "bb". Doc fix.
2018
2019Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2020
2021 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2022 * mips.h: Add casts, to suppress warnings about shifting too much.
2023 * m68k.h: Document the placement code '9'.
2024
2025Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2026
2027 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2028 allows callers to break up the large initialized struct full of
2029 opcodes into two half-sized ones. This permits GCC to compile
2030 this module, since it takes exponential space for initializers.
2031 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2032
2033Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2034
2035 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2036 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2037 initialized structs in it.
2038
2039Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2040
2041 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2042 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2043 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2044
2045Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2046
2047 * mips.h: document "i" and "j" operands correctly.
2048
2049Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2050
2051 * mips.h: Removed endianness dependency.
2052
2053Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2054
2055 * h8300.h: include info on number of cycles per instruction.
2056
2057Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2058
2059 * hppa.h: Move handy aliases to the front. Fix masks for extract
2060 and deposit instructions.
2061
2062Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2063
2064 * i386.h: accept shld and shrd both with and without the shift
2065 count argument, which is always %cl.
2066
2067Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2068
2069 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2070 (one_byte_segment_defaults, two_byte_segment_defaults,
2071 i386_prefixtab_end): Ditto.
2072
2073Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2074
2075 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2076 for operand 2; from John Carr, jfc@dsg.dec.com.
2077
2078Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2079
2080 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2081 always use 16-bit offsets. Makes calculated-size jump tables
2082 feasible.
2083
2084Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2085
2086 * i386.h: Fix one-operand forms of in* and out* patterns.
2087
2088Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2089
2090 * m68k.h: Added CPU32 support.
2091
2092Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2093
2094 * mips.h (break): Disassemble the argument. Patch from
2095 jonathan@cs.stanford.edu (Jonathan Stone).
2096
2097Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2098
2099 * m68k.h: merged Motorola and MIT syntax.
2100
2101Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2102
2103 * m68k.h (pmove): make the tests less strict, the 68k book is
2104 wrong.
2105
2106Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2107
2108 * m68k.h (m68ec030): Defined as alias for 68030.
2109 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2110 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2111 them. Tightened description of "fmovex" to distinguish it from
2112 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2113 up descriptions that claimed versions were available for chips not
2114 supporting them. Added "pmovefd".
2115
2116Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2117
2118 * m68k.h: fix where the . goes in divull
2119
2120Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2121
2122 * m68k.h: the cas2 instruction is supposed to be written with
2123 indirection on the last two operands, which can be either data or
2124 address registers. Added a new operand type 'r' which accepts
2125 either register type. Added new cases for cas2l and cas2w which
2126 use them. Corrected masks for cas2 which failed to recognize use
2127 of address register.
2128
2129Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2130
2131 * m68k.h: Merged in patches (mostly m68040-specific) from
2132 Colin Smith <colin@wrs.com>.
2133
2134 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2135 base). Also cleaned up duplicates, re-ordered instructions for
2136 the sake of dis-assembling (so aliases come after standard names).
2137 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2138
2139Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2140
2141 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2142 all missing .s
2143
2144Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2145
2146 * sparc.h: Moved tables to BFD library.
2147
2148 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2149
2150Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2151
2152 * h8300.h: Finish filling in all the holes in the opcode table,
2153 so that the Lucid C compiler can digest this as well...
2154
2155Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2156
2157 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2158 Fix opcodes on various sizes of fild/fist instructions
2159 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2160 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2161
2162Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2163
2164 * h8300.h: Fill in all the holes in the opcode table so that the
2165 losing HPUX C compiler can digest this...
2166
2167Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2168
2169 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2170 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2171
2172Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2173
2174 * sparc.h: Add new architecture variant sparclite; add its scan
2175 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2176
2177Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2178
2179 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2180 fy@lucid.com).
2181
2182Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2183
2184 * rs6k.h: New version from IBM (Metin).
2185
2186Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2187
2188 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2189 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2190
2191Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2192
2193 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2194
2195Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2196
2197 * m68k.h (one, two): Cast macro args to unsigned to suppress
2198 complaints from compiler and lint about integer overflow during
2199 shift.
2200
2201Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2202
2203 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2204
2205Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2206
2207 * mips.h: Make bitfield layout depend on the HOST compiler,
2208 not on the TARGET system.
2209
2210Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2211
2212 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2213 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2214 <TRANLE@INTELLICORP.COM>.
2215
2216Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2217
2218 * h8300.h: turned op_type enum into #define list
2219
2220Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2221
2222 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2223 similar instructions -- they've been renamed to "fitoq", etc.
2224 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2225 number of arguments.
2226 * h8300.h: Remove extra ; which produces compiler warning.
2227
2228Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2229
2230 * sparc.h: fix opcode for tsubcctv.
2231
2232Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2233
2234 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2235
2236Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2237
2238 * sparc.h (nop): Made the 'lose' field be even tighter,
2239 so only a standard 'nop' is disassembled as a nop.
2240
2241Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2242
2243 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2244 disassembled as a nop.
2245
2246Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2247
2248 * sparc.h: fix a typo.
2249
2250Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2251
2252 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2253 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2254 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2255
2256\f
2257Local Variables:
2258version-control: never
2259End:
GDB Binutils - Deliverables
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